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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.56 99.27 96.33 100.00 95.51 98.74 99.33 93.71


Total test records in report: 906
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T604 /workspace/coverage/default/2.sysrst_ctrl_smoke.3396158195 Jun 28 06:03:45 PM PDT 24 Jun 28 06:03:53 PM PDT 24 2124520520 ps
T343 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2513077959 Jun 28 06:05:51 PM PDT 24 Jun 28 06:06:30 PM PDT 24 26338831744 ps
T322 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2435493165 Jun 28 06:05:09 PM PDT 24 Jun 28 06:06:17 PM PDT 24 143111675017 ps
T605 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.387205490 Jun 28 06:03:44 PM PDT 24 Jun 28 06:03:59 PM PDT 24 3810729016 ps
T606 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1902023470 Jun 28 06:05:36 PM PDT 24 Jun 28 06:05:45 PM PDT 24 2121799264 ps
T108 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2177669278 Jun 28 06:05:09 PM PDT 24 Jun 28 06:07:13 PM PDT 24 44283198291 ps
T265 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1660361089 Jun 28 06:04:03 PM PDT 24 Jun 28 06:07:27 PM PDT 24 689377039767 ps
T607 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.696444223 Jun 28 06:03:58 PM PDT 24 Jun 28 06:04:02 PM PDT 24 2024010888 ps
T608 /workspace/coverage/default/12.sysrst_ctrl_smoke.2997877686 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:31 PM PDT 24 2116992710 ps
T609 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.717589904 Jun 28 06:04:56 PM PDT 24 Jun 28 06:05:07 PM PDT 24 3876219780 ps
T185 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.3240316866 Jun 28 06:05:02 PM PDT 24 Jun 28 06:05:19 PM PDT 24 4283015390 ps
T610 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3472658623 Jun 28 06:04:21 PM PDT 24 Jun 28 06:04:31 PM PDT 24 2525967104 ps
T611 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3209815958 Jun 28 06:05:47 PM PDT 24 Jun 28 06:06:09 PM PDT 24 25114354625 ps
T176 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.345503358 Jun 28 06:04:05 PM PDT 24 Jun 28 06:04:13 PM PDT 24 3449697800 ps
T104 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2057162217 Jun 28 06:04:02 PM PDT 24 Jun 28 06:05:09 PM PDT 24 26303164882 ps
T86 /workspace/coverage/default/1.sysrst_ctrl_stress_all.215433007 Jun 28 06:03:43 PM PDT 24 Jun 28 06:05:26 PM PDT 24 2341865967484 ps
T612 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1851355170 Jun 28 06:05:50 PM PDT 24 Jun 28 06:06:30 PM PDT 24 25836044852 ps
T101 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1148265275 Jun 28 06:04:52 PM PDT 24 Jun 28 06:05:05 PM PDT 24 10294896320 ps
T102 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.2357131603 Jun 28 06:05:02 PM PDT 24 Jun 28 06:06:03 PM PDT 24 43875465001 ps
T613 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.851256320 Jun 28 06:04:39 PM PDT 24 Jun 28 06:04:51 PM PDT 24 2618837903 ps
T313 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.569905011 Jun 28 06:04:50 PM PDT 24 Jun 28 06:06:42 PM PDT 24 82951098207 ps
T323 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3664861371 Jun 28 06:04:14 PM PDT 24 Jun 28 06:05:05 PM PDT 24 86147077816 ps
T337 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.4258363838 Jun 28 06:04:30 PM PDT 24 Jun 28 06:08:26 PM PDT 24 84433393983 ps
T614 /workspace/coverage/default/31.sysrst_ctrl_smoke.1254946531 Jun 28 06:04:51 PM PDT 24 Jun 28 06:05:01 PM PDT 24 2140527664 ps
T615 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1410813479 Jun 28 06:05:07 PM PDT 24 Jun 28 06:05:16 PM PDT 24 2469094746 ps
T616 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.259136540 Jun 28 06:05:24 PM PDT 24 Jun 28 06:05:31 PM PDT 24 2046731352 ps
T342 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.2281058641 Jun 28 06:04:19 PM PDT 24 Jun 28 06:11:00 PM PDT 24 163464819839 ps
T617 /workspace/coverage/default/11.sysrst_ctrl_stress_all.830334803 Jun 28 06:04:17 PM PDT 24 Jun 28 06:04:27 PM PDT 24 14589038002 ps
T618 /workspace/coverage/default/11.sysrst_ctrl_alert_test.3844036437 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:30 PM PDT 24 2017717367 ps
T619 /workspace/coverage/default/21.sysrst_ctrl_alert_test.3947535460 Jun 28 06:04:31 PM PDT 24 Jun 28 06:04:42 PM PDT 24 2028238490 ps
T620 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.935346510 Jun 28 06:05:49 PM PDT 24 Jun 28 06:07:35 PM PDT 24 38765312377 ps
T621 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1046305543 Jun 28 06:05:37 PM PDT 24 Jun 28 06:10:23 PM PDT 24 111773659845 ps
T622 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.907214249 Jun 28 06:05:39 PM PDT 24 Jun 28 06:05:47 PM PDT 24 2064377926 ps
T623 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.219268599 Jun 28 06:04:48 PM PDT 24 Jun 28 06:04:59 PM PDT 24 3625383180 ps
T298 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.2416200095 Jun 28 06:04:29 PM PDT 24 Jun 28 06:05:59 PM PDT 24 172386769099 ps
T624 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.1772134902 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:29 PM PDT 24 2499237195 ps
T625 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2885907924 Jun 28 06:05:36 PM PDT 24 Jun 28 06:05:44 PM PDT 24 3348829198 ps
T626 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2810384020 Jun 28 06:05:44 PM PDT 24 Jun 28 06:07:08 PM PDT 24 28657505921 ps
T627 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1764315199 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:36 PM PDT 24 4088439929 ps
T628 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1563111449 Jun 28 06:04:06 PM PDT 24 Jun 28 06:04:15 PM PDT 24 2514645989 ps
T629 /workspace/coverage/default/41.sysrst_ctrl_smoke.2987709030 Jun 28 06:05:36 PM PDT 24 Jun 28 06:05:47 PM PDT 24 2108503835 ps
T630 /workspace/coverage/default/8.sysrst_ctrl_smoke.1068448734 Jun 28 06:04:15 PM PDT 24 Jun 28 06:04:20 PM PDT 24 2132026287 ps
T631 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2057018899 Jun 28 06:04:04 PM PDT 24 Jun 28 06:04:16 PM PDT 24 2613394577 ps
T632 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3772894739 Jun 28 06:04:56 PM PDT 24 Jun 28 06:05:12 PM PDT 24 3470677622 ps
T633 /workspace/coverage/default/5.sysrst_ctrl_smoke.2067120631 Jun 28 06:04:03 PM PDT 24 Jun 28 06:04:13 PM PDT 24 2109582105 ps
T634 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.2596930983 Jun 28 06:03:42 PM PDT 24 Jun 28 06:03:50 PM PDT 24 5931714228 ps
T635 /workspace/coverage/default/9.sysrst_ctrl_stress_all.1960934336 Jun 28 06:04:14 PM PDT 24 Jun 28 06:07:26 PM PDT 24 324492583658 ps
T636 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2488342698 Jun 28 06:04:20 PM PDT 24 Jun 28 06:04:31 PM PDT 24 2165321163 ps
T87 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3173844740 Jun 28 06:05:34 PM PDT 24 Jun 28 06:05:40 PM PDT 24 3252600968 ps
T637 /workspace/coverage/default/48.sysrst_ctrl_smoke.1487833712 Jun 28 06:05:35 PM PDT 24 Jun 28 06:05:46 PM PDT 24 2111369393 ps
T638 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.4182076578 Jun 28 06:04:29 PM PDT 24 Jun 28 06:04:45 PM PDT 24 2660885740 ps
T639 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1536266209 Jun 28 06:05:39 PM PDT 24 Jun 28 06:05:51 PM PDT 24 4525254792 ps
T640 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2596210239 Jun 28 06:04:53 PM PDT 24 Jun 28 06:05:12 PM PDT 24 3622580813 ps
T641 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.780202954 Jun 28 06:04:56 PM PDT 24 Jun 28 06:05:06 PM PDT 24 2129447879 ps
T642 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3323484069 Jun 28 06:04:04 PM PDT 24 Jun 28 06:06:21 PM PDT 24 55180429882 ps
T643 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.1460850211 Jun 28 06:05:03 PM PDT 24 Jun 28 06:05:17 PM PDT 24 3862373011 ps
T644 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.196598810 Jun 28 06:03:42 PM PDT 24 Jun 28 06:04:58 PM PDT 24 33296496424 ps
T645 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1203141167 Jun 28 06:04:04 PM PDT 24 Jun 28 06:04:35 PM PDT 24 51471754097 ps
T353 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.2572020586 Jun 28 06:05:10 PM PDT 24 Jun 28 06:08:55 PM PDT 24 1250266904913 ps
T646 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3945136809 Jun 28 06:05:37 PM PDT 24 Jun 28 06:05:44 PM PDT 24 2523021673 ps
T159 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.945192446 Jun 28 06:05:35 PM PDT 24 Jun 28 06:05:43 PM PDT 24 2758962073 ps
T647 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.994395575 Jun 28 06:03:46 PM PDT 24 Jun 28 06:03:55 PM PDT 24 2094148241 ps
T648 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.1152838209 Jun 28 06:04:05 PM PDT 24 Jun 28 06:09:17 PM PDT 24 121818615822 ps
T163 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.2781623853 Jun 28 06:04:51 PM PDT 24 Jun 28 06:05:01 PM PDT 24 4899740818 ps
T649 /workspace/coverage/default/1.sysrst_ctrl_smoke.1886632268 Jun 28 06:03:47 PM PDT 24 Jun 28 06:03:55 PM PDT 24 2168605739 ps
T650 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.681786887 Jun 28 06:05:05 PM PDT 24 Jun 28 06:05:20 PM PDT 24 2613580428 ps
T192 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.3252899078 Jun 28 06:05:25 PM PDT 24 Jun 28 06:05:32 PM PDT 24 3349177183 ps
T651 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.2288757858 Jun 28 06:04:18 PM PDT 24 Jun 28 06:04:29 PM PDT 24 2620319382 ps
T652 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3319762 Jun 28 06:05:04 PM PDT 24 Jun 28 06:05:14 PM PDT 24 3655746844 ps
T172 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.369098076 Jun 28 06:05:40 PM PDT 24 Jun 28 06:05:54 PM PDT 24 2910928879 ps
T653 /workspace/coverage/default/14.sysrst_ctrl_alert_test.2027344747 Jun 28 06:04:17 PM PDT 24 Jun 28 06:04:25 PM PDT 24 2030900818 ps
T155 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.4289432628 Jun 28 06:05:22 PM PDT 24 Jun 28 06:07:12 PM PDT 24 80234900982 ps
T654 /workspace/coverage/default/41.sysrst_ctrl_stress_all.2594463798 Jun 28 06:05:36 PM PDT 24 Jun 28 06:06:13 PM PDT 24 13426293635 ps
T655 /workspace/coverage/default/16.sysrst_ctrl_smoke.341075700 Jun 28 06:04:16 PM PDT 24 Jun 28 06:04:25 PM PDT 24 2112128268 ps
T656 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.235729544 Jun 28 06:03:49 PM PDT 24 Jun 28 06:03:57 PM PDT 24 2492660947 ps
T657 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3875519899 Jun 28 06:05:11 PM PDT 24 Jun 28 06:05:28 PM PDT 24 3705318477 ps
T658 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.732639379 Jun 28 06:05:48 PM PDT 24 Jun 28 06:07:39 PM PDT 24 41199776750 ps
T310 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.2108351400 Jun 28 06:05:02 PM PDT 24 Jun 28 06:11:36 PM PDT 24 153388112501 ps
T659 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.70918593 Jun 28 06:03:50 PM PDT 24 Jun 28 06:03:58 PM PDT 24 2116353158 ps
T660 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.592070830 Jun 28 06:04:37 PM PDT 24 Jun 28 06:06:59 PM PDT 24 51673187539 ps
T661 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.3436753984 Jun 28 06:04:25 PM PDT 24 Jun 28 06:04:40 PM PDT 24 2609267816 ps
T662 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1269847512 Jun 28 06:05:56 PM PDT 24 Jun 28 06:07:31 PM PDT 24 40477672071 ps
T663 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.1308700501 Jun 28 06:04:15 PM PDT 24 Jun 28 06:04:21 PM PDT 24 5097665108 ps
T664 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.3471094123 Jun 28 06:04:02 PM PDT 24 Jun 28 06:04:09 PM PDT 24 3320371789 ps
T665 /workspace/coverage/default/29.sysrst_ctrl_stress_all.1223855274 Jun 28 06:04:50 PM PDT 24 Jun 28 06:05:05 PM PDT 24 8889751939 ps
T666 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.903641418 Jun 28 06:04:16 PM PDT 24 Jun 28 06:09:42 PM PDT 24 131720654075 ps
T667 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1891613139 Jun 28 06:04:16 PM PDT 24 Jun 28 06:04:30 PM PDT 24 3765798564 ps
T668 /workspace/coverage/default/6.sysrst_ctrl_smoke.1837778718 Jun 28 06:04:02 PM PDT 24 Jun 28 06:04:11 PM PDT 24 2111684117 ps
T669 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1140771132 Jun 28 06:05:42 PM PDT 24 Jun 28 06:05:49 PM PDT 24 2264028525 ps
T670 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.4263042393 Jun 28 06:03:43 PM PDT 24 Jun 28 06:04:19 PM PDT 24 62553065312 ps
T671 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.951457442 Jun 28 06:05:10 PM PDT 24 Jun 28 06:05:18 PM PDT 24 2534912665 ps
T672 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.3596914213 Jun 28 06:04:49 PM PDT 24 Jun 28 06:04:57 PM PDT 24 7621022500 ps
T673 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.3414854107 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:29 PM PDT 24 3414513448 ps
T674 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.3197559605 Jun 28 06:04:33 PM PDT 24 Jun 28 06:04:43 PM PDT 24 2247384055 ps
T675 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2892333337 Jun 28 06:04:48 PM PDT 24 Jun 28 06:05:02 PM PDT 24 2469552551 ps
T676 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.990159229 Jun 28 06:05:24 PM PDT 24 Jun 28 06:05:31 PM PDT 24 2529357660 ps
T677 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3055310088 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:29 PM PDT 24 2621133029 ps
T678 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3824238847 Jun 28 06:04:01 PM PDT 24 Jun 28 06:04:07 PM PDT 24 2494924330 ps
T679 /workspace/coverage/default/19.sysrst_ctrl_alert_test.3375828123 Jun 28 06:04:45 PM PDT 24 Jun 28 06:04:54 PM PDT 24 2020830873 ps
T680 /workspace/coverage/default/35.sysrst_ctrl_stress_all.1886263268 Jun 28 06:05:08 PM PDT 24 Jun 28 06:05:21 PM PDT 24 12489407820 ps
T681 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1899548913 Jun 28 06:04:17 PM PDT 24 Jun 28 06:06:09 PM PDT 24 44597015795 ps
T682 /workspace/coverage/default/23.sysrst_ctrl_smoke.1843781 Jun 28 06:04:34 PM PDT 24 Jun 28 06:04:44 PM PDT 24 2128575112 ps
T683 /workspace/coverage/default/31.sysrst_ctrl_stress_all.2944308824 Jun 28 06:04:58 PM PDT 24 Jun 28 06:05:14 PM PDT 24 10540638652 ps
T684 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2157657630 Jun 28 06:04:04 PM PDT 24 Jun 28 06:04:11 PM PDT 24 2469298413 ps
T345 /workspace/coverage/default/22.sysrst_ctrl_stress_all.939944692 Jun 28 06:04:36 PM PDT 24 Jun 28 06:09:55 PM PDT 24 123842769279 ps
T685 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.1183106924 Jun 28 06:04:49 PM PDT 24 Jun 28 06:05:01 PM PDT 24 2953833952 ps
T686 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.3293082755 Jun 28 06:04:55 PM PDT 24 Jun 28 06:05:06 PM PDT 24 4121436611 ps
T687 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.4097767693 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:29 PM PDT 24 6007180145 ps
T688 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2783038941 Jun 28 06:04:41 PM PDT 24 Jun 28 06:06:07 PM PDT 24 128999227107 ps
T689 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1142271957 Jun 28 06:04:48 PM PDT 24 Jun 28 06:04:56 PM PDT 24 2653544376 ps
T305 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1375382440 Jun 28 06:05:26 PM PDT 24 Jun 28 06:05:54 PM PDT 24 97829936126 ps
T690 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.2969037661 Jun 28 06:04:17 PM PDT 24 Jun 28 06:04:27 PM PDT 24 3182245349 ps
T691 /workspace/coverage/default/39.sysrst_ctrl_stress_all.841709936 Jun 28 06:05:33 PM PDT 24 Jun 28 06:05:39 PM PDT 24 6337921456 ps
T692 /workspace/coverage/default/30.sysrst_ctrl_stress_all.1017282694 Jun 28 06:04:48 PM PDT 24 Jun 28 06:06:16 PM PDT 24 119365720011 ps
T109 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.3817989387 Jun 28 06:04:58 PM PDT 24 Jun 28 06:05:16 PM PDT 24 10347659194 ps
T234 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.4150737463 Jun 28 06:04:15 PM PDT 24 Jun 28 06:04:23 PM PDT 24 7494615304 ps
T693 /workspace/coverage/default/6.sysrst_ctrl_alert_test.279233844 Jun 28 06:04:06 PM PDT 24 Jun 28 06:04:17 PM PDT 24 2014857875 ps
T694 /workspace/coverage/default/14.sysrst_ctrl_smoke.3278444266 Jun 28 06:04:25 PM PDT 24 Jun 28 06:04:40 PM PDT 24 2115363984 ps
T231 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.1277385414 Jun 28 06:04:03 PM PDT 24 Jun 28 06:04:36 PM PDT 24 42109596973 ps
T326 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4011774870 Jun 28 06:05:46 PM PDT 24 Jun 28 06:07:10 PM PDT 24 125115598462 ps
T695 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.2840952075 Jun 28 06:04:30 PM PDT 24 Jun 28 06:06:05 PM PDT 24 137686168512 ps
T696 /workspace/coverage/default/22.sysrst_ctrl_smoke.3903897826 Jun 28 06:04:32 PM PDT 24 Jun 28 06:04:46 PM PDT 24 2114578319 ps
T697 /workspace/coverage/default/43.sysrst_ctrl_smoke.3562854685 Jun 28 06:05:36 PM PDT 24 Jun 28 06:05:42 PM PDT 24 2138953429 ps
T249 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.2715865482 Jun 28 06:04:03 PM PDT 24 Jun 28 06:04:15 PM PDT 24 22179502732 ps
T698 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.955615162 Jun 28 06:04:57 PM PDT 24 Jun 28 06:05:09 PM PDT 24 2612487314 ps
T699 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.3681815253 Jun 28 06:05:04 PM PDT 24 Jun 28 06:05:14 PM PDT 24 3389082917 ps
T700 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1461380230 Jun 28 06:05:36 PM PDT 24 Jun 28 06:05:45 PM PDT 24 2486120786 ps
T173 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.3408829815 Jun 28 06:04:25 PM PDT 24 Jun 28 06:04:41 PM PDT 24 2596602462 ps
T701 /workspace/coverage/default/38.sysrst_ctrl_stress_all.3810349574 Jun 28 06:05:10 PM PDT 24 Jun 28 06:05:22 PM PDT 24 10531057435 ps
T702 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1758716624 Jun 28 06:05:09 PM PDT 24 Jun 28 06:05:23 PM PDT 24 2510301021 ps
T703 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3914699128 Jun 28 06:05:51 PM PDT 24 Jun 28 06:06:23 PM PDT 24 72672859970 ps
T704 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.937370967 Jun 28 06:05:32 PM PDT 24 Jun 28 06:05:40 PM PDT 24 2215926159 ps
T705 /workspace/coverage/default/34.sysrst_ctrl_alert_test.1386351049 Jun 28 06:04:56 PM PDT 24 Jun 28 06:05:10 PM PDT 24 2014451900 ps
T706 /workspace/coverage/default/32.sysrst_ctrl_smoke.1988900185 Jun 28 06:04:54 PM PDT 24 Jun 28 06:05:04 PM PDT 24 2133351114 ps
T707 /workspace/coverage/default/15.sysrst_ctrl_alert_test.2473165309 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:29 PM PDT 24 2027480955 ps
T350 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.12700375 Jun 28 06:04:34 PM PDT 24 Jun 28 06:06:15 PM PDT 24 38024832697 ps
T708 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3787750527 Jun 28 06:05:43 PM PDT 24 Jun 28 06:05:50 PM PDT 24 2527690367 ps
T105 /workspace/coverage/default/24.sysrst_ctrl_stress_all.4004546621 Jun 28 06:04:47 PM PDT 24 Jun 28 06:07:09 PM PDT 24 105767540793 ps
T341 /workspace/coverage/default/37.sysrst_ctrl_stress_all.48561951 Jun 28 06:05:07 PM PDT 24 Jun 28 06:06:57 PM PDT 24 179419329137 ps
T709 /workspace/coverage/default/21.sysrst_ctrl_smoke.2847291588 Jun 28 06:04:31 PM PDT 24 Jun 28 06:04:46 PM PDT 24 2110400702 ps
T710 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3690075366 Jun 28 06:05:40 PM PDT 24 Jun 28 06:05:53 PM PDT 24 2453883371 ps
T711 /workspace/coverage/default/28.sysrst_ctrl_alert_test.2065483858 Jun 28 06:04:56 PM PDT 24 Jun 28 06:05:06 PM PDT 24 2115805007 ps
T712 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1913285680 Jun 28 06:05:35 PM PDT 24 Jun 28 06:05:47 PM PDT 24 4813239420 ps
T317 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3921557834 Jun 28 06:04:16 PM PDT 24 Jun 28 06:05:41 PM PDT 24 118506503368 ps
T713 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.1655525406 Jun 28 06:04:29 PM PDT 24 Jun 28 06:04:40 PM PDT 24 2532457530 ps
T714 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.1697639900 Jun 28 06:04:48 PM PDT 24 Jun 28 06:05:12 PM PDT 24 44528424575 ps
T715 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.3891112078 Jun 28 06:05:10 PM PDT 24 Jun 28 06:05:28 PM PDT 24 4252557447 ps
T336 /workspace/coverage/default/12.sysrst_ctrl_stress_all.2093989172 Jun 28 06:04:20 PM PDT 24 Jun 28 06:05:47 PM PDT 24 137350533025 ps
T716 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3397328889 Jun 28 06:04:52 PM PDT 24 Jun 28 06:05:03 PM PDT 24 2643601759 ps
T717 /workspace/coverage/default/13.sysrst_ctrl_smoke.2620998441 Jun 28 06:04:21 PM PDT 24 Jun 28 06:04:31 PM PDT 24 2123945513 ps
T718 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.931479281 Jun 28 06:03:57 PM PDT 24 Jun 28 06:04:10 PM PDT 24 3931448507 ps
T110 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.358831994 Jun 28 06:04:16 PM PDT 24 Jun 28 06:04:25 PM PDT 24 4812894856 ps
T168 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.2611445519 Jun 28 06:05:46 PM PDT 24 Jun 28 06:05:53 PM PDT 24 3065488950 ps
T719 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.3985141108 Jun 28 06:04:35 PM PDT 24 Jun 28 06:04:47 PM PDT 24 2150529823 ps
T720 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3723998405 Jun 28 06:04:21 PM PDT 24 Jun 28 06:04:32 PM PDT 24 3560304188 ps
T721 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2295648364 Jun 28 06:04:15 PM PDT 24 Jun 28 06:04:26 PM PDT 24 3469366536 ps
T722 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.636448743 Jun 28 06:04:32 PM PDT 24 Jun 28 06:04:48 PM PDT 24 2613352614 ps
T207 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.4078772205 Jun 28 06:05:09 PM PDT 24 Jun 28 06:06:36 PM PDT 24 134612638769 ps
T723 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3131942939 Jun 28 06:05:02 PM PDT 24 Jun 28 06:05:18 PM PDT 24 2510297518 ps
T724 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2228124871 Jun 28 06:04:18 PM PDT 24 Jun 28 06:04:30 PM PDT 24 3324228089 ps
T208 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.1473516660 Jun 28 06:04:45 PM PDT 24 Jun 28 06:07:06 PM PDT 24 56969876560 ps
T725 /workspace/coverage/default/7.sysrst_ctrl_smoke.3921961477 Jun 28 06:04:11 PM PDT 24 Jun 28 06:04:15 PM PDT 24 2120478361 ps
T726 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3251343207 Jun 28 06:05:39 PM PDT 24 Jun 28 06:05:53 PM PDT 24 5422958364 ps
T727 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.2011377280 Jun 28 06:04:32 PM PDT 24 Jun 28 06:05:38 PM PDT 24 118994737185 ps
T728 /workspace/coverage/default/47.sysrst_ctrl_smoke.1617790155 Jun 28 06:05:34 PM PDT 24 Jun 28 06:05:39 PM PDT 24 2132280752 ps
T729 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.3565237649 Jun 28 06:04:21 PM PDT 24 Jun 28 06:04:35 PM PDT 24 2178338380 ps
T730 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3786985289 Jun 28 06:04:21 PM PDT 24 Jun 28 06:04:36 PM PDT 24 2610934495 ps
T731 /workspace/coverage/default/48.sysrst_ctrl_stress_all.2039371142 Jun 28 06:05:36 PM PDT 24 Jun 28 06:05:56 PM PDT 24 75850735632 ps
T732 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1994784285 Jun 28 06:04:43 PM PDT 24 Jun 28 06:05:21 PM PDT 24 89424068064 ps
T733 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.2212633488 Jun 28 06:05:22 PM PDT 24 Jun 28 06:11:33 PM PDT 24 139431530107 ps
T734 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3196749199 Jun 28 06:05:27 PM PDT 24 Jun 28 06:05:35 PM PDT 24 2477058873 ps
T106 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2834184035 Jun 28 06:04:50 PM PDT 24 Jun 28 06:06:24 PM PDT 24 1322933582914 ps
T177 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.2893842987 Jun 28 06:04:29 PM PDT 24 Jun 28 06:04:46 PM PDT 24 5115333137 ps
T178 /workspace/coverage/default/3.sysrst_ctrl_stress_all.2011735609 Jun 28 06:04:03 PM PDT 24 Jun 28 06:04:32 PM PDT 24 9088390774 ps
T179 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.1691589570 Jun 28 06:04:20 PM PDT 24 Jun 28 06:04:36 PM PDT 24 3330993920 ps
T63 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2716130266 Jun 28 06:03:48 PM PDT 24 Jun 28 06:05:14 PM PDT 24 33087006073 ps
T180 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2054797509 Jun 28 06:04:02 PM PDT 24 Jun 28 06:04:12 PM PDT 24 2610676814 ps
T181 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2631378516 Jun 28 06:04:57 PM PDT 24 Jun 28 06:05:09 PM PDT 24 3694401654 ps
T182 /workspace/coverage/default/3.sysrst_ctrl_alert_test.176446523 Jun 28 06:04:03 PM PDT 24 Jun 28 06:04:09 PM PDT 24 2092404356 ps
T183 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1092495368 Jun 28 06:05:33 PM PDT 24 Jun 28 06:05:38 PM PDT 24 2573994060 ps
T184 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2956027400 Jun 28 06:04:21 PM PDT 24 Jun 28 06:04:37 PM PDT 24 3203454312 ps
T278 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1096931271 Jun 28 06:04:56 PM PDT 24 Jun 28 06:06:13 PM PDT 24 25638257187 ps
T735 /workspace/coverage/default/22.sysrst_ctrl_alert_test.3356188148 Jun 28 06:04:33 PM PDT 24 Jun 28 06:04:43 PM PDT 24 2036703221 ps
T736 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.1096703364 Jun 28 06:04:55 PM PDT 24 Jun 28 06:05:10 PM PDT 24 2483770625 ps
T737 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.1497660527 Jun 28 06:05:13 PM PDT 24 Jun 28 06:05:30 PM PDT 24 5509164097 ps
T738 /workspace/coverage/default/20.sysrst_ctrl_alert_test.2726144278 Jun 28 06:04:34 PM PDT 24 Jun 28 06:04:44 PM PDT 24 2030711599 ps
T739 /workspace/coverage/default/33.sysrst_ctrl_alert_test.875376128 Jun 28 06:05:03 PM PDT 24 Jun 28 06:05:12 PM PDT 24 2056741568 ps
T740 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2148092511 Jun 28 06:04:06 PM PDT 24 Jun 28 06:04:13 PM PDT 24 2492973725 ps
T741 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3504146421 Jun 28 06:04:47 PM PDT 24 Jun 28 06:04:59 PM PDT 24 2615174563 ps
T276 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.258971935 Jun 28 06:05:37 PM PDT 24 Jun 28 06:06:19 PM PDT 24 16058865929 ps
T742 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1777052170 Jun 28 06:05:56 PM PDT 24 Jun 28 06:06:21 PM PDT 24 139988376266 ps
T743 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3974659475 Jun 28 06:04:40 PM PDT 24 Jun 28 06:04:54 PM PDT 24 2467768848 ps
T744 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3655709063 Jun 28 06:05:24 PM PDT 24 Jun 28 06:05:32 PM PDT 24 7329971610 ps
T745 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3082892763 Jun 28 06:05:39 PM PDT 24 Jun 28 06:05:53 PM PDT 24 3072086340 ps
T746 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.3977244190 Jun 28 06:04:51 PM PDT 24 Jun 28 06:05:05 PM PDT 24 3586815594 ps
T107 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2182239338 Jun 28 06:05:36 PM PDT 24 Jun 28 06:06:02 PM PDT 24 52258946459 ps
T747 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.1364525504 Jun 28 06:05:20 PM PDT 24 Jun 28 06:05:35 PM PDT 24 3469633095 ps
T748 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.704248052 Jun 28 06:05:37 PM PDT 24 Jun 28 06:05:45 PM PDT 24 2630845566 ps
T749 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1342814063 Jun 28 06:04:02 PM PDT 24 Jun 28 06:09:31 PM PDT 24 120544082369 ps
T750 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.429832072 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:34 PM PDT 24 2430379317 ps
T751 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.393338972 Jun 28 06:05:24 PM PDT 24 Jun 28 06:05:32 PM PDT 24 2548018053 ps
T752 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1053056985 Jun 28 06:04:32 PM PDT 24 Jun 28 06:06:06 PM PDT 24 40004607434 ps
T753 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2285188631 Jun 28 06:05:40 PM PDT 24 Jun 28 06:05:56 PM PDT 24 4147245691 ps
T754 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.79085539 Jun 28 06:04:18 PM PDT 24 Jun 28 06:04:30 PM PDT 24 2467555076 ps
T755 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2184996289 Jun 28 06:04:29 PM PDT 24 Jun 28 06:04:44 PM PDT 24 4797063635 ps
T111 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.799394707 Jun 28 06:04:05 PM PDT 24 Jun 28 06:04:17 PM PDT 24 3106903343 ps
T126 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.4133399820 Jun 28 06:05:02 PM PDT 24 Jun 28 06:05:13 PM PDT 24 3734911803 ps
T127 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.3619103260 Jun 28 06:04:05 PM PDT 24 Jun 28 06:04:19 PM PDT 24 4648407017 ps
T756 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2080945627 Jun 28 06:04:31 PM PDT 24 Jun 28 06:04:41 PM PDT 24 6524290612 ps
T757 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.370248548 Jun 28 06:05:09 PM PDT 24 Jun 28 06:05:18 PM PDT 24 2642405210 ps
T320 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.3417034689 Jun 28 06:04:03 PM PDT 24 Jun 28 06:06:47 PM PDT 24 115933470726 ps
T349 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.544931647 Jun 28 06:05:46 PM PDT 24 Jun 28 06:08:15 PM PDT 24 160446405481 ps
T758 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1759399897 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:29 PM PDT 24 2537339579 ps
T759 /workspace/coverage/default/46.sysrst_ctrl_alert_test.2954414424 Jun 28 06:05:33 PM PDT 24 Jun 28 06:05:37 PM PDT 24 2033832373 ps
T760 /workspace/coverage/default/25.sysrst_ctrl_stress_all.3978643180 Jun 28 06:04:49 PM PDT 24 Jun 28 06:05:04 PM PDT 24 12445252403 ps
T209 /workspace/coverage/default/2.sysrst_ctrl_stress_all.2676154629 Jun 28 06:04:05 PM PDT 24 Jun 28 06:09:14 PM PDT 24 119819102883 ps
T761 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.479903004 Jun 28 06:03:47 PM PDT 24 Jun 28 06:04:01 PM PDT 24 2629300719 ps
T762 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.2493429966 Jun 28 06:04:17 PM PDT 24 Jun 28 06:05:24 PM PDT 24 131969887137 ps
T763 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.3337113784 Jun 28 06:05:03 PM PDT 24 Jun 28 06:05:18 PM PDT 24 2452649255 ps
T764 /workspace/coverage/default/25.sysrst_ctrl_alert_test.25271785 Jun 28 06:04:52 PM PDT 24 Jun 28 06:05:03 PM PDT 24 2030226859 ps
T765 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.3447005923 Jun 28 06:04:58 PM PDT 24 Jun 28 06:10:44 PM PDT 24 125697542272 ps
T766 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.4129057156 Jun 28 06:04:20 PM PDT 24 Jun 28 06:04:30 PM PDT 24 2629809875 ps
T767 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.2702875877 Jun 28 06:04:30 PM PDT 24 Jun 28 06:04:48 PM PDT 24 3231968855 ps
T768 /workspace/coverage/default/8.sysrst_ctrl_alert_test.3801900036 Jun 28 06:04:15 PM PDT 24 Jun 28 06:04:18 PM PDT 24 2035900628 ps
T769 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.72574968 Jun 28 06:05:02 PM PDT 24 Jun 28 06:05:12 PM PDT 24 2534592256 ps
T770 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1930096992 Jun 28 06:05:35 PM PDT 24 Jun 28 06:05:42 PM PDT 24 3545330329 ps
T771 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1389570198 Jun 28 06:04:14 PM PDT 24 Jun 28 06:04:22 PM PDT 24 2259813221 ps
T772 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3796082768 Jun 28 06:04:41 PM PDT 24 Jun 28 06:04:50 PM PDT 24 2106884672 ps
T319 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3772005658 Jun 28 06:04:01 PM PDT 24 Jun 28 06:07:05 PM PDT 24 72208103673 ps
T773 /workspace/coverage/default/33.sysrst_ctrl_stress_all.489710075 Jun 28 06:04:54 PM PDT 24 Jun 28 06:05:20 PM PDT 24 6767455193 ps
T774 /workspace/coverage/default/17.sysrst_ctrl_smoke.3682647716 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:30 PM PDT 24 2116448043 ps
T775 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.4000265161 Jun 28 06:04:17 PM PDT 24 Jun 28 06:04:26 PM PDT 24 2525131964 ps
T776 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1990903218 Jun 28 06:04:18 PM PDT 24 Jun 28 06:04:28 PM PDT 24 9883608245 ps
T777 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.1295029333 Jun 28 06:04:17 PM PDT 24 Jun 28 06:04:30 PM PDT 24 8922613509 ps
T250 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.3893591427 Jun 28 06:03:45 PM PDT 24 Jun 28 06:04:18 PM PDT 24 42108538798 ps
T778 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1692972767 Jun 28 06:04:50 PM PDT 24 Jun 28 06:04:59 PM PDT 24 2534258306 ps
T779 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3923681509 Jun 28 06:04:19 PM PDT 24 Jun 28 06:04:28 PM PDT 24 2809254373 ps
T780 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1234088714 Jun 28 06:05:40 PM PDT 24 Jun 28 06:05:53 PM PDT 24 2509687548 ps
T781 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.1133290839 Jun 28 06:04:34 PM PDT 24 Jun 28 06:04:54 PM PDT 24 5540777238 ps
T782 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.848816272 Jun 28 06:05:51 PM PDT 24 Jun 28 06:13:19 PM PDT 24 177622074650 ps
T783 /workspace/coverage/default/0.sysrst_ctrl_alert_test.4079560305 Jun 28 06:03:56 PM PDT 24 Jun 28 06:04:00 PM PDT 24 2033509430 ps
T226 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.360154925 Jun 28 06:00:39 PM PDT 24 Jun 28 06:00:53 PM PDT 24 2147414332 ps
T784 /workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.2491108106 Jun 28 06:00:43 PM PDT 24 Jun 28 06:00:58 PM PDT 24 2013111782 ps
T785 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.1572757036 Jun 28 06:00:39 PM PDT 24 Jun 28 06:00:51 PM PDT 24 2069231389 ps
T18 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.377980932 Jun 28 06:00:43 PM PDT 24 Jun 28 06:01:01 PM PDT 24 10483472833 ps
T786 /workspace/coverage/cover_reg_top/30.sysrst_ctrl_intr_test.3138484774 Jun 28 06:00:42 PM PDT 24 Jun 28 06:00:54 PM PDT 24 2028332264 ps
T29 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.342644081 Jun 28 06:00:29 PM PDT 24 Jun 28 06:00:55 PM PDT 24 6017665996 ps
T19 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_same_csr_outstanding.424488188 Jun 28 06:00:42 PM PDT 24 Jun 28 06:01:08 PM PDT 24 9565840551 ps
T20 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3548376007 Jun 28 06:00:31 PM PDT 24 Jun 28 06:00:52 PM PDT 24 10004658851 ps
T227 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.1681615503 Jun 28 06:00:30 PM PDT 24 Jun 28 06:01:26 PM PDT 24 42652073427 ps
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