SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
sysrst_ctrl_pin_in_value_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 16 | 0 | 16 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_ac_present | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst_l | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_flash_wp_l | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key0_in | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key1_in | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key2_in | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_lid_open | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_in | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1447 | 1 | T13 | 22 | T49 | 13 | T11 | 9 | ||||
auto[1] | 1438 | 1 | T13 | 23 | T49 | 15 | T11 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1401 | 1 | T13 | 29 | T49 | 12 | T11 | 10 | ||||
auto[1] | 1484 | 1 | T13 | 16 | T49 | 16 | T11 | 7 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1477 | 1 | T13 | 25 | T49 | 18 | T11 | 10 | ||||
auto[1] | 1408 | 1 | T13 | 20 | T49 | 10 | T11 | 7 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1444 | 1 | T13 | 19 | T49 | 12 | T11 | 5 | ||||
auto[1] | 1441 | 1 | T13 | 26 | T49 | 16 | T11 | 12 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1440 | 1 | T13 | 26 | T49 | 17 | T11 | 8 | ||||
auto[1] | 1445 | 1 | T13 | 19 | T49 | 11 | T11 | 9 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1394 | 1 | T13 | 25 | T49 | 13 | T11 | 12 | ||||
auto[1] | 1491 | 1 | T13 | 20 | T49 | 15 | T11 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1414 | 1 | T13 | 21 | T49 | 15 | T11 | 4 | ||||
auto[1] | 1471 | 1 | T13 | 24 | T49 | 13 | T11 | 13 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1413 | 1 | T13 | 19 | T49 | 14 | T11 | 10 | ||||
auto[1] | 1472 | 1 | T13 | 26 | T49 | 14 | T11 | 7 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |