Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.90	99.27	96.78	100.00	96.79	98.71	99.52	94.20

Total tests in report: 914

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
46.72	46.72	63.03	63.03	47.80	47.80	85.27	85.27	8.33	8.33	66.73	66.73	53.37	53.37	2.49	2.49	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.462598817
63.82	17.10	80.43	17.39	70.22	22.42	91.67	6.39	28.85	20.51	80.70	13.97	73.80	20.42	21.05	18.56	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2683939991
77.54	13.73	90.43	10.00	82.99	12.77	93.26	1.60	63.46	34.62	91.09	10.39	87.09	13.29	34.48	13.43	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.4127276789
84.82	7.28	94.20	3.77	88.04	5.06	94.63	1.37	69.23	5.77	94.53	3.44	94.32	7.23	58.78	24.31	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2965793469
87.49	2.67	94.76	0.56	88.78	0.73	95.32	0.68	75.00	5.77	95.16	0.63	95.76	1.45	67.62	8.84	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1175818728
89.32	1.84	95.84	1.08	90.42	1.64	95.32	0.00	83.97	8.97	96.30	1.15	95.76	0.00	67.62	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.474208980
90.94	1.62	98.00	2.16	92.49	2.07	97.03	1.71	86.54	2.56	97.67	1.37	97.01	1.25	67.85	0.22	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3328122436
92.22	1.28	98.02	0.02	93.58	1.09	97.72	0.68	86.54	0.00	97.71	0.04	97.11	0.10	74.86	7.02	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1142431045
93.12	0.90	98.21	0.19	93.93	0.35	97.72	0.00	88.46	1.92	97.82	0.11	97.11	0.00	78.56	3.70	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.3051421578
93.48	0.37	98.32	0.11	94.06	0.13	97.72	0.00	88.46	0.00	97.82	0.00	97.11	0.00	80.88	2.32	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.2877972672
93.85	0.37	98.40	0.07	94.11	0.05	97.72	0.00	89.74	1.28	97.89	0.07	97.30	0.19	81.77	0.88	/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3566088212
94.16	0.31	98.45	0.06	94.14	0.03	97.72	0.00	91.03	1.28	97.97	0.07	97.40	0.10	82.43	0.66	/workspace/coverage/default/29.sysrst_ctrl_stress_all.1678459062
94.45	0.29	98.53	0.07	94.24	0.10	97.72	0.00	91.03	0.00	97.97	0.00	97.40	0.00	84.25	1.82	/workspace/coverage/default/20.sysrst_ctrl_stress_all.1794577310
94.69	0.24	98.60	0.07	94.29	0.05	97.72	0.00	92.31	1.28	98.04	0.07	97.59	0.19	84.25	0.00	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.307559177
94.92	0.24	98.68	0.07	94.34	0.05	97.72	0.00	93.59	1.28	98.11	0.07	97.78	0.19	84.25	0.00	/workspace/coverage/default/33.sysrst_ctrl_edge_detect.635237444
95.16	0.24	98.73	0.06	94.41	0.08	99.09	1.37	93.59	0.00	98.11	0.00	97.78	0.00	84.42	0.17	/workspace/coverage/default/12.sysrst_ctrl_alert_test.4005594761
95.39	0.22	98.73	0.00	94.44	0.03	99.09	0.00	93.59	0.00	98.11	0.00	97.78	0.00	85.97	1.55	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.4287126625
95.60	0.22	98.77	0.04	94.51	0.08	99.09	0.00	94.23	0.64	98.19	0.07	97.98	0.19	86.46	0.50	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3076435719
95.80	0.19	98.82	0.06	94.72	0.20	99.09	0.00	94.23	0.00	98.26	0.07	98.65	0.67	86.80	0.33	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.726602921
95.97	0.17	98.88	0.06	95.20	0.48	99.09	0.00	94.87	0.64	98.30	0.04	98.65	0.00	86.80	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3688922061
96.13	0.16	98.88	0.00	95.20	0.00	99.09	0.00	94.87	0.00	98.30	0.00	98.65	0.00	87.90	1.10	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3615694639
96.28	0.15	98.88	0.00	96.21	1.01	99.09	0.00	94.87	0.00	98.30	0.00	98.65	0.00	87.96	0.06	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2984337091
96.43	0.15	98.92	0.04	96.23	0.03	99.09	0.00	95.51	0.64	98.34	0.04	98.75	0.10	88.18	0.22	/workspace/coverage/default/4.sysrst_ctrl_stress_all.3900142463
96.58	0.15	98.92	0.00	96.23	0.00	99.09	0.00	95.51	0.00	98.34	0.00	98.75	0.00	89.23	1.05	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.4040622450
96.73	0.15	98.96	0.04	96.31	0.08	99.09	0.00	96.15	0.64	98.37	0.04	98.94	0.19	89.28	0.06	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1209723952
96.86	0.13	99.01	0.06	96.33	0.03	99.09	0.00	96.79	0.64	98.45	0.07	99.04	0.10	89.28	0.00	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1997872267
96.97	0.12	99.05	0.04	96.41	0.08	99.54	0.46	96.79	0.00	98.45	0.00	99.23	0.19	89.34	0.06	/workspace/coverage/default/17.sysrst_ctrl_stress_all.271791016
97.07	0.10	99.05	0.00	96.44	0.03	100.00	0.46	96.79	0.00	98.45	0.00	99.33	0.10	89.45	0.11	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.2771726372
97.16	0.09	99.05	0.00	96.46	0.03	100.00	0.00	96.79	0.00	98.45	0.00	99.33	0.00	90.06	0.61	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3728211016
97.23	0.07	99.05	0.00	96.46	0.00	100.00	0.00	96.79	0.00	98.45	0.00	99.33	0.00	90.55	0.50	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.3972916134
97.30	0.06	99.05	0.00	96.46	0.00	100.00	0.00	96.79	0.00	98.45	0.00	99.33	0.00	90.99	0.44	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3129556892
97.35	0.06	99.05	0.00	96.46	0.00	100.00	0.00	96.79	0.00	98.45	0.00	99.33	0.00	91.38	0.39	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.4065074268
97.40	0.05	99.09	0.04	96.61	0.15	100.00	0.00	96.79	0.00	98.52	0.07	99.42	0.10	91.38	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3454549167
97.45	0.05	99.10	0.02	96.61	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.42	0.00	91.71	0.33	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2633734280
97.50	0.05	99.12	0.02	96.64	0.03	100.00	0.00	96.79	0.00	98.52	0.00	99.42	0.00	91.99	0.28	/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3864509238
97.53	0.03	99.14	0.02	96.64	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.42	0.00	92.21	0.22	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1499574970
97.56	0.03	99.16	0.02	96.64	0.00	100.00	0.00	96.79	0.00	98.56	0.04	99.42	0.00	92.38	0.17	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1224659334
97.59	0.03	99.18	0.02	96.66	0.03	100.00	0.00	96.79	0.00	98.60	0.04	99.42	0.00	92.49	0.11	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1471529125
97.62	0.03	99.20	0.02	96.66	0.00	100.00	0.00	96.79	0.00	98.60	0.00	99.42	0.00	92.65	0.17	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3158049163
97.64	0.03	99.20	0.00	96.69	0.03	100.00	0.00	96.79	0.00	98.60	0.00	99.52	0.10	92.71	0.06	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.910526129
97.67	0.02	99.20	0.00	96.69	0.00	100.00	0.00	96.79	0.00	98.60	0.00	99.52	0.00	92.87	0.17	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.899105945
97.68	0.02	99.23	0.04	96.69	0.00	100.00	0.00	96.79	0.00	98.67	0.07	99.52	0.00	92.87	0.00	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3478950205
97.70	0.02	99.23	0.00	96.69	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	92.98	0.11	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.917881133
97.71	0.02	99.23	0.00	96.69	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	93.09	0.11	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.3919874883
97.73	0.02	99.23	0.00	96.69	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	93.20	0.11	/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1250999954
97.75	0.02	99.23	0.00	96.69	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	93.31	0.11	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2411935944
97.76	0.02	99.23	0.00	96.69	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	93.43	0.11	/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3749127473
97.78	0.02	99.23	0.00	96.69	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	93.54	0.11	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1603391941
97.79	0.01	99.23	0.00	96.71	0.03	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	93.59	0.06	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_intg_err.1828391488
97.80	0.01	99.25	0.02	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.04	99.52	0.00	93.59	0.00	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.1851053096
97.80	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	93.65	0.06	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1891202250
97.81	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	93.70	0.06	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.1607243188
97.82	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	93.76	0.06	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.2994291726
97.83	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	93.81	0.06	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1796394757
97.84	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	93.87	0.06	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3498533924
97.84	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	93.92	0.06	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.4240573183
97.85	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	93.98	0.06	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3656233387
97.86	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	94.03	0.06	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.143784705
97.87	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	94.09	0.06	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2338262931
97.88	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	94.14	0.06	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3334243375
97.88	0.01	99.25	0.00	96.71	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	94.20	0.06	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2098105602
97.89	0.01	99.25	0.00	96.76	0.05	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	94.20	0.00	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3757055541
97.89	0.01	99.27	0.02	96.76	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.52	0.00	94.20	0.00	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.4231952539

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.786404704
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.3083044890
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1236603578
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.498121398
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1702890884
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2986983257
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.330245028
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.281660468
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3388778666
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2320311400
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.4202384055
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.866782258
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2358897692
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2288397478
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2789157287
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.1344793895
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1633928835
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2741069655
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.356230572
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3418327130
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1946251770
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.4272487676
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3778275043
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2916260879
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3593350294
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2740670887
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2363480343
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3905577817
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.57190290
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.747191064
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.4063295698
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3946411288
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2204370211
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1336329521
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.496248873
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3598836993
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.3357188805
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.187668306
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1095849194
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.640578099
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.525204071
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2250656986
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.245139581
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.282274360
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.288592743
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.469127136
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.847902105
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2633085303
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1498297630
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3698335520
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2170138638
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2805657221
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2059610187
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.381572902
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2394972929
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.1667151473
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1318499159
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2007783669
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.1721912031
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.2342563819
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.270707033
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/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.2307491686
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.3416490235
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3564562166
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3369604286
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3642889911
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3865158569
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.1412884083
/workspace/coverage/default/4.sysrst_ctrl_smoke.3121306298
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.590713993
/workspace/coverage/default/40.sysrst_ctrl_alert_test.3694128504
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.4218477146
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.1806546466
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1034658540
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2862635789
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3158083989
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1637197610
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2071197761
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3419044617
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1241597726
/workspace/coverage/default/40.sysrst_ctrl_smoke.2562097640
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2448497587
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.382994113
/workspace/coverage/default/41.sysrst_ctrl_alert_test.52447324
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2167216418
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.1769935267
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.909472295
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.2747486514
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.292096515
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1742868033
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2918408593
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1273284059
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2621462048
/workspace/coverage/default/41.sysrst_ctrl_smoke.2712952600
/workspace/coverage/default/41.sysrst_ctrl_stress_all.247418272
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1478802108
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3483175818
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2189231094
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1696079181
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.931952643
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3319398463
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3077711002
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3108046890
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3041826868
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.4260068355
/workspace/coverage/default/42.sysrst_ctrl_smoke.439882930
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1787784204
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1436869155
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3297685718
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2729061468
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2395035578
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.211084280
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3248232460
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1384395473
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.935724955
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2644677782
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3574561245
/workspace/coverage/default/43.sysrst_ctrl_smoke.195214943
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1136420415
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2085662504
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3972603786
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2392503746
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3005735300
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1489913446
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2183334396
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2468632836
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2898588985
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1843809566
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.224407640
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1406147772
/workspace/coverage/default/44.sysrst_ctrl_smoke.3748511476
/workspace/coverage/default/44.sysrst_ctrl_stress_all.4262866456
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.912404389
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1289333747
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3207809444
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.94365932
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3984474937
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1008680246
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3500608386
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3377590092
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.4192783761
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.761694541
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1635576566
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2378042858
/workspace/coverage/default/45.sysrst_ctrl_smoke.673585242
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3937413516
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.298613820
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2239045367
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2650760881
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.4174688907
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3136603439
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2318986048
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1973020725
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1510173013
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3883285943
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2871654528
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.4229728742
/workspace/coverage/default/46.sysrst_ctrl_smoke.3567002454
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1165431621
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.198870803
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3524136419
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.4050394626
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.25565546
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.804244486
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.689769933
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1881594605
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.4091931835
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.548638786
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4277209804
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.915291435
/workspace/coverage/default/47.sysrst_ctrl_smoke.3339223671
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3974126053
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1924314325
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.536105947
/workspace/coverage/default/48.sysrst_ctrl_alert_test.578395917
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3695747822
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2738030735
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3573610322
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1853198225
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.864155483
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3727764566
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3195678777
/workspace/coverage/default/48.sysrst_ctrl_smoke.692294073
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1999304807
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.4021901846
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1651903159
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2845325028
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.474798813
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.699381238
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3122293810
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1486696637
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3436852683
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2505880535
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2089234972
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.460541399
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2968743595
/workspace/coverage/default/49.sysrst_ctrl_smoke.1282513423
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3633987476
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3170283029
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2479319657
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2768701437
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.218035669
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3823645182
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2082863293
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3600263919
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3131425587
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2828048166
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1863666013
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3738721287
/workspace/coverage/default/5.sysrst_ctrl_smoke.670344477
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2908376053
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3065314434
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.756823470
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.974147921
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.912172860
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1387719208
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.4133511101
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3421120936
/workspace/coverage/default/6.sysrst_ctrl_alert_test.694515278
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.409528227
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2574901313
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.969506596
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2494948134
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2301603413
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.839605462
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1335943043
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.283922755
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2192913238
/workspace/coverage/default/6.sysrst_ctrl_smoke.3556029963
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1143467960
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1493503708
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3511982175
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1600346230
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3484291517
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3528670256
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.192098763
/workspace/coverage/default/7.sysrst_ctrl_alert_test.52436754
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1574091324
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.764587097
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.808962699
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4202101712
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2537542420
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.326634851
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2805711514
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2075458672
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.297117674
/workspace/coverage/default/7.sysrst_ctrl_smoke.144698323
/workspace/coverage/default/7.sysrst_ctrl_stress_all.4257406708
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1434609248
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1778460219
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3467407053
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1539624352
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2832259083
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.112976833
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2807053539
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3331454780
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2530593833
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3985122037
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.4136375442
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3021733450
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3155465564
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.167455748
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.622374174
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3150328677
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.420673509
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1540361980
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1287421723
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2071197605
/workspace/coverage/default/8.sysrst_ctrl_smoke.1884329709
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2131729292
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2477268624
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2916611769
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2653889078
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.601378851
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2103205819
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2124507175
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1315278809
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1592192056
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.974474042
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2603718337
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1161725278
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2589754870
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2612233282
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.517062516
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3111112010
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3924741974
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.743214450
/workspace/coverage/default/9.sysrst_ctrl_smoke.3548650233
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3755185107
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1653325951
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1120223454
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1024108135
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1968002213
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1251722995
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3486955321
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2180778319
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3355069593
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1495612793

Total test records in report: 914

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.484944769	Jul 01 10:48:45 AM PDT 24	Jul 01 10:48:47 AM PDT 24	2645877084 ps
T5	/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2029518053	Jul 01 10:49:00 AM PDT 24	Jul 01 10:49:02 AM PDT 24	5270012335 ps
T1	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3726557165	Jul 01 10:48:15 AM PDT 24	Jul 01 10:48:22 AM PDT 24	3517168360 ps
T13	/workspace/coverage/default/2.sysrst_ctrl_stress_all.3292076599	Jul 01 10:47:59 AM PDT 24	Jul 01 10:48:08 AM PDT 24	10233162857 ps
T14	/workspace/coverage/default/17.sysrst_ctrl_stress_all.271791016	Jul 01 10:48:17 AM PDT 24	Jul 01 10:48:25 AM PDT 24	13691115681 ps
T15	/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.930632130	Jul 01 10:48:35 AM PDT 24	Jul 01 10:48:43 AM PDT 24	2612472185 ps
T2	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.637269146	Jul 01 10:48:25 AM PDT 24	Jul 01 11:12:44 AM PDT 24	536896749639 ps
T16	/workspace/coverage/default/27.sysrst_ctrl_alert_test.1220227680	Jul 01 10:48:38 AM PDT 24	Jul 01 10:48:39 AM PDT 24	2067793145 ps
T17	/workspace/coverage/default/48.sysrst_ctrl_smoke.692294073	Jul 01 10:49:17 AM PDT 24	Jul 01 10:49:21 AM PDT 24	2140006374 ps
T3	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.462598817	Jul 01 10:47:53 AM PDT 24	Jul 01 10:49:15 AM PDT 24	4118656953617 ps
T18	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3328122436	Jul 01 10:49:24 AM PDT 24	Jul 01 10:50:28 AM PDT 24	25581016041 ps
T19	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.622374174	Jul 01 10:47:55 AM PDT 24	Jul 01 10:48:04 AM PDT 24	2606390989 ps
T49	/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.3638162583	Jul 01 10:48:00 AM PDT 24	Jul 01 10:48:08 AM PDT 24	2151844662 ps
T25	/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.548638786	Jul 01 10:49:10 AM PDT 24	Jul 01 10:49:13 AM PDT 24	2476135781 ps
T6	/workspace/coverage/default/28.sysrst_ctrl_stress_all.3800954414	Jul 01 10:48:42 AM PDT 24	Jul 01 10:49:18 AM PDT 24	14138705997 ps
T50	/workspace/coverage/default/43.sysrst_ctrl_smoke.195214943	Jul 01 10:49:14 AM PDT 24	Jul 01 10:49:18 AM PDT 24	2129467119 ps
T7	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3478950205	Jul 01 10:49:28 AM PDT 24	Jul 01 10:49:39 AM PDT 24	3578321137 ps
T51	/workspace/coverage/default/37.sysrst_ctrl_smoke.639844596	Jul 01 10:49:15 AM PDT 24	Jul 01 10:49:20 AM PDT 24	2113764101 ps
T8	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3498533924	Jul 01 10:47:43 AM PDT 24	Jul 01 10:52:23 AM PDT 24	111670191691 ps
T52	/workspace/coverage/default/18.sysrst_ctrl_alert_test.2036464170	Jul 01 10:48:17 AM PDT 24	Jul 01 10:48:23 AM PDT 24	2008644152 ps
T53	/workspace/coverage/default/32.sysrst_ctrl_alert_test.1443645686	Jul 01 10:49:09 AM PDT 24	Jul 01 10:49:12 AM PDT 24	2037062403 ps
T27	/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3155465564	Jul 01 10:48:20 AM PDT 24	Jul 01 10:48:29 AM PDT 24	3138073939 ps
T54	/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2621462048	Jul 01 10:49:14 AM PDT 24	Jul 01 10:49:19 AM PDT 24	2522778279 ps
T9	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2683939991	Jul 01 10:48:13 AM PDT 24	Jul 01 10:49:38 AM PDT 24	132272949586 ps
T10	/workspace/coverage/default/13.sysrst_ctrl_stress_all.2678974160	Jul 01 10:48:20 AM PDT 24	Jul 01 10:48:27 AM PDT 24	19176015103 ps
T26	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.1895562035	Jul 01 10:48:19 AM PDT 24	Jul 01 10:48:25 AM PDT 24	2465886519 ps
T11	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.4127276789	Jul 01 10:49:13 AM PDT 24	Jul 01 10:50:07 AM PDT 24	42524110114 ps
T28	/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.1132258709	Jul 01 10:48:53 AM PDT 24	Jul 01 10:48:55 AM PDT 24	3885384663 ps
T12	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1499574970	Jul 01 10:49:17 AM PDT 24	Jul 01 10:49:51 AM PDT 24	114953505964 ps
T36	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3150328677	Jul 01 10:48:03 AM PDT 24	Jul 01 10:48:06 AM PDT 24	2914535193 ps
T151	/workspace/coverage/default/39.sysrst_ctrl_smoke.3443524970	Jul 01 10:48:56 AM PDT 24	Jul 01 10:49:02 AM PDT 24	2109237633 ps
T23	/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1493503708	Jul 01 10:48:04 AM PDT 24	Jul 01 10:48:09 AM PDT 24	9140419166 ps
T42	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.2994291726	Jul 01 10:48:34 AM PDT 24	Jul 01 10:48:43 AM PDT 24	3321545299 ps
T62	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3108046890	Jul 01 10:49:46 AM PDT 24	Jul 01 10:49:49 AM PDT 24	2469755703 ps
T56	/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1902091626	Jul 01 10:48:23 AM PDT 24	Jul 01 10:48:33 AM PDT 24	2837968023 ps
T136	/workspace/coverage/default/30.sysrst_ctrl_alert_test.3546575927	Jul 01 10:48:35 AM PDT 24	Jul 01 10:48:41 AM PDT 24	2011134033 ps
T32	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.3972916134	Jul 01 10:48:14 AM PDT 24	Jul 01 10:50:20 AM PDT 24	100520478920 ps
T43	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.1988573001	Jul 01 10:48:55 AM PDT 24	Jul 01 10:52:31 AM PDT 24	156905493807 ps
T40	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1603391941	Jul 01 10:49:43 AM PDT 24	Jul 01 10:49:58 AM PDT 24	64192704339 ps
T90	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2946565475	Jul 01 10:47:42 AM PDT 24	Jul 01 10:47:45 AM PDT 24	2427317037 ps
T31	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.2877972672	Jul 01 10:48:22 AM PDT 24	Jul 01 10:49:28 AM PDT 24	111748333340 ps
T24	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.3051421578	Jul 01 10:48:59 AM PDT 24	Jul 01 10:52:22 AM PDT 24	77054726637 ps
T67	/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1489913446	Jul 01 10:49:08 AM PDT 24	Jul 01 10:49:58 AM PDT 24	26587475843 ps
T65	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3319398463	Jul 01 10:49:16 AM PDT 24	Jul 01 10:49:20 AM PDT 24	3188037690 ps
T253	/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3041826868	Jul 01 10:49:05 AM PDT 24	Jul 01 10:49:08 AM PDT 24	2192075033 ps
T41	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3158049163	Jul 01 10:49:38 AM PDT 24	Jul 01 10:53:04 AM PDT 24	82274557320 ps
T63	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.684195678	Jul 01 10:48:05 AM PDT 24	Jul 01 10:49:05 AM PDT 24	22531746559 ps
T33	/workspace/coverage/default/27.sysrst_ctrl_stress_all.1420552940	Jul 01 10:49:07 AM PDT 24	Jul 01 10:49:10 AM PDT 24	11568660548 ps
T303	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.2439066085	Jul 01 10:48:45 AM PDT 24	Jul 01 10:48:53 AM PDT 24	2613300973 ps
T37	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2612233282	Jul 01 10:48:18 AM PDT 24	Jul 01 10:48:21 AM PDT 24	3141757819 ps
T44	/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.409528227	Jul 01 10:48:06 AM PDT 24	Jul 01 10:48:15 AM PDT 24	3056212188 ps
T45	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.288153504	Jul 01 10:47:53 AM PDT 24	Jul 01 10:48:02 AM PDT 24	3215605500 ps
T304	/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3419044617	Jul 01 10:49:18 AM PDT 24	Jul 01 10:49:22 AM PDT 24	2042551535 ps
T68	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1600346230	Jul 01 10:49:31 AM PDT 24	Jul 01 10:51:47 AM PDT 24	59690896271 ps
T305	/workspace/coverage/default/46.sysrst_ctrl_smoke.3567002454	Jul 01 10:49:44 AM PDT 24	Jul 01 10:49:48 AM PDT 24	2116614131 ps
T74	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.3609102988	Jul 01 10:48:25 AM PDT 24	Jul 01 10:48:50 AM PDT 24	113004795003 ps
T260	/workspace/coverage/default/20.sysrst_ctrl_alert_test.4152845163	Jul 01 10:48:13 AM PDT 24	Jul 01 10:48:15 AM PDT 24	2133921149 ps
T261	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.241489570	Jul 01 10:48:51 AM PDT 24	Jul 01 10:49:03 AM PDT 24	4126035126 ps
T46	/workspace/coverage/default/4.sysrst_ctrl_stress_all.3900142463	Jul 01 10:47:46 AM PDT 24	Jul 01 10:48:19 AM PDT 24	12195261855 ps
T109	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2505880535	Jul 01 10:49:42 AM PDT 24	Jul 01 10:49:50 AM PDT 24	2613522709 ps
T47	/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.974474042	Jul 01 10:48:11 AM PDT 24	Jul 01 10:48:17 AM PDT 24	3282145631 ps
T110	/workspace/coverage/default/3.sysrst_ctrl_alert_test.1387112836	Jul 01 10:47:56 AM PDT 24	Jul 01 10:47:59 AM PDT 24	2103244875 ps
T111	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2304288653	Jul 01 10:48:21 AM PDT 24	Jul 01 10:48:26 AM PDT 24	2276130804 ps
T66	/workspace/coverage/default/23.sysrst_ctrl_edge_detect.1694591019	Jul 01 10:48:21 AM PDT 24	Jul 01 10:48:35 AM PDT 24	3768445626 ps
T57	/workspace/coverage/default/47.sysrst_ctrl_stress_all.3974126053	Jul 01 10:49:46 AM PDT 24	Jul 01 10:50:14 AM PDT 24	10884823806 ps
T69	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2807053539	Jul 01 10:49:21 AM PDT 24	Jul 01 10:49:43 AM PDT 24	81569701842 ps
T112	/workspace/coverage/default/19.sysrst_ctrl_smoke.2578325343	Jul 01 10:48:21 AM PDT 24	Jul 01 10:48:30 AM PDT 24	2113768602 ps
T113	/workspace/coverage/default/23.sysrst_ctrl_smoke.3184683629	Jul 01 10:48:22 AM PDT 24	Jul 01 10:48:31 AM PDT 24	2113354556 ps
T38	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2965793469	Jul 01 10:48:55 AM PDT 24	Jul 01 10:53:05 AM PDT 24	746186941224 ps
T58	/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3972603786	Jul 01 10:49:06 AM PDT 24	Jul 01 10:49:14 AM PDT 24	8092975091 ps
T125	/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3077711002	Jul 01 10:49:08 AM PDT 24	Jul 01 10:49:11 AM PDT 24	2635222858 ps
T59	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.631743167	Jul 01 10:48:02 AM PDT 24	Jul 01 10:48:07 AM PDT 24	4707263181 ps
T70	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.912172860	Jul 01 10:49:41 AM PDT 24	Jul 01 10:50:36 AM PDT 24	75209818843 ps
T60	/workspace/coverage/default/29.sysrst_ctrl_stress_all.1678459062	Jul 01 10:48:37 AM PDT 24	Jul 01 10:49:13 AM PDT 24	14003175336 ps
T126	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.25565546	Jul 01 10:49:24 AM PDT 24	Jul 01 10:50:06 AM PDT 24	191409239551 ps
T127	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3615694639	Jul 01 10:48:56 AM PDT 24	Jul 01 10:49:59 AM PDT 24	91382091051 ps
T128	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.4040622450	Jul 01 10:48:16 AM PDT 24	Jul 01 10:51:23 AM PDT 24	151761253035 ps
T129	/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.3081844407	Jul 01 10:48:16 AM PDT 24	Jul 01 10:48:19 AM PDT 24	2549241240 ps
T141	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1668967687	Jul 01 10:49:17 AM PDT 24	Jul 01 10:49:22 AM PDT 24	2520015737 ps
T142	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.917881133	Jul 01 10:48:23 AM PDT 24	Jul 01 10:52:31 AM PDT 24	196270922434 ps
T143	/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.4260068355	Jul 01 10:49:16 AM PDT 24	Jul 01 10:49:26 AM PDT 24	2511142225 ps
T144	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3877033682	Jul 01 10:48:18 AM PDT 24	Jul 01 10:48:25 AM PDT 24	2300782808 ps
T145	/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1863666013	Jul 01 10:47:58 AM PDT 24	Jul 01 10:48:03 AM PDT 24	2237148811 ps
T34	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.2241986064	Jul 01 10:47:43 AM PDT 24	Jul 01 10:47:51 AM PDT 24	2491928561 ps
T386	/workspace/coverage/default/39.sysrst_ctrl_alert_test.2516076189	Jul 01 10:49:18 AM PDT 24	Jul 01 10:49:23 AM PDT 24	2021122191 ps
T385	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3265300363	Jul 01 10:48:30 AM PDT 24	Jul 01 10:48:38 AM PDT 24	2515031253 ps
T48	/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.4050394626	Jul 01 10:49:17 AM PDT 24	Jul 01 10:49:22 AM PDT 24	3126923293 ps
T35	/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1881594605	Jul 01 10:49:29 AM PDT 24	Jul 01 10:49:37 AM PDT 24	3386501121 ps
T64	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.3253504339	Jul 01 10:48:21 AM PDT 24	Jul 01 10:48:27 AM PDT 24	2470476404 ps
T221	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.623961137	Jul 01 10:48:06 AM PDT 24	Jul 01 10:48:11 AM PDT 24	2469746883 ps
T222	/workspace/coverage/default/2.sysrst_ctrl_alert_test.2652088975	Jul 01 10:47:44 AM PDT 24	Jul 01 10:47:47 AM PDT 24	2026610942 ps
T223	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3062696785	Jul 01 10:48:01 AM PDT 24	Jul 01 10:48:08 AM PDT 24	4113473071 ps
T224	/workspace/coverage/default/49.sysrst_ctrl_smoke.1282513423	Jul 01 10:49:56 AM PDT 24	Jul 01 10:50:00 AM PDT 24	2115928856 ps
T225	/workspace/coverage/default/14.sysrst_ctrl_smoke.1107278830	Jul 01 10:48:12 AM PDT 24	Jul 01 10:48:15 AM PDT 24	2128425957 ps
T226	/workspace/coverage/default/34.sysrst_ctrl_alert_test.1598788711	Jul 01 10:49:14 AM PDT 24	Jul 01 10:49:17 AM PDT 24	2035563143 ps
T227	/workspace/coverage/default/12.sysrst_ctrl_alert_test.4005594761	Jul 01 10:48:06 AM PDT 24	Jul 01 10:48:10 AM PDT 24	2034063214 ps
T228	/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.482248292	Jul 01 10:47:53 AM PDT 24	Jul 01 10:47:56 AM PDT 24	2597254729 ps
T310	/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.915291435	Jul 01 10:49:11 AM PDT 24	Jul 01 10:49:16 AM PDT 24	2514650092 ps
T387	/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1556376407	Jul 01 10:49:03 AM PDT 24	Jul 01 10:49:08 AM PDT 24	2622502049 ps
T388	/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.2134403910	Jul 01 10:48:17 AM PDT 24	Jul 01 10:48:22 AM PDT 24	2761944601 ps
T389	/workspace/coverage/default/24.sysrst_ctrl_alert_test.345850067	Jul 01 10:48:51 AM PDT 24	Jul 01 10:48:58 AM PDT 24	2011472252 ps
T390	/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.1503740392	Jul 01 10:48:28 AM PDT 24	Jul 01 10:48:31 AM PDT 24	2482588799 ps
T307	/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3369604286	Jul 01 10:47:46 AM PDT 24	Jul 01 10:47:48 AM PDT 24	2508788501 ps
T61	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3141236556	Jul 01 10:49:17 AM PDT 24	Jul 01 10:49:24 AM PDT 24	8313192389 ps
T91	/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2650760881	Jul 01 10:49:13 AM PDT 24	Jul 01 10:49:23 AM PDT 24	3333940651 ps
T146	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3937413516	Jul 01 10:49:16 AM PDT 24	Jul 01 10:50:18 AM PDT 24	24114110415 ps
T75	/workspace/coverage/default/20.sysrst_ctrl_stress_all.1794577310	Jul 01 10:48:57 AM PDT 24	Jul 01 10:56:07 AM PDT 24	1456917838267 ps
T391	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.2370680451	Jul 01 10:49:16 AM PDT 24	Jul 01 10:49:25 AM PDT 24	2136385798 ps
T384	/workspace/coverage/default/5.sysrst_ctrl_stress_all.2908376053	Jul 01 10:47:54 AM PDT 24	Jul 01 10:48:01 AM PDT 24	6966391366 ps
T79	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2530593833	Jul 01 10:49:43 AM PDT 24	Jul 01 10:55:53 AM PDT 24	139907762956 ps
T92	/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.153052382	Jul 01 10:49:37 AM PDT 24	Jul 01 10:49:41 AM PDT 24	3317830826 ps
T308	/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.1918322903	Jul 01 10:48:41 AM PDT 24	Jul 01 10:48:48 AM PDT 24	2460378948 ps
T264	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.1470514732	Jul 01 10:48:16 AM PDT 24	Jul 01 10:49:18 AM PDT 24	102699725095 ps
T268	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.4264778314	Jul 01 10:48:23 AM PDT 24	Jul 01 10:48:33 AM PDT 24	2510156720 ps
T93	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.910526129	Jul 01 10:48:45 AM PDT 24	Jul 01 10:52:03 AM PDT 24	73683541326 ps
T114	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2232201352	Jul 01 10:48:53 AM PDT 24	Jul 01 10:48:57 AM PDT 24	3718889653 ps
T39	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3436852683	Jul 01 10:49:18 AM PDT 24	Jul 01 10:49:31 AM PDT 24	4743974162 ps
T115	/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.1782209545	Jul 01 10:48:44 AM PDT 24	Jul 01 10:48:46 AM PDT 24	2637001268 ps
T116	/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2543981903	Jul 01 10:47:33 AM PDT 24	Jul 01 10:47:39 AM PDT 24	2486034442 ps
T117	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.176013346	Jul 01 10:48:51 AM PDT 24	Jul 01 10:48:56 AM PDT 24	2512705183 ps
T118	/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3005735300	Jul 01 10:49:30 AM PDT 24	Jul 01 10:49:34 AM PDT 24	3649371979 ps
T119	/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.1338412866	Jul 01 10:48:10 AM PDT 24	Jul 01 11:08:15 AM PDT 24	483751389039 ps
T120	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.2771726372	Jul 01 10:47:52 AM PDT 24	Jul 01 10:48:11 AM PDT 24	22082706737 ps
T121	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2730978037	Jul 01 10:48:48 AM PDT 24	Jul 01 10:48:51 AM PDT 24	2521750353 ps
T296	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3525340467	Jul 01 10:48:19 AM PDT 24	Jul 01 10:48:27 AM PDT 24	2609364880 ps
T77	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3052494152	Jul 01 10:48:44 AM PDT 24	Jul 01 10:49:44 AM PDT 24	88845072916 ps
T297	/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2918408593	Jul 01 10:48:59 AM PDT 24	Jul 01 10:49:04 AM PDT 24	2486450585 ps
T209	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.2244261209	Jul 01 10:48:47 AM PDT 24	Jul 01 10:48:49 AM PDT 24	3419481797 ps
T71	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2207752379	Jul 01 10:49:10 AM PDT 24	Jul 01 10:50:06 AM PDT 24	2019498787896 ps
T298	/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.2556419672	Jul 01 10:48:28 AM PDT 24	Jul 01 10:48:35 AM PDT 24	2174474422 ps
T72	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.3670925119	Jul 01 10:49:13 AM PDT 24	Jul 01 10:49:52 AM PDT 24	54758222121 ps
T299	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.1631108978	Jul 01 10:48:15 AM PDT 24	Jul 01 10:48:18 AM PDT 24	2533929102 ps
T94	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1008680246	Jul 01 10:49:08 AM PDT 24	Jul 01 10:49:59 AM PDT 24	40128990926 ps
T245	/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2653889078	Jul 01 10:49:24 AM PDT 24	Jul 01 10:51:24 AM PDT 24	98685625530 ps
T392	/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2871654528	Jul 01 10:49:14 AM PDT 24	Jul 01 10:49:22 AM PDT 24	2167282195 ps
T73	/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.2671542520	Jul 01 10:48:46 AM PDT 24	Jul 01 10:48:55 AM PDT 24	7950874188 ps
T393	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2829370816	Jul 01 10:48:00 AM PDT 24	Jul 01 10:48:06 AM PDT 24	3632223895 ps
T95	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.3123280475	Jul 01 10:49:14 AM PDT 24	Jul 01 10:53:35 AM PDT 24	105237111633 ps
T394	/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.756014053	Jul 01 10:48:24 AM PDT 24	Jul 01 10:48:32 AM PDT 24	2037742924 ps
T96	/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2139774036	Jul 01 10:48:21 AM PDT 24	Jul 01 10:48:58 AM PDT 24	27336580329 ps
T172	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.4231952539	Jul 01 10:48:14 AM PDT 24	Jul 01 10:48:20 AM PDT 24	3647678538 ps
T395	/workspace/coverage/default/1.sysrst_ctrl_alert_test.1789910660	Jul 01 10:47:47 AM PDT 24	Jul 01 10:47:53 AM PDT 24	2012604166 ps
T396	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.4168449593	Jul 01 10:48:22 AM PDT 24	Jul 01 10:48:29 AM PDT 24	2451373297 ps
T397	/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.908651977	Jul 01 10:49:05 AM PDT 24	Jul 01 10:49:10 AM PDT 24	3461472678 ps
T255	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2270050095	Jul 01 10:49:14 AM PDT 24	Jul 01 10:50:28 AM PDT 24	117256762662 ps
T336	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.3705158138	Jul 01 10:48:21 AM PDT 24	Jul 01 10:53:42 AM PDT 24	116923731513 ps
T246	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.2399627155	Jul 01 10:48:41 AM PDT 24	Jul 01 10:50:04 AM PDT 24	32324526055 ps
T398	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1574091324	Jul 01 10:48:10 AM PDT 24	Jul 01 10:48:13 AM PDT 24	3058491580 ps
T399	/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1212450993	Jul 01 10:48:06 AM PDT 24	Jul 01 10:48:19 AM PDT 24	4033727100 ps
T400	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.999333314	Jul 01 10:48:25 AM PDT 24	Jul 01 10:48:29 AM PDT 24	2472906428 ps
T401	/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3642889911	Jul 01 10:48:04 AM PDT 24	Jul 01 10:48:07 AM PDT 24	2032563950 ps
T159	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.292096515	Jul 01 10:49:23 AM PDT 24	Jul 01 10:49:30 AM PDT 24	3425931867 ps
T402	/workspace/coverage/default/40.sysrst_ctrl_stress_all.2448497587	Jul 01 10:49:09 AM PDT 24	Jul 01 10:49:15 AM PDT 24	6667030062 ps
T403	/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.3030469774	Jul 01 10:48:23 AM PDT 24	Jul 01 10:48:29 AM PDT 24	2625650139 ps
T80	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.167455748	Jul 01 10:47:54 AM PDT 24	Jul 01 10:48:31 AM PDT 24	53041008216 ps
T404	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3138890371	Jul 01 10:48:25 AM PDT 24	Jul 01 10:48:36 AM PDT 24	3366091200 ps
T311	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2192913238	Jul 01 10:48:14 AM PDT 24	Jul 01 10:48:21 AM PDT 24	2511416425 ps
T405	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.856643004	Jul 01 10:48:39 AM PDT 24	Jul 01 10:48:43 AM PDT 24	2253171623 ps
T309	/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.1555018231	Jul 01 10:48:00 AM PDT 24	Jul 01 10:48:04 AM PDT 24	2488571041 ps
T89	/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1547785332	Jul 01 10:47:58 AM PDT 24	Jul 01 10:48:06 AM PDT 24	4293913863 ps
T160	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.272899677	Jul 01 10:48:40 AM PDT 24	Jul 01 11:17:59 AM PDT 24	656299065206 ps
T188	/workspace/coverage/default/44.sysrst_ctrl_stress_all.4262866456	Jul 01 10:49:04 AM PDT 24	Jul 01 10:49:10 AM PDT 24	13164103162 ps
T406	/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.2751798444	Jul 01 10:48:50 AM PDT 24	Jul 01 10:48:53 AM PDT 24	3648874646 ps
T247	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.909472295	Jul 01 10:49:15 AM PDT 24	Jul 01 10:49:59 AM PDT 24	61581412851 ps
T407	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1852219827	Jul 01 10:48:45 AM PDT 24	Jul 01 10:48:54 AM PDT 24	3228849342 ps
T408	/workspace/coverage/default/12.sysrst_ctrl_stress_all.2756197950	Jul 01 10:48:11 AM PDT 24	Jul 01 10:48:43 AM PDT 24	11816623972 ps
T161	/workspace/coverage/default/49.sysrst_ctrl_stress_all.3633987476	Jul 01 10:49:18 AM PDT 24	Jul 01 10:49:44 AM PDT 24	16942716836 ps
T335	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.4287126625	Jul 01 10:49:15 AM PDT 24	Jul 01 10:49:47 AM PDT 24	45902311273 ps
T97	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3119573248	Jul 01 10:49:15 AM PDT 24	Jul 01 10:50:34 AM PDT 24	59361742698 ps
T409	/workspace/coverage/default/7.sysrst_ctrl_stress_all.4257406708	Jul 01 10:47:53 AM PDT 24	Jul 01 10:48:04 AM PDT 24	14155040730 ps
T410	/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1390126045	Jul 01 10:49:17 AM PDT 24	Jul 01 10:49:24 AM PDT 24	2516108021 ps
T122	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.311152702	Jul 01 10:48:56 AM PDT 24	Jul 01 10:49:51 AM PDT 24	24766656664 ps
T411	/workspace/coverage/default/26.sysrst_ctrl_smoke.2223816653	Jul 01 10:48:28 AM PDT 24	Jul 01 10:48:31 AM PDT 24	2121030616 ps
T135	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.3216259804	Jul 01 10:48:01 AM PDT 24	Jul 01 10:48:04 AM PDT 24	2663874170 ps
T412	/workspace/coverage/default/41.sysrst_ctrl_alert_test.52447324	Jul 01 10:49:02 AM PDT 24	Jul 01 10:49:08 AM PDT 24	2013341235 ps
T148	/workspace/coverage/default/15.sysrst_ctrl_edge_detect.3581542657	Jul 01 10:48:15 AM PDT 24	Jul 01 10:48:26 AM PDT 24	3910176889 ps
T337	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.1538939600	Jul 01 10:48:09 AM PDT 24	Jul 01 10:52:44 AM PDT 24	127841552083 ps
T413	/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3730232971	Jul 01 10:49:10 AM PDT 24	Jul 01 10:49:14 AM PDT 24	3961745449 ps
T414	/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2930647435	Jul 01 10:49:15 AM PDT 24	Jul 01 10:49:26 AM PDT 24	3200390572 ps
T415	/workspace/coverage/default/38.sysrst_ctrl_smoke.2022045446	Jul 01 10:48:55 AM PDT 24	Jul 01 10:48:58 AM PDT 24	2133170397 ps
T416	/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.613441196	Jul 01 10:48:08 AM PDT 24	Jul 01 10:48:14 AM PDT 24	3337174534 ps
T178	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.3393229719	Jul 01 10:48:46 AM PDT 24	Jul 01 10:48:49 AM PDT 24	2499696052 ps
T417	/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.3657100209	Jul 01 10:48:56 AM PDT 24	Jul 01 10:49:00 AM PDT 24	2472895675 ps
T418	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2644677782	Jul 01 10:49:07 AM PDT 24	Jul 01 10:49:14 AM PDT 24	2116773488 ps
T419	/workspace/coverage/default/47.sysrst_ctrl_smoke.3339223671	Jul 01 10:49:07 AM PDT 24	Jul 01 10:49:11 AM PDT 24	2117034983 ps
T147	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1175818728	Jul 01 10:48:14 AM PDT 24	Jul 01 10:51:11 AM PDT 24	260849274525 ps
T248	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3421120936	Jul 01 10:49:41 AM PDT 24	Jul 01 10:50:28 AM PDT 24	69836158878 ps
T420	/workspace/coverage/default/44.sysrst_ctrl_alert_test.2392503746	Jul 01 10:49:08 AM PDT 24	Jul 01 10:49:11 AM PDT 24	2038862931 ps
T421	/workspace/coverage/default/26.sysrst_ctrl_alert_test.341428169	Jul 01 10:48:55 AM PDT 24	Jul 01 10:48:57 AM PDT 24	2052741502 ps
T422	/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4202101712	Jul 01 10:48:20 AM PDT 24	Jul 01 10:48:32 AM PDT 24	4145991610 ps
T98	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1436869155	Jul 01 10:49:03 AM PDT 24	Jul 01 10:49:59 AM PDT 24	100923753151 ps
T81	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.4130057936	Jul 01 10:48:34 AM PDT 24	Jul 01 10:49:02 AM PDT 24	672989276275 ps
T99	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.3531169859	Jul 01 10:48:10 AM PDT 24	Jul 01 10:49:01 AM PDT 24	80744127565 ps
T423	/workspace/coverage/default/14.sysrst_ctrl_stress_all.2828629722	Jul 01 10:48:20 AM PDT 24	Jul 01 10:48:34 AM PDT 24	7888472154 ps
T100	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1968002213	Jul 01 10:49:26 AM PDT 24	Jul 01 10:50:58 AM PDT 24	35579963514 ps
T424	/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.319395451	Jul 01 10:48:25 AM PDT 24	Jul 01 10:48:37 AM PDT 24	3642182909 ps
T149	/workspace/coverage/default/25.sysrst_ctrl_edge_detect.2869470186	Jul 01 10:48:31 AM PDT 24	Jul 01 10:48:38 AM PDT 24	4942601449 ps
T373	/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2603718337	Jul 01 10:48:12 AM PDT 24	Jul 01 10:55:24 AM PDT 24	177091368306 ps
T425	/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.415232395	Jul 01 10:48:01 AM PDT 24	Jul 01 10:48:10 AM PDT 24	2512550284 ps
T426	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1843809566	Jul 01 10:49:03 AM PDT 24	Jul 01 10:49:11 AM PDT 24	2455628890 ps
T427	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.2985624180	Jul 01 10:49:13 AM PDT 24	Jul 01 10:49:19 AM PDT 24	5711267789 ps
T428	/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.127015596	Jul 01 10:48:01 AM PDT 24	Jul 01 10:48:04 AM PDT 24	2050992234 ps
T429	/workspace/coverage/default/40.sysrst_ctrl_smoke.2562097640	Jul 01 10:49:17 AM PDT 24	Jul 01 10:49:22 AM PDT 24	2116327130 ps
T430	/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1713144631	Jul 01 10:48:32 AM PDT 24	Jul 01 10:48:41 AM PDT 24	2932864487 ps
T348	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3430250080	Jul 01 10:48:17 AM PDT 24	Jul 01 10:50:54 AM PDT 24	115221848401 ps
T431	/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.1672112937	Jul 01 10:48:15 AM PDT 24	Jul 01 10:48:21 AM PDT 24	2614394737 ps
T432	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.186515213	Jul 01 10:48:18 AM PDT 24	Jul 01 10:48:21 AM PDT 24	2475396587 ps
T433	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.26249782	Jul 01 10:47:51 AM PDT 24	Jul 01 10:47:59 AM PDT 24	2511832520 ps
T339	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.1039872835	Jul 01 10:48:36 AM PDT 24	Jul 01 10:52:58 AM PDT 24	196260838065 ps
T434	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.297117674	Jul 01 10:48:20 AM PDT 24	Jul 01 10:48:25 AM PDT 24	2517839340 ps
T82	/workspace/coverage/default/30.sysrst_ctrl_stress_all.2578365140	Jul 01 10:48:38 AM PDT 24	Jul 01 10:50:29 AM PDT 24	1485305662746 ps
T435	/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1567228367	Jul 01 10:48:24 AM PDT 24	Jul 01 10:48:28 AM PDT 24	2486507246 ps
T436	/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.3885798945	Jul 01 10:48:44 AM PDT 24	Jul 01 10:48:52 AM PDT 24	2462539312 ps
T150	/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2301603413	Jul 01 10:47:57 AM PDT 24	Jul 01 10:48:05 AM PDT 24	5353316894 ps
T380	/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1161725278	Jul 01 10:48:23 AM PDT 24	Jul 01 10:49:04 AM PDT 24	54779953146 ps
T437	/workspace/coverage/default/5.sysrst_ctrl_alert_test.2479319657	Jul 01 10:47:53 AM PDT 24	Jul 01 10:47:56 AM PDT 24	2031044317 ps
T123	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1471529125	Jul 01 10:49:18 AM PDT 24	Jul 01 10:50:22 AM PDT 24	908126714900 ps
T438	/workspace/coverage/default/37.sysrst_ctrl_alert_test.1689693858	Jul 01 10:48:52 AM PDT 24	Jul 01 10:48:58 AM PDT 24	2014004527 ps
T334	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2633734280	Jul 01 10:50:04 AM PDT 24	Jul 01 10:51:57 AM PDT 24	95237718112 ps
T210	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.672151352	Jul 01 10:48:59 AM PDT 24	Jul 01 10:49:04 AM PDT 24	2624755912 ps
T439	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.1397048996	Jul 01 10:48:21 AM PDT 24	Jul 01 10:49:41 AM PDT 24	117485160144 ps
T440	/workspace/coverage/default/46.sysrst_ctrl_alert_test.2239045367	Jul 01 10:49:14 AM PDT 24	Jul 01 10:49:22 AM PDT 24	2011958621 ps
T441	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3019871757	Jul 01 10:48:28 AM PDT 24	Jul 01 10:48:34 AM PDT 24	2514515217 ps
T442	/workspace/coverage/default/23.sysrst_ctrl_stress_all.4209691872	Jul 01 10:48:18 AM PDT 24	Jul 01 10:48:30 AM PDT 24	15880327890 ps
T443	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1322528025	Jul 01 10:48:24 AM PDT 24	Jul 01 10:48:31 AM PDT 24	3972810088 ps
T137	/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3170283029	Jul 01 10:49:46 AM PDT 24	Jul 01 10:55:14 AM PDT 24	1272537845732 ps
T444	/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.1043495857	Jul 01 10:48:47 AM PDT 24	Jul 01 10:48:49 AM PDT 24	2525667569 ps
T445	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.764864580	Jul 01 10:48:57 AM PDT 24	Jul 01 10:49:01 AM PDT 24	4197259884 ps
T446	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.3862224628	Jul 01 10:48:57 AM PDT 24	Jul 01 10:49:04 AM PDT 24	2223458115 ps
T447	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.590713993	Jul 01 10:47:56 AM PDT 24	Jul 01 10:48:56 AM PDT 24	21314009822 ps
T448	/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2827818945	Jul 01 10:48:51 AM PDT 24	Jul 01 10:48:55 AM PDT 24	2451595513 ps
T449	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.3743386962	Jul 01 10:48:13 AM PDT 24	Jul 01 10:48:17 AM PDT 24	2466151199 ps
T341	/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2103205819	Jul 01 10:49:43 AM PDT 24	Jul 01 10:50:24 AM PDT 24	62299825870 ps
T450	/workspace/coverage/default/9.sysrst_ctrl_smoke.3548650233	Jul 01 10:48:13 AM PDT 24	Jul 01 10:48:18 AM PDT 24	2112804021 ps
T451	/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2296508423	Jul 01 10:48:55 AM PDT 24	Jul 01 10:48:57 AM PDT 24	2068162626 ps
T300	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.960818955	Jul 01 10:49:01 AM PDT 24	Jul 01 10:49:04 AM PDT 24	3217845831 ps
T83	/workspace/coverage/default/33.sysrst_ctrl_edge_detect.635237444	Jul 01 10:48:46 AM PDT 24	Jul 01 10:48:56 AM PDT 24	3254910738 ps
T189	/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.1163956718	Jul 01 10:47:59 AM PDT 24	Jul 01 10:48:05 AM PDT 24	2617376094 ps
T190	/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.395648899	Jul 01 10:48:56 AM PDT 24	Jul 01 10:49:00 AM PDT 24	5489385720 ps
T191	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1796394757	Jul 01 10:48:23 AM PDT 24	Jul 01 10:49:28 AM PDT 24	29636640866 ps
T192	/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3864509238	Jul 01 10:49:14 AM PDT 24	Jul 01 10:53:12 AM PDT 24	104242429546 ps
T193	/workspace/coverage/default/38.sysrst_ctrl_alert_test.2988659558	Jul 01 10:49:18 AM PDT 24	Jul 01 10:49:26 AM PDT 24	2009080448 ps
T78	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3248232460	Jul 01 10:49:05 AM PDT 24	Jul 01 10:49:08 AM PDT 24	3904213195 ps
T179	/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1620708210	Jul 01 10:49:13 AM PDT 24	Jul 01 10:49:17 AM PDT 24	2529555181 ps
T180	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.2199206662	Jul 01 10:48:22 AM PDT 24	Jul 01 10:48:28 AM PDT 24	3028865121 ps
T181	/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3556838614	Jul 01 10:48:42 AM PDT 24	Jul 01 10:48:50 AM PDT 24	2611373839 ps
T182	/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1094144102	Jul 01 10:48:54 AM PDT 24	Jul 01 10:48:56 AM PDT 24	2549192434 ps
T183	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2075458672	Jul 01 10:47:55 AM PDT 24	Jul 01 10:48:03 AM PDT 24	2185296077 ps
T184	/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3195678777	Jul 01 10:49:43 AM PDT 24	Jul 01 10:49:51 AM PDT 24	2512063436 ps
T185	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.1846285028	Jul 01 10:49:09 AM PDT 24	Jul 01 10:50:45 AM PDT 24	162398431114 ps