Summary for Variable cp_key0_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key0_out_sel
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
120 |
1 |
|
|
T13 |
1 |
|
T27 |
1 |
|
T28 |
2 |
auto[1] |
126 |
1 |
|
|
T13 |
2 |
|
T27 |
2 |
|
T28 |
1 |
Summary for Variable cp_key0_out_value
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key0_out_value
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
138 |
1 |
|
|
T13 |
1 |
|
T27 |
3 |
|
T28 |
2 |
auto[1] |
108 |
1 |
|
|
T13 |
2 |
|
T28 |
1 |
|
T42 |
1 |
Summary for Variable cp_key1_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key1_out_sel
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
125 |
1 |
|
|
T13 |
1 |
|
T27 |
1 |
|
T28 |
3 |
auto[1] |
121 |
1 |
|
|
T13 |
2 |
|
T27 |
2 |
|
T42 |
3 |
Summary for Variable cp_key1_out_value
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key1_out_value
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
122 |
1 |
|
|
T13 |
1 |
|
T27 |
2 |
|
T28 |
2 |
auto[1] |
124 |
1 |
|
|
T13 |
2 |
|
T27 |
1 |
|
T28 |
1 |
Summary for Variable cp_key2_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key2_out_sel
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
122 |
1 |
|
|
T13 |
2 |
|
T27 |
1 |
|
T42 |
2 |
auto[1] |
124 |
1 |
|
|
T13 |
1 |
|
T27 |
2 |
|
T28 |
3 |
Summary for Variable cp_key2_out_value
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key2_out_value
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
119 |
1 |
|
|
T13 |
1 |
|
T27 |
2 |
|
T42 |
2 |
auto[1] |
127 |
1 |
|
|
T13 |
2 |
|
T27 |
1 |
|
T28 |
3 |
Summary for Cross cross_key0_out_sel_value
Samples crossed: cp_key0_out_value cp_key0_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cross_key0_out_sel_value
Bins
cp_key0_out_value | cp_key0_out_sel | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
68 |
1 |
|
|
T27 |
1 |
|
T28 |
1 |
|
T42 |
2 |
auto[0] |
auto[1] |
70 |
1 |
|
|
T13 |
1 |
|
T27 |
2 |
|
T28 |
1 |
auto[1] |
auto[0] |
52 |
1 |
|
|
T13 |
1 |
|
T28 |
1 |
|
T47 |
1 |
auto[1] |
auto[1] |
56 |
1 |
|
|
T13 |
1 |
|
T42 |
1 |
|
T44 |
1 |
Summary for Cross cross_key1_out_sel_value
Samples crossed: cp_key1_out_value cp_key1_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cross_key1_out_sel_value
Bins
cp_key1_out_value | cp_key1_out_sel | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
68 |
1 |
|
|
T27 |
1 |
|
T28 |
2 |
|
T44 |
1 |
auto[0] |
auto[1] |
54 |
1 |
|
|
T13 |
1 |
|
T27 |
1 |
|
T42 |
1 |
auto[1] |
auto[0] |
57 |
1 |
|
|
T13 |
1 |
|
T28 |
1 |
|
T45 |
1 |
auto[1] |
auto[1] |
67 |
1 |
|
|
T13 |
1 |
|
T27 |
1 |
|
T42 |
2 |
Summary for Cross cross_key2_out_sel_value
Samples crossed: cp_key2_out_value cp_key2_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cross_key2_out_sel_value
Bins
cp_key2_out_value | cp_key2_out_sel | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
59 |
1 |
|
|
T13 |
1 |
|
T42 |
1 |
|
T46 |
1 |
auto[0] |
auto[1] |
60 |
1 |
|
|
T27 |
2 |
|
T42 |
1 |
|
T44 |
2 |
auto[1] |
auto[0] |
63 |
1 |
|
|
T13 |
1 |
|
T27 |
1 |
|
T42 |
1 |
auto[1] |
auto[1] |
64 |
1 |
|
|
T13 |
1 |
|
T28 |
3 |
|
T45 |
2 |
Summary for Variable cp_key0_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key0_out_sel
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12 |
1 |
|
|
T147 |
2 |
|
T123 |
1 |
|
T313 |
2 |
auto[1] |
10 |
1 |
|
|
T147 |
1 |
|
T123 |
2 |
|
T191 |
1 |
Summary for Variable cp_key0_out_value
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key0_out_value
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
17 |
1 |
|
|
T147 |
3 |
|
T123 |
3 |
|
T313 |
1 |
auto[1] |
5 |
1 |
|
|
T191 |
1 |
|
T313 |
1 |
|
T206 |
1 |
Summary for Variable cp_key1_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key1_out_sel
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
14 |
1 |
|
|
T147 |
2 |
|
T123 |
2 |
|
T191 |
1 |
auto[1] |
8 |
1 |
|
|
T147 |
1 |
|
T123 |
1 |
|
T313 |
1 |
Summary for Variable cp_key1_out_value
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key1_out_value
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
10 |
1 |
|
|
T147 |
1 |
|
T123 |
2 |
|
T313 |
1 |
auto[1] |
12 |
1 |
|
|
T147 |
2 |
|
T123 |
1 |
|
T191 |
1 |
Summary for Variable cp_key2_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key2_out_sel
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9 |
1 |
|
|
T147 |
2 |
|
T123 |
1 |
|
T206 |
1 |
auto[1] |
13 |
1 |
|
|
T147 |
1 |
|
T123 |
2 |
|
T191 |
1 |
Summary for Variable cp_key2_out_value
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key2_out_value
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13 |
1 |
|
|
T147 |
2 |
|
T123 |
3 |
|
T191 |
1 |
auto[1] |
9 |
1 |
|
|
T147 |
1 |
|
T313 |
2 |
|
T206 |
1 |
Summary for Cross cross_key0_out_sel_value
Samples crossed: cp_key0_out_value cp_key0_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cross_key0_out_sel_value
Bins
cp_key0_out_value | cp_key0_out_sel | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
8 |
1 |
|
|
T147 |
2 |
|
T123 |
1 |
|
T313 |
1 |
auto[0] |
auto[1] |
9 |
1 |
|
|
T147 |
1 |
|
T123 |
2 |
|
T206 |
2 |
auto[1] |
auto[0] |
4 |
1 |
|
|
T313 |
1 |
|
T206 |
1 |
|
T157 |
2 |
auto[1] |
auto[1] |
1 |
1 |
|
|
T191 |
1 |
|
- |
- |
|
- |
- |
Summary for Cross cross_key1_out_sel_value
Samples crossed: cp_key1_out_value cp_key1_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cross_key1_out_sel_value
Bins
cp_key1_out_value | cp_key1_out_sel | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
6 |
1 |
|
|
T147 |
1 |
|
T123 |
1 |
|
T206 |
2 |
auto[0] |
auto[1] |
4 |
1 |
|
|
T123 |
1 |
|
T313 |
1 |
|
T231 |
1 |
auto[1] |
auto[0] |
8 |
1 |
|
|
T147 |
1 |
|
T123 |
1 |
|
T191 |
1 |
auto[1] |
auto[1] |
4 |
1 |
|
|
T147 |
1 |
|
T231 |
1 |
|
T157 |
1 |
Summary for Cross cross_key2_out_sel_value
Samples crossed: cp_key2_out_value cp_key2_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cross_key2_out_sel_value
Bins
cp_key2_out_value | cp_key2_out_sel | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
5 |
1 |
|
|
T147 |
2 |
|
T123 |
1 |
|
T231 |
1 |
auto[0] |
auto[1] |
8 |
1 |
|
|
T123 |
2 |
|
T191 |
1 |
|
T206 |
2 |
auto[1] |
auto[0] |
4 |
1 |
|
|
T206 |
1 |
|
T157 |
1 |
|
T258 |
1 |
auto[1] |
auto[1] |
5 |
1 |
|
|
T147 |
1 |
|
T313 |
2 |
|
T231 |
1 |
Summary for Variable cp_key0_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key0_out_sel
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5 |
1 |
|
|
T123 |
3 |
|
T231 |
1 |
|
T382 |
1 |
auto[1] |
7 |
1 |
|
|
T147 |
3 |
|
T231 |
2 |
|
T382 |
2 |
Summary for Variable cp_key0_out_value
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key0_out_value
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6 |
1 |
|
|
T147 |
2 |
|
T231 |
2 |
|
T382 |
2 |
auto[1] |
6 |
1 |
|
|
T147 |
1 |
|
T123 |
3 |
|
T231 |
1 |
Summary for Variable cp_key1_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key1_out_sel
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
3 |
1 |
|
|
T231 |
1 |
|
T382 |
2 |
|
- |
- |
auto[1] |
9 |
1 |
|
|
T147 |
3 |
|
T123 |
3 |
|
T231 |
2 |
Summary for Variable cp_key1_out_value
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key1_out_value
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5 |
1 |
|
|
T147 |
1 |
|
T123 |
2 |
|
T231 |
1 |
auto[1] |
7 |
1 |
|
|
T147 |
2 |
|
T123 |
1 |
|
T231 |
2 |
Summary for Variable cp_key2_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key2_out_sel
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
10 |
1 |
|
|
T147 |
3 |
|
T123 |
3 |
|
T231 |
2 |
auto[1] |
2 |
1 |
|
|
T231 |
1 |
|
T382 |
1 |
|
- |
- |
Summary for Variable cp_key2_out_value
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key2_out_value
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6 |
1 |
|
|
T147 |
1 |
|
T123 |
2 |
|
T231 |
3 |
auto[1] |
6 |
1 |
|
|
T147 |
2 |
|
T123 |
1 |
|
T382 |
3 |
Summary for Cross cross_key0_out_sel_value
Samples crossed: cp_key0_out_value cp_key0_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cross_key0_out_sel_value
Bins
cp_key0_out_value | cp_key0_out_sel | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
2 |
1 |
|
|
T231 |
1 |
|
T382 |
1 |
|
- |
- |
auto[0] |
auto[1] |
4 |
1 |
|
|
T147 |
2 |
|
T231 |
1 |
|
T382 |
1 |
auto[1] |
auto[0] |
3 |
1 |
|
|
T123 |
3 |
|
- |
- |
|
- |
- |
auto[1] |
auto[1] |
3 |
1 |
|
|
T147 |
1 |
|
T231 |
1 |
|
T382 |
1 |
Summary for Cross cross_key1_out_sel_value
Samples crossed: cp_key1_out_value cp_key1_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cross_key1_out_sel_value
Bins
cp_key1_out_value | cp_key1_out_sel | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
2 |
1 |
|
|
T231 |
1 |
|
T382 |
1 |
|
- |
- |
auto[0] |
auto[1] |
3 |
1 |
|
|
T147 |
1 |
|
T123 |
2 |
|
- |
- |
auto[1] |
auto[0] |
1 |
1 |
|
|
T382 |
1 |
|
- |
- |
|
- |
- |
auto[1] |
auto[1] |
6 |
1 |
|
|
T147 |
2 |
|
T123 |
1 |
|
T231 |
2 |
Summary for Cross cross_key2_out_sel_value
Samples crossed: cp_key2_out_value cp_key2_out_sel
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cross_key2_out_sel_value
Bins
cp_key2_out_value | cp_key2_out_sel | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
5 |
1 |
|
|
T147 |
1 |
|
T123 |
2 |
|
T231 |
2 |
auto[0] |
auto[1] |
1 |
1 |
|
|
T231 |
1 |
|
- |
- |
|
- |
- |
auto[1] |
auto[0] |
5 |
1 |
|
|
T147 |
2 |
|
T123 |
1 |
|
T382 |
2 |
auto[1] |
auto[1] |
1 |
1 |
|
|
T382 |
1 |
|
- |
- |
|
- |
- |