SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
sysrst_ctrl_combo_detect_action_cg_0 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sysrst_ctrl_combo_detect_action_cg_1 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sysrst_ctrl_combo_detect_action_cg_2 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sysrst_ctrl_combo_detect_action_cg_3 | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 28 | 0 | 28 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_bat_disable | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_interrupt | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_rst_req | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 28 | 0 | 28 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_bat_disable | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_interrupt | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_rst_req | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 28 | 0 | 28 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_bat_disable | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_interrupt | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_rst_req | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 28 | 0 | 28 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_bat_disable | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_interrupt | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_rst_req | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 465 | 1 | T9 | 4 | T12 | 5 | T39 | 9 | ||||
auto[1] | 151 | 1 | T1 | 4 | T3 | 4 | T22 | 11 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 278 | 1 | T1 | 3 | T9 | 2 | T12 | 4 | ||||
auto[1] | 338 | 1 | T1 | 1 | T3 | 4 | T22 | 11 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 299 | 1 | T12 | 3 | T39 | 9 | T23 | 4 | ||||
auto[1] | 317 | 1 | T1 | 4 | T3 | 4 | T22 | 11 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 314 | 1 | T22 | 11 | T9 | 2 | T12 | 3 | ||||
auto[1] | 302 | 1 | T1 | 4 | T3 | 4 | T9 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 475 | 1 | T3 | 4 | T22 | 11 | T12 | 3 | ||||
auto[1] | 141 | 1 | T1 | 4 | T9 | 4 | T12 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 469 | 1 | T1 | 4 | T22 | 11 | T12 | 5 | ||||
auto[1] | 147 | 1 | T3 | 4 | T9 | 4 | T66 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 458 | 1 | T1 | 4 | T3 | 4 | T22 | 11 | ||||
auto[1] | 158 | 1 | T9 | 4 | T39 | 9 | T23 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 548 | 1 | T1 | 4 | T3 | 4 | T22 | 11 | ||||
auto[1] | 68 | 1 | T36 | 7 | T66 | 2 | T68 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 574 | 1 | T1 | 4 | T3 | 4 | T22 | 11 | ||||
auto[1] | 42 | 1 | T37 | 2 | T191 | 3 | T325 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 538 | 1 | T3 | 4 | T22 | 11 | T9 | 4 | ||||
auto[1] | 78 | 1 | T1 | 4 | T242 | 11 | T320 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 584 | 1 | T1 | 4 | T3 | 4 | T22 | 11 | ||||
auto[1] | 32 | 1 | T68 | 3 | T230 | 3 | T231 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 554 | 1 | T1 | 4 | T3 | 4 | T22 | 11 | ||||
auto[1] | 62 | 1 | T9 | 4 | T12 | 2 | T68 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 491 | 1 | T1 | 4 | T3 | 4 | T22 | 11 | ||||
auto[1] | 125 | 1 | T39 | 9 | T23 | 4 | T55 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 298 | 1 | T22 | 11 | T9 | 4 | T12 | 2 | ||||
auto[1] | 318 | 1 | T1 | 4 | T3 | 4 | T12 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 543 | 1 | T2 | 2 | T3 | 3 | T15 | 2 | ||||
auto[1] | 151 | 1 | T1 | 4 | T23 | 4 | T55 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 353 | 1 | T1 | 3 | T15 | 2 | T9 | 2 | ||||
auto[1] | 341 | 1 | T1 | 1 | T2 | 2 | T3 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 347 | 1 | T2 | 2 | T22 | 6 | T8 | 2 | ||||
auto[1] | 347 | 1 | T1 | 4 | T3 | 3 | T15 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 323 | 1 | T2 | 2 | T15 | 2 | T22 | 6 | ||||
auto[1] | 371 | 1 | T1 | 4 | T3 | 3 | T9 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 491 | 1 | T2 | 2 | T22 | 6 | T9 | 4 | ||||
auto[1] | 203 | 1 | T1 | 4 | T3 | 3 | T15 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 552 | 1 | T1 | 4 | T15 | 2 | T22 | 6 | ||||
auto[1] | 142 | 1 | T2 | 2 | T3 | 3 | T55 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 523 | 1 | T1 | 4 | T3 | 3 | T8 | 2 | ||||
auto[1] | 171 | 1 | T2 | 2 | T15 | 2 | T22 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 618 | 1 | T1 | 4 | T2 | 2 | T3 | 3 | ||||
auto[1] | 76 | 1 | T68 | 1 | T230 | 3 | T91 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 642 | 1 | T1 | 4 | T2 | 2 | T3 | 3 | ||||
auto[1] | 52 | 1 | T68 | 1 | T229 | 2 | T88 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 650 | 1 | T2 | 2 | T3 | 3 | T15 | 2 | ||||
auto[1] | 44 | 1 | T1 | 4 | T237 | 1 | T242 | 11 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 627 | 1 | T1 | 4 | T2 | 2 | T3 | 3 | ||||
auto[1] | 67 | 1 | T87 | 7 | T37 | 1 | T88 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 640 | 1 | T1 | 4 | T2 | 2 | T3 | 3 | ||||
auto[1] | 54 | 1 | T68 | 1 | T230 | 3 | T91 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 508 | 1 | T8 | 2 | T9 | 4 | T12 | 5 | ||||
auto[1] | 186 | 1 | T1 | 4 | T2 | 2 | T3 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 338 | 1 | T15 | 2 | T22 | 6 | T8 | 2 | ||||
auto[1] | 356 | 1 | T1 | 4 | T2 | 2 | T3 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 489 | 1 | T1 | 4 | T12 | 5 | T39 | 13 | ||||
auto[1] | 140 | 1 | T2 | 2 | T3 | 4 | T22 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 289 | 1 | T1 | 3 | T2 | 2 | T3 | 4 | ||||
auto[1] | 340 | 1 | T1 | 1 | T9 | 2 | T12 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 315 | 1 | T2 | 2 | T12 | 3 | T39 | 13 | ||||
auto[1] | 314 | 1 | T1 | 4 | T3 | 4 | T22 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 273 | 1 | T22 | 1 | T9 | 2 | T12 | 3 | ||||
auto[1] | 356 | 1 | T1 | 4 | T2 | 2 | T3 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 477 | 1 | T1 | 4 | T2 | 2 | T3 | 4 | ||||
auto[1] | 152 | 1 | T22 | 1 | T23 | 4 | T35 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 429 | 1 | T1 | 4 | T2 | 2 | T3 | 4 | ||||
auto[1] | 200 | 1 | T22 | 1 | T12 | 1 | T39 | 13 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 530 | 1 | T1 | 4 | T2 | 2 | T22 | 1 | ||||
auto[1] | 99 | 1 | T3 | 4 | T23 | 4 | T55 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 590 | 1 | T1 | 4 | T2 | 2 | T3 | 4 | ||||
auto[1] | 39 | 1 | T12 | 1 | T68 | 6 | T229 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 563 | 1 | T1 | 4 | T2 | 2 | T3 | 4 | ||||
auto[1] | 66 | 1 | T12 | 1 | T243 | 3 | T342 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 599 | 1 | T1 | 4 | T2 | 2 | T3 | 4 | ||||
auto[1] | 30 | 1 | T9 | 4 | T242 | 1 | T244 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 549 | 1 | T1 | 4 | T2 | 2 | T3 | 4 | ||||
auto[1] | 80 | 1 | T12 | 1 | T68 | 6 | T131 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 586 | 1 | T1 | 4 | T2 | 2 | T3 | 4 | ||||
auto[1] | 43 | 1 | T9 | 4 | T231 | 2 | T131 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 523 | 1 | T1 | 4 | T3 | 4 | T22 | 1 | ||||
auto[1] | 106 | 1 | T2 | 2 | T12 | 1 | T55 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 288 | 1 | T3 | 4 | T9 | 4 | T12 | 2 | ||||
auto[1] | 341 | 1 | T1 | 4 | T2 | 2 | T22 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 506 | 1 | T1 | 4 | T3 | 3 | T8 | 1 | ||||
auto[1] | 202 | 1 | T2 | 4 | T12 | 3 | T74 | 7 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 326 | 1 | T1 | 3 | T2 | 4 | T3 | 3 | ||||
auto[1] | 382 | 1 | T1 | 1 | T8 | 1 | T9 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 316 | 1 | T2 | 4 | T3 | 3 | T12 | 3 | ||||
auto[1] | 392 | 1 | T1 | 4 | T8 | 1 | T9 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 368 | 1 | T8 | 1 | T9 | 2 | T12 | 3 | ||||
auto[1] | 340 | 1 | T1 | 4 | T2 | 4 | T3 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 542 | 1 | T1 | 4 | T9 | 4 | T12 | 2 | ||||
auto[1] | 166 | 1 | T2 | 4 | T3 | 3 | T8 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 538 | 1 | T1 | 4 | T9 | 4 | T12 | 5 | ||||
auto[1] | 170 | 1 | T2 | 4 | T3 | 3 | T8 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 546 | 1 | T1 | 4 | T2 | 4 | T8 | 1 | ||||
auto[1] | 162 | 1 | T3 | 3 | T35 | 1 | T177 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 662 | 1 | T1 | 4 | T2 | 4 | T3 | 3 | ||||
auto[1] | 46 | 1 | T196 | 3 | T323 | 3 | T322 | 13 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 641 | 1 | T1 | 4 | T2 | 4 | T3 | 3 | ||||
auto[1] | 67 | 1 | T88 | 9 | T242 | 4 | T186 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 658 | 1 | T1 | 4 | T2 | 4 | T3 | 3 | ||||
auto[1] | 50 | 1 | T12 | 3 | T38 | 6 | T229 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 630 | 1 | T1 | 4 | T2 | 4 | T3 | 3 | ||||
auto[1] | 78 | 1 | T242 | 4 | T331 | 3 | T328 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 645 | 1 | T1 | 4 | T2 | 4 | T3 | 3 | ||||
auto[1] | 63 | 1 | T186 | 3 | T243 | 4 | T244 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 551 | 1 | T1 | 4 | T2 | 4 | T3 | 3 | ||||
auto[1] | 157 | 1 | T177 | 2 | T229 | 3 | T312 | 7 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 362 | 1 | T2 | 4 | T8 | 1 | T9 | 4 | ||||
auto[1] | 346 | 1 | T1 | 4 | T3 | 3 | T12 | 3 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |