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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.03 99.33 96.81 100.00 97.44 98.74 99.61 94.30


Total test records in report: 909
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T600 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2164494124 Jul 02 07:50:19 AM PDT 24 Jul 02 07:50:28 AM PDT 24 2509203302 ps
T252 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.1291331340 Jul 02 07:51:29 AM PDT 24 Jul 02 07:51:32 AM PDT 24 3097277678 ps
T601 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3684753896 Jul 02 07:51:29 AM PDT 24 Jul 02 07:51:32 AM PDT 24 2603463611 ps
T602 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.488517508 Jul 02 07:50:59 AM PDT 24 Jul 02 07:51:08 AM PDT 24 3299633766 ps
T603 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1473251076 Jul 02 07:50:11 AM PDT 24 Jul 02 07:50:17 AM PDT 24 3557465881 ps
T604 /workspace/coverage/default/21.sysrst_ctrl_alert_test.3698616966 Jul 02 07:50:56 AM PDT 24 Jul 02 07:51:08 AM PDT 24 2015272633 ps
T178 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.4176374063 Jul 02 07:50:24 AM PDT 24 Jul 02 07:51:17 AM PDT 24 84485774272 ps
T325 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.3273943323 Jul 02 07:51:31 AM PDT 24 Jul 02 07:53:39 AM PDT 24 193557116982 ps
T605 /workspace/coverage/default/14.sysrst_ctrl_alert_test.2407597243 Jul 02 07:50:44 AM PDT 24 Jul 02 07:50:54 AM PDT 24 2012457191 ps
T606 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.794317911 Jul 02 07:51:36 AM PDT 24 Jul 02 07:53:21 AM PDT 24 150470613472 ps
T374 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.782128519 Jul 02 07:50:56 AM PDT 24 Jul 02 07:51:13 AM PDT 24 57879806097 ps
T607 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.991807884 Jul 02 07:50:25 AM PDT 24 Jul 02 07:50:30 AM PDT 24 2466116220 ps
T608 /workspace/coverage/default/45.sysrst_ctrl_alert_test.2316746712 Jul 02 07:51:48 AM PDT 24 Jul 02 07:51:57 AM PDT 24 2017035319 ps
T609 /workspace/coverage/default/14.sysrst_ctrl_smoke.247286872 Jul 02 07:50:43 AM PDT 24 Jul 02 07:50:53 AM PDT 24 2110719839 ps
T610 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3865908714 Jul 02 07:50:05 AM PDT 24 Jul 02 07:50:15 AM PDT 24 3116534331 ps
T611 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1286284979 Jul 02 07:50:08 AM PDT 24 Jul 02 07:50:12 AM PDT 24 2228528957 ps
T90 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.525095070 Jul 02 07:51:10 AM PDT 24 Jul 02 07:52:53 AM PDT 24 867378833072 ps
T612 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.2621726518 Jul 02 07:51:16 AM PDT 24 Jul 02 07:51:24 AM PDT 24 3085087848 ps
T613 /workspace/coverage/default/39.sysrst_ctrl_alert_test.532816940 Jul 02 07:51:33 AM PDT 24 Jul 02 07:51:39 AM PDT 24 2025279493 ps
T614 /workspace/coverage/default/25.sysrst_ctrl_smoke.1492446396 Jul 02 07:50:59 AM PDT 24 Jul 02 07:51:06 AM PDT 24 2123699850 ps
T615 /workspace/coverage/default/44.sysrst_ctrl_smoke.2112066094 Jul 02 07:51:43 AM PDT 24 Jul 02 07:51:49 AM PDT 24 2117262111 ps
T616 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1178929786 Jul 02 07:51:50 AM PDT 24 Jul 02 07:52:01 AM PDT 24 2479556962 ps
T617 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2428724288 Jul 02 07:49:49 AM PDT 24 Jul 02 07:50:07 AM PDT 24 2511564870 ps
T618 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.361502033 Jul 02 07:50:50 AM PDT 24 Jul 02 07:51:00 AM PDT 24 2260562542 ps
T619 /workspace/coverage/default/12.sysrst_ctrl_smoke.2713555236 Jul 02 07:50:35 AM PDT 24 Jul 02 07:50:39 AM PDT 24 2128276521 ps
T368 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.375997430 Jul 02 07:51:58 AM PDT 24 Jul 02 07:55:41 AM PDT 24 88515137107 ps
T620 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.1496483953 Jul 02 07:51:18 AM PDT 24 Jul 02 07:51:24 AM PDT 24 2182332151 ps
T621 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1705341979 Jul 02 07:51:36 AM PDT 24 Jul 02 07:51:48 AM PDT 24 2610989132 ps
T622 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.2730435097 Jul 02 07:51:35 AM PDT 24 Jul 02 07:51:47 AM PDT 24 2611184442 ps
T623 /workspace/coverage/default/49.sysrst_ctrl_alert_test.17663370 Jul 02 07:51:52 AM PDT 24 Jul 02 07:52:06 AM PDT 24 2014721261 ps
T370 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.670988212 Jul 02 07:51:55 AM PDT 24 Jul 02 07:55:16 AM PDT 24 80184543328 ps
T388 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2493172541 Jul 02 07:51:46 AM PDT 24 Jul 02 07:52:53 AM PDT 24 25580441876 ps
T624 /workspace/coverage/default/15.sysrst_ctrl_alert_test.3748012682 Jul 02 07:50:46 AM PDT 24 Jul 02 07:50:52 AM PDT 24 2028454540 ps
T625 /workspace/coverage/default/47.sysrst_ctrl_alert_test.2977775312 Jul 02 07:51:46 AM PDT 24 Jul 02 07:51:51 AM PDT 24 2024064514 ps
T209 /workspace/coverage/default/30.sysrst_ctrl_stress_all.1493506109 Jul 02 07:51:22 AM PDT 24 Jul 02 07:51:57 AM PDT 24 467821993829 ps
T626 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3978289415 Jul 02 07:51:17 AM PDT 24 Jul 02 07:51:27 AM PDT 24 2477621094 ps
T627 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.551172007 Jul 02 07:50:12 AM PDT 24 Jul 02 07:50:21 AM PDT 24 2608931202 ps
T628 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3488001834 Jul 02 07:51:17 AM PDT 24 Jul 02 07:51:25 AM PDT 24 2518934180 ps
T629 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.53910208 Jul 02 07:50:26 AM PDT 24 Jul 02 07:50:30 AM PDT 24 2631151984 ps
T630 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.482834685 Jul 02 07:50:04 AM PDT 24 Jul 02 07:50:10 AM PDT 24 2532110255 ps
T631 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.4247261436 Jul 02 07:51:36 AM PDT 24 Jul 02 07:51:42 AM PDT 24 8894347719 ps
T632 /workspace/coverage/default/41.sysrst_ctrl_stress_all.782433146 Jul 02 07:51:29 AM PDT 24 Jul 02 07:51:38 AM PDT 24 11837479845 ps
T633 /workspace/coverage/default/38.sysrst_ctrl_smoke.326889141 Jul 02 07:51:29 AM PDT 24 Jul 02 07:51:37 AM PDT 24 2107190310 ps
T634 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.298464217 Jul 02 07:50:44 AM PDT 24 Jul 02 07:50:50 AM PDT 24 2640174738 ps
T635 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3620887117 Jul 02 07:50:42 AM PDT 24 Jul 02 07:50:47 AM PDT 24 5380241554 ps
T636 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.163343063 Jul 02 07:51:15 AM PDT 24 Jul 02 07:51:25 AM PDT 24 4583640548 ps
T265 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.3770604161 Jul 02 07:51:50 AM PDT 24 Jul 02 07:52:04 AM PDT 24 4357974642 ps
T396 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3706350025 Jul 02 07:50:07 AM PDT 24 Jul 02 07:50:37 AM PDT 24 38376721606 ps
T362 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.4127766890 Jul 02 07:50:54 AM PDT 24 Jul 02 07:52:06 AM PDT 24 109288051460 ps
T637 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.285155847 Jul 02 07:51:18 AM PDT 24 Jul 02 07:51:23 AM PDT 24 2494494623 ps
T377 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2945610293 Jul 02 07:51:54 AM PDT 24 Jul 02 07:54:51 AM PDT 24 64701219420 ps
T638 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1421098463 Jul 02 07:51:39 AM PDT 24 Jul 02 07:51:50 AM PDT 24 2508935507 ps
T639 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.421598020 Jul 02 07:51:06 AM PDT 24 Jul 02 07:51:16 AM PDT 24 2461138042 ps
T640 /workspace/coverage/default/3.sysrst_ctrl_alert_test.2248879307 Jul 02 07:50:03 AM PDT 24 Jul 02 07:50:09 AM PDT 24 2024096677 ps
T641 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.51626769 Jul 02 07:51:12 AM PDT 24 Jul 02 07:51:16 AM PDT 24 2478075847 ps
T642 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2685325929 Jul 02 07:50:01 AM PDT 24 Jul 02 07:50:12 AM PDT 24 2214621081 ps
T643 /workspace/coverage/default/37.sysrst_ctrl_smoke.1868689446 Jul 02 07:51:28 AM PDT 24 Jul 02 07:51:31 AM PDT 24 2131670172 ps
T644 /workspace/coverage/default/2.sysrst_ctrl_alert_test.704690784 Jul 02 07:50:02 AM PDT 24 Jul 02 07:50:12 AM PDT 24 2015631062 ps
T645 /workspace/coverage/default/22.sysrst_ctrl_alert_test.2652618976 Jul 02 07:50:55 AM PDT 24 Jul 02 07:51:02 AM PDT 24 2030325826 ps
T646 /workspace/coverage/default/26.sysrst_ctrl_smoke.3574950213 Jul 02 07:51:00 AM PDT 24 Jul 02 07:51:08 AM PDT 24 2117116379 ps
T647 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1394563945 Jul 02 07:50:09 AM PDT 24 Jul 02 07:50:19 AM PDT 24 2463320218 ps
T648 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3892664915 Jul 02 07:51:18 AM PDT 24 Jul 02 07:51:27 AM PDT 24 2611809966 ps
T649 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1560917915 Jul 02 07:51:13 AM PDT 24 Jul 02 07:52:01 AM PDT 24 68284393649 ps
T79 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2408705351 Jul 02 07:51:34 AM PDT 24 Jul 02 07:52:03 AM PDT 24 37168900641 ps
T650 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.310738297 Jul 02 07:51:42 AM PDT 24 Jul 02 07:51:48 AM PDT 24 2626349566 ps
T651 /workspace/coverage/default/42.sysrst_ctrl_stress_all.1970160244 Jul 02 07:51:43 AM PDT 24 Jul 02 07:52:20 AM PDT 24 12706638660 ps
T652 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.1732870026 Jul 02 07:51:49 AM PDT 24 Jul 02 07:52:05 AM PDT 24 4080828232 ps
T133 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.3529033315 Jul 02 07:51:34 AM PDT 24 Jul 02 07:51:46 AM PDT 24 6048377990 ps
T653 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.3448255609 Jul 02 07:50:49 AM PDT 24 Jul 02 07:50:55 AM PDT 24 2177433478 ps
T654 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3154859634 Jul 02 07:51:59 AM PDT 24 Jul 02 07:52:03 AM PDT 24 4314336851 ps
T655 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3522586426 Jul 02 07:51:30 AM PDT 24 Jul 02 07:51:35 AM PDT 24 2652766174 ps
T656 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.3228825739 Jul 02 07:50:34 AM PDT 24 Jul 02 07:50:46 AM PDT 24 4843862493 ps
T657 /workspace/coverage/default/32.sysrst_ctrl_stress_all.3653594241 Jul 02 07:51:10 AM PDT 24 Jul 02 07:53:56 AM PDT 24 488337280890 ps
T658 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1614292415 Jul 02 07:51:32 AM PDT 24 Jul 02 07:55:12 AM PDT 24 92140287340 ps
T659 /workspace/coverage/default/18.sysrst_ctrl_stress_all.1739980494 Jul 02 07:50:49 AM PDT 24 Jul 02 07:51:01 AM PDT 24 11555199935 ps
T660 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.876167317 Jul 02 07:51:57 AM PDT 24 Jul 02 07:53:31 AM PDT 24 33745714845 ps
T278 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.3719531944 Jul 02 07:52:03 AM PDT 24 Jul 02 07:54:34 AM PDT 24 115446864861 ps
T661 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1783179850 Jul 02 07:50:49 AM PDT 24 Jul 02 07:50:55 AM PDT 24 2500494135 ps
T662 /workspace/coverage/default/5.sysrst_ctrl_smoke.3487228035 Jul 02 07:50:06 AM PDT 24 Jul 02 07:50:12 AM PDT 24 2127806598 ps
T663 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.1938452025 Jul 02 07:50:33 AM PDT 24 Jul 02 07:51:01 AM PDT 24 31149504553 ps
T664 /workspace/coverage/default/45.sysrst_ctrl_stress_all.1308358906 Jul 02 07:51:41 AM PDT 24 Jul 02 07:52:23 AM PDT 24 16090613325 ps
T149 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.401429088 Jul 02 07:51:50 AM PDT 24 Jul 02 07:52:02 AM PDT 24 5988389142 ps
T665 /workspace/coverage/default/28.sysrst_ctrl_stress_all.903465217 Jul 02 07:51:22 AM PDT 24 Jul 02 07:51:41 AM PDT 24 6584103331 ps
T666 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1575010046 Jul 02 07:51:42 AM PDT 24 Jul 02 07:51:49 AM PDT 24 2514542035 ps
T667 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.2988924197 Jul 02 07:50:57 AM PDT 24 Jul 02 07:51:06 AM PDT 24 2841662099 ps
T668 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.4047407135 Jul 02 07:50:44 AM PDT 24 Jul 02 07:51:27 AM PDT 24 36901430235 ps
T669 /workspace/coverage/default/22.sysrst_ctrl_smoke.231866971 Jul 02 07:50:54 AM PDT 24 Jul 02 07:51:01 AM PDT 24 2126040835 ps
T153 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.4284872642 Jul 02 07:50:48 AM PDT 24 Jul 02 07:51:01 AM PDT 24 11396547635 ps
T670 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1686239514 Jul 02 07:50:11 AM PDT 24 Jul 02 07:50:20 AM PDT 24 2507242959 ps
T392 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.1481623479 Jul 02 07:50:01 AM PDT 24 Jul 02 07:50:48 AM PDT 24 67090592934 ps
T50 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.1210392682 Jul 02 07:50:04 AM PDT 24 Jul 02 07:50:58 AM PDT 24 39655366911 ps
T164 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.754255207 Jul 02 07:50:56 AM PDT 24 Jul 02 07:51:03 AM PDT 24 4569175096 ps
T671 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2153726933 Jul 02 07:50:58 AM PDT 24 Jul 02 07:51:07 AM PDT 24 2522374102 ps
T672 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.3749796286 Jul 02 07:50:46 AM PDT 24 Jul 02 07:50:58 AM PDT 24 2455146072 ps
T673 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.4063515168 Jul 02 07:51:15 AM PDT 24 Jul 02 07:52:35 AM PDT 24 57801159373 ps
T674 /workspace/coverage/default/37.sysrst_ctrl_stress_all.3915804454 Jul 02 07:51:29 AM PDT 24 Jul 02 07:51:35 AM PDT 24 10007789411 ps
T675 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.934974272 Jul 02 07:51:41 AM PDT 24 Jul 02 07:52:11 AM PDT 24 39600885448 ps
T676 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.3703121523 Jul 02 07:51:13 AM PDT 24 Jul 02 07:51:21 AM PDT 24 4044261495 ps
T677 /workspace/coverage/default/29.sysrst_ctrl_alert_test.2749007208 Jul 02 07:51:06 AM PDT 24 Jul 02 07:51:15 AM PDT 24 2038053345 ps
T678 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1637033639 Jul 02 07:51:31 AM PDT 24 Jul 02 07:51:37 AM PDT 24 2536076681 ps
T679 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.647926576 Jul 02 07:50:39 AM PDT 24 Jul 02 07:50:54 AM PDT 24 23367418939 ps
T680 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.673633181 Jul 02 07:50:55 AM PDT 24 Jul 02 07:54:16 AM PDT 24 156793969270 ps
T681 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2427858728 Jul 02 07:50:48 AM PDT 24 Jul 02 07:50:54 AM PDT 24 2473366956 ps
T682 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.9495726 Jul 02 07:51:10 AM PDT 24 Jul 02 07:51:19 AM PDT 24 2612897835 ps
T683 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.2107434927 Jul 02 07:50:06 AM PDT 24 Jul 02 07:50:12 AM PDT 24 4526375613 ps
T684 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.3105283525 Jul 02 07:50:49 AM PDT 24 Jul 02 07:50:58 AM PDT 24 2539733975 ps
T106 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1625079992 Jul 02 07:51:46 AM PDT 24 Jul 02 07:53:13 AM PDT 24 73067429242 ps
T685 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1779059517 Jul 02 07:51:45 AM PDT 24 Jul 02 07:52:05 AM PDT 24 25598130824 ps
T686 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.2206383487 Jul 02 07:51:16 AM PDT 24 Jul 02 07:51:22 AM PDT 24 3575979302 ps
T687 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.1571193725 Jul 02 07:50:02 AM PDT 24 Jul 02 07:50:10 AM PDT 24 2623854638 ps
T326 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1475041173 Jul 02 07:51:28 AM PDT 24 Jul 02 07:52:30 AM PDT 24 23596419700 ps
T688 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1557330484 Jul 02 07:51:01 AM PDT 24 Jul 02 07:51:08 AM PDT 24 2629393250 ps
T222 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.1666089773 Jul 02 07:50:43 AM PDT 24 Jul 02 07:50:55 AM PDT 24 3715496098 ps
T689 /workspace/coverage/default/6.sysrst_ctrl_alert_test.2756588555 Jul 02 07:50:22 AM PDT 24 Jul 02 07:50:25 AM PDT 24 2046473071 ps
T107 /workspace/coverage/default/21.sysrst_ctrl_stress_all.2858911319 Jul 02 07:50:53 AM PDT 24 Jul 02 07:51:38 AM PDT 24 179363561873 ps
T690 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3991933643 Jul 02 07:50:00 AM PDT 24 Jul 02 07:51:06 AM PDT 24 90666452944 ps
T691 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.894974410 Jul 02 07:51:11 AM PDT 24 Jul 02 07:51:17 AM PDT 24 3434968010 ps
T692 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.3778870175 Jul 02 07:49:53 AM PDT 24 Jul 02 07:50:16 AM PDT 24 4769344046 ps
T693 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1516480534 Jul 02 07:51:10 AM PDT 24 Jul 02 07:51:35 AM PDT 24 29787331953 ps
T694 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.648350527 Jul 02 07:50:56 AM PDT 24 Jul 02 07:54:05 AM PDT 24 149978362848 ps
T695 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2988533018 Jul 02 07:50:25 AM PDT 24 Jul 02 07:50:28 AM PDT 24 2509514879 ps
T696 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1563598251 Jul 02 07:51:00 AM PDT 24 Jul 02 07:51:07 AM PDT 24 2066457838 ps
T697 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.2969323663 Jul 02 07:50:56 AM PDT 24 Jul 02 07:52:18 AM PDT 24 35953093194 ps
T698 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.827614968 Jul 02 07:51:22 AM PDT 24 Jul 02 07:51:28 AM PDT 24 6680940988 ps
T699 /workspace/coverage/default/13.sysrst_ctrl_alert_test.930781208 Jul 02 07:50:42 AM PDT 24 Jul 02 07:50:47 AM PDT 24 2030070573 ps
T700 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.3451759772 Jul 02 07:51:24 AM PDT 24 Jul 02 07:51:29 AM PDT 24 2256083746 ps
T701 /workspace/coverage/default/36.sysrst_ctrl_smoke.2698517531 Jul 02 07:51:29 AM PDT 24 Jul 02 07:51:37 AM PDT 24 2114723857 ps
T702 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1838724027 Jul 02 07:51:48 AM PDT 24 Jul 02 07:51:56 AM PDT 24 8412568310 ps
T703 /workspace/coverage/default/45.sysrst_ctrl_smoke.2640011333 Jul 02 07:51:42 AM PDT 24 Jul 02 07:51:50 AM PDT 24 2115023884 ps
T704 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.4013804456 Jul 02 07:50:07 AM PDT 24 Jul 02 07:50:22 AM PDT 24 5065333965 ps
T705 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3591858310 Jul 02 07:51:37 AM PDT 24 Jul 02 07:51:48 AM PDT 24 2473218924 ps
T706 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2262147692 Jul 02 07:51:44 AM PDT 24 Jul 02 07:51:53 AM PDT 24 3358730069 ps
T291 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.3995784351 Jul 02 07:50:08 AM PDT 24 Jul 02 07:51:46 AM PDT 24 74798047297 ps
T707 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.2372476617 Jul 02 07:49:56 AM PDT 24 Jul 02 07:50:07 AM PDT 24 2240981589 ps
T708 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.1554278569 Jul 02 07:50:29 AM PDT 24 Jul 02 07:57:06 AM PDT 24 168504677879 ps
T257 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.1794388948 Jul 02 07:51:23 AM PDT 24 Jul 02 07:51:33 AM PDT 24 3942843732 ps
T258 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.4210579987 Jul 02 07:51:37 AM PDT 24 Jul 02 07:51:51 AM PDT 24 3809050407 ps
T108 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.3467210652 Jul 02 07:51:51 AM PDT 24 Jul 02 07:53:13 AM PDT 24 115354536668 ps
T259 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.4220357033 Jul 02 07:50:50 AM PDT 24 Jul 02 07:50:57 AM PDT 24 2478583916 ps
T260 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.1109506749 Jul 02 07:51:46 AM PDT 24 Jul 02 07:52:47 AM PDT 24 96049099766 ps
T261 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.4068009545 Jul 02 07:51:54 AM PDT 24 Jul 02 07:52:55 AM PDT 24 23283864057 ps
T262 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1638409208 Jul 02 07:51:39 AM PDT 24 Jul 02 07:51:51 AM PDT 24 3201234727 ps
T263 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3288638772 Jul 02 07:51:19 AM PDT 24 Jul 02 07:52:31 AM PDT 24 25625869820 ps
T264 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.3215491244 Jul 02 07:51:49 AM PDT 24 Jul 02 07:51:56 AM PDT 24 3380608958 ps
T179 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.2126737737 Jul 02 07:50:26 AM PDT 24 Jul 02 07:51:45 AM PDT 24 839660428649 ps
T709 /workspace/coverage/default/42.sysrst_ctrl_alert_test.1761077568 Jul 02 07:51:36 AM PDT 24 Jul 02 07:51:42 AM PDT 24 2081561284 ps
T279 /workspace/coverage/default/25.sysrst_ctrl_stress_all.302796242 Jul 02 07:50:59 AM PDT 24 Jul 02 07:52:03 AM PDT 24 103105767365 ps
T134 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1955675752 Jul 02 07:50:29 AM PDT 24 Jul 02 07:53:00 AM PDT 24 112170159684 ps
T710 /workspace/coverage/default/40.sysrst_ctrl_alert_test.2069012584 Jul 02 07:51:37 AM PDT 24 Jul 02 07:51:43 AM PDT 24 2030063001 ps
T711 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1936085068 Jul 02 07:51:39 AM PDT 24 Jul 02 07:51:45 AM PDT 24 2116977024 ps
T223 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.116431042 Jul 02 07:50:05 AM PDT 24 Jul 02 07:50:16 AM PDT 24 2590107242 ps
T712 /workspace/coverage/default/0.sysrst_ctrl_alert_test.352611577 Jul 02 07:49:52 AM PDT 24 Jul 02 07:50:07 AM PDT 24 2010473905 ps
T312 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.965441844 Jul 02 07:50:48 AM PDT 24 Jul 02 07:51:35 AM PDT 24 36058468151 ps
T713 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.934612160 Jul 02 07:51:39 AM PDT 24 Jul 02 07:51:46 AM PDT 24 2055048722 ps
T180 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.1812680665 Jul 02 07:50:55 AM PDT 24 Jul 02 07:51:07 AM PDT 24 3580372009 ps
T714 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.1437978697 Jul 02 07:50:55 AM PDT 24 Jul 02 07:51:04 AM PDT 24 2154311036 ps
T715 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.3127475534 Jul 02 07:50:56 AM PDT 24 Jul 02 07:51:08 AM PDT 24 2469922111 ps
T716 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2681218054 Jul 02 07:50:43 AM PDT 24 Jul 02 07:50:53 AM PDT 24 3646543867 ps
T717 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.96519588 Jul 02 07:50:06 AM PDT 24 Jul 02 07:50:14 AM PDT 24 3378763143 ps
T718 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.1058423442 Jul 02 07:49:54 AM PDT 24 Jul 02 07:52:13 AM PDT 24 48752943648 ps
T719 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1329854220 Jul 02 07:51:45 AM PDT 24 Jul 02 07:51:51 AM PDT 24 2625496806 ps
T720 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3830650646 Jul 02 07:50:39 AM PDT 24 Jul 02 07:50:45 AM PDT 24 2124415993 ps
T721 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.4015007670 Jul 02 07:51:51 AM PDT 24 Jul 02 07:52:17 AM PDT 24 25598844773 ps
T722 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.164212415 Jul 02 07:51:03 AM PDT 24 Jul 02 07:54:22 AM PDT 24 203928607894 ps
T723 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.737123874 Jul 02 07:51:32 AM PDT 24 Jul 02 07:51:57 AM PDT 24 34201567075 ps
T724 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.760565818 Jul 02 07:51:49 AM PDT 24 Jul 02 07:51:57 AM PDT 24 2616386064 ps
T725 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3223072551 Jul 02 07:51:04 AM PDT 24 Jul 02 07:51:19 AM PDT 24 4707490808 ps
T726 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2892807646 Jul 02 07:49:57 AM PDT 24 Jul 02 07:50:07 AM PDT 24 2622141074 ps
T727 /workspace/coverage/default/19.sysrst_ctrl_stress_all.674016577 Jul 02 07:50:53 AM PDT 24 Jul 02 07:51:17 AM PDT 24 7064457167 ps
T181 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.1229263042 Jul 02 07:50:48 AM PDT 24 Jul 02 07:50:55 AM PDT 24 4952206057 ps
T728 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3735568548 Jul 02 07:51:50 AM PDT 24 Jul 02 07:59:53 AM PDT 24 190989328092 ps
T729 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.2074918904 Jul 02 07:51:09 AM PDT 24 Jul 02 07:51:14 AM PDT 24 2215056886 ps
T730 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1473682348 Jul 02 07:51:00 AM PDT 24 Jul 02 07:51:39 AM PDT 24 25088265202 ps
T731 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3951002307 Jul 02 07:51:38 AM PDT 24 Jul 02 07:51:44 AM PDT 24 3043017701 ps
T732 /workspace/coverage/default/1.sysrst_ctrl_alert_test.2433812365 Jul 02 07:49:54 AM PDT 24 Jul 02 07:50:09 AM PDT 24 2013945029 ps
T733 /workspace/coverage/default/31.sysrst_ctrl_stress_all.1699100911 Jul 02 07:51:13 AM PDT 24 Jul 02 07:52:19 AM PDT 24 115260762514 ps
T734 /workspace/coverage/default/20.sysrst_ctrl_alert_test.3321368719 Jul 02 07:50:47 AM PDT 24 Jul 02 07:50:57 AM PDT 24 2013230262 ps
T735 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3180565457 Jul 02 07:49:47 AM PDT 24 Jul 02 07:50:01 AM PDT 24 3417443247 ps
T736 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.3051134402 Jul 02 07:51:39 AM PDT 24 Jul 02 07:51:49 AM PDT 24 2467399522 ps
T737 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.3696176042 Jul 02 07:51:04 AM PDT 24 Jul 02 07:51:09 AM PDT 24 3029521847 ps
T738 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.38447081 Jul 02 07:50:45 AM PDT 24 Jul 02 07:51:01 AM PDT 24 3892869939 ps
T739 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.4212538443 Jul 02 07:51:06 AM PDT 24 Jul 02 07:51:11 AM PDT 24 6062759679 ps
T740 /workspace/coverage/default/38.sysrst_ctrl_stress_all.2505948440 Jul 02 07:51:30 AM PDT 24 Jul 02 07:51:53 AM PDT 24 9617737505 ps
T109 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1452570716 Jul 02 07:51:25 AM PDT 24 Jul 02 07:53:12 AM PDT 24 44554134507 ps
T741 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.1846291247 Jul 02 07:51:06 AM PDT 24 Jul 02 07:51:14 AM PDT 24 4598120467 ps
T742 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.1781115025 Jul 02 07:50:39 AM PDT 24 Jul 02 07:50:42 AM PDT 24 2270660233 ps
T743 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2128401553 Jul 02 07:49:56 AM PDT 24 Jul 02 07:50:07 AM PDT 24 2453689425 ps
T744 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3292528848 Jul 02 07:50:36 AM PDT 24 Jul 02 07:50:44 AM PDT 24 2465726684 ps
T376 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.705348840 Jul 02 07:50:56 AM PDT 24 Jul 02 07:52:09 AM PDT 24 105119967828 ps
T311 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2650779337 Jul 02 07:50:34 AM PDT 24 Jul 02 07:52:07 AM PDT 24 148113833997 ps
T745 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1892063649 Jul 02 07:51:49 AM PDT 24 Jul 02 07:53:12 AM PDT 24 102527069083 ps
T746 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.393953644 Jul 02 07:50:43 AM PDT 24 Jul 02 07:50:55 AM PDT 24 2479402276 ps
T747 /workspace/coverage/default/16.sysrst_ctrl_stress_all.3433230615 Jul 02 07:50:44 AM PDT 24 Jul 02 07:51:07 AM PDT 24 7649540137 ps
T748 /workspace/coverage/default/36.sysrst_ctrl_stress_all.3619597699 Jul 02 07:51:33 AM PDT 24 Jul 02 07:52:14 AM PDT 24 13860846612 ps
T749 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.19119748 Jul 02 07:50:07 AM PDT 24 Jul 02 07:50:16 AM PDT 24 2456726509 ps
T750 /workspace/coverage/default/47.sysrst_ctrl_smoke.2147382163 Jul 02 07:51:48 AM PDT 24 Jul 02 07:51:54 AM PDT 24 2122331063 ps
T751 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2686413420 Jul 02 07:51:50 AM PDT 24 Jul 02 07:55:39 AM PDT 24 187234753065 ps
T752 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2451678340 Jul 02 07:51:52 AM PDT 24 Jul 02 07:52:39 AM PDT 24 58373812876 ps
T753 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2499628575 Jul 02 07:51:08 AM PDT 24 Jul 02 07:51:15 AM PDT 24 7006388997 ps
T754 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.4203046944 Jul 02 07:50:42 AM PDT 24 Jul 02 07:50:49 AM PDT 24 2036819414 ps
T755 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.747239609 Jul 02 07:51:35 AM PDT 24 Jul 02 07:51:42 AM PDT 24 3626841355 ps
T756 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1764850908 Jul 02 07:51:49 AM PDT 24 Jul 02 07:52:25 AM PDT 24 48941403097 ps
T757 /workspace/coverage/default/4.sysrst_ctrl_stress_all.2506174809 Jul 02 07:50:08 AM PDT 24 Jul 02 07:50:47 AM PDT 24 14806457988 ps
T758 /workspace/coverage/default/4.sysrst_ctrl_alert_test.3806605233 Jul 02 07:50:08 AM PDT 24 Jul 02 07:50:16 AM PDT 24 2011790076 ps
T759 /workspace/coverage/default/3.sysrst_ctrl_stress_all.2271923785 Jul 02 07:50:01 AM PDT 24 Jul 02 07:50:24 AM PDT 24 7075558161 ps
T760 /workspace/coverage/default/46.sysrst_ctrl_stress_all.2078849480 Jul 02 07:51:42 AM PDT 24 Jul 02 07:52:24 AM PDT 24 18477100480 ps
T371 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.539532839 Jul 02 07:51:50 AM PDT 24 Jul 02 07:54:43 AM PDT 24 127462604560 ps
T761 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.1113555547 Jul 02 07:51:49 AM PDT 24 Jul 02 07:51:56 AM PDT 24 3011056767 ps
T762 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.2607459999 Jul 02 07:50:49 AM PDT 24 Jul 02 07:50:56 AM PDT 24 2107839166 ps
T763 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2242336602 Jul 02 07:51:28 AM PDT 24 Jul 02 07:51:32 AM PDT 24 2472458583 ps
T764 /workspace/coverage/default/14.sysrst_ctrl_stress_all.4155830480 Jul 02 07:50:44 AM PDT 24 Jul 02 07:51:06 AM PDT 24 15778192624 ps
T765 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1431746886 Jul 02 07:50:45 AM PDT 24 Jul 02 07:50:52 AM PDT 24 2033719647 ps
T766 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.826378484 Jul 02 07:51:35 AM PDT 24 Jul 02 07:59:35 AM PDT 24 182323405489 ps
T767 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2910437352 Jul 02 07:49:48 AM PDT 24 Jul 02 07:52:52 AM PDT 24 66858887293 ps
T378 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.745902205 Jul 02 07:51:50 AM PDT 24 Jul 02 07:52:55 AM PDT 24 93129437503 ps
T768 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.3634621286 Jul 02 07:50:30 AM PDT 24 Jul 02 07:51:51 AM PDT 24 31596880746 ps
T135 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.3831674797 Jul 02 07:50:46 AM PDT 24 Jul 02 07:51:35 AM PDT 24 69614930162 ps
T225 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1198520248 Jul 02 07:50:25 AM PDT 24 Jul 02 07:50:36 AM PDT 24 3665414378 ps
T226 /workspace/coverage/default/41.sysrst_ctrl_alert_test.3734585010 Jul 02 07:51:42 AM PDT 24 Jul 02 07:51:46 AM PDT 24 2090442801 ps
T227 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.341161980 Jul 02 07:51:58 AM PDT 24 Jul 02 07:52:03 AM PDT 24 2529854441 ps
T228 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.908091451 Jul 02 07:51:46 AM PDT 24 Jul 02 07:53:52 AM PDT 24 176978173054 ps
T229 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.1856035816 Jul 02 07:49:49 AM PDT 24 Jul 02 07:50:01 AM PDT 24 2503161799 ps
T230 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2044467401 Jul 02 07:51:07 AM PDT 24 Jul 02 07:51:18 AM PDT 24 3079333006 ps
T231 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.879846309 Jul 02 07:50:41 AM PDT 24 Jul 02 07:50:46 AM PDT 24 2533519196 ps
T232 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.114252662 Jul 02 07:51:55 AM PDT 24 Jul 02 07:53:07 AM PDT 24 28577480019 ps
T233 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.1595180534 Jul 02 07:50:07 AM PDT 24 Jul 02 07:59:05 AM PDT 24 206165444394 ps
T769 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.2210846309 Jul 02 07:51:26 AM PDT 24 Jul 02 07:51:29 AM PDT 24 3639615863 ps
T770 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1729190026 Jul 02 07:51:06 AM PDT 24 Jul 02 07:51:16 AM PDT 24 2443675575 ps
T771 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.1959100849 Jul 02 07:50:55 AM PDT 24 Jul 02 07:52:48 AM PDT 24 127819906500 ps
T772 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1633796045 Jul 02 07:51:30 AM PDT 24 Jul 02 07:51:35 AM PDT 24 3112743931 ps
T773 /workspace/coverage/default/31.sysrst_ctrl_smoke.2469882474 Jul 02 07:51:12 AM PDT 24 Jul 02 07:51:19 AM PDT 24 2109739065 ps
T774 /workspace/coverage/default/7.sysrst_ctrl_smoke.2078573174 Jul 02 07:50:17 AM PDT 24 Jul 02 07:50:19 AM PDT 24 2150308461 ps
T775 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.731103494 Jul 02 07:50:41 AM PDT 24 Jul 02 07:50:47 AM PDT 24 4002991504 ps
T776 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2995640244 Jul 02 07:51:35 AM PDT 24 Jul 02 07:51:46 AM PDT 24 2512228660 ps
T777 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.520516337 Jul 02 07:51:14 AM PDT 24 Jul 02 07:51:23 AM PDT 24 2613365028 ps
T778 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2662300778 Jul 02 07:51:32 AM PDT 24 Jul 02 07:51:47 AM PDT 24 4584264405 ps
T253 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.2076897211 Jul 02 07:50:50 AM PDT 24 Jul 02 07:50:59 AM PDT 24 3962907711 ps
T779 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.2537871889 Jul 02 07:51:32 AM PDT 24 Jul 02 07:51:42 AM PDT 24 2511906659 ps
T780 /workspace/coverage/default/9.sysrst_ctrl_smoke.122709080 Jul 02 07:50:28 AM PDT 24 Jul 02 07:50:30 AM PDT 24 2198959440 ps
T397 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1013386611 Jul 02 07:50:50 AM PDT 24 Jul 02 07:52:57 AM PDT 24 193361085196 ps
T781 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1886898556 Jul 02 07:51:17 AM PDT 24 Jul 02 07:51:23 AM PDT 24 2632854924 ps
T782 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3602776435 Jul 02 07:50:12 AM PDT 24 Jul 02 07:50:54 AM PDT 24 611428539601 ps
T783 /workspace/coverage/default/24.sysrst_ctrl_stress_all.4272837484 Jul 02 07:50:54 AM PDT 24 Jul 02 07:51:16 AM PDT 24 6926906317 ps
T784 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.141962559 Jul 02 07:51:47 AM PDT 24 Jul 02 07:51:54 AM PDT 24 2521342447 ps
T298 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.321372395 Jul 02 07:50:24 AM PDT 24 Jul 02 07:50:30 AM PDT 24 2309745671 ps
T299 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3799146921 Jul 02 07:50:22 AM PDT 24 Jul 02 07:50:30 AM PDT 24 2173719024 ps
T785 /workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.3055184698 Jul 02 07:49:18 AM PDT 24 Jul 02 07:49:22 AM PDT 24 2024123920 ps
T18 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.258209785 Jul 02 07:49:12 AM PDT 24 Jul 02 07:49:41 AM PDT 24 7598631676 ps
T26 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1645973837 Jul 02 07:48:57 AM PDT 24 Jul 02 07:49:15 AM PDT 24 42686207785 ps
T19 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1631816748 Jul 02 07:48:58 AM PDT 24 Jul 02 07:49:18 AM PDT 24 5106089091 ps
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