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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.94 99.44 96.78 100.00 98.72 98.89 99.61 92.13


Total test records in report: 907
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T450 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3738020834 Jul 05 05:30:45 PM PDT 24 Jul 05 05:30:49 PM PDT 24 2494428520 ps
T205 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.4006632288 Jul 05 05:31:52 PM PDT 24 Jul 05 05:31:57 PM PDT 24 2978953306 ps
T297 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3345996157 Jul 05 05:32:09 PM PDT 24 Jul 05 05:32:12 PM PDT 24 2529780930 ps
T182 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.1232326975 Jul 05 05:30:35 PM PDT 24 Jul 05 05:30:37 PM PDT 24 3698450410 ps
T451 /workspace/coverage/default/37.sysrst_ctrl_alert_test.2944915210 Jul 05 05:31:58 PM PDT 24 Jul 05 05:32:06 PM PDT 24 2015930425 ps
T452 /workspace/coverage/default/44.sysrst_ctrl_alert_test.3434496513 Jul 05 05:32:27 PM PDT 24 Jul 05 05:32:32 PM PDT 24 2017843185 ps
T453 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.975094554 Jul 05 05:32:26 PM PDT 24 Jul 05 05:32:29 PM PDT 24 4060369152 ps
T454 /workspace/coverage/default/22.sysrst_ctrl_alert_test.2277201306 Jul 05 05:31:25 PM PDT 24 Jul 05 05:31:28 PM PDT 24 2036255389 ps
T193 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.1578625499 Jul 05 05:31:12 PM PDT 24 Jul 05 05:31:15 PM PDT 24 3127596313 ps
T455 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1370502420 Jul 05 05:31:02 PM PDT 24 Jul 05 05:31:07 PM PDT 24 3986231769 ps
T373 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1381026658 Jul 05 05:31:16 PM PDT 24 Jul 05 05:31:25 PM PDT 24 1230891789330 ps
T456 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2484377780 Jul 05 05:30:53 PM PDT 24 Jul 05 05:31:03 PM PDT 24 2450452336 ps
T457 /workspace/coverage/default/16.sysrst_ctrl_alert_test.978344547 Jul 05 05:31:08 PM PDT 24 Jul 05 05:31:15 PM PDT 24 2012183357 ps
T291 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.187949809 Jul 05 05:31:36 PM PDT 24 Jul 05 05:31:43 PM PDT 24 3864128306 ps
T38 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2831626141 Jul 05 05:30:42 PM PDT 24 Jul 05 05:31:33 PM PDT 24 32002034230 ps
T232 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.4166426795 Jul 05 05:30:53 PM PDT 24 Jul 05 05:32:01 PM PDT 24 49410983148 ps
T233 /workspace/coverage/default/9.sysrst_ctrl_stress_all.3375051515 Jul 05 05:30:43 PM PDT 24 Jul 05 05:30:47 PM PDT 24 8159759745 ps
T234 /workspace/coverage/default/28.sysrst_ctrl_smoke.3779012284 Jul 05 05:31:34 PM PDT 24 Jul 05 05:31:40 PM PDT 24 2118553613 ps
T235 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.314094731 Jul 05 05:31:16 PM PDT 24 Jul 05 05:31:24 PM PDT 24 2465609169 ps
T236 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2209737466 Jul 05 05:30:41 PM PDT 24 Jul 05 05:30:45 PM PDT 24 2481679987 ps
T237 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.821387320 Jul 05 05:30:59 PM PDT 24 Jul 05 05:31:50 PM PDT 24 37527804119 ps
T238 /workspace/coverage/default/9.sysrst_ctrl_alert_test.742308764 Jul 05 05:30:45 PM PDT 24 Jul 05 05:30:48 PM PDT 24 2087168602 ps
T239 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3386749170 Jul 05 05:32:49 PM PDT 24 Jul 05 05:33:44 PM PDT 24 76093458830 ps
T240 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.559059261 Jul 05 05:32:00 PM PDT 24 Jul 05 05:32:04 PM PDT 24 4895796227 ps
T458 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1032671361 Jul 05 05:31:14 PM PDT 24 Jul 05 05:31:17 PM PDT 24 2023754136 ps
T459 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2203563993 Jul 05 05:31:07 PM PDT 24 Jul 05 05:31:11 PM PDT 24 2618971291 ps
T363 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.2365622597 Jul 05 05:32:11 PM PDT 24 Jul 05 05:35:03 PM PDT 24 145568498536 ps
T460 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.3041538372 Jul 05 05:30:20 PM PDT 24 Jul 05 05:30:25 PM PDT 24 2460088211 ps
T194 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.2670107514 Jul 05 05:30:18 PM PDT 24 Jul 05 05:30:26 PM PDT 24 4090295501 ps
T461 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.684937525 Jul 05 05:30:26 PM PDT 24 Jul 05 05:30:41 PM PDT 24 5122136120 ps
T151 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.1247512054 Jul 05 05:31:19 PM PDT 24 Jul 05 05:32:19 PM PDT 24 27037916840 ps
T270 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.356743480 Jul 05 05:31:27 PM PDT 24 Jul 05 05:32:34 PM PDT 24 24579167999 ps
T125 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.530526978 Jul 05 05:32:00 PM PDT 24 Jul 05 05:35:30 PM PDT 24 82195565209 ps
T462 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3321189446 Jul 05 05:30:27 PM PDT 24 Jul 05 05:30:31 PM PDT 24 2515117199 ps
T463 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3043705998 Jul 05 05:31:58 PM PDT 24 Jul 05 05:32:04 PM PDT 24 5281951205 ps
T464 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.1489968087 Jul 05 05:30:44 PM PDT 24 Jul 05 05:30:48 PM PDT 24 2486583939 ps
T362 /workspace/coverage/default/39.sysrst_ctrl_stress_all.3927803592 Jul 05 05:32:08 PM PDT 24 Jul 05 05:36:45 PM PDT 24 103956060670 ps
T465 /workspace/coverage/default/48.sysrst_ctrl_alert_test.3056498845 Jul 05 05:32:36 PM PDT 24 Jul 05 05:32:45 PM PDT 24 2011349404 ps
T466 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3024195437 Jul 05 05:31:33 PM PDT 24 Jul 05 05:31:40 PM PDT 24 2173098856 ps
T467 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.1400374077 Jul 05 05:31:38 PM PDT 24 Jul 05 05:31:41 PM PDT 24 2227270627 ps
T282 /workspace/coverage/default/21.sysrst_ctrl_stress_all.3821096263 Jul 05 05:31:17 PM PDT 24 Jul 05 05:36:15 PM PDT 24 121624046357 ps
T468 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1921022660 Jul 05 05:32:19 PM PDT 24 Jul 05 05:32:24 PM PDT 24 2443955535 ps
T469 /workspace/coverage/default/5.sysrst_ctrl_smoke.2706529786 Jul 05 05:30:34 PM PDT 24 Jul 05 05:30:41 PM PDT 24 2107912073 ps
T126 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.1275293875 Jul 05 05:31:14 PM PDT 24 Jul 05 05:34:54 PM PDT 24 83266297848 ps
T470 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.3773244207 Jul 05 05:32:09 PM PDT 24 Jul 05 05:32:11 PM PDT 24 2676333031 ps
T471 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.4151344138 Jul 05 05:31:50 PM PDT 24 Jul 05 05:31:54 PM PDT 24 2524363754 ps
T472 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2952733144 Jul 05 05:30:36 PM PDT 24 Jul 05 05:30:43 PM PDT 24 5478917961 ps
T473 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.1169385642 Jul 05 05:31:16 PM PDT 24 Jul 05 05:31:20 PM PDT 24 3066119495 ps
T474 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.861901296 Jul 05 05:31:23 PM PDT 24 Jul 05 05:31:29 PM PDT 24 5153648605 ps
T475 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.992202020 Jul 05 05:30:56 PM PDT 24 Jul 05 05:31:00 PM PDT 24 5932441747 ps
T476 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.2973697137 Jul 05 05:31:57 PM PDT 24 Jul 05 05:32:00 PM PDT 24 2133055082 ps
T477 /workspace/coverage/default/48.sysrst_ctrl_smoke.518763354 Jul 05 05:32:34 PM PDT 24 Jul 05 05:32:39 PM PDT 24 2113557071 ps
T292 /workspace/coverage/default/10.sysrst_ctrl_stress_all.2727695160 Jul 05 05:30:55 PM PDT 24 Jul 05 05:31:05 PM PDT 24 13143041586 ps
T161 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.3808042147 Jul 05 05:32:03 PM PDT 24 Jul 05 05:32:07 PM PDT 24 3401834967 ps
T336 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3567966455 Jul 05 05:32:42 PM PDT 24 Jul 05 05:33:45 PM PDT 24 97834864423 ps
T478 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.4240998167 Jul 05 05:30:38 PM PDT 24 Jul 05 05:30:41 PM PDT 24 2489291862 ps
T479 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.443057576 Jul 05 05:32:50 PM PDT 24 Jul 05 05:33:23 PM PDT 24 46720465864 ps
T356 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1353492158 Jul 05 05:32:01 PM PDT 24 Jul 05 05:36:53 PM PDT 24 121420086928 ps
T168 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.1531105479 Jul 05 05:32:07 PM PDT 24 Jul 05 05:33:59 PM PDT 24 95972370170 ps
T371 /workspace/coverage/default/30.sysrst_ctrl_stress_all.2787122284 Jul 05 05:31:44 PM PDT 24 Jul 05 05:37:47 PM PDT 24 139734651286 ps
T145 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.682855520 Jul 05 05:30:43 PM PDT 24 Jul 05 05:31:54 PM PDT 24 31612137368 ps
T480 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.4213131469 Jul 05 05:30:52 PM PDT 24 Jul 05 05:30:56 PM PDT 24 2477761467 ps
T169 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2571010887 Jul 05 05:31:07 PM PDT 24 Jul 05 05:31:33 PM PDT 24 21604368718 ps
T481 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.4205902778 Jul 05 05:32:11 PM PDT 24 Jul 05 05:32:14 PM PDT 24 2489247311 ps
T335 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1636602374 Jul 05 05:32:44 PM PDT 24 Jul 05 05:33:31 PM PDT 24 30933653996 ps
T482 /workspace/coverage/default/40.sysrst_ctrl_stress_all.296081291 Jul 05 05:32:18 PM PDT 24 Jul 05 05:32:51 PM PDT 24 11854897460 ps
T483 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3010054431 Jul 05 05:32:36 PM PDT 24 Jul 05 05:32:41 PM PDT 24 2493312275 ps
T170 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.3400285563 Jul 05 05:32:25 PM PDT 24 Jul 05 05:32:34 PM PDT 24 4361261411 ps
T351 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3375966595 Jul 05 05:32:46 PM PDT 24 Jul 05 05:33:47 PM PDT 24 99346690630 ps
T484 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3164337209 Jul 05 05:32:37 PM PDT 24 Jul 05 05:32:44 PM PDT 24 2614769954 ps
T163 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.3220866173 Jul 05 05:30:21 PM PDT 24 Jul 05 05:30:31 PM PDT 24 4557540001 ps
T485 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.2005308768 Jul 05 05:30:22 PM PDT 24 Jul 05 05:30:29 PM PDT 24 2509423940 ps
T486 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2632404183 Jul 05 05:32:44 PM PDT 24 Jul 05 05:33:13 PM PDT 24 40919009805 ps
T487 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3125313662 Jul 05 05:32:05 PM PDT 24 Jul 05 05:32:12 PM PDT 24 2608882297 ps
T488 /workspace/coverage/default/38.sysrst_ctrl_smoke.817806916 Jul 05 05:31:59 PM PDT 24 Jul 05 05:32:06 PM PDT 24 2111130431 ps
T328 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.947989460 Jul 05 05:31:08 PM PDT 24 Jul 05 05:32:37 PM PDT 24 127278430001 ps
T489 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.2832782782 Jul 05 05:31:29 PM PDT 24 Jul 05 05:31:40 PM PDT 24 3657278032 ps
T490 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.119829944 Jul 05 05:32:37 PM PDT 24 Jul 05 05:32:47 PM PDT 24 2870797023 ps
T164 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.2154815673 Jul 05 05:31:30 PM PDT 24 Jul 05 05:31:33 PM PDT 24 4489299009 ps
T491 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.4148856557 Jul 05 05:32:29 PM PDT 24 Jul 05 05:32:31 PM PDT 24 2636648913 ps
T492 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2400537615 Jul 05 05:31:28 PM PDT 24 Jul 05 05:31:31 PM PDT 24 2631114635 ps
T493 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.2345235654 Jul 05 05:31:41 PM PDT 24 Jul 05 05:31:44 PM PDT 24 2526991888 ps
T206 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.995090296 Jul 05 05:31:18 PM PDT 24 Jul 05 05:32:11 PM PDT 24 273946193270 ps
T207 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.873115110 Jul 05 05:31:35 PM PDT 24 Jul 05 05:31:39 PM PDT 24 2471385980 ps
T208 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1147236417 Jul 05 05:30:43 PM PDT 24 Jul 05 05:30:52 PM PDT 24 2462668495 ps
T209 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1771873583 Jul 05 05:30:30 PM PDT 24 Jul 05 05:31:28 PM PDT 24 43976800591 ps
T210 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2484618439 Jul 05 05:32:27 PM PDT 24 Jul 05 05:32:30 PM PDT 24 2062766932 ps
T211 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.4205540024 Jul 05 05:32:21 PM PDT 24 Jul 05 05:32:24 PM PDT 24 3138488770 ps
T212 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.1496854847 Jul 05 05:31:24 PM PDT 24 Jul 05 05:31:29 PM PDT 24 2511075183 ps
T213 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3309632921 Jul 05 05:32:21 PM PDT 24 Jul 05 05:32:25 PM PDT 24 2633550868 ps
T214 /workspace/coverage/default/26.sysrst_ctrl_smoke.333624106 Jul 05 05:31:35 PM PDT 24 Jul 05 05:31:43 PM PDT 24 2108652193 ps
T215 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.310112054 Jul 05 05:31:51 PM PDT 24 Jul 05 05:32:00 PM PDT 24 2973730308 ps
T494 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3850517547 Jul 05 05:30:31 PM PDT 24 Jul 05 05:30:33 PM PDT 24 2289716509 ps
T495 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.810776823 Jul 05 05:31:42 PM PDT 24 Jul 05 05:31:47 PM PDT 24 2556341205 ps
T184 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.831653372 Jul 05 05:31:53 PM PDT 24 Jul 05 05:33:07 PM PDT 24 246651376164 ps
T261 /workspace/coverage/default/0.sysrst_ctrl_stress_all.3376176467 Jul 05 05:30:24 PM PDT 24 Jul 05 05:31:03 PM PDT 24 53073755990 ps
T262 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.796723130 Jul 05 05:30:49 PM PDT 24 Jul 05 05:30:53 PM PDT 24 2621307406 ps
T263 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.3651990869 Jul 05 05:31:09 PM PDT 24 Jul 05 05:32:28 PM PDT 24 128512194212 ps
T264 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.508090101 Jul 05 05:32:09 PM PDT 24 Jul 05 05:32:20 PM PDT 24 3622585519 ps
T265 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.2161466673 Jul 05 05:30:18 PM PDT 24 Jul 05 05:30:26 PM PDT 24 2511204512 ps
T266 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.3556830176 Jul 05 05:31:00 PM PDT 24 Jul 05 05:31:08 PM PDT 24 2192263895 ps
T267 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.732417579 Jul 05 05:32:48 PM PDT 24 Jul 05 05:34:38 PM PDT 24 62125861705 ps
T268 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.661102634 Jul 05 05:31:45 PM PDT 24 Jul 05 05:31:48 PM PDT 24 2624990684 ps
T269 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3403032763 Jul 05 05:31:01 PM PDT 24 Jul 05 05:31:05 PM PDT 24 3193909895 ps
T195 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.3552589331 Jul 05 05:32:17 PM PDT 24 Jul 05 05:49:36 PM PDT 24 395568232583 ps
T496 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.3043065354 Jul 05 05:30:25 PM PDT 24 Jul 05 05:30:28 PM PDT 24 2200873319 ps
T497 /workspace/coverage/default/0.sysrst_ctrl_smoke.1435360572 Jul 05 05:30:19 PM PDT 24 Jul 05 05:30:23 PM PDT 24 2115743723 ps
T498 /workspace/coverage/default/40.sysrst_ctrl_alert_test.113565821 Jul 05 05:32:21 PM PDT 24 Jul 05 05:32:23 PM PDT 24 2101650902 ps
T139 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.996067913 Jul 05 05:32:26 PM PDT 24 Jul 05 05:32:29 PM PDT 24 3459698221 ps
T499 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.4121737902 Jul 05 05:30:49 PM PDT 24 Jul 05 05:37:36 PM PDT 24 299440760950 ps
T500 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.4286774433 Jul 05 05:31:09 PM PDT 24 Jul 05 05:31:20 PM PDT 24 3736474524 ps
T501 /workspace/coverage/default/1.sysrst_ctrl_smoke.495833814 Jul 05 05:30:21 PM PDT 24 Jul 05 05:30:23 PM PDT 24 2128089104 ps
T502 /workspace/coverage/default/21.sysrst_ctrl_alert_test.2381598416 Jul 05 05:31:19 PM PDT 24 Jul 05 05:31:26 PM PDT 24 2012488593 ps
T503 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3877963289 Jul 05 05:32:26 PM PDT 24 Jul 05 05:32:31 PM PDT 24 2092573988 ps
T330 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.2214108012 Jul 05 05:30:46 PM PDT 24 Jul 05 05:32:03 PM PDT 24 127285969597 ps
T103 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.430382573 Jul 05 05:30:43 PM PDT 24 Jul 05 05:31:13 PM PDT 24 115840889241 ps
T504 /workspace/coverage/default/29.sysrst_ctrl_smoke.2845168081 Jul 05 05:31:44 PM PDT 24 Jul 05 05:31:52 PM PDT 24 2112289419 ps
T332 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.2862496295 Jul 05 05:30:26 PM PDT 24 Jul 05 05:32:43 PM PDT 24 52022029959 ps
T505 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.4137717075 Jul 05 05:31:33 PM PDT 24 Jul 05 05:31:49 PM PDT 24 32682271060 ps
T358 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1343849664 Jul 05 05:31:43 PM PDT 24 Jul 05 05:32:28 PM PDT 24 35467148378 ps
T506 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1149803021 Jul 05 05:31:52 PM PDT 24 Jul 05 05:31:58 PM PDT 24 2518384174 ps
T152 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.191446429 Jul 05 05:31:25 PM PDT 24 Jul 05 05:31:35 PM PDT 24 7796470605 ps
T271 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3594889558 Jul 05 05:32:43 PM PDT 24 Jul 05 05:33:40 PM PDT 24 23082152805 ps
T153 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2164181305 Jul 05 05:32:00 PM PDT 24 Jul 05 05:32:03 PM PDT 24 10708817469 ps
T167 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.3961557910 Jul 05 05:31:15 PM PDT 24 Jul 05 05:34:38 PM PDT 24 890718523149 ps
T507 /workspace/coverage/default/24.sysrst_ctrl_smoke.3881326054 Jul 05 05:31:24 PM PDT 24 Jul 05 05:31:27 PM PDT 24 2119020182 ps
T508 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.4093029069 Jul 05 05:32:17 PM PDT 24 Jul 05 05:32:20 PM PDT 24 2536679669 ps
T509 /workspace/coverage/default/39.sysrst_ctrl_alert_test.3751011426 Jul 05 05:32:10 PM PDT 24 Jul 05 05:32:17 PM PDT 24 2011031530 ps
T180 /workspace/coverage/default/4.sysrst_ctrl_stress_all.2662208056 Jul 05 05:30:36 PM PDT 24 Jul 05 05:30:48 PM PDT 24 15495383517 ps
T165 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.3100936487 Jul 05 05:30:49 PM PDT 24 Jul 05 05:30:55 PM PDT 24 2869992356 ps
T171 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2700886712 Jul 05 05:32:06 PM PDT 24 Jul 05 05:32:14 PM PDT 24 2609628365 ps
T172 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.3445220305 Jul 05 05:31:10 PM PDT 24 Jul 05 05:31:20 PM PDT 24 3544844293 ps
T173 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1925223179 Jul 05 05:30:53 PM PDT 24 Jul 05 05:30:56 PM PDT 24 2760725186 ps
T174 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3072898359 Jul 05 05:31:18 PM PDT 24 Jul 05 05:31:22 PM PDT 24 2534015145 ps
T175 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.310716405 Jul 05 05:31:53 PM PDT 24 Jul 05 05:36:50 PM PDT 24 107288873793 ps
T176 /workspace/coverage/default/34.sysrst_ctrl_smoke.3730843528 Jul 05 05:31:49 PM PDT 24 Jul 05 05:31:52 PM PDT 24 2125901614 ps
T177 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.3422130655 Jul 05 05:30:33 PM PDT 24 Jul 05 05:30:39 PM PDT 24 4342741794 ps
T178 /workspace/coverage/default/36.sysrst_ctrl_alert_test.572387579 Jul 05 05:31:58 PM PDT 24 Jul 05 05:32:03 PM PDT 24 2021742764 ps
T179 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.366837127 Jul 05 05:31:02 PM PDT 24 Jul 05 05:31:37 PM PDT 24 54626586241 ps
T510 /workspace/coverage/default/30.sysrst_ctrl_alert_test.1915190753 Jul 05 05:31:44 PM PDT 24 Jul 05 05:31:47 PM PDT 24 2049550888 ps
T511 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.303184678 Jul 05 05:30:45 PM PDT 24 Jul 05 05:33:58 PM PDT 24 143355893944 ps
T512 /workspace/coverage/default/20.sysrst_ctrl_alert_test.3069369144 Jul 05 05:31:18 PM PDT 24 Jul 05 05:31:20 PM PDT 24 2110651703 ps
T283 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3180719214 Jul 05 05:31:16 PM PDT 24 Jul 05 05:32:58 PM PDT 24 156109340655 ps
T513 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.2432944703 Jul 05 05:30:36 PM PDT 24 Jul 05 05:30:40 PM PDT 24 2074493723 ps
T228 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2767975249 Jul 05 05:30:43 PM PDT 24 Jul 05 05:32:38 PM PDT 24 92729949297 ps
T514 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.3975153877 Jul 05 05:30:23 PM PDT 24 Jul 05 05:30:28 PM PDT 24 2448566510 ps
T515 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2455930753 Jul 05 05:30:29 PM PDT 24 Jul 05 05:30:32 PM PDT 24 2477852299 ps
T516 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.4179525960 Jul 05 05:30:29 PM PDT 24 Jul 05 05:30:35 PM PDT 24 3651357129 ps
T517 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2460409059 Jul 05 05:31:52 PM PDT 24 Jul 05 05:32:06 PM PDT 24 3947491171 ps
T162 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.1950609341 Jul 05 05:31:19 PM PDT 24 Jul 05 05:31:23 PM PDT 24 3984672157 ps
T518 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.864995183 Jul 05 05:31:53 PM PDT 24 Jul 05 05:31:58 PM PDT 24 2524108269 ps
T519 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.2765076683 Jul 05 05:31:09 PM PDT 24 Jul 05 05:31:12 PM PDT 24 2628453124 ps
T520 /workspace/coverage/default/19.sysrst_ctrl_alert_test.3829828839 Jul 05 05:31:18 PM PDT 24 Jul 05 05:31:25 PM PDT 24 2009475072 ps
T521 /workspace/coverage/default/33.sysrst_ctrl_alert_test.3877593614 Jul 05 05:31:50 PM PDT 24 Jul 05 05:31:57 PM PDT 24 2011148077 ps
T522 /workspace/coverage/default/22.sysrst_ctrl_stress_all.130350042 Jul 05 05:31:30 PM PDT 24 Jul 05 05:31:57 PM PDT 24 9636887718 ps
T216 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.4273282975 Jul 05 05:32:20 PM PDT 24 Jul 05 05:33:30 PM PDT 24 616225079117 ps
T523 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.3960248006 Jul 05 05:31:52 PM PDT 24 Jul 05 05:32:03 PM PDT 24 3198120706 ps
T524 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.3078937010 Jul 05 05:30:18 PM PDT 24 Jul 05 05:30:23 PM PDT 24 10300677173 ps
T347 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1719261616 Jul 05 05:32:35 PM PDT 24 Jul 05 05:35:17 PM PDT 24 125320296886 ps
T525 /workspace/coverage/default/46.sysrst_ctrl_alert_test.2868815902 Jul 05 05:32:32 PM PDT 24 Jul 05 05:32:35 PM PDT 24 2036795572 ps
T526 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.4055034115 Jul 05 05:30:25 PM PDT 24 Jul 05 05:30:28 PM PDT 24 2499310753 ps
T284 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.3297104978 Jul 05 05:31:33 PM PDT 24 Jul 05 05:34:33 PM PDT 24 128224501460 ps
T187 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.344155326 Jul 05 05:30:42 PM PDT 24 Jul 05 05:30:52 PM PDT 24 3312833192 ps
T527 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.122631837 Jul 05 05:32:07 PM PDT 24 Jul 05 05:32:15 PM PDT 24 4579486424 ps
T528 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.845866696 Jul 05 05:30:35 PM PDT 24 Jul 05 05:30:40 PM PDT 24 2515058743 ps
T529 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3842630864 Jul 05 05:32:43 PM PDT 24 Jul 05 05:33:48 PM PDT 24 25583270676 ps
T530 /workspace/coverage/default/26.sysrst_ctrl_stress_all.3999029705 Jul 05 05:31:33 PM PDT 24 Jul 05 05:32:08 PM PDT 24 12607466375 ps
T531 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.2694671973 Jul 05 05:32:01 PM PDT 24 Jul 05 05:32:13 PM PDT 24 3948730511 ps
T532 /workspace/coverage/default/44.sysrst_ctrl_smoke.2518967532 Jul 05 05:32:27 PM PDT 24 Jul 05 05:32:33 PM PDT 24 2114743923 ps
T533 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.4228398655 Jul 05 05:31:00 PM PDT 24 Jul 05 05:31:10 PM PDT 24 3105117818 ps
T534 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.2788782876 Jul 05 05:31:04 PM PDT 24 Jul 05 05:31:07 PM PDT 24 3199192621 ps
T535 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.495610565 Jul 05 05:32:37 PM PDT 24 Jul 05 05:32:42 PM PDT 24 2523540733 ps
T536 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1146767301 Jul 05 05:32:01 PM PDT 24 Jul 05 05:32:05 PM PDT 24 2636761151 ps
T537 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3610455685 Jul 05 05:32:14 PM PDT 24 Jul 05 05:32:22 PM PDT 24 2611221361 ps
T538 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.389054452 Jul 05 05:30:28 PM PDT 24 Jul 05 05:30:31 PM PDT 24 3517048511 ps
T539 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1038764538 Jul 05 05:32:20 PM PDT 24 Jul 05 05:32:23 PM PDT 24 2530918806 ps
T217 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.2768020170 Jul 05 05:31:27 PM PDT 24 Jul 05 05:31:31 PM PDT 24 5790776332 ps
T540 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.317532420 Jul 05 05:32:45 PM PDT 24 Jul 05 05:33:10 PM PDT 24 28342918424 ps
T541 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3400671979 Jul 05 05:33:03 PM PDT 24 Jul 05 05:33:06 PM PDT 24 2637640508 ps
T348 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2415849665 Jul 05 05:32:45 PM PDT 24 Jul 05 05:34:49 PM PDT 24 184129223108 ps
T542 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.4217564662 Jul 05 05:32:17 PM PDT 24 Jul 05 05:32:22 PM PDT 24 3081767207 ps
T196 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2185941766 Jul 05 05:31:25 PM PDT 24 Jul 05 05:31:46 PM PDT 24 16603467809 ps
T543 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2039079694 Jul 05 05:32:12 PM PDT 24 Jul 05 05:32:22 PM PDT 24 3330594166 ps
T544 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2490465028 Jul 05 05:32:01 PM PDT 24 Jul 05 05:32:07 PM PDT 24 3663551399 ps
T286 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.3766695849 Jul 05 05:31:08 PM PDT 24 Jul 05 05:32:58 PM PDT 24 84541968804 ps
T545 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1827232257 Jul 05 05:32:18 PM PDT 24 Jul 05 05:32:27 PM PDT 24 2608304593 ps
T546 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.3272519072 Jul 05 05:31:19 PM PDT 24 Jul 05 05:38:26 PM PDT 24 658413730073 ps
T547 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.1282740059 Jul 05 05:31:36 PM PDT 24 Jul 05 05:31:39 PM PDT 24 3297325043 ps
T548 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2107860999 Jul 05 05:31:35 PM PDT 24 Jul 05 05:34:24 PM PDT 24 140835085193 ps
T549 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.2038606236 Jul 05 05:31:29 PM PDT 24 Jul 05 05:31:32 PM PDT 24 2146133132 ps
T550 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1960969497 Jul 05 05:31:17 PM PDT 24 Jul 05 05:31:22 PM PDT 24 3510741338 ps
T257 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2136533398 Jul 05 05:31:55 PM PDT 24 Jul 05 05:36:38 PM PDT 24 516219699317 ps
T551 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.72380762 Jul 05 05:30:29 PM PDT 24 Jul 05 05:30:34 PM PDT 24 2618867368 ps
T552 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.2676725708 Jul 05 05:31:47 PM PDT 24 Jul 05 05:31:54 PM PDT 24 5496021559 ps
T553 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1020199431 Jul 05 05:30:30 PM PDT 24 Jul 05 05:30:37 PM PDT 24 2311972156 ps
T224 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1899587961 Jul 05 05:30:26 PM PDT 24 Jul 05 05:32:29 PM PDT 24 257327467014 ps
T554 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.1529356582 Jul 05 05:31:01 PM PDT 24 Jul 05 05:31:14 PM PDT 24 27107447570 ps
T555 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1608622783 Jul 05 05:30:37 PM PDT 24 Jul 05 05:30:40 PM PDT 24 3133403825 ps
T556 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2097634939 Jul 05 05:31:31 PM PDT 24 Jul 05 05:31:39 PM PDT 24 2613327203 ps
T354 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.284463913 Jul 05 05:31:03 PM PDT 24 Jul 05 05:31:42 PM PDT 24 55137678276 ps
T557 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.130736690 Jul 05 05:32:08 PM PDT 24 Jul 05 05:32:18 PM PDT 24 3347767246 ps
T127 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.1393535128 Jul 05 05:30:55 PM PDT 24 Jul 05 05:32:01 PM PDT 24 23431020836 ps
T558 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.3594714798 Jul 05 05:31:09 PM PDT 24 Jul 05 05:31:12 PM PDT 24 3705391905 ps
T559 /workspace/coverage/default/33.sysrst_ctrl_smoke.1566078857 Jul 05 05:31:52 PM PDT 24 Jul 05 05:31:57 PM PDT 24 2129044911 ps
T359 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2137048151 Jul 05 05:32:45 PM PDT 24 Jul 05 05:33:56 PM PDT 24 51354246412 ps
T560 /workspace/coverage/default/49.sysrst_ctrl_stress_all.4225677107 Jul 05 05:32:44 PM PDT 24 Jul 05 05:32:48 PM PDT 24 6470583138 ps
T561 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1826861996 Jul 05 05:32:35 PM PDT 24 Jul 05 05:32:39 PM PDT 24 2639430462 ps
T562 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3570659942 Jul 05 05:31:52 PM PDT 24 Jul 05 05:31:57 PM PDT 24 2493289772 ps
T563 /workspace/coverage/default/47.sysrst_ctrl_smoke.2659950951 Jul 05 05:32:27 PM PDT 24 Jul 05 05:32:30 PM PDT 24 2125606028 ps
T564 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.4179091733 Jul 05 05:30:51 PM PDT 24 Jul 05 05:30:56 PM PDT 24 2514434093 ps
T565 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.2451718985 Jul 05 05:30:33 PM PDT 24 Jul 05 05:30:41 PM PDT 24 2512689150 ps
T128 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.4284512271 Jul 05 05:32:34 PM PDT 24 Jul 05 05:34:09 PM PDT 24 149343517280 ps
T129 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1630935950 Jul 05 05:32:25 PM PDT 24 Jul 05 05:32:42 PM PDT 24 51709071166 ps
T566 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.4162922720 Jul 05 05:31:44 PM PDT 24 Jul 05 05:31:53 PM PDT 24 2461640065 ps
T567 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.2144083015 Jul 05 05:32:03 PM PDT 24 Jul 05 05:32:10 PM PDT 24 2449225890 ps
T568 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.315364548 Jul 05 05:31:44 PM PDT 24 Jul 05 05:38:06 PM PDT 24 154334568543 ps
T569 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.2193175555 Jul 05 05:31:34 PM PDT 24 Jul 05 05:31:43 PM PDT 24 2512298307 ps
T570 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.577786780 Jul 05 05:32:19 PM PDT 24 Jul 05 05:32:23 PM PDT 24 11041157918 ps
T571 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2294101715 Jul 05 05:32:48 PM PDT 24 Jul 05 05:33:31 PM PDT 24 25336450188 ps
T572 /workspace/coverage/default/17.sysrst_ctrl_smoke.2694994382 Jul 05 05:31:09 PM PDT 24 Jul 05 05:31:13 PM PDT 24 2117660447 ps
T338 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.1372009581 Jul 05 05:32:36 PM PDT 24 Jul 05 05:33:03 PM PDT 24 62617226315 ps
T573 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.1714745694 Jul 05 05:30:33 PM PDT 24 Jul 05 05:30:37 PM PDT 24 2615615167 ps
T574 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3029563300 Jul 05 05:30:45 PM PDT 24 Jul 05 05:30:50 PM PDT 24 2611627365 ps
T575 /workspace/coverage/default/4.sysrst_ctrl_alert_test.370874147 Jul 05 05:30:36 PM PDT 24 Jul 05 05:30:39 PM PDT 24 2062529983 ps
T576 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.4123653605 Jul 05 05:31:42 PM PDT 24 Jul 05 05:31:47 PM PDT 24 2467333614 ps
T577 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2329299649 Jul 05 05:30:51 PM PDT 24 Jul 05 05:31:26 PM PDT 24 12956109970 ps
T188 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.2995916526 Jul 05 05:31:14 PM PDT 24 Jul 05 05:31:22 PM PDT 24 3085763684 ps
T578 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.2432745523 Jul 05 05:31:17 PM PDT 24 Jul 05 05:31:25 PM PDT 24 2608361040 ps
T579 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.623655968 Jul 05 05:31:33 PM PDT 24 Jul 05 05:31:35 PM PDT 24 2331186022 ps
T580 /workspace/coverage/default/6.sysrst_ctrl_smoke.2122327017 Jul 05 05:30:43 PM PDT 24 Jul 05 05:30:47 PM PDT 24 2133802078 ps
T581 /workspace/coverage/default/12.sysrst_ctrl_smoke.537838670 Jul 05 05:30:51 PM PDT 24 Jul 05 05:30:55 PM PDT 24 2119174458 ps
T582 /workspace/coverage/default/46.sysrst_ctrl_stress_all.438001657 Jul 05 05:32:32 PM PDT 24 Jul 05 05:32:41 PM PDT 24 10408109625 ps
T140 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.644384283 Jul 05 05:31:08 PM PDT 24 Jul 05 05:31:10 PM PDT 24 7085642471 ps
T583 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2532747732 Jul 05 05:30:41 PM PDT 24 Jul 05 05:30:48 PM PDT 24 7689578402 ps
T584 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.284218693 Jul 05 05:32:06 PM PDT 24 Jul 05 05:32:13 PM PDT 24 2158680620 ps
T585 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.840448488 Jul 05 05:31:08 PM PDT 24 Jul 05 05:31:13 PM PDT 24 4655438649 ps
T370 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3600827435 Jul 05 05:30:34 PM PDT 24 Jul 05 05:31:19 PM PDT 24 67277925256 ps
T586 /workspace/coverage/default/34.sysrst_ctrl_alert_test.2374296977 Jul 05 05:31:50 PM PDT 24 Jul 05 05:31:54 PM PDT 24 2042947024 ps
T360 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.1117185311 Jul 05 05:31:28 PM PDT 24 Jul 05 05:32:38 PM PDT 24 140146728127 ps
T587 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2406712966 Jul 05 05:31:10 PM PDT 24 Jul 05 05:31:13 PM PDT 24 2525759772 ps
T588 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3764045256 Jul 05 05:30:42 PM PDT 24 Jul 05 05:30:48 PM PDT 24 3427368642 ps
T589 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1140971141 Jul 05 05:32:45 PM PDT 24 Jul 05 05:33:28 PM PDT 24 33218798777 ps
T590 /workspace/coverage/default/14.sysrst_ctrl_smoke.4230785098 Jul 05 05:31:00 PM PDT 24 Jul 05 05:31:08 PM PDT 24 2111542024 ps
T591 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2014756265 Jul 05 05:32:26 PM PDT 24 Jul 05 05:32:28 PM PDT 24 2538546020 ps
T592 /workspace/coverage/default/11.sysrst_ctrl_smoke.1967532443 Jul 05 05:30:51 PM PDT 24 Jul 05 05:30:57 PM PDT 24 2112982854 ps
T340 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1846890088 Jul 05 05:32:51 PM PDT 24 Jul 05 05:34:20 PM PDT 24 65827972876 ps
T141 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1446030789 Jul 05 05:31:51 PM PDT 24 Jul 05 05:31:57 PM PDT 24 3749663330 ps
T593 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.3648471230 Jul 05 05:31:38 PM PDT 24 Jul 05 05:31:40 PM PDT 24 2514550823 ps
T329 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3924552662 Jul 05 05:31:18 PM PDT 24 Jul 05 05:37:54 PM PDT 24 150685484295 ps
T594 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2571949747 Jul 05 05:32:34 PM PDT 24 Jul 05 05:32:43 PM PDT 24 2507843884 ps
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