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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.94 99.44 96.78 100.00 98.72 98.89 99.61 92.13


Total test records in report: 907
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T595 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1780253616 Jul 05 05:31:28 PM PDT 24 Jul 05 05:31:38 PM PDT 24 3409298869 ps
T596 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1770223974 Jul 05 05:31:44 PM PDT 24 Jul 05 05:31:53 PM PDT 24 2515319866 ps
T597 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2154698891 Jul 05 05:30:38 PM PDT 24 Jul 05 05:30:47 PM PDT 24 4892669183 ps
T598 /workspace/coverage/default/40.sysrst_ctrl_smoke.1174452966 Jul 05 05:32:08 PM PDT 24 Jul 05 05:32:10 PM PDT 24 2127863648 ps
T599 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.2305086721 Jul 05 05:32:27 PM PDT 24 Jul 05 05:32:31 PM PDT 24 4448835306 ps
T600 /workspace/coverage/default/24.sysrst_ctrl_alert_test.3218816650 Jul 05 05:31:34 PM PDT 24 Jul 05 05:31:38 PM PDT 24 2038284558 ps
T601 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2467126236 Jul 05 05:32:29 PM PDT 24 Jul 05 05:32:31 PM PDT 24 2127834911 ps
T602 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.119902139 Jul 05 05:30:58 PM PDT 24 Jul 05 05:31:04 PM PDT 24 4120880802 ps
T603 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.2998608459 Jul 05 05:31:43 PM PDT 24 Jul 05 05:31:51 PM PDT 24 4090444189 ps
T604 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.634487357 Jul 05 05:32:26 PM PDT 24 Jul 05 05:32:29 PM PDT 24 2629158888 ps
T130 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1395056745 Jul 05 05:31:01 PM PDT 24 Jul 05 05:31:46 PM PDT 24 65107925738 ps
T605 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.991326854 Jul 05 05:32:00 PM PDT 24 Jul 05 05:32:07 PM PDT 24 2115294960 ps
T606 /workspace/coverage/default/25.sysrst_ctrl_stress_all.2178437563 Jul 05 05:31:32 PM PDT 24 Jul 05 05:31:49 PM PDT 24 6339484037 ps
T607 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1032939516 Jul 05 05:31:44 PM PDT 24 Jul 05 05:31:47 PM PDT 24 2567889164 ps
T608 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.1639604702 Jul 05 05:31:51 PM PDT 24 Jul 05 05:32:02 PM PDT 24 3064991357 ps
T609 /workspace/coverage/default/27.sysrst_ctrl_stress_all.2235365504 Jul 05 05:31:43 PM PDT 24 Jul 05 05:31:55 PM PDT 24 13731578409 ps
T331 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.4267113773 Jul 05 05:32:33 PM PDT 24 Jul 05 05:33:19 PM PDT 24 38947809129 ps
T610 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.1583046735 Jul 05 05:30:28 PM PDT 24 Jul 05 05:30:31 PM PDT 24 2116196742 ps
T611 /workspace/coverage/default/49.sysrst_ctrl_smoke.3842118439 Jul 05 05:32:36 PM PDT 24 Jul 05 05:32:41 PM PDT 24 2135937439 ps
T612 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.829696658 Jul 05 05:31:18 PM PDT 24 Jul 05 05:31:23 PM PDT 24 2225416402 ps
T225 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.2773434857 Jul 05 05:30:56 PM PDT 24 Jul 05 05:31:04 PM PDT 24 2779643471 ps
T613 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.2881684166 Jul 05 05:31:34 PM PDT 24 Jul 05 05:31:43 PM PDT 24 2616386204 ps
T166 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.334177652 Jul 05 05:32:39 PM PDT 24 Jul 05 05:32:42 PM PDT 24 3466514664 ps
T226 /workspace/coverage/default/14.sysrst_ctrl_stress_all.913707519 Jul 05 05:31:02 PM PDT 24 Jul 05 05:31:12 PM PDT 24 11798554129 ps
T227 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.3421264364 Jul 05 05:32:20 PM PDT 24 Jul 05 05:32:26 PM PDT 24 3790691528 ps
T614 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2642027006 Jul 05 05:30:30 PM PDT 24 Jul 05 05:30:32 PM PDT 24 2483437818 ps
T615 /workspace/coverage/default/30.sysrst_ctrl_smoke.1730361213 Jul 05 05:31:42 PM PDT 24 Jul 05 05:31:49 PM PDT 24 2111604029 ps
T372 /workspace/coverage/default/15.sysrst_ctrl_stress_all.3028318453 Jul 05 05:31:02 PM PDT 24 Jul 05 05:31:13 PM PDT 24 13647191843 ps
T616 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1150860961 Jul 05 05:30:34 PM PDT 24 Jul 05 05:30:36 PM PDT 24 2575969051 ps
T189 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.424737314 Jul 05 05:30:36 PM PDT 24 Jul 05 05:30:46 PM PDT 24 4309528792 ps
T617 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.4243965460 Jul 05 05:31:50 PM PDT 24 Jul 05 05:32:15 PM PDT 24 85061534625 ps
T618 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1378039747 Jul 05 05:32:47 PM PDT 24 Jul 05 05:33:59 PM PDT 24 25835593830 ps
T619 /workspace/coverage/default/31.sysrst_ctrl_stress_all.4210080398 Jul 05 05:31:52 PM PDT 24 Jul 05 05:32:26 PM PDT 24 12834844816 ps
T620 /workspace/coverage/default/45.sysrst_ctrl_smoke.678145699 Jul 05 05:32:30 PM PDT 24 Jul 05 05:32:32 PM PDT 24 2135229104 ps
T621 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1805050190 Jul 05 05:30:52 PM PDT 24 Jul 05 05:31:01 PM PDT 24 2614080199 ps
T622 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3865662317 Jul 05 05:32:08 PM PDT 24 Jul 05 05:32:11 PM PDT 24 5926229084 ps
T623 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.1513873455 Jul 05 05:31:51 PM PDT 24 Jul 05 05:31:56 PM PDT 24 2695303012 ps
T624 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.473692763 Jul 05 05:32:18 PM PDT 24 Jul 05 05:32:21 PM PDT 24 2080360816 ps
T625 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2182093163 Jul 05 05:30:38 PM PDT 24 Jul 05 05:30:40 PM PDT 24 3661429534 ps
T61 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.682281031 Jul 05 05:30:27 PM PDT 24 Jul 05 05:31:17 PM PDT 24 38111798853 ps
T626 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1802186696 Jul 05 05:32:50 PM PDT 24 Jul 05 05:33:35 PM PDT 24 32995079554 ps
T627 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3538449860 Jul 05 05:31:50 PM PDT 24 Jul 05 05:31:53 PM PDT 24 2177494330 ps
T628 /workspace/coverage/default/13.sysrst_ctrl_stress_all.92327417 Jul 05 05:31:03 PM PDT 24 Jul 05 05:31:07 PM PDT 24 6859851478 ps
T629 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2687934774 Jul 05 05:32:35 PM PDT 24 Jul 05 05:32:45 PM PDT 24 2609396149 ps
T258 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1148444939 Jul 05 05:31:14 PM PDT 24 Jul 05 05:32:34 PM PDT 24 135901775443 ps
T368 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.1849062550 Jul 05 05:31:02 PM PDT 24 Jul 05 05:31:18 PM PDT 24 17598430131 ps
T630 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2447200771 Jul 05 05:32:25 PM PDT 24 Jul 05 05:32:33 PM PDT 24 2512486330 ps
T259 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.859548021 Jul 05 05:31:08 PM PDT 24 Jul 05 05:31:12 PM PDT 24 3912644760 ps
T260 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.677624903 Jul 05 05:32:04 PM PDT 24 Jul 05 05:32:14 PM PDT 24 4914046849 ps
T631 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1826852707 Jul 05 05:30:44 PM PDT 24 Jul 05 05:30:47 PM PDT 24 7602287391 ps
T632 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1249357950 Jul 05 05:30:52 PM PDT 24 Jul 05 05:32:28 PM PDT 24 40258294092 ps
T633 /workspace/coverage/default/19.sysrst_ctrl_smoke.3136633550 Jul 05 05:31:08 PM PDT 24 Jul 05 05:31:14 PM PDT 24 2115159704 ps
T634 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.8288539 Jul 05 05:31:35 PM PDT 24 Jul 05 05:31:47 PM PDT 24 3666560090 ps
T154 /workspace/coverage/default/48.sysrst_ctrl_stress_all.3122676878 Jul 05 05:32:35 PM PDT 24 Jul 05 05:33:28 PM PDT 24 983297111013 ps
T345 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3665290271 Jul 05 05:32:44 PM PDT 24 Jul 05 05:35:07 PM PDT 24 103371334569 ps
T635 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1234683983 Jul 05 05:31:51 PM PDT 24 Jul 05 05:32:01 PM PDT 24 2611518056 ps
T636 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.273076696 Jul 05 05:32:42 PM PDT 24 Jul 05 05:33:21 PM PDT 24 57614017555 ps
T349 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2869931199 Jul 05 05:38:45 PM PDT 24 Jul 05 05:39:10 PM PDT 24 106726873080 ps
T637 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4250547878 Jul 05 05:32:26 PM PDT 24 Jul 05 05:32:29 PM PDT 24 2062400469 ps
T638 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2666404894 Jul 05 05:31:58 PM PDT 24 Jul 05 05:32:09 PM PDT 24 3664636871 ps
T142 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1387830102 Jul 05 05:30:42 PM PDT 24 Jul 05 05:30:45 PM PDT 24 14253103495 ps
T639 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.4118981431 Jul 05 05:31:33 PM PDT 24 Jul 05 05:31:35 PM PDT 24 2514444611 ps
T640 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.1446430732 Jul 05 05:31:01 PM PDT 24 Jul 05 05:32:22 PM PDT 24 113089055862 ps
T641 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2123827249 Jul 05 05:32:26 PM PDT 24 Jul 05 05:32:30 PM PDT 24 2475868877 ps
T642 /workspace/coverage/default/37.sysrst_ctrl_stress_all.874686027 Jul 05 05:32:01 PM PDT 24 Jul 05 05:32:09 PM PDT 24 8450585576 ps
T643 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.716781182 Jul 05 05:31:52 PM PDT 24 Jul 05 05:32:00 PM PDT 24 3636319756 ps
T644 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3533213512 Jul 05 05:32:41 PM PDT 24 Jul 05 05:36:09 PM PDT 24 81746568444 ps
T645 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.998740175 Jul 05 05:31:09 PM PDT 24 Jul 05 05:31:17 PM PDT 24 2507968472 ps
T646 /workspace/coverage/default/3.sysrst_ctrl_smoke.3621495615 Jul 05 05:30:30 PM PDT 24 Jul 05 05:30:33 PM PDT 24 2126838628 ps
T647 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.3257901416 Jul 05 05:31:45 PM PDT 24 Jul 05 05:31:51 PM PDT 24 3244489322 ps
T648 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.426543953 Jul 05 05:32:34 PM PDT 24 Jul 05 05:32:37 PM PDT 24 2911692106 ps
T649 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.965254896 Jul 05 05:30:45 PM PDT 24 Jul 05 05:30:49 PM PDT 24 2195470537 ps
T650 /workspace/coverage/default/16.sysrst_ctrl_smoke.2465238400 Jul 05 05:31:03 PM PDT 24 Jul 05 05:31:07 PM PDT 24 2128324811 ps
T651 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.157224957 Jul 05 05:32:35 PM PDT 24 Jul 05 05:32:42 PM PDT 24 2760787477 ps
T346 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.4092356643 Jul 05 05:32:11 PM PDT 24 Jul 05 05:35:21 PM PDT 24 73002429814 ps
T652 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.1444729067 Jul 05 05:31:28 PM PDT 24 Jul 05 05:33:27 PM PDT 24 92556343501 ps
T653 /workspace/coverage/default/35.sysrst_ctrl_smoke.3242980558 Jul 05 05:31:51 PM PDT 24 Jul 05 05:31:58 PM PDT 24 2107616425 ps
T654 /workspace/coverage/default/20.sysrst_ctrl_stress_all.3526417855 Jul 05 05:31:17 PM PDT 24 Jul 05 05:31:34 PM PDT 24 6227956993 ps
T102 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.363224393 Jul 05 05:30:22 PM PDT 24 Jul 05 05:30:48 PM PDT 24 40427801922 ps
T655 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.4220316887 Jul 05 05:32:11 PM PDT 24 Jul 05 05:32:19 PM PDT 24 2510046185 ps
T656 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3725147716 Jul 05 05:31:55 PM PDT 24 Jul 05 05:32:01 PM PDT 24 3478637285 ps
T229 /workspace/coverage/default/23.sysrst_ctrl_stress_all.2379394999 Jul 05 05:31:25 PM PDT 24 Jul 05 05:42:31 PM PDT 24 350737553526 ps
T248 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3288178662 Jul 05 05:31:44 PM PDT 24 Jul 05 05:31:50 PM PDT 24 2517097225 ps
T249 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1145234354 Jul 05 05:31:54 PM PDT 24 Jul 05 05:32:02 PM PDT 24 2078941913 ps
T250 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2321879433 Jul 05 05:32:44 PM PDT 24 Jul 05 05:34:16 PM PDT 24 38291927092 ps
T251 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2672615099 Jul 05 05:32:04 PM PDT 24 Jul 05 05:32:12 PM PDT 24 2451008285 ps
T252 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.2937469731 Jul 05 05:31:50 PM PDT 24 Jul 05 05:32:19 PM PDT 24 39302533692 ps
T253 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.416311995 Jul 05 05:31:25 PM PDT 24 Jul 05 05:31:28 PM PDT 24 2133084125 ps
T254 /workspace/coverage/default/23.sysrst_ctrl_alert_test.2777909003 Jul 05 05:31:26 PM PDT 24 Jul 05 05:31:33 PM PDT 24 2010352028 ps
T255 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2661144622 Jul 05 05:31:00 PM PDT 24 Jul 05 05:31:03 PM PDT 24 8361536684 ps
T256 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.395160618 Jul 05 05:31:51 PM PDT 24 Jul 05 05:31:54 PM PDT 24 2970087766 ps
T657 /workspace/coverage/default/46.sysrst_ctrl_smoke.2894401400 Jul 05 05:32:33 PM PDT 24 Jul 05 05:32:36 PM PDT 24 2127956241 ps
T658 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2386944550 Jul 05 05:31:02 PM PDT 24 Jul 05 05:31:08 PM PDT 24 2516867396 ps
T659 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.2267036441 Jul 05 05:31:51 PM PDT 24 Jul 05 05:31:58 PM PDT 24 2476199433 ps
T660 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.921656224 Jul 05 05:30:51 PM PDT 24 Jul 05 05:30:58 PM PDT 24 4018368531 ps
T661 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.3106738537 Jul 05 05:31:16 PM PDT 24 Jul 05 05:31:19 PM PDT 24 2501107985 ps
T662 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1281388418 Jul 05 05:30:39 PM PDT 24 Jul 05 05:30:44 PM PDT 24 2471581355 ps
T663 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3394090628 Jul 05 05:30:51 PM PDT 24 Jul 05 05:31:45 PM PDT 24 996405686368 ps
T664 /workspace/coverage/default/26.sysrst_ctrl_alert_test.1634005053 Jul 05 05:31:35 PM PDT 24 Jul 05 05:31:38 PM PDT 24 2028023610 ps
T665 /workspace/coverage/default/45.sysrst_ctrl_stress_all.488937738 Jul 05 05:32:29 PM PDT 24 Jul 05 05:32:54 PM PDT 24 11133425651 ps
T666 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1914244085 Jul 05 05:31:00 PM PDT 24 Jul 05 05:31:05 PM PDT 24 2459144026 ps
T667 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3272561376 Jul 05 05:31:10 PM PDT 24 Jul 05 05:31:13 PM PDT 24 2212980066 ps
T327 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.168016935 Jul 05 05:30:26 PM PDT 24 Jul 05 05:38:07 PM PDT 24 176483889438 ps
T298 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.1809142324 Jul 05 05:31:02 PM PDT 24 Jul 05 05:33:15 PM PDT 24 209745075574 ps
T668 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.387906936 Jul 05 05:30:20 PM PDT 24 Jul 05 05:30:24 PM PDT 24 4124149441 ps
T669 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.3540141256 Jul 05 05:31:51 PM PDT 24 Jul 05 05:32:19 PM PDT 24 56199634187 ps
T670 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.2455945461 Jul 05 05:30:28 PM PDT 24 Jul 05 05:30:35 PM PDT 24 3801581931 ps
T671 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.814743951 Jul 05 05:30:52 PM PDT 24 Jul 05 05:31:00 PM PDT 24 3893944053 ps
T672 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.933438046 Jul 05 05:31:34 PM PDT 24 Jul 05 05:31:43 PM PDT 24 2513531158 ps
T673 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2492985540 Jul 05 05:30:54 PM PDT 24 Jul 05 05:30:58 PM PDT 24 2526743747 ps
T674 /workspace/coverage/default/41.sysrst_ctrl_smoke.2991732944 Jul 05 05:32:22 PM PDT 24 Jul 05 05:32:24 PM PDT 24 2223811102 ps
T675 /workspace/coverage/default/19.sysrst_ctrl_stress_all.2542435907 Jul 05 05:31:07 PM PDT 24 Jul 05 05:33:40 PM PDT 24 110454181685 ps
T676 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.380450648 Jul 05 05:30:21 PM PDT 24 Jul 05 05:30:25 PM PDT 24 2268005693 ps
T677 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.1916809132 Jul 05 05:30:59 PM PDT 24 Jul 05 05:31:08 PM PDT 24 2455003390 ps
T678 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.2108718003 Jul 05 05:30:29 PM PDT 24 Jul 05 05:31:12 PM PDT 24 155451206819 ps
T288 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.1351105617 Jul 05 05:30:22 PM PDT 24 Jul 05 05:31:17 PM PDT 24 22011547647 ps
T679 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.685953684 Jul 05 05:30:34 PM PDT 24 Jul 05 05:30:42 PM PDT 24 2610599220 ps
T680 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.4131157462 Jul 05 05:31:38 PM PDT 24 Jul 05 05:37:25 PM PDT 24 147522674868 ps
T357 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.320677683 Jul 05 05:31:10 PM PDT 24 Jul 05 05:32:08 PM PDT 24 86161673154 ps
T681 /workspace/coverage/default/29.sysrst_ctrl_alert_test.3902295868 Jul 05 05:31:43 PM PDT 24 Jul 05 05:31:46 PM PDT 24 2155657775 ps
T682 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2403690849 Jul 05 05:32:51 PM PDT 24 Jul 05 05:35:32 PM PDT 24 59868165860 ps
T683 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3439473393 Jul 05 05:32:36 PM PDT 24 Jul 05 05:32:42 PM PDT 24 2912242682 ps
T684 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.4050920975 Jul 05 05:31:29 PM PDT 24 Jul 05 05:32:42 PM PDT 24 26830870757 ps
T685 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2472732356 Jul 05 05:30:36 PM PDT 24 Jul 05 05:30:39 PM PDT 24 3803226738 ps
T686 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1065718451 Jul 05 05:31:43 PM PDT 24 Jul 05 05:31:51 PM PDT 24 2135466104 ps
T687 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1377595032 Jul 05 05:31:51 PM PDT 24 Jul 05 05:34:32 PM PDT 24 63694799321 ps
T688 /workspace/coverage/default/25.sysrst_ctrl_alert_test.3876232548 Jul 05 05:31:35 PM PDT 24 Jul 05 05:31:38 PM PDT 24 2034271206 ps
T689 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.2962652116 Jul 05 05:31:37 PM PDT 24 Jul 05 05:31:42 PM PDT 24 5593128946 ps
T690 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.3347018884 Jul 05 05:31:14 PM PDT 24 Jul 05 05:31:17 PM PDT 24 2114120691 ps
T691 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3813447714 Jul 05 05:31:01 PM PDT 24 Jul 05 05:31:08 PM PDT 24 2511977591 ps
T692 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.1034983252 Jul 05 05:30:53 PM PDT 24 Jul 05 05:30:58 PM PDT 24 2589810977 ps
T143 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.917556348 Jul 05 05:30:26 PM PDT 24 Jul 05 05:31:28 PM PDT 24 711643251946 ps
T693 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.461732035 Jul 05 05:31:51 PM PDT 24 Jul 05 05:32:36 PM PDT 24 33881631828 ps
T694 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.606217975 Jul 05 05:32:11 PM PDT 24 Jul 05 05:32:15 PM PDT 24 3763871709 ps
T695 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.596290874 Jul 05 05:32:25 PM PDT 24 Jul 05 05:32:27 PM PDT 24 2128525269 ps
T696 /workspace/coverage/default/14.sysrst_ctrl_alert_test.2882962484 Jul 05 05:31:02 PM PDT 24 Jul 05 05:31:11 PM PDT 24 2016646387 ps
T697 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3284114113 Jul 05 05:30:23 PM PDT 24 Jul 05 05:30:25 PM PDT 24 3949879401 ps
T698 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1554955910 Jul 05 05:31:44 PM PDT 24 Jul 05 05:31:53 PM PDT 24 8031152727 ps
T699 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.1867651622 Jul 05 05:30:28 PM PDT 24 Jul 05 05:30:31 PM PDT 24 2544112878 ps
T700 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3910107312 Jul 05 05:31:08 PM PDT 24 Jul 05 05:31:12 PM PDT 24 3507251094 ps
T337 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1608026983 Jul 05 05:30:49 PM PDT 24 Jul 05 05:33:41 PM PDT 24 73257580884 ps
T701 /workspace/coverage/default/41.sysrst_ctrl_stress_all.2644181550 Jul 05 05:32:20 PM PDT 24 Jul 05 05:41:01 PM PDT 24 195498197817 ps
T702 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2348895557 Jul 05 05:31:15 PM PDT 24 Jul 05 05:31:18 PM PDT 24 2491470412 ps
T703 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.797800513 Jul 05 05:32:38 PM PDT 24 Jul 05 05:34:47 PM PDT 24 46048858812 ps
T704 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3332262400 Jul 05 05:31:33 PM PDT 24 Jul 05 05:31:48 PM PDT 24 24093371915 ps
T299 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1889364588 Jul 05 05:30:40 PM PDT 24 Jul 05 05:32:38 PM PDT 24 48710002282 ps
T705 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1594552388 Jul 05 05:31:18 PM PDT 24 Jul 05 05:31:26 PM PDT 24 2510703399 ps
T706 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.3337863033 Jul 05 05:32:36 PM PDT 24 Jul 05 05:37:08 PM PDT 24 113706086013 ps
T707 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.4255554608 Jul 05 05:32:43 PM PDT 24 Jul 05 05:41:54 PM PDT 24 214658341460 ps
T708 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3450427084 Jul 05 05:32:47 PM PDT 24 Jul 05 05:33:10 PM PDT 24 26852371207 ps
T155 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.777308035 Jul 05 05:32:35 PM PDT 24 Jul 05 05:33:11 PM PDT 24 58228098096 ps
T709 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3119930878 Jul 05 05:31:36 PM PDT 24 Jul 05 05:31:39 PM PDT 24 2551782766 ps
T710 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.492044070 Jul 05 05:30:25 PM PDT 24 Jul 05 05:31:05 PM PDT 24 61954419958 ps
T711 /workspace/coverage/default/15.sysrst_ctrl_smoke.1387585333 Jul 05 05:31:01 PM PDT 24 Jul 05 05:31:03 PM PDT 24 2143008821 ps
T352 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3065382936 Jul 05 05:32:45 PM PDT 24 Jul 05 05:40:09 PM PDT 24 173789055283 ps
T712 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3413531583 Jul 05 05:32:37 PM PDT 24 Jul 05 05:32:46 PM PDT 24 2014795687 ps
T713 /workspace/coverage/default/3.sysrst_ctrl_alert_test.2847696409 Jul 05 05:30:29 PM PDT 24 Jul 05 05:30:35 PM PDT 24 2014054363 ps
T714 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.4117573588 Jul 05 05:30:27 PM PDT 24 Jul 05 05:30:33 PM PDT 24 2777265905 ps
T715 /workspace/coverage/default/23.sysrst_ctrl_smoke.79148975 Jul 05 05:31:25 PM PDT 24 Jul 05 05:31:28 PM PDT 24 2127545694 ps
T339 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2188284737 Jul 05 05:32:43 PM PDT 24 Jul 05 05:36:17 PM PDT 24 78290743623 ps
T716 /workspace/coverage/default/49.sysrst_ctrl_alert_test.844174082 Jul 05 05:32:43 PM PDT 24 Jul 05 05:32:50 PM PDT 24 2013420407 ps
T289 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.2271926961 Jul 05 05:30:32 PM PDT 24 Jul 05 05:32:14 PM PDT 24 42011086352 ps
T717 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2073741510 Jul 05 05:30:26 PM PDT 24 Jul 05 05:30:35 PM PDT 24 26508956829 ps
T718 /workspace/coverage/default/6.sysrst_ctrl_alert_test.1075307987 Jul 05 05:30:38 PM PDT 24 Jul 05 05:30:40 PM PDT 24 2037013592 ps
T719 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.3197821170 Jul 05 05:30:44 PM PDT 24 Jul 05 05:31:44 PM PDT 24 83609995434 ps
T720 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2258650355 Jul 05 05:30:45 PM PDT 24 Jul 05 05:30:49 PM PDT 24 2522476339 ps
T721 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2575414845 Jul 05 05:30:54 PM PDT 24 Jul 05 05:31:00 PM PDT 24 2844173790 ps
T722 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.239258007 Jul 05 05:32:45 PM PDT 24 Jul 05 05:33:06 PM PDT 24 26354835611 ps
T723 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.763515477 Jul 05 05:30:35 PM PDT 24 Jul 05 05:31:40 PM PDT 24 96241334414 ps
T724 /workspace/coverage/default/41.sysrst_ctrl_alert_test.912413777 Jul 05 05:32:20 PM PDT 24 Jul 05 05:32:27 PM PDT 24 2014852957 ps
T725 /workspace/coverage/default/12.sysrst_ctrl_alert_test.1316133869 Jul 05 05:30:52 PM PDT 24 Jul 05 05:31:00 PM PDT 24 2010163871 ps
T726 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.42363168 Jul 05 05:31:27 PM PDT 24 Jul 05 05:31:31 PM PDT 24 2632495163 ps
T727 /workspace/coverage/default/7.sysrst_ctrl_alert_test.3798371600 Jul 05 05:30:42 PM PDT 24 Jul 05 05:30:45 PM PDT 24 2027677704 ps
T728 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.1068376307 Jul 05 05:31:25 PM PDT 24 Jul 05 05:31:29 PM PDT 24 2638744845 ps
T729 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.890944544 Jul 05 05:31:58 PM PDT 24 Jul 05 05:32:08 PM PDT 24 3218058309 ps
T730 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.3730511651 Jul 05 05:31:11 PM PDT 24 Jul 05 05:31:14 PM PDT 24 3420422516 ps
T731 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1084867774 Jul 05 05:30:36 PM PDT 24 Jul 05 05:30:41 PM PDT 24 2618556526 ps
T231 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.252527741 Jul 05 05:30:52 PM PDT 24 Jul 05 05:31:01 PM PDT 24 4005704754 ps
T732 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3135020828 Jul 05 05:32:43 PM PDT 24 Jul 05 05:33:11 PM PDT 24 37058801431 ps
T733 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2972252397 Jul 05 05:31:06 PM PDT 24 Jul 05 05:31:54 PM PDT 24 75595860667 ps
T190 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.2068760483 Jul 05 05:32:19 PM PDT 24 Jul 05 05:32:29 PM PDT 24 3780874543 ps
T734 /workspace/coverage/default/42.sysrst_ctrl_stress_all.1807568811 Jul 05 05:32:20 PM PDT 24 Jul 05 05:33:59 PM PDT 24 187310472767 ps
T735 /workspace/coverage/default/37.sysrst_ctrl_smoke.238142831 Jul 05 05:31:59 PM PDT 24 Jul 05 05:32:07 PM PDT 24 2113343098 ps
T736 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.2150623027 Jul 05 05:31:01 PM PDT 24 Jul 05 05:31:06 PM PDT 24 3021438328 ps
T737 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.2981864840 Jul 05 05:31:43 PM PDT 24 Jul 05 05:31:56 PM PDT 24 3920584310 ps
T738 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.3501196817 Jul 05 05:31:36 PM PDT 24 Jul 05 05:31:40 PM PDT 24 3939441140 ps
T739 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2217884409 Jul 05 05:31:11 PM PDT 24 Jul 05 05:31:14 PM PDT 24 2492965230 ps
T740 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3343174442 Jul 05 05:30:43 PM PDT 24 Jul 05 05:30:48 PM PDT 24 3802705314 ps
T741 /workspace/coverage/default/42.sysrst_ctrl_smoke.2869487876 Jul 05 05:32:17 PM PDT 24 Jul 05 05:32:24 PM PDT 24 2112005734 ps
T742 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.965872246 Jul 05 05:30:43 PM PDT 24 Jul 05 05:30:51 PM PDT 24 3318184945 ps
T743 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2990235143 Jul 05 05:32:47 PM PDT 24 Jul 05 05:35:39 PM PDT 24 64805093619 ps
T744 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.272584227 Jul 05 05:31:10 PM PDT 24 Jul 05 05:31:15 PM PDT 24 2617435131 ps
T745 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.2741498459 Jul 05 05:32:18 PM PDT 24 Jul 05 05:41:08 PM PDT 24 198253957825 ps
T746 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2255348686 Jul 05 05:30:32 PM PDT 24 Jul 05 05:31:15 PM PDT 24 413331128723 ps
T747 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4133844015 Jul 05 05:32:35 PM PDT 24 Jul 05 05:32:45 PM PDT 24 2510183137 ps
T748 /workspace/coverage/default/31.sysrst_ctrl_alert_test.2732063023 Jul 05 05:31:52 PM PDT 24 Jul 05 05:31:56 PM PDT 24 2050651012 ps
T749 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.4048866842 Jul 05 05:30:44 PM PDT 24 Jul 05 05:30:48 PM PDT 24 2644771212 ps
T750 /workspace/coverage/default/32.sysrst_ctrl_stress_all.2555057967 Jul 05 05:31:52 PM PDT 24 Jul 05 05:34:37 PM PDT 24 136697178452 ps
T751 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1468691063 Jul 05 05:31:27 PM PDT 24 Jul 05 05:31:30 PM PDT 24 2500176651 ps
T752 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2426115444 Jul 05 05:31:49 PM PDT 24 Jul 05 05:31:54 PM PDT 24 2186275400 ps
T753 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1722141494 Jul 05 05:31:17 PM PDT 24 Jul 05 05:31:26 PM PDT 24 2610113396 ps
T754 /workspace/coverage/default/1.sysrst_ctrl_stress_all.723850590 Jul 05 05:30:26 PM PDT 24 Jul 05 05:30:51 PM PDT 24 10147697605 ps
T755 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.565914923 Jul 05 05:32:33 PM PDT 24 Jul 05 05:32:43 PM PDT 24 3113775262 ps
T369 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1890322885 Jul 05 05:32:43 PM PDT 24 Jul 05 05:33:44 PM PDT 24 101094725026 ps
T756 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.1836883476 Jul 05 05:31:57 PM PDT 24 Jul 05 05:32:06 PM PDT 24 2512362329 ps
T757 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.207492210 Jul 05 05:31:27 PM PDT 24 Jul 05 05:31:35 PM PDT 24 2608803801 ps
T758 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1210851700 Jul 05 05:32:46 PM PDT 24 Jul 05 05:34:16 PM PDT 24 141061673124 ps
T759 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.590506991 Jul 05 05:30:34 PM PDT 24 Jul 05 05:30:39 PM PDT 24 2522365006 ps
T760 /workspace/coverage/default/18.sysrst_ctrl_smoke.595641630 Jul 05 05:31:08 PM PDT 24 Jul 05 05:31:11 PM PDT 24 2113516705 ps
T761 /workspace/coverage/default/28.sysrst_ctrl_stress_all.3388970204 Jul 05 05:31:43 PM PDT 24 Jul 05 05:31:53 PM PDT 24 15060888482 ps
T762 /workspace/coverage/default/3.sysrst_ctrl_stress_all.1730324586 Jul 05 05:30:31 PM PDT 24 Jul 05 05:34:58 PM PDT 24 104027191878 ps
T763 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.450544639 Jul 05 05:30:20 PM PDT 24 Jul 05 05:30:22 PM PDT 24 2974309869 ps
T764 /workspace/coverage/default/20.sysrst_ctrl_smoke.1941314115 Jul 05 05:31:17 PM PDT 24 Jul 05 05:31:20 PM PDT 24 2124878916 ps
T765 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2348246593 Jul 05 05:30:27 PM PDT 24 Jul 05 05:30:30 PM PDT 24 2317366139 ps
T766 /workspace/coverage/default/21.sysrst_ctrl_smoke.2769574164 Jul 05 05:31:17 PM PDT 24 Jul 05 05:31:20 PM PDT 24 2127798078 ps
T146 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3539129304 Jul 05 05:30:22 PM PDT 24 Jul 05 05:30:53 PM PDT 24 282452684971 ps
T767 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.3059541785 Jul 05 05:31:26 PM PDT 24 Jul 05 05:31:35 PM PDT 24 2453308899 ps
T768 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.1878762258 Jul 05 05:32:26 PM PDT 24 Jul 05 05:33:57 PM PDT 24 33796696253 ps
T769 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2142626264 Jul 05 05:32:43 PM PDT 24 Jul 05 05:33:54 PM PDT 24 27327800387 ps
T770 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.35092956 Jul 05 05:30:44 PM PDT 24 Jul 05 05:30:55 PM PDT 24 3122624603 ps
T771 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.623874232 Jul 05 05:30:36 PM PDT 24 Jul 05 05:30:43 PM PDT 24 2170474214 ps
T300 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.345411657 Jul 05 05:32:32 PM PDT 24 Jul 05 05:34:24 PM PDT 24 41216033130 ps
T772 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2513846588 Jul 05 05:30:46 PM PDT 24 Jul 05 05:30:57 PM PDT 24 4227401777 ps
T773 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.4129413339 Jul 05 05:31:26 PM PDT 24 Jul 05 05:32:27 PM PDT 24 98355820976 ps
T774 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1653712294 Jul 05 05:32:37 PM PDT 24 Jul 05 05:32:46 PM PDT 24 3522031229 ps
T775 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.285959959 Jul 05 05:30:35 PM PDT 24 Jul 05 05:31:31 PM PDT 24 83053693064 ps
T776 /workspace/coverage/default/18.sysrst_ctrl_stress_all.1158625063 Jul 05 05:31:08 PM PDT 24 Jul 05 05:31:11 PM PDT 24 7119692747 ps
T374 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2931844654 Jul 05 05:31:03 PM PDT 24 Jul 05 05:31:12 PM PDT 24 815909174585 ps
T777 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.376633010 Jul 05 05:32:08 PM PDT 24 Jul 05 05:32:11 PM PDT 24 2102322079 ps
T778 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1856970440 Jul 05 05:30:26 PM PDT 24 Jul 05 05:30:33 PM PDT 24 2151832558 ps
T181 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.3951449432 Jul 05 05:31:52 PM PDT 24 Jul 05 05:31:58 PM PDT 24 3627992086 ps
T779 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.3527610331 Jul 05 05:31:52 PM PDT 24 Jul 05 05:32:19 PM PDT 24 34694936720 ps
T780 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2896968947 Jul 05 05:32:46 PM PDT 24 Jul 05 05:33:24 PM PDT 24 63102070576 ps
T781 /workspace/coverage/default/25.sysrst_ctrl_smoke.2291401999 Jul 05 05:31:26 PM PDT 24 Jul 05 05:31:33 PM PDT 24 2110228339 ps
T782 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3106854207 Jul 05 05:31:58 PM PDT 24 Jul 05 05:32:09 PM PDT 24 6796920538 ps
T783 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.1614795785 Jul 05 05:30:39 PM PDT 24 Jul 05 05:31:51 PM PDT 24 106031446646 ps
T784 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3556429817 Jul 05 05:32:42 PM PDT 24 Jul 05 05:35:54 PM PDT 24 80235322795 ps
T785 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.3365285631 Jul 05 05:32:00 PM PDT 24 Jul 05 05:32:04 PM PDT 24 2536673922 ps
T786 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2633253389 Jul 05 05:30:52 PM PDT 24 Jul 05 05:30:55 PM PDT 24 2052276148 ps
T787 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1775036656 Jul 05 05:32:21 PM PDT 24 Jul 05 05:32:27 PM PDT 24 2221776148 ps
T788 /workspace/coverage/default/43.sysrst_ctrl_smoke.1553173140 Jul 05 05:32:21 PM PDT 24 Jul 05 05:32:24 PM PDT 24 2123955745 ps
T333 /workspace/coverage/default/29.sysrst_ctrl_stress_all.3510097403 Jul 05 05:31:44 PM PDT 24 Jul 05 05:32:51 PM PDT 24 168332528167 ps
T789 /workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.3119971417 Jul 05 05:10:11 PM PDT 24 Jul 05 05:10:14 PM PDT 24 2034734738 ps
T19 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_same_csr_outstanding.3686938010 Jul 05 05:09:32 PM PDT 24 Jul 05 05:09:54 PM PDT 24 8566517916 ps
T29 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.158327507 Jul 05 05:09:19 PM PDT 24 Jul 05 05:09:26 PM PDT 24 2145744816 ps
T85 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.2605167806 Jul 05 05:10:05 PM PDT 24 Jul 05 05:10:10 PM PDT 24 2055850680 ps
T30 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.364211712 Jul 05 05:09:49 PM PDT 24 Jul 05 05:09:52 PM PDT 24 2146626009 ps
T86 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.3931040112 Jul 05 05:09:34 PM PDT 24 Jul 05 05:09:51 PM PDT 24 22455305681 ps
T790 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.4125413784 Jul 05 05:08:44 PM PDT 24 Jul 05 05:08:46 PM PDT 24 2029131699 ps
T93 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3670614486 Jul 05 05:09:40 PM PDT 24 Jul 05 05:09:44 PM PDT 24 2097209799 ps
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