Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.05 99.38 96.78 100.00 97.44 98.85 99.61 94.27


Total tests in report: 909
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
54.90 54.90 73.11 73.11 60.49 60.49 83.11 83.11 16.03 16.03 76.01 76.01 58.86 58.86 16.67 16.67 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.582806575
68.33 13.43 86.32 13.21 78.21 17.72 87.44 4.34 31.41 15.38 87.10 11.09 76.49 17.63 31.34 14.67 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2940749284
78.00 9.67 92.41 6.08 85.14 6.93 89.04 1.60 52.56 21.15 92.20 5.10 89.40 12.91 45.27 13.93 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3263501572
82.73 4.73 94.78 2.37 88.47 3.34 89.04 0.00 73.72 21.15 94.45 2.26 93.26 3.85 45.43 0.16 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.952488682
85.53 2.80 96.34 1.57 90.93 2.45 96.80 7.76 73.72 0.00 95.97 1.52 93.93 0.67 51.05 5.63 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2993771334
87.02 1.48 96.36 0.02 90.93 0.00 96.80 0.00 74.36 0.64 96.01 0.04 93.93 0.00 60.73 9.67 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.4132077571
88.48 1.46 97.00 0.63 91.66 0.73 96.80 0.00 77.56 3.21 96.45 0.44 94.89 0.96 64.98 4.26 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.1068275975
89.80 1.32 97.57 0.58 92.34 0.68 96.80 0.00 82.69 5.13 96.97 0.52 96.63 1.73 65.62 0.63 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.159391382
91.07 1.27 98.13 0.56 92.39 0.05 96.80 0.00 90.38 7.69 97.52 0.55 96.63 0.00 65.62 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.3096861870
92.27 1.20 98.17 0.04 93.68 1.29 97.49 0.68 90.38 0.00 97.63 0.11 96.72 0.10 71.82 6.20 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.602902313
92.98 0.70 98.25 0.07 93.86 0.18 97.49 0.00 90.38 0.00 97.63 0.00 96.72 0.00 76.50 4.68 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2733068129
93.42 0.44 98.43 0.19 94.19 0.33 97.72 0.23 91.03 0.64 97.67 0.04 96.72 0.00 78.18 1.68 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2972868498
93.84 0.43 98.47 0.04 94.21 0.03 97.72 0.00 91.67 0.64 97.74 0.07 96.82 0.10 80.28 2.10 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3264370353
94.17 0.32 98.51 0.04 94.99 0.78 98.17 0.46 91.67 0.00 97.74 0.00 96.92 0.10 81.18 0.89 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.628859245
94.49 0.32 98.60 0.09 95.10 0.10 98.17 0.00 92.95 1.28 97.86 0.11 97.21 0.29 81.55 0.37 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.4285030926
94.81 0.32 98.68 0.07 95.10 0.00 98.17 0.00 92.95 0.00 97.86 0.00 97.21 0.00 83.70 2.16 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2592993893
95.09 0.28 98.68 0.00 95.12 0.03 99.77 1.60 92.95 0.00 97.86 0.00 97.30 0.10 83.96 0.26 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.2257664591
95.36 0.27 98.77 0.09 95.20 0.08 99.77 0.00 94.23 1.28 97.97 0.11 97.50 0.19 84.07 0.11 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.3934536733
95.58 0.23 98.79 0.02 95.45 0.25 99.77 0.00 94.23 0.00 98.11 0.15 97.50 0.00 85.23 1.16 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.556888690
95.79 0.21 98.84 0.06 95.50 0.05 99.77 0.00 94.23 0.00 98.11 0.00 97.50 0.00 86.59 1.37 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2374055949
95.98 0.19 98.84 0.00 95.53 0.03 99.77 0.00 94.23 0.00 98.11 0.00 97.59 0.10 87.80 1.21 /workspace/coverage/default/16.sysrst_ctrl_stress_all.2903813294
96.16 0.18 98.84 0.00 95.63 0.10 99.77 0.00 94.23 0.00 98.11 0.00 98.27 0.67 88.28 0.47 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_rw.2508911867
96.31 0.15 98.88 0.04 95.65 0.03 99.77 0.00 94.87 0.64 98.19 0.07 98.46 0.19 88.38 0.11 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2169372435
96.46 0.14 98.92 0.04 95.75 0.10 99.77 0.00 95.51 0.64 98.23 0.04 98.65 0.19 88.38 0.00 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.605734454
96.60 0.14 98.96 0.04 95.78 0.03 99.77 0.00 95.51 0.00 98.30 0.07 98.75 0.10 89.12 0.74 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2273715011
96.73 0.14 99.01 0.06 95.80 0.03 99.77 0.00 96.15 0.64 98.37 0.07 98.84 0.10 89.17 0.05 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3037787997
96.86 0.13 99.05 0.04 95.83 0.03 99.77 0.00 96.79 0.64 98.41 0.04 98.94 0.10 89.22 0.05 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3441783362
96.98 0.12 99.09 0.04 95.85 0.03 99.77 0.00 97.44 0.64 98.45 0.04 99.04 0.10 89.22 0.00 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.719565552
97.09 0.11 99.12 0.04 95.88 0.03 99.77 0.00 97.44 0.00 98.48 0.04 99.42 0.39 89.48 0.26 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.1106835614
97.17 0.08 99.12 0.00 95.88 0.00 99.77 0.00 97.44 0.00 98.48 0.00 99.42 0.00 90.06 0.58 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2058132811
97.24 0.08 99.12 0.00 95.88 0.00 99.77 0.00 97.44 0.00 98.48 0.00 99.42 0.00 90.59 0.53 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.1291477779
97.30 0.05 99.12 0.00 95.88 0.00 99.77 0.00 97.44 0.00 98.48 0.00 99.42 0.00 90.96 0.37 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3853133029
97.35 0.05 99.18 0.06 95.96 0.08 100.00 0.23 97.44 0.00 98.48 0.00 99.42 0.00 90.96 0.00 /workspace/coverage/default/16.sysrst_ctrl_alert_test.1198482679
97.39 0.05 99.18 0.00 95.96 0.00 100.00 0.00 97.44 0.00 98.48 0.00 99.42 0.00 91.27 0.32 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.159860607
97.44 0.04 99.23 0.06 96.01 0.05 100.00 0.00 97.44 0.00 98.60 0.11 99.52 0.10 91.27 0.00 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.3828908089
97.48 0.04 99.23 0.00 96.31 0.30 100.00 0.00 97.44 0.00 98.60 0.00 99.52 0.00 91.27 0.00 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2020459010
97.52 0.04 99.27 0.04 96.46 0.15 100.00 0.00 97.44 0.00 98.67 0.07 99.52 0.00 91.27 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3764621130
97.56 0.04 99.27 0.00 96.46 0.00 100.00 0.00 97.44 0.00 98.67 0.00 99.52 0.00 91.54 0.26 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2061282360
97.59 0.04 99.27 0.00 96.46 0.00 100.00 0.00 97.44 0.00 98.67 0.00 99.52 0.00 91.80 0.26 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.1965964334
97.63 0.04 99.27 0.00 96.46 0.00 100.00 0.00 97.44 0.00 98.67 0.00 99.52 0.00 92.06 0.26 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2427577911
97.66 0.03 99.27 0.00 96.69 0.23 100.00 0.00 97.44 0.00 98.67 0.00 99.52 0.00 92.06 0.00 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3973477301
97.69 0.03 99.27 0.00 96.69 0.00 100.00 0.00 97.44 0.00 98.67 0.00 99.52 0.00 92.27 0.21 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.211751301
97.72 0.02 99.27 0.00 96.69 0.00 100.00 0.00 97.44 0.00 98.67 0.00 99.52 0.00 92.43 0.16 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3490554437
97.74 0.02 99.29 0.02 96.71 0.03 100.00 0.00 97.44 0.00 98.71 0.04 99.52 0.00 92.48 0.05 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1979229275
97.75 0.02 99.29 0.00 96.74 0.03 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 92.59 0.11 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.4181540960
97.77 0.02 99.29 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 92.69 0.11 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.281541573
97.78 0.02 99.29 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 92.80 0.11 /workspace/coverage/default/19.sysrst_ctrl_stress_all.2502384664
97.80 0.02 99.29 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 92.90 0.11 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3259322832
97.81 0.02 99.29 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 93.01 0.11 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1413440681
97.83 0.02 99.29 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 93.11 0.11 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.1061403091
97.84 0.02 99.29 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 93.22 0.11 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3830821959
97.86 0.02 99.29 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 93.32 0.11 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.488518167
97.87 0.01 99.29 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.61 0.10 93.32 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.718065771
97.88 0.01 99.31 0.02 96.74 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.61 0.00 93.38 0.05 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.4253454605
97.89 0.01 99.33 0.02 96.74 0.00 100.00 0.00 97.44 0.00 98.74 0.04 99.61 0.00 93.38 0.00 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.5588940
97.90 0.01 99.35 0.02 96.74 0.00 100.00 0.00 97.44 0.00 98.78 0.04 99.61 0.00 93.38 0.00 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.2513646200
97.91 0.01 99.37 0.02 96.74 0.00 100.00 0.00 97.44 0.00 98.82 0.04 99.61 0.00 93.38 0.00 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2690345999
97.91 0.01 99.38 0.02 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.04 99.61 0.00 93.38 0.00 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1588726040
97.92 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.43 0.05 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1799046362
97.93 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.48 0.05 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.939950936
97.94 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.53 0.05 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.185252211
97.94 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.59 0.05 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2929396756
97.95 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.64 0.05 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.637466507
97.96 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.69 0.05 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.3727744400
97.97 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.74 0.05 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2710320043
97.97 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.80 0.05 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.3499691579
97.98 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.85 0.05 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.706159299
97.99 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.90 0.05 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3614470941
98.00 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 93.95 0.05 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1195140781
98.00 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 94.01 0.05 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.4294861751
98.01 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 94.06 0.05 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2660504062
98.02 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 94.11 0.05 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.725389092
98.03 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 94.16 0.05 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3497196545
98.03 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 94.22 0.05 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.4104387076
98.04 0.01 99.38 0.00 96.74 0.00 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 94.27 0.05 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2641587645
98.05 0.01 99.38 0.00 96.76 0.03 100.00 0.00 97.44 0.00 98.85 0.00 99.61 0.00 94.27 0.00 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.250648437


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1810211999
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.584118839
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.4015579225
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1027341458
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2970094049
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3918703759
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.839836967
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3168472708
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1998412211
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2575750823
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3816356869
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1051697502
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3147549284
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.706471142
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2891333731
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1421833328
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3249799571
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.892250288
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1445073286
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.729797479
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1120219347
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.495397154
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1800000991
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2429024021
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.4068649841
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.211527931
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.1705034133
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1378585880
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2271300285
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3442374095
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3965953953
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1869290636
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.989722384
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.776437626
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1725479994
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.188801686
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.749927826
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.4030374669
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3378418420
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3189585418
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.264913360
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.74537210
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.40163127
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3683008931
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.495727682
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3686241280
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.616603032
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2242124001
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3888747888
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.3321891681
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.2721877287
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1034835175
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.1526924430
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.701704574
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2724306009
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.3962495961
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1913693664
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.2262526562
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.144478607
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3239736993
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.3761621512
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/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1286716735
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3637124975
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2614478756
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2600279705
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2427411291
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1806117170
/workspace/coverage/default/41.sysrst_ctrl_smoke.704081725
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2143282011
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1861921611
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3063125706
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2418170225
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.596282664
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3226339891
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.932205282
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2041831399
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.4193144296
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.71458362
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4223455652
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1493576394
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2992740687
/workspace/coverage/default/42.sysrst_ctrl_smoke.3619943554
/workspace/coverage/default/42.sysrst_ctrl_stress_all.2178699347
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3523387163
/workspace/coverage/default/43.sysrst_ctrl_alert_test.1802104454
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1415368411
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.737617423
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.981515956
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.519723885
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.949240932
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2438904218
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.4071298677
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3779739986
/workspace/coverage/default/43.sysrst_ctrl_smoke.1077897948
/workspace/coverage/default/43.sysrst_ctrl_stress_all.115238683
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3652964364
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2028130990
/workspace/coverage/default/44.sysrst_ctrl_alert_test.982595916
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.4216209825
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1746103151
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2600001398
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1608870761
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3152164911
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2809450924
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1799423671
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2174118587
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2088297085
/workspace/coverage/default/44.sysrst_ctrl_smoke.937286334
/workspace/coverage/default/44.sysrst_ctrl_stress_all.4109354059
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2876548925
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2241011811
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1919779713
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.756623795
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2636185224
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4264101054
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.869159649
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3089769546
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1786500616
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.713836325
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.226088913
/workspace/coverage/default/45.sysrst_ctrl_smoke.994273499
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2175876418
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2862077954
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2092832583
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2740326693
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.934874865
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2091599870
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3710407488
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1044603150
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.4136468240
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3080918893
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.451051416
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1451838373
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.510507661
/workspace/coverage/default/46.sysrst_ctrl_smoke.2796668694
/workspace/coverage/default/46.sysrst_ctrl_stress_all.90597559
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1709572660
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.511125607
/workspace/coverage/default/47.sysrst_ctrl_alert_test.247634806
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1647292743
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.140140592
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.526476894
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3817945877
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1872045763
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2331186221
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1796101223
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4183857757
/workspace/coverage/default/47.sysrst_ctrl_smoke.3135644611
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2297487001
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1566806803
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1923022130
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3281888646
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.510138637
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.704507040
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.266816506
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.805630338
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3955585522
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3535030898
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2707235796
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2979814886
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1376665010
/workspace/coverage/default/48.sysrst_ctrl_smoke.3454820045
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3595723722
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3277584473
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2635326545
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3332026549
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3333537075
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.443729904
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2050779176
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1192265630
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.231355213
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1338059469
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1376481535
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1740127443
/workspace/coverage/default/49.sysrst_ctrl_smoke.1136848429
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1919632616
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.828851646
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1557079596
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4019330061
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.156600034
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.111193756
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.39545420
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2725077141
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3104906787
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.132961254
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.139104928
/workspace/coverage/default/5.sysrst_ctrl_smoke.3421816003
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3122662465
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1000606431
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3008176127
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1970015301
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1267046370
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1079660708
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3591299119
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2563546486
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3876645276
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.222045502
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.941096530
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2706243927
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3670793406
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3648281194
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.4274383200
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2116458703
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3525247192
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1389867470
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.226094880
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.344281917
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2526806418
/workspace/coverage/default/6.sysrst_ctrl_smoke.876339356
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1824412801
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2199611738
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.4247291978
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2415270632
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2328408632
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.4254038082
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.241148945
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1929042766
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.368933163
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2977389437
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2257448728
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.943199789
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4151039206
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1137625311
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2929119435
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.323139977
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.4033638194
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.970569111
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3783450149
/workspace/coverage/default/7.sysrst_ctrl_smoke.866369192
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1632153876
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3823288618
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1525993263
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4057556146
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1906292283
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.333927328
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.21583926
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2282358606
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3682786068
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.503915434
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1724355088
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.4122681362
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3473949482
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3395351386
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.337919287
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1973705785
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4038383560
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2316175266
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3221259709
/workspace/coverage/default/8.sysrst_ctrl_smoke.3092224106
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2231067228
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1188187155
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1615701192
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.630445448
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.686281147
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3293815427
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1488645930
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3942311422
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2865490165
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1058447913
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3307372089
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2537271645
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3661723116
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.649833729
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2983906634
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.433489002
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3906461332
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3533935332
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.215691140
/workspace/coverage/default/9.sysrst_ctrl_smoke.1148382848
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2941606188
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3937209744
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1386775560
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3757050634
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1078445778
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2681461318
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3632477277
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2680153968
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1039642626




Total test records in report: 909
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/2.sysrst_ctrl_stress_all.3662971201 Jul 06 06:14:05 PM PDT 24 Jul 06 06:14:33 PM PDT 24 11625384332 ps
T4 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.402613059 Jul 06 06:15:41 PM PDT 24 Jul 06 06:15:43 PM PDT 24 2046315828 ps
T2 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.139264058 Jul 06 06:17:41 PM PDT 24 Jul 06 06:23:18 PM PDT 24 134894231288 ps
T12 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1047968741 Jul 06 06:17:13 PM PDT 24 Jul 06 06:17:20 PM PDT 24 2611100156 ps
T3 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4151039206 Jul 06 06:15:00 PM PDT 24 Jul 06 06:15:19 PM PDT 24 32130659131 ps
T5 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.582806575 Jul 06 06:13:22 PM PDT 24 Jul 06 06:14:34 PM PDT 24 30499998753 ps
T6 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.1106835614 Jul 06 06:17:42 PM PDT 24 Jul 06 06:21:28 PM PDT 24 81355857107 ps
T13 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1376665010 Jul 06 06:19:44 PM PDT 24 Jul 06 06:19:51 PM PDT 24 2509661467 ps
T14 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1799423671 Jul 06 06:19:12 PM PDT 24 Jul 06 06:19:15 PM PDT 24 2475431477 ps
T15 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2427411291 Jul 06 06:18:31 PM PDT 24 Jul 06 06:18:35 PM PDT 24 2038840745 ps
T7 /workspace/coverage/default/23.sysrst_ctrl_stress_all.1538407767 Jul 06 06:16:55 PM PDT 24 Jul 06 06:17:29 PM PDT 24 14108656504 ps
T8 /workspace/coverage/default/32.sysrst_ctrl_stress_all.4143377278 Jul 06 06:17:49 PM PDT 24 Jul 06 06:17:54 PM PDT 24 9704010107 ps
T21 /workspace/coverage/default/11.sysrst_ctrl_stress_all.3947199030 Jul 06 06:15:30 PM PDT 24 Jul 06 06:15:36 PM PDT 24 7136108076 ps
T61 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.280890051 Jul 06 06:16:28 PM PDT 24 Jul 06 06:16:32 PM PDT 24 4375112812 ps
T62 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.502748004 Jul 06 06:15:35 PM PDT 24 Jul 06 06:15:38 PM PDT 24 3041062936 ps
T9 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2972868498 Jul 06 06:13:23 PM PDT 24 Jul 06 06:16:19 PM PDT 24 75219447060 ps
T69 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3089769546 Jul 06 06:19:16 PM PDT 24 Jul 06 06:19:24 PM PDT 24 2607652457 ps
T10 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.1154627041 Jul 06 06:17:17 PM PDT 24 Jul 06 06:17:20 PM PDT 24 4286058488 ps
T63 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.3050106806 Jul 06 06:16:48 PM PDT 24 Jul 06 06:17:03 PM PDT 24 5477734397 ps
T64 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2942385347 Jul 06 06:16:41 PM PDT 24 Jul 06 06:16:44 PM PDT 24 2958690426 ps
T70 /workspace/coverage/default/24.sysrst_ctrl_smoke.3502202603 Jul 06 06:16:59 PM PDT 24 Jul 06 06:17:01 PM PDT 24 2135552464 ps
T71 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.915648106 Jul 06 06:15:26 PM PDT 24 Jul 06 06:15:29 PM PDT 24 2481538060 ps
T11 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.296255769 Jul 06 06:13:23 PM PDT 24 Jul 06 06:13:27 PM PDT 24 2493195989 ps
T241 /workspace/coverage/default/25.sysrst_ctrl_smoke.1827393294 Jul 06 06:17:04 PM PDT 24 Jul 06 06:17:11 PM PDT 24 2110365375 ps
T242 /workspace/coverage/default/44.sysrst_ctrl_alert_test.982595916 Jul 06 06:19:11 PM PDT 24 Jul 06 06:19:17 PM PDT 24 2011353045 ps
T72 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2993771334 Jul 06 06:15:56 PM PDT 24 Jul 06 06:15:59 PM PDT 24 2482448201 ps
T243 /workspace/coverage/default/12.sysrst_ctrl_smoke.835326858 Jul 06 06:15:30 PM PDT 24 Jul 06 06:15:37 PM PDT 24 2108594185 ps
T244 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.1553188271 Jul 06 06:17:04 PM PDT 24 Jul 06 06:17:11 PM PDT 24 2567986756 ps
T77 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3444362921 Jul 06 06:15:36 PM PDT 24 Jul 06 06:15:38 PM PDT 24 2542688228 ps
T25 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3103962807 Jul 06 06:14:06 PM PDT 24 Jul 06 06:14:10 PM PDT 24 2341828245 ps
T46 /workspace/coverage/default/27.sysrst_ctrl_stress_all.2577154600 Jul 06 06:17:22 PM PDT 24 Jul 06 06:17:26 PM PDT 24 8450093011 ps
T26 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.333927328 Jul 06 06:20:14 PM PDT 24 Jul 06 06:23:20 PM PDT 24 71451477571 ps
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T47 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3543717093 Jul 06 06:13:10 PM PDT 24 Jul 06 06:13:12 PM PDT 24 2187360749 ps
T36 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2940749284 Jul 06 06:20:08 PM PDT 24 Jul 06 06:22:39 PM PDT 24 153344572232 ps
T79 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1079660708 Jul 06 06:20:05 PM PDT 24 Jul 06 06:21:31 PM PDT 24 146943225095 ps
T80 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3013643777 Jul 06 06:18:24 PM PDT 24 Jul 06 06:20:31 PM PDT 24 49473572987 ps
T78 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3535030898 Jul 06 06:19:45 PM PDT 24 Jul 06 06:19:53 PM PDT 24 2611165460 ps
T22 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.556888690 Jul 06 06:15:21 PM PDT 24 Jul 06 06:16:18 PM PDT 24 42528929568 ps
T53 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.26525809 Jul 06 06:14:13 PM PDT 24 Jul 06 06:14:16 PM PDT 24 2538140997 ps
T40 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.2181615988 Jul 06 06:15:30 PM PDT 24 Jul 06 06:15:33 PM PDT 24 2953921224 ps
T54 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.2883868523 Jul 06 06:16:20 PM PDT 24 Jul 06 06:16:24 PM PDT 24 2618546328 ps
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T56 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.941096530 Jul 06 06:20:13 PM PDT 24 Jul 06 06:28:07 PM PDT 24 187338165268 ps
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T58 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.868100476 Jul 06 06:17:49 PM PDT 24 Jul 06 06:17:53 PM PDT 24 2616795770 ps
T59 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.713836325 Jul 06 06:19:10 PM PDT 24 Jul 06 06:19:12 PM PDT 24 2164731868 ps
T31 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.1068275975 Jul 06 06:16:02 PM PDT 24 Jul 06 06:19:38 PM PDT 24 81271404749 ps
T306 /workspace/coverage/default/24.sysrst_ctrl_alert_test.3904952549 Jul 06 06:17:03 PM PDT 24 Jul 06 06:17:06 PM PDT 24 2025904530 ps
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T19 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.3334602570 Jul 06 06:16:30 PM PDT 24 Jul 06 06:16:32 PM PDT 24 5516202937 ps
T287 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.2607258910 Jul 06 06:16:08 PM PDT 24 Jul 06 06:16:10 PM PDT 24 2533723685 ps
T288 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.829462819 Jul 06 06:17:26 PM PDT 24 Jul 06 06:17:32 PM PDT 24 4058328007 ps
T34 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.3431862371 Jul 06 06:15:45 PM PDT 24 Jul 06 06:21:12 PM PDT 24 124541793644 ps
T289 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.390530436 Jul 06 06:17:39 PM PDT 24 Jul 06 06:17:41 PM PDT 24 2238910694 ps
T73 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2331186221 Jul 06 06:19:33 PM PDT 24 Jul 06 06:19:36 PM PDT 24 2495439084 ps
T35 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.181218452 Jul 06 06:16:55 PM PDT 24 Jul 06 06:18:31 PM PDT 24 150115117140 ps
T74 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2733068129 Jul 06 06:14:16 PM PDT 24 Jul 06 06:15:22 PM PDT 24 230469142977 ps
T290 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.510507661 Jul 06 06:19:26 PM PDT 24 Jul 06 06:19:29 PM PDT 24 2525282833 ps
T23 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.4217011783 Jul 06 06:18:09 PM PDT 24 Jul 06 06:18:13 PM PDT 24 3787260064 ps
T81 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.4294861751 Jul 06 06:14:39 PM PDT 24 Jul 06 06:15:06 PM PDT 24 44659934514 ps
T82 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.222045502 Jul 06 06:20:04 PM PDT 24 Jul 06 06:21:10 PM PDT 24 104041800816 ps
T259 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.2257664591 Jul 06 06:14:04 PM PDT 24 Jul 06 06:14:20 PM PDT 24 42222501120 ps
T24 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.934874865 Jul 06 06:19:31 PM PDT 24 Jul 06 06:19:42 PM PDT 24 4074613873 ps
T20 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3037787997 Jul 06 06:18:12 PM PDT 24 Jul 06 06:18:32 PM PDT 24 34094364910 ps
T191 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.433489002 Jul 06 06:15:08 PM PDT 24 Jul 06 06:15:12 PM PDT 24 2622281806 ps
T192 /workspace/coverage/default/37.sysrst_ctrl_smoke.3882315544 Jul 06 06:18:11 PM PDT 24 Jul 06 06:18:17 PM PDT 24 2111739132 ps
T65 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1447435831 Jul 06 06:17:40 PM PDT 24 Jul 06 06:17:47 PM PDT 24 5254382972 ps
T193 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1907717843 Jul 06 06:18:00 PM PDT 24 Jul 06 06:18:04 PM PDT 24 2097363125 ps
T66 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1073027608 Jul 06 06:17:00 PM PDT 24 Jul 06 06:17:03 PM PDT 24 4292182193 ps
T48 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.756623795 Jul 06 06:19:15 PM PDT 24 Jul 06 06:19:26 PM PDT 24 3759970451 ps
T194 /workspace/coverage/default/30.sysrst_ctrl_alert_test.4140329282 Jul 06 06:17:38 PM PDT 24 Jul 06 06:17:40 PM PDT 24 2030328064 ps
T67 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.4048196854 Jul 06 06:17:50 PM PDT 24 Jul 06 06:17:55 PM PDT 24 6399824045 ps
T75 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3373137140 Jul 06 06:13:53 PM PDT 24 Jul 06 06:14:02 PM PDT 24 2467960352 ps
T83 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.4253454605 Jul 06 06:17:02 PM PDT 24 Jul 06 06:17:24 PM PDT 24 32484562557 ps
T148 /workspace/coverage/default/36.sysrst_ctrl_smoke.1884666781 Jul 06 06:18:09 PM PDT 24 Jul 06 06:18:11 PM PDT 24 2122995012 ps
T149 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.440211072 Jul 06 06:15:18 PM PDT 24 Jul 06 06:15:20 PM PDT 24 2631293113 ps
T150 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.21583926 Jul 06 06:20:14 PM PDT 24 Jul 06 06:23:21 PM PDT 24 89685792886 ps
T151 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2172059577 Jul 06 06:15:47 PM PDT 24 Jul 06 06:16:23 PM PDT 24 59901721283 ps
T152 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1227890301 Jul 06 06:17:33 PM PDT 24 Jul 06 06:17:38 PM PDT 24 2224355897 ps
T76 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.451051416 Jul 06 06:19:25 PM PDT 24 Jul 06 06:19:27 PM PDT 24 2458447221 ps
T153 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2419308458 Jul 06 06:17:04 PM PDT 24 Jul 06 06:17:08 PM PDT 24 2621599456 ps
T397 /workspace/coverage/default/29.sysrst_ctrl_alert_test.780180804 Jul 06 06:17:36 PM PDT 24 Jul 06 06:17:39 PM PDT 24 2029306489 ps
T395 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3779739986 Jul 06 06:18:57 PM PDT 24 Jul 06 06:19:03 PM PDT 24 2507661766 ps
T398 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.859516683 Jul 06 06:16:13 PM PDT 24 Jul 06 06:16:20 PM PDT 24 2131713350 ps
T399 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1908301076 Jul 06 06:18:21 PM PDT 24 Jul 06 06:18:28 PM PDT 24 2219384038 ps
T86 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.156600034 Jul 06 06:14:33 PM PDT 24 Jul 06 06:15:24 PM PDT 24 99258504900 ps
T400 /workspace/coverage/default/7.sysrst_ctrl_alert_test.2977389437 Jul 06 06:15:01 PM PDT 24 Jul 06 06:15:04 PM PDT 24 2024659166 ps
T401 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2809450924 Jul 06 06:19:03 PM PDT 24 Jul 06 06:19:05 PM PDT 24 2626315087 ps
T68 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.747930349 Jul 06 06:17:23 PM PDT 24 Jul 06 06:17:28 PM PDT 24 6369589686 ps
T402 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.231355213 Jul 06 06:20:00 PM PDT 24 Jul 06 06:20:04 PM PDT 24 2621757937 ps
T49 /workspace/coverage/default/4.sysrst_ctrl_stress_all.3350653666 Jul 06 06:14:24 PM PDT 24 Jul 06 06:14:42 PM PDT 24 13175226928 ps
T260 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2374055949 Jul 06 06:15:51 PM PDT 24 Jul 06 06:16:53 PM PDT 24 89391174008 ps
T396 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.281541573 Jul 06 06:13:14 PM PDT 24 Jul 06 06:13:19 PM PDT 24 2515413641 ps
T45 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.3922376624 Jul 06 06:16:50 PM PDT 24 Jul 06 06:16:55 PM PDT 24 3610101430 ps
T248 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2836168855 Jul 06 06:18:09 PM PDT 24 Jul 06 06:18:25 PM PDT 24 69875249548 ps
T249 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.302066266 Jul 06 06:15:37 PM PDT 24 Jul 06 06:15:45 PM PDT 24 2610321220 ps
T250 /workspace/coverage/default/21.sysrst_ctrl_stress_all.1676302075 Jul 06 06:16:47 PM PDT 24 Jul 06 06:17:01 PM PDT 24 9828707083 ps
T251 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2707595788 Jul 06 06:15:45 PM PDT 24 Jul 06 06:15:47 PM PDT 24 2623158061 ps
T42 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.3525247192 Jul 06 06:14:53 PM PDT 24 Jul 06 06:17:40 PM PDT 24 1945371287977 ps
T37 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.519723885 Jul 06 06:18:58 PM PDT 24 Jul 06 06:19:05 PM PDT 24 4936553245 ps
T41 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3263501572 Jul 06 06:17:18 PM PDT 24 Jul 06 06:18:34 PM PDT 24 1623297027847 ps
T200 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.3067969700 Jul 06 06:13:39 PM PDT 24 Jul 06 06:13:51 PM PDT 24 4291778373 ps
T201 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2316175266 Jul 06 06:14:59 PM PDT 24 Jul 06 06:15:01 PM PDT 24 2206348216 ps
T202 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1143116970 Jul 06 06:13:38 PM PDT 24 Jul 06 06:13:40 PM PDT 24 2448105216 ps
T203 /workspace/coverage/default/32.sysrst_ctrl_alert_test.2559341900 Jul 06 06:17:51 PM PDT 24 Jul 06 06:17:57 PM PDT 24 2010322141 ps
T204 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.3924491661 Jul 06 06:15:50 PM PDT 24 Jul 06 06:17:05 PM PDT 24 127902163194 ps
T50 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3441783362 Jul 06 06:18:14 PM PDT 24 Jul 06 06:18:23 PM PDT 24 3136373307 ps
T110 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3254847767 Jul 06 06:17:17 PM PDT 24 Jul 06 06:17:33 PM PDT 24 22862196421 ps
T111 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.373025399 Jul 06 06:13:10 PM PDT 24 Jul 06 06:13:12 PM PDT 24 2234825572 ps
T112 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3288164210 Jul 06 06:17:53 PM PDT 24 Jul 06 06:17:56 PM PDT 24 2451113855 ps
T113 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.1646899700 Jul 06 06:13:22 PM PDT 24 Jul 06 06:19:04 PM PDT 24 143288648546 ps
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T115 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2445209285 Jul 06 06:15:25 PM PDT 24 Jul 06 06:15:30 PM PDT 24 3170345507 ps
T116 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3912614839 Jul 06 06:15:21 PM PDT 24 Jul 06 06:15:25 PM PDT 24 2473285870 ps
T117 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1577243114 Jul 06 06:16:26 PM PDT 24 Jul 06 06:16:29 PM PDT 24 2070723085 ps
T118 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2041831399 Jul 06 06:18:47 PM PDT 24 Jul 06 06:18:52 PM PDT 24 3119069922 ps
T43 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.159391382 Jul 06 06:17:38 PM PDT 24 Jul 06 06:18:45 PM PDT 24 62845111857 ps
T129 /workspace/coverage/default/13.sysrst_ctrl_smoke.4275124126 Jul 06 06:15:44 PM PDT 24 Jul 06 06:15:50 PM PDT 24 2111847377 ps
T51 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2140377968 Jul 06 06:18:21 PM PDT 24 Jul 06 06:19:11 PM PDT 24 75521372771 ps
T98 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.622557891 Jul 06 06:18:19 PM PDT 24 Jul 06 06:19:21 PM PDT 24 102471101757 ps
T130 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2319925981 Jul 06 06:15:53 PM PDT 24 Jul 06 06:15:58 PM PDT 24 2124035864 ps
T52 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4019330061 Jul 06 06:14:33 PM PDT 24 Jul 06 06:14:44 PM PDT 24 3931410473 ps
T96 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.2812348204 Jul 06 06:17:00 PM PDT 24 Jul 06 06:17:04 PM PDT 24 3802479474 ps
T84 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3252018610 Jul 06 06:16:14 PM PDT 24 Jul 06 06:16:22 PM PDT 24 6692116199 ps
T131 /workspace/coverage/default/16.sysrst_ctrl_alert_test.1198482679 Jul 06 06:16:13 PM PDT 24 Jul 06 06:16:19 PM PDT 24 2011941941 ps
T132 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.3204611036 Jul 06 06:16:03 PM PDT 24 Jul 06 06:16:05 PM PDT 24 2637944925 ps
T280 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3390883592 Jul 06 06:15:27 PM PDT 24 Jul 06 06:15:29 PM PDT 24 2530363709 ps
T44 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.2419894363 Jul 06 06:17:54 PM PDT 24 Jul 06 06:17:58 PM PDT 24 4346781312 ps
T85 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1923022130 Jul 06 06:19:37 PM PDT 24 Jul 06 06:19:41 PM PDT 24 6957520322 ps
T32 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1413440681 Jul 06 06:16:50 PM PDT 24 Jul 06 06:17:34 PM PDT 24 33544853606 ps
T403 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1071273208 Jul 06 06:18:22 PM PDT 24 Jul 06 06:18:23 PM PDT 24 2618873281 ps
T263 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1267046370 Jul 06 06:20:02 PM PDT 24 Jul 06 06:20:47 PM PDT 24 41249487265 ps
T404 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3798394992 Jul 06 06:18:23 PM PDT 24 Jul 06 06:18:27 PM PDT 24 2219509846 ps
T38 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.1457583755 Jul 06 06:15:27 PM PDT 24 Jul 06 06:15:38 PM PDT 24 4258993384 ps
T405 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3533935332 Jul 06 06:15:08 PM PDT 24 Jul 06 06:15:12 PM PDT 24 2111988100 ps
T313 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2600279705 Jul 06 06:18:31 PM PDT 24 Jul 06 06:18:33 PM PDT 24 2553461984 ps
T406 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1829238325 Jul 06 06:17:43 PM PDT 24 Jul 06 06:17:50 PM PDT 24 2510060593 ps
T407 /workspace/coverage/default/26.sysrst_ctrl_smoke.3713271198 Jul 06 06:17:07 PM PDT 24 Jul 06 06:17:09 PM PDT 24 2135252849 ps
T408 /workspace/coverage/default/8.sysrst_ctrl_smoke.3092224106 Jul 06 06:15:01 PM PDT 24 Jul 06 06:15:07 PM PDT 24 2110028837 ps
T253 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2660504062 Jul 06 06:20:10 PM PDT 24 Jul 06 06:24:10 PM PDT 24 101210368912 ps
T89 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.4254038082 Jul 06 06:20:07 PM PDT 24 Jul 06 06:23:41 PM PDT 24 109819690947 ps
T409 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3836441937 Jul 06 06:13:36 PM PDT 24 Jul 06 06:13:41 PM PDT 24 2617556361 ps
T410 /workspace/coverage/default/3.sysrst_ctrl_smoke.225121304 Jul 06 06:14:07 PM PDT 24 Jul 06 06:14:08 PM PDT 24 2138857961 ps
T39 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.5588940 Jul 06 06:15:44 PM PDT 24 Jul 06 06:15:51 PM PDT 24 4723006323 ps
T235 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2415270632 Jul 06 06:20:10 PM PDT 24 Jul 06 06:21:27 PM PDT 24 31061893959 ps
T236 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.2902221803 Jul 06 06:18:19 PM PDT 24 Jul 06 06:18:21 PM PDT 24 4046634525 ps
T97 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.548239133 Jul 06 06:17:27 PM PDT 24 Jul 06 06:17:35 PM PDT 24 3162834996 ps
T120 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2020459010 Jul 06 06:16:05 PM PDT 24 Jul 06 06:16:08 PM PDT 24 7090348229 ps
T99 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.999247290 Jul 06 06:17:30 PM PDT 24 Jul 06 06:18:29 PM PDT 24 23332851994 ps
T237 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1000606431 Jul 06 06:14:38 PM PDT 24 Jul 06 06:15:42 PM PDT 24 23074532213 ps
T238 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2315694005 Jul 06 06:17:02 PM PDT 24 Jul 06 06:17:05 PM PDT 24 2626152068 ps
T239 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3632228435 Jul 06 06:17:13 PM PDT 24 Jul 06 06:17:23 PM PDT 24 3645023927 ps
T240 /workspace/coverage/default/17.sysrst_ctrl_smoke.2593942675 Jul 06 06:16:10 PM PDT 24 Jul 06 06:16:12 PM PDT 24 2126640553 ps
T321 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.71458362 Jul 06 06:18:50 PM PDT 24 Jul 06 06:18:54 PM PDT 24 2613396468 ps
T264 /workspace/coverage/default/41.sysrst_ctrl_stress_all.2143282011 Jul 06 06:18:42 PM PDT 24 Jul 06 06:22:02 PM PDT 24 154308594772 ps
T33 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2592993893 Jul 06 06:20:17 PM PDT 24 Jul 06 06:25:03 PM PDT 24 106943893273 ps
T322 /workspace/coverage/default/6.sysrst_ctrl_alert_test.2706243927 Jul 06 06:14:52 PM PDT 24 Jul 06 06:14:54 PM PDT 24 2024565532 ps
T121 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1916962428 Jul 06 06:13:55 PM PDT 24 Jul 06 06:15:20 PM PDT 24 1190892527626 ps
T323 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3471626002 Jul 06 06:16:31 PM PDT 24 Jul 06 06:16:42 PM PDT 24 3755868292 ps
T411 /workspace/coverage/default/20.sysrst_ctrl_alert_test.426260753 Jul 06 06:16:36 PM PDT 24 Jul 06 06:16:40 PM PDT 24 2027342758 ps
T271 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.287569640 Jul 06 06:17:34 PM PDT 24 Jul 06 06:18:22 PM PDT 24 74909177031 ps
T262 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.200914430 Jul 06 06:16:29 PM PDT 24 Jul 06 06:18:09 PM PDT 24 97139760713 ps
T412 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.510138637 Jul 06 06:19:47 PM PDT 24 Jul 06 06:19:50 PM PDT 24 3638981596 ps
T413 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.86010238 Jul 06 06:17:45 PM PDT 24 Jul 06 06:17:51 PM PDT 24 4108006585 ps
T414 /workspace/coverage/default/32.sysrst_ctrl_smoke.3297518337 Jul 06 06:17:45 PM PDT 24 Jul 06 06:17:47 PM PDT 24 2151277346 ps
T415 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4223455652 Jul 06 06:18:42 PM PDT 24 Jul 06 06:18:46 PM PDT 24 2474756411 ps
T416 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2406610810 Jul 06 06:16:58 PM PDT 24 Jul 06 06:17:10 PM PDT 24 3819584587 ps
T417 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2348586703 Jul 06 06:13:54 PM PDT 24 Jul 06 06:13:57 PM PDT 24 2528756451 ps
T418 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.323686080 Jul 06 06:16:14 PM PDT 24 Jul 06 06:16:26 PM PDT 24 4270985198 ps
T100 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3147145673 Jul 06 06:16:50 PM PDT 24 Jul 06 06:17:31 PM PDT 24 34379741857 ps
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T440 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.585401919 Jul 06 06:14:14 PM PDT 24 Jul 06 06:14:17 PM PDT 24 4684689603 ps
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T450 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.2151573986 Jul 06 06:15:50 PM PDT 24 Jul 06 06:15:53 PM PDT 24 3642020779 ps
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T451 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2707235796 Jul 06 06:19:45 PM PDT 24 Jul 06 06:19:48 PM PDT 24 2473323354 ps
T225 /workspace/coverage/default/18.sysrst_ctrl_stress_all.3708860804 Jul 06 06:16:24 PM PDT 24 Jul 06 06:20:07 PM PDT 24 95360638613 ps
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T94 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3523387163 Jul 06 06:18:53 PM PDT 24 Jul 06 06:19:17 PM PDT 24 131143873034 ps
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T270 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3381457098 Jul 06 06:13:46 PM PDT 24 Jul 06 06:15:43 PM PDT 24 54789903278 ps
T453 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3104906787 Jul 06 06:14:28 PM PDT 24 Jul 06 06:14:30 PM PDT 24 2485900027 ps
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T454 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2165977084 Jul 06 06:15:41 PM PDT 24 Jul 06 06:15:50 PM PDT 24 3174888565 ps
T455 /workspace/coverage/default/34.sysrst_ctrl_smoke.880135010 Jul 06 06:17:52 PM PDT 24 Jul 06 06:17:53 PM PDT 24 2252756200 ps
T384 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3876645276 Jul 06 06:20:04 PM PDT 24 Jul 06 06:20:53 PM PDT 24 77191067541 ps
T456 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2389710871 Jul 06 06:15:41 PM PDT 24 Jul 06 06:15:46 PM PDT 24 2515587551 ps
T457 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.805630338 Jul 06 06:19:42 PM PDT 24 Jul 06 06:19:44 PM PDT 24 3201064408 ps
T458 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.763338202 Jul 06 06:16:18 PM PDT 24 Jul 06 06:16:23 PM PDT 24 2090242238 ps
T459 /workspace/coverage/default/47.sysrst_ctrl_alert_test.247634806 Jul 06 06:19:44 PM PDT 24 Jul 06 06:19:47 PM PDT 24 2017980306 ps
T460 /workspace/coverage/default/21.sysrst_ctrl_smoke.1371840047 Jul 06 06:16:38 PM PDT 24 Jul 06 06:16:40 PM PDT 24 2132538131 ps
T461 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1383486681 Jul 06 06:17:39 PM PDT 24 Jul 06 06:17:47 PM PDT 24 2457151224 ps
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