Name |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1810211999 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.584118839 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.4015579225 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1027341458 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2970094049 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3918703759 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.839836967 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3168472708 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1998412211 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2575750823 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3816356869 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1051697502 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3147549284 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.706471142 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2891333731 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1421833328 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3249799571 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.892250288 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1445073286 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.729797479 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1120219347 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.495397154 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1800000991 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2429024021 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.4068649841 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.211527931 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.1705034133 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1378585880 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2271300285 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3442374095 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3965953953 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1869290636 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.989722384 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.776437626 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1725479994 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.188801686 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.749927826 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.4030374669 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3378418420 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3189585418 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.264913360 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.74537210 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.40163127 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3683008931 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.495727682 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3686241280 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.616603032 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2242124001 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3888747888 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.3321891681 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.2721877287 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1034835175 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.1526924430 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.701704574 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2724306009 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.3962495961 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1913693664 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.2262526562 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.144478607 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3239736993 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.3761621512 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.3366498839 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3779874937 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.371339422 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.1092677197 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.1084945847 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.198024677 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3707407855 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3719527854 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.383310651 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.2409538129 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1468511683 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.2389704159 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2604307713 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.2943266949 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.45483817 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.3894264483 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.961462618 |
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.529133431 |
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.4169170350 |
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.3536424133 |
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.34078341 |
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.917840848 |
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.3582840119 |
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.1187572327 |
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.2310203828 |
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.1989887667 |
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.1290306660 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.2400160469 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.2946409069 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.2545692846 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.2912541861 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.1434852536 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.2069582535 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.1583869505 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.933825690 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.292440222 |
/workspace/coverage/cover_reg_top/30.sysrst_ctrl_intr_test.3661336755 |
/workspace/coverage/cover_reg_top/31.sysrst_ctrl_intr_test.2748216241 |
/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.3926432871 |
/workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.158020289 |
/workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.2181966462 |
/workspace/coverage/cover_reg_top/35.sysrst_ctrl_intr_test.3234199030 |
/workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.1607887718 |
/workspace/coverage/cover_reg_top/37.sysrst_ctrl_intr_test.1501614093 |
/workspace/coverage/cover_reg_top/38.sysrst_ctrl_intr_test.2596469694 |
/workspace/coverage/cover_reg_top/39.sysrst_ctrl_intr_test.3410791632 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.2746395329 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.568978151 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.3858787890 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.3557923126 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_rw.147871940 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_intr_test.2990049257 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.2161706453 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_errors.482495083 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.808380345 |
/workspace/coverage/cover_reg_top/40.sysrst_ctrl_intr_test.1017164886 |
/workspace/coverage/cover_reg_top/41.sysrst_ctrl_intr_test.2803736103 |
/workspace/coverage/cover_reg_top/42.sysrst_ctrl_intr_test.1550032433 |
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/workspace/coverage/cover_reg_top/44.sysrst_ctrl_intr_test.4034116363 |
/workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.791590794 |
/workspace/coverage/cover_reg_top/46.sysrst_ctrl_intr_test.3207067748 |
/workspace/coverage/cover_reg_top/47.sysrst_ctrl_intr_test.723532693 |
/workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.1221747017 |
/workspace/coverage/cover_reg_top/49.sysrst_ctrl_intr_test.4140926925 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.2480079303 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_intr_test.925245964 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_same_csr_outstanding.1306782641 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.1013479832 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.2307736069 |
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_mem_rw_with_rand_reset.4250531553 |
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_rw.2844838168 |
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_intr_test.1740627137 |
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_same_csr_outstanding.1411549814 |
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_errors.3899302046 |
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/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_mem_rw_with_rand_reset.71881390 |
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_rw.155028352 |
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/workspace/coverage/default/0.sysrst_ctrl_alert_test.3539551220 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.1893510328 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1646899700 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3543717093 |
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/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.114866095 |
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/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.520504397 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1022237695 |
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/workspace/coverage/default/0.sysrst_ctrl_sec_cm.1744852250 |
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/workspace/coverage/default/0.sysrst_ctrl_stress_all.101558320 |
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/workspace/coverage/default/15.sysrst_ctrl_alert_test.924902059 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.2913957590 |
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/workspace/coverage/default/15.sysrst_ctrl_smoke.1280565391 |
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/workspace/coverage/default/8.sysrst_ctrl_edge_detect.337919287 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1973705785 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4038383560 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2316175266 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3221259709 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.3092224106 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2231067228 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1188187155 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1615701192 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.630445448 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.686281147 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3293815427 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1488645930 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3942311422 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2865490165 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1058447913 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3307372089 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2537271645 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3661723116 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.649833729 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2983906634 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.433489002 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3906461332 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3533935332 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.215691140 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.1148382848 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2941606188 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3937209744 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1386775560 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3757050634 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1078445778 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2681461318 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3632477277 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2680153968 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1039642626 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.3662971201 |
|
|
Jul 06 06:14:05 PM PDT 24 |
Jul 06 06:14:33 PM PDT 24 |
11625384332 ps |
T4 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.402613059 |
|
|
Jul 06 06:15:41 PM PDT 24 |
Jul 06 06:15:43 PM PDT 24 |
2046315828 ps |
T2 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.139264058 |
|
|
Jul 06 06:17:41 PM PDT 24 |
Jul 06 06:23:18 PM PDT 24 |
134894231288 ps |
T12 |
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1047968741 |
|
|
Jul 06 06:17:13 PM PDT 24 |
Jul 06 06:17:20 PM PDT 24 |
2611100156 ps |
T3 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4151039206 |
|
|
Jul 06 06:15:00 PM PDT 24 |
Jul 06 06:15:19 PM PDT 24 |
32130659131 ps |
T5 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.582806575 |
|
|
Jul 06 06:13:22 PM PDT 24 |
Jul 06 06:14:34 PM PDT 24 |
30499998753 ps |
T6 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect.1106835614 |
|
|
Jul 06 06:17:42 PM PDT 24 |
Jul 06 06:21:28 PM PDT 24 |
81355857107 ps |
T13 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1376665010 |
|
|
Jul 06 06:19:44 PM PDT 24 |
Jul 06 06:19:51 PM PDT 24 |
2509661467 ps |
T14 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1799423671 |
|
|
Jul 06 06:19:12 PM PDT 24 |
Jul 06 06:19:15 PM PDT 24 |
2475431477 ps |
T15 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2427411291 |
|
|
Jul 06 06:18:31 PM PDT 24 |
Jul 06 06:18:35 PM PDT 24 |
2038840745 ps |
T7 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.1538407767 |
|
|
Jul 06 06:16:55 PM PDT 24 |
Jul 06 06:17:29 PM PDT 24 |
14108656504 ps |
T8 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.4143377278 |
|
|
Jul 06 06:17:49 PM PDT 24 |
Jul 06 06:17:54 PM PDT 24 |
9704010107 ps |
T21 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all.3947199030 |
|
|
Jul 06 06:15:30 PM PDT 24 |
Jul 06 06:15:36 PM PDT 24 |
7136108076 ps |
T61 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.280890051 |
|
|
Jul 06 06:16:28 PM PDT 24 |
Jul 06 06:16:32 PM PDT 24 |
4375112812 ps |
T62 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.502748004 |
|
|
Jul 06 06:15:35 PM PDT 24 |
Jul 06 06:15:38 PM PDT 24 |
3041062936 ps |
T9 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2972868498 |
|
|
Jul 06 06:13:23 PM PDT 24 |
Jul 06 06:16:19 PM PDT 24 |
75219447060 ps |
T69 |
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3089769546 |
|
|
Jul 06 06:19:16 PM PDT 24 |
Jul 06 06:19:24 PM PDT 24 |
2607652457 ps |
T10 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.1154627041 |
|
|
Jul 06 06:17:17 PM PDT 24 |
Jul 06 06:17:20 PM PDT 24 |
4286058488 ps |
T63 |
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.3050106806 |
|
|
Jul 06 06:16:48 PM PDT 24 |
Jul 06 06:17:03 PM PDT 24 |
5477734397 ps |
T64 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2942385347 |
|
|
Jul 06 06:16:41 PM PDT 24 |
Jul 06 06:16:44 PM PDT 24 |
2958690426 ps |
T70 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.3502202603 |
|
|
Jul 06 06:16:59 PM PDT 24 |
Jul 06 06:17:01 PM PDT 24 |
2135552464 ps |
T71 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.915648106 |
|
|
Jul 06 06:15:26 PM PDT 24 |
Jul 06 06:15:29 PM PDT 24 |
2481538060 ps |
T11 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.296255769 |
|
|
Jul 06 06:13:23 PM PDT 24 |
Jul 06 06:13:27 PM PDT 24 |
2493195989 ps |
T241 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.1827393294 |
|
|
Jul 06 06:17:04 PM PDT 24 |
Jul 06 06:17:11 PM PDT 24 |
2110365375 ps |
T242 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.982595916 |
|
|
Jul 06 06:19:11 PM PDT 24 |
Jul 06 06:19:17 PM PDT 24 |
2011353045 ps |
T72 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2993771334 |
|
|
Jul 06 06:15:56 PM PDT 24 |
Jul 06 06:15:59 PM PDT 24 |
2482448201 ps |
T243 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.835326858 |
|
|
Jul 06 06:15:30 PM PDT 24 |
Jul 06 06:15:37 PM PDT 24 |
2108594185 ps |
T244 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.1553188271 |
|
|
Jul 06 06:17:04 PM PDT 24 |
Jul 06 06:17:11 PM PDT 24 |
2567986756 ps |
T77 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3444362921 |
|
|
Jul 06 06:15:36 PM PDT 24 |
Jul 06 06:15:38 PM PDT 24 |
2542688228 ps |
T25 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3103962807 |
|
|
Jul 06 06:14:06 PM PDT 24 |
Jul 06 06:14:10 PM PDT 24 |
2341828245 ps |
T46 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all.2577154600 |
|
|
Jul 06 06:17:22 PM PDT 24 |
Jul 06 06:17:26 PM PDT 24 |
8450093011 ps |
T26 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.333927328 |
|
|
Jul 06 06:20:14 PM PDT 24 |
Jul 06 06:23:20 PM PDT 24 |
71451477571 ps |
T282 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.3627799017 |
|
|
Jul 06 06:18:01 PM PDT 24 |
Jul 06 06:18:02 PM PDT 24 |
2128729575 ps |
T47 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3543717093 |
|
|
Jul 06 06:13:10 PM PDT 24 |
Jul 06 06:13:12 PM PDT 24 |
2187360749 ps |
T36 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2940749284 |
|
|
Jul 06 06:20:08 PM PDT 24 |
Jul 06 06:22:39 PM PDT 24 |
153344572232 ps |
T79 |
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1079660708 |
|
|
Jul 06 06:20:05 PM PDT 24 |
Jul 06 06:21:31 PM PDT 24 |
146943225095 ps |
T80 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3013643777 |
|
|
Jul 06 06:18:24 PM PDT 24 |
Jul 06 06:20:31 PM PDT 24 |
49473572987 ps |
T78 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3535030898 |
|
|
Jul 06 06:19:45 PM PDT 24 |
Jul 06 06:19:53 PM PDT 24 |
2611165460 ps |
T22 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.556888690 |
|
|
Jul 06 06:15:21 PM PDT 24 |
Jul 06 06:16:18 PM PDT 24 |
42528929568 ps |
T53 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.26525809 |
|
|
Jul 06 06:14:13 PM PDT 24 |
Jul 06 06:14:16 PM PDT 24 |
2538140997 ps |
T40 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.2181615988 |
|
|
Jul 06 06:15:30 PM PDT 24 |
Jul 06 06:15:33 PM PDT 24 |
2953921224 ps |
T54 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.2883868523 |
|
|
Jul 06 06:16:20 PM PDT 24 |
Jul 06 06:16:24 PM PDT 24 |
2618546328 ps |
T55 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.872597242 |
|
|
Jul 06 06:15:53 PM PDT 24 |
Jul 06 06:15:57 PM PDT 24 |
3033050150 ps |
T56 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.941096530 |
|
|
Jul 06 06:20:13 PM PDT 24 |
Jul 06 06:28:07 PM PDT 24 |
187338165268 ps |
T57 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.195128560 |
|
|
Jul 06 06:18:22 PM PDT 24 |
Jul 06 06:18:24 PM PDT 24 |
2035876535 ps |
T58 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.868100476 |
|
|
Jul 06 06:17:49 PM PDT 24 |
Jul 06 06:17:53 PM PDT 24 |
2616795770 ps |
T59 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.713836325 |
|
|
Jul 06 06:19:10 PM PDT 24 |
Jul 06 06:19:12 PM PDT 24 |
2164731868 ps |
T31 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1068275975 |
|
|
Jul 06 06:16:02 PM PDT 24 |
Jul 06 06:19:38 PM PDT 24 |
81271404749 ps |
T306 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.3904952549 |
|
|
Jul 06 06:17:03 PM PDT 24 |
Jul 06 06:17:06 PM PDT 24 |
2025904530 ps |
T119 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.211751301 |
|
|
Jul 06 06:16:20 PM PDT 24 |
Jul 06 06:20:04 PM PDT 24 |
85146370203 ps |
T19 |
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.3334602570 |
|
|
Jul 06 06:16:30 PM PDT 24 |
Jul 06 06:16:32 PM PDT 24 |
5516202937 ps |
T287 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.2607258910 |
|
|
Jul 06 06:16:08 PM PDT 24 |
Jul 06 06:16:10 PM PDT 24 |
2533723685 ps |
T288 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.829462819 |
|
|
Jul 06 06:17:26 PM PDT 24 |
Jul 06 06:17:32 PM PDT 24 |
4058328007 ps |
T34 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.3431862371 |
|
|
Jul 06 06:15:45 PM PDT 24 |
Jul 06 06:21:12 PM PDT 24 |
124541793644 ps |
T289 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.390530436 |
|
|
Jul 06 06:17:39 PM PDT 24 |
Jul 06 06:17:41 PM PDT 24 |
2238910694 ps |
T73 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2331186221 |
|
|
Jul 06 06:19:33 PM PDT 24 |
Jul 06 06:19:36 PM PDT 24 |
2495439084 ps |
T35 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.181218452 |
|
|
Jul 06 06:16:55 PM PDT 24 |
Jul 06 06:18:31 PM PDT 24 |
150115117140 ps |
T74 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2733068129 |
|
|
Jul 06 06:14:16 PM PDT 24 |
Jul 06 06:15:22 PM PDT 24 |
230469142977 ps |
T290 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.510507661 |
|
|
Jul 06 06:19:26 PM PDT 24 |
Jul 06 06:19:29 PM PDT 24 |
2525282833 ps |
T23 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.4217011783 |
|
|
Jul 06 06:18:09 PM PDT 24 |
Jul 06 06:18:13 PM PDT 24 |
3787260064 ps |
T81 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.4294861751 |
|
|
Jul 06 06:14:39 PM PDT 24 |
Jul 06 06:15:06 PM PDT 24 |
44659934514 ps |
T82 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.222045502 |
|
|
Jul 06 06:20:04 PM PDT 24 |
Jul 06 06:21:10 PM PDT 24 |
104041800816 ps |
T259 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.2257664591 |
|
|
Jul 06 06:14:04 PM PDT 24 |
Jul 06 06:14:20 PM PDT 24 |
42222501120 ps |
T24 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.934874865 |
|
|
Jul 06 06:19:31 PM PDT 24 |
Jul 06 06:19:42 PM PDT 24 |
4074613873 ps |
T20 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3037787997 |
|
|
Jul 06 06:18:12 PM PDT 24 |
Jul 06 06:18:32 PM PDT 24 |
34094364910 ps |
T191 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.433489002 |
|
|
Jul 06 06:15:08 PM PDT 24 |
Jul 06 06:15:12 PM PDT 24 |
2622281806 ps |
T192 |
/workspace/coverage/default/37.sysrst_ctrl_smoke.3882315544 |
|
|
Jul 06 06:18:11 PM PDT 24 |
Jul 06 06:18:17 PM PDT 24 |
2111739132 ps |
T65 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1447435831 |
|
|
Jul 06 06:17:40 PM PDT 24 |
Jul 06 06:17:47 PM PDT 24 |
5254382972 ps |
T193 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1907717843 |
|
|
Jul 06 06:18:00 PM PDT 24 |
Jul 06 06:18:04 PM PDT 24 |
2097363125 ps |
T66 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1073027608 |
|
|
Jul 06 06:17:00 PM PDT 24 |
Jul 06 06:17:03 PM PDT 24 |
4292182193 ps |
T48 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.756623795 |
|
|
Jul 06 06:19:15 PM PDT 24 |
Jul 06 06:19:26 PM PDT 24 |
3759970451 ps |
T194 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.4140329282 |
|
|
Jul 06 06:17:38 PM PDT 24 |
Jul 06 06:17:40 PM PDT 24 |
2030328064 ps |
T67 |
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.4048196854 |
|
|
Jul 06 06:17:50 PM PDT 24 |
Jul 06 06:17:55 PM PDT 24 |
6399824045 ps |
T75 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3373137140 |
|
|
Jul 06 06:13:53 PM PDT 24 |
Jul 06 06:14:02 PM PDT 24 |
2467960352 ps |
T83 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.4253454605 |
|
|
Jul 06 06:17:02 PM PDT 24 |
Jul 06 06:17:24 PM PDT 24 |
32484562557 ps |
T148 |
/workspace/coverage/default/36.sysrst_ctrl_smoke.1884666781 |
|
|
Jul 06 06:18:09 PM PDT 24 |
Jul 06 06:18:11 PM PDT 24 |
2122995012 ps |
T149 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.440211072 |
|
|
Jul 06 06:15:18 PM PDT 24 |
Jul 06 06:15:20 PM PDT 24 |
2631293113 ps |
T150 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.21583926 |
|
|
Jul 06 06:20:14 PM PDT 24 |
Jul 06 06:23:21 PM PDT 24 |
89685792886 ps |
T151 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2172059577 |
|
|
Jul 06 06:15:47 PM PDT 24 |
Jul 06 06:16:23 PM PDT 24 |
59901721283 ps |
T152 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1227890301 |
|
|
Jul 06 06:17:33 PM PDT 24 |
Jul 06 06:17:38 PM PDT 24 |
2224355897 ps |
T76 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.451051416 |
|
|
Jul 06 06:19:25 PM PDT 24 |
Jul 06 06:19:27 PM PDT 24 |
2458447221 ps |
T153 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2419308458 |
|
|
Jul 06 06:17:04 PM PDT 24 |
Jul 06 06:17:08 PM PDT 24 |
2621599456 ps |
T397 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.780180804 |
|
|
Jul 06 06:17:36 PM PDT 24 |
Jul 06 06:17:39 PM PDT 24 |
2029306489 ps |
T395 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3779739986 |
|
|
Jul 06 06:18:57 PM PDT 24 |
Jul 06 06:19:03 PM PDT 24 |
2507661766 ps |
T398 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.859516683 |
|
|
Jul 06 06:16:13 PM PDT 24 |
Jul 06 06:16:20 PM PDT 24 |
2131713350 ps |
T399 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1908301076 |
|
|
Jul 06 06:18:21 PM PDT 24 |
Jul 06 06:18:28 PM PDT 24 |
2219384038 ps |
T86 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.156600034 |
|
|
Jul 06 06:14:33 PM PDT 24 |
Jul 06 06:15:24 PM PDT 24 |
99258504900 ps |
T400 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2977389437 |
|
|
Jul 06 06:15:01 PM PDT 24 |
Jul 06 06:15:04 PM PDT 24 |
2024659166 ps |
T401 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2809450924 |
|
|
Jul 06 06:19:03 PM PDT 24 |
Jul 06 06:19:05 PM PDT 24 |
2626315087 ps |
T68 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.747930349 |
|
|
Jul 06 06:17:23 PM PDT 24 |
Jul 06 06:17:28 PM PDT 24 |
6369589686 ps |
T402 |
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.231355213 |
|
|
Jul 06 06:20:00 PM PDT 24 |
Jul 06 06:20:04 PM PDT 24 |
2621757937 ps |
T49 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.3350653666 |
|
|
Jul 06 06:14:24 PM PDT 24 |
Jul 06 06:14:42 PM PDT 24 |
13175226928 ps |
T260 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2374055949 |
|
|
Jul 06 06:15:51 PM PDT 24 |
Jul 06 06:16:53 PM PDT 24 |
89391174008 ps |
T396 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.281541573 |
|
|
Jul 06 06:13:14 PM PDT 24 |
Jul 06 06:13:19 PM PDT 24 |
2515413641 ps |
T45 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.3922376624 |
|
|
Jul 06 06:16:50 PM PDT 24 |
Jul 06 06:16:55 PM PDT 24 |
3610101430 ps |
T248 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2836168855 |
|
|
Jul 06 06:18:09 PM PDT 24 |
Jul 06 06:18:25 PM PDT 24 |
69875249548 ps |
T249 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.302066266 |
|
|
Jul 06 06:15:37 PM PDT 24 |
Jul 06 06:15:45 PM PDT 24 |
2610321220 ps |
T250 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.1676302075 |
|
|
Jul 06 06:16:47 PM PDT 24 |
Jul 06 06:17:01 PM PDT 24 |
9828707083 ps |
T251 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2707595788 |
|
|
Jul 06 06:15:45 PM PDT 24 |
Jul 06 06:15:47 PM PDT 24 |
2623158061 ps |
T42 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3525247192 |
|
|
Jul 06 06:14:53 PM PDT 24 |
Jul 06 06:17:40 PM PDT 24 |
1945371287977 ps |
T37 |
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.519723885 |
|
|
Jul 06 06:18:58 PM PDT 24 |
Jul 06 06:19:05 PM PDT 24 |
4936553245 ps |
T41 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3263501572 |
|
|
Jul 06 06:17:18 PM PDT 24 |
Jul 06 06:18:34 PM PDT 24 |
1623297027847 ps |
T200 |
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.3067969700 |
|
|
Jul 06 06:13:39 PM PDT 24 |
Jul 06 06:13:51 PM PDT 24 |
4291778373 ps |
T201 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2316175266 |
|
|
Jul 06 06:14:59 PM PDT 24 |
Jul 06 06:15:01 PM PDT 24 |
2206348216 ps |
T202 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1143116970 |
|
|
Jul 06 06:13:38 PM PDT 24 |
Jul 06 06:13:40 PM PDT 24 |
2448105216 ps |
T203 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.2559341900 |
|
|
Jul 06 06:17:51 PM PDT 24 |
Jul 06 06:17:57 PM PDT 24 |
2010322141 ps |
T204 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3924491661 |
|
|
Jul 06 06:15:50 PM PDT 24 |
Jul 06 06:17:05 PM PDT 24 |
127902163194 ps |
T50 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3441783362 |
|
|
Jul 06 06:18:14 PM PDT 24 |
Jul 06 06:18:23 PM PDT 24 |
3136373307 ps |
T110 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3254847767 |
|
|
Jul 06 06:17:17 PM PDT 24 |
Jul 06 06:17:33 PM PDT 24 |
22862196421 ps |
T111 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.373025399 |
|
|
Jul 06 06:13:10 PM PDT 24 |
Jul 06 06:13:12 PM PDT 24 |
2234825572 ps |
T112 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3288164210 |
|
|
Jul 06 06:17:53 PM PDT 24 |
Jul 06 06:17:56 PM PDT 24 |
2451113855 ps |
T113 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1646899700 |
|
|
Jul 06 06:13:22 PM PDT 24 |
Jul 06 06:19:04 PM PDT 24 |
143288648546 ps |
T114 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.1936462020 |
|
|
Jul 06 06:18:22 PM PDT 24 |
Jul 06 06:18:25 PM PDT 24 |
2117786362 ps |
T115 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2445209285 |
|
|
Jul 06 06:15:25 PM PDT 24 |
Jul 06 06:15:30 PM PDT 24 |
3170345507 ps |
T116 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3912614839 |
|
|
Jul 06 06:15:21 PM PDT 24 |
Jul 06 06:15:25 PM PDT 24 |
2473285870 ps |
T117 |
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1577243114 |
|
|
Jul 06 06:16:26 PM PDT 24 |
Jul 06 06:16:29 PM PDT 24 |
2070723085 ps |
T118 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2041831399 |
|
|
Jul 06 06:18:47 PM PDT 24 |
Jul 06 06:18:52 PM PDT 24 |
3119069922 ps |
T43 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.159391382 |
|
|
Jul 06 06:17:38 PM PDT 24 |
Jul 06 06:18:45 PM PDT 24 |
62845111857 ps |
T129 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.4275124126 |
|
|
Jul 06 06:15:44 PM PDT 24 |
Jul 06 06:15:50 PM PDT 24 |
2111847377 ps |
T51 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2140377968 |
|
|
Jul 06 06:18:21 PM PDT 24 |
Jul 06 06:19:11 PM PDT 24 |
75521372771 ps |
T98 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.622557891 |
|
|
Jul 06 06:18:19 PM PDT 24 |
Jul 06 06:19:21 PM PDT 24 |
102471101757 ps |
T130 |
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2319925981 |
|
|
Jul 06 06:15:53 PM PDT 24 |
Jul 06 06:15:58 PM PDT 24 |
2124035864 ps |
T52 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4019330061 |
|
|
Jul 06 06:14:33 PM PDT 24 |
Jul 06 06:14:44 PM PDT 24 |
3931410473 ps |
T96 |
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.2812348204 |
|
|
Jul 06 06:17:00 PM PDT 24 |
Jul 06 06:17:04 PM PDT 24 |
3802479474 ps |
T84 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3252018610 |
|
|
Jul 06 06:16:14 PM PDT 24 |
Jul 06 06:16:22 PM PDT 24 |
6692116199 ps |
T131 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.1198482679 |
|
|
Jul 06 06:16:13 PM PDT 24 |
Jul 06 06:16:19 PM PDT 24 |
2011941941 ps |
T132 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.3204611036 |
|
|
Jul 06 06:16:03 PM PDT 24 |
Jul 06 06:16:05 PM PDT 24 |
2637944925 ps |
T280 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3390883592 |
|
|
Jul 06 06:15:27 PM PDT 24 |
Jul 06 06:15:29 PM PDT 24 |
2530363709 ps |
T44 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.2419894363 |
|
|
Jul 06 06:17:54 PM PDT 24 |
Jul 06 06:17:58 PM PDT 24 |
4346781312 ps |
T85 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1923022130 |
|
|
Jul 06 06:19:37 PM PDT 24 |
Jul 06 06:19:41 PM PDT 24 |
6957520322 ps |
T32 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1413440681 |
|
|
Jul 06 06:16:50 PM PDT 24 |
Jul 06 06:17:34 PM PDT 24 |
33544853606 ps |
T403 |
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1071273208 |
|
|
Jul 06 06:18:22 PM PDT 24 |
Jul 06 06:18:23 PM PDT 24 |
2618873281 ps |
T263 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1267046370 |
|
|
Jul 06 06:20:02 PM PDT 24 |
Jul 06 06:20:47 PM PDT 24 |
41249487265 ps |
T404 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3798394992 |
|
|
Jul 06 06:18:23 PM PDT 24 |
Jul 06 06:18:27 PM PDT 24 |
2219509846 ps |
T38 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.1457583755 |
|
|
Jul 06 06:15:27 PM PDT 24 |
Jul 06 06:15:38 PM PDT 24 |
4258993384 ps |
T405 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3533935332 |
|
|
Jul 06 06:15:08 PM PDT 24 |
Jul 06 06:15:12 PM PDT 24 |
2111988100 ps |
T313 |
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2600279705 |
|
|
Jul 06 06:18:31 PM PDT 24 |
Jul 06 06:18:33 PM PDT 24 |
2553461984 ps |
T406 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1829238325 |
|
|
Jul 06 06:17:43 PM PDT 24 |
Jul 06 06:17:50 PM PDT 24 |
2510060593 ps |
T407 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.3713271198 |
|
|
Jul 06 06:17:07 PM PDT 24 |
Jul 06 06:17:09 PM PDT 24 |
2135252849 ps |
T408 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.3092224106 |
|
|
Jul 06 06:15:01 PM PDT 24 |
Jul 06 06:15:07 PM PDT 24 |
2110028837 ps |
T253 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2660504062 |
|
|
Jul 06 06:20:10 PM PDT 24 |
Jul 06 06:24:10 PM PDT 24 |
101210368912 ps |
T89 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.4254038082 |
|
|
Jul 06 06:20:07 PM PDT 24 |
Jul 06 06:23:41 PM PDT 24 |
109819690947 ps |
T409 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3836441937 |
|
|
Jul 06 06:13:36 PM PDT 24 |
Jul 06 06:13:41 PM PDT 24 |
2617556361 ps |
T410 |
/workspace/coverage/default/3.sysrst_ctrl_smoke.225121304 |
|
|
Jul 06 06:14:07 PM PDT 24 |
Jul 06 06:14:08 PM PDT 24 |
2138857961 ps |
T39 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.5588940 |
|
|
Jul 06 06:15:44 PM PDT 24 |
Jul 06 06:15:51 PM PDT 24 |
4723006323 ps |
T235 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2415270632 |
|
|
Jul 06 06:20:10 PM PDT 24 |
Jul 06 06:21:27 PM PDT 24 |
31061893959 ps |
T236 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.2902221803 |
|
|
Jul 06 06:18:19 PM PDT 24 |
Jul 06 06:18:21 PM PDT 24 |
4046634525 ps |
T97 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.548239133 |
|
|
Jul 06 06:17:27 PM PDT 24 |
Jul 06 06:17:35 PM PDT 24 |
3162834996 ps |
T120 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2020459010 |
|
|
Jul 06 06:16:05 PM PDT 24 |
Jul 06 06:16:08 PM PDT 24 |
7090348229 ps |
T99 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.999247290 |
|
|
Jul 06 06:17:30 PM PDT 24 |
Jul 06 06:18:29 PM PDT 24 |
23332851994 ps |
T237 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1000606431 |
|
|
Jul 06 06:14:38 PM PDT 24 |
Jul 06 06:15:42 PM PDT 24 |
23074532213 ps |
T238 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2315694005 |
|
|
Jul 06 06:17:02 PM PDT 24 |
Jul 06 06:17:05 PM PDT 24 |
2626152068 ps |
T239 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3632228435 |
|
|
Jul 06 06:17:13 PM PDT 24 |
Jul 06 06:17:23 PM PDT 24 |
3645023927 ps |
T240 |
/workspace/coverage/default/17.sysrst_ctrl_smoke.2593942675 |
|
|
Jul 06 06:16:10 PM PDT 24 |
Jul 06 06:16:12 PM PDT 24 |
2126640553 ps |
T321 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.71458362 |
|
|
Jul 06 06:18:50 PM PDT 24 |
Jul 06 06:18:54 PM PDT 24 |
2613396468 ps |
T264 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2143282011 |
|
|
Jul 06 06:18:42 PM PDT 24 |
Jul 06 06:22:02 PM PDT 24 |
154308594772 ps |
T33 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2592993893 |
|
|
Jul 06 06:20:17 PM PDT 24 |
Jul 06 06:25:03 PM PDT 24 |
106943893273 ps |
T322 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2706243927 |
|
|
Jul 06 06:14:52 PM PDT 24 |
Jul 06 06:14:54 PM PDT 24 |
2024565532 ps |
T121 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1916962428 |
|
|
Jul 06 06:13:55 PM PDT 24 |
Jul 06 06:15:20 PM PDT 24 |
1190892527626 ps |
T323 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3471626002 |
|
|
Jul 06 06:16:31 PM PDT 24 |
Jul 06 06:16:42 PM PDT 24 |
3755868292 ps |
T411 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.426260753 |
|
|
Jul 06 06:16:36 PM PDT 24 |
Jul 06 06:16:40 PM PDT 24 |
2027342758 ps |
T271 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.287569640 |
|
|
Jul 06 06:17:34 PM PDT 24 |
Jul 06 06:18:22 PM PDT 24 |
74909177031 ps |
T262 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.200914430 |
|
|
Jul 06 06:16:29 PM PDT 24 |
Jul 06 06:18:09 PM PDT 24 |
97139760713 ps |
T412 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.510138637 |
|
|
Jul 06 06:19:47 PM PDT 24 |
Jul 06 06:19:50 PM PDT 24 |
3638981596 ps |
T413 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.86010238 |
|
|
Jul 06 06:17:45 PM PDT 24 |
Jul 06 06:17:51 PM PDT 24 |
4108006585 ps |
T414 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.3297518337 |
|
|
Jul 06 06:17:45 PM PDT 24 |
Jul 06 06:17:47 PM PDT 24 |
2151277346 ps |
T415 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4223455652 |
|
|
Jul 06 06:18:42 PM PDT 24 |
Jul 06 06:18:46 PM PDT 24 |
2474756411 ps |
T416 |
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2406610810 |
|
|
Jul 06 06:16:58 PM PDT 24 |
Jul 06 06:17:10 PM PDT 24 |
3819584587 ps |
T417 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2348586703 |
|
|
Jul 06 06:13:54 PM PDT 24 |
Jul 06 06:13:57 PM PDT 24 |
2528756451 ps |
T418 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.323686080 |
|
|
Jul 06 06:16:14 PM PDT 24 |
Jul 06 06:16:26 PM PDT 24 |
4270985198 ps |
T100 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3147145673 |
|
|
Jul 06 06:16:50 PM PDT 24 |
Jul 06 06:17:31 PM PDT 24 |
34379741857 ps |
T176 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.4193144296 |
|
|
Jul 06 06:18:58 PM PDT 24 |
Jul 06 06:19:02 PM PDT 24 |
4982892333 ps |
T419 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2589263986 |
|
|
Jul 06 06:16:53 PM PDT 24 |
Jul 06 06:16:56 PM PDT 24 |
2522211560 ps |
T101 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.4181540960 |
|
|
Jul 06 06:22:56 PM PDT 24 |
Jul 06 06:24:24 PM PDT 24 |
33632763241 ps |
T273 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.1583207222 |
|
|
Jul 06 06:18:10 PM PDT 24 |
Jul 06 06:22:15 PM PDT 24 |
180018652492 ps |
T272 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.2679788238 |
|
|
Jul 06 06:16:28 PM PDT 24 |
Jul 06 06:18:13 PM PDT 24 |
77557754889 ps |
T420 |
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1493576394 |
|
|
Jul 06 06:18:43 PM PDT 24 |
Jul 06 06:18:45 PM PDT 24 |
2196753856 ps |
T256 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1488645930 |
|
|
Jul 06 06:20:17 PM PDT 24 |
Jul 06 06:21:18 PM PDT 24 |
23328667565 ps |
T421 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.835221873 |
|
|
Jul 06 06:18:30 PM PDT 24 |
Jul 06 06:18:33 PM PDT 24 |
2538801911 ps |
T177 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.931862821 |
|
|
Jul 06 06:17:04 PM PDT 24 |
Jul 06 06:17:05 PM PDT 24 |
2476829104 ps |
T422 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3281888646 |
|
|
Jul 06 06:19:54 PM PDT 24 |
Jul 06 06:20:00 PM PDT 24 |
2011805682 ps |
T423 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3853659739 |
|
|
Jul 06 06:16:41 PM PDT 24 |
Jul 06 06:16:44 PM PDT 24 |
2620457373 ps |
T90 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2908802393 |
|
|
Jul 06 06:16:03 PM PDT 24 |
Jul 06 06:16:10 PM PDT 24 |
6110965904 ps |
T424 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3287081911 |
|
|
Jul 06 06:15:32 PM PDT 24 |
Jul 06 06:15:44 PM PDT 24 |
4048469144 ps |
T425 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.4043680359 |
|
|
Jul 06 06:16:54 PM PDT 24 |
Jul 06 06:17:01 PM PDT 24 |
2610519045 ps |
T124 |
/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.1334315485 |
|
|
Jul 06 06:15:35 PM PDT 24 |
Jul 06 06:15:38 PM PDT 24 |
3589182112 ps |
T426 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.3052366099 |
|
|
Jul 06 06:15:45 PM PDT 24 |
Jul 06 06:15:49 PM PDT 24 |
2478986396 ps |
T427 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.3777838015 |
|
|
Jul 06 06:16:45 PM PDT 24 |
Jul 06 06:16:47 PM PDT 24 |
2126957405 ps |
T178 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.1035341697 |
|
|
Jul 06 06:14:14 PM PDT 24 |
Jul 06 06:14:16 PM PDT 24 |
4014120338 ps |
T394 |
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3008176127 |
|
|
Jul 06 06:14:38 PM PDT 24 |
Jul 06 06:15:03 PM PDT 24 |
272639359061 ps |
T428 |
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.3063522057 |
|
|
Jul 06 06:17:58 PM PDT 24 |
Jul 06 06:18:08 PM PDT 24 |
3636377548 ps |
T382 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.185252211 |
|
|
Jul 06 06:15:28 PM PDT 24 |
Jul 06 06:16:17 PM PDT 24 |
78944111668 ps |
T429 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.3306856248 |
|
|
Jul 06 06:13:38 PM PDT 24 |
Jul 06 06:13:43 PM PDT 24 |
2051877899 ps |
T362 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1906292283 |
|
|
Jul 06 06:20:12 PM PDT 24 |
Jul 06 06:23:09 PM PDT 24 |
69014536324 ps |
T430 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.1614545204 |
|
|
Jul 06 06:18:09 PM PDT 24 |
Jul 06 06:18:12 PM PDT 24 |
3752778699 ps |
T122 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2241011811 |
|
|
Jul 06 06:19:11 PM PDT 24 |
Jul 06 06:19:20 PM PDT 24 |
4617416394 ps |
T123 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2710320043 |
|
|
Jul 06 06:16:25 PM PDT 24 |
Jul 06 06:17:54 PM PDT 24 |
68043715028 ps |
T145 |
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.1358249101 |
|
|
Jul 06 06:18:09 PM PDT 24 |
Jul 06 06:18:16 PM PDT 24 |
3122069344 ps |
T431 |
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2635326545 |
|
|
Jul 06 06:19:47 PM PDT 24 |
Jul 06 06:19:53 PM PDT 24 |
5912742730 ps |
T432 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.1213624671 |
|
|
Jul 06 06:14:16 PM PDT 24 |
Jul 06 06:14:18 PM PDT 24 |
2034702566 ps |
T133 |
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.4279021186 |
|
|
Jul 06 06:18:23 PM PDT 24 |
Jul 06 06:18:32 PM PDT 24 |
9016591908 ps |
T433 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.3233039496 |
|
|
Jul 06 06:15:35 PM PDT 24 |
Jul 06 06:15:38 PM PDT 24 |
2094509502 ps |
T434 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1983537939 |
|
|
Jul 06 06:15:54 PM PDT 24 |
Jul 06 06:15:56 PM PDT 24 |
2540993394 ps |
T435 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2257448728 |
|
|
Jul 06 06:14:56 PM PDT 24 |
Jul 06 06:14:59 PM PDT 24 |
3471969350 ps |
T436 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3937209744 |
|
|
Jul 06 06:15:10 PM PDT 24 |
Jul 06 06:15:14 PM PDT 24 |
12926912644 ps |
T186 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.1040527031 |
|
|
Jul 06 06:16:17 PM PDT 24 |
Jul 06 06:16:35 PM PDT 24 |
15284118362 ps |
T60 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.952488682 |
|
|
Jul 06 06:13:47 PM PDT 24 |
Jul 06 06:14:15 PM PDT 24 |
40548756456 ps |
T102 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1919632616 |
|
|
Jul 06 06:20:03 PM PDT 24 |
Jul 06 06:22:19 PM PDT 24 |
109565769008 ps |
T315 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.31257260 |
|
|
Jul 06 06:13:36 PM PDT 24 |
Jul 06 06:13:38 PM PDT 24 |
2530015165 ps |
T314 |
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.639683123 |
|
|
Jul 06 06:16:25 PM PDT 24 |
Jul 06 06:16:33 PM PDT 24 |
2462953796 ps |
T437 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1525993263 |
|
|
Jul 06 06:14:56 PM PDT 24 |
Jul 06 06:14:57 PM PDT 24 |
3356623157 ps |
T88 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2262124899 |
|
|
Jul 06 06:18:21 PM PDT 24 |
Jul 06 06:18:33 PM PDT 24 |
3920338546 ps |
T438 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.1893510328 |
|
|
Jul 06 06:13:15 PM PDT 24 |
Jul 06 06:13:18 PM PDT 24 |
3723343783 ps |
T439 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2174118587 |
|
|
Jul 06 06:19:04 PM PDT 24 |
Jul 06 06:19:10 PM PDT 24 |
2112489937 ps |
T440 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.585401919 |
|
|
Jul 06 06:14:14 PM PDT 24 |
Jul 06 06:14:17 PM PDT 24 |
4684689603 ps |
T441 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.673735925 |
|
|
Jul 06 06:14:03 PM PDT 24 |
Jul 06 06:14:06 PM PDT 24 |
2022296261 ps |
T198 |
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.3247967094 |
|
|
Jul 06 06:17:39 PM PDT 24 |
Jul 06 06:17:46 PM PDT 24 |
3564774548 ps |
T254 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2328408632 |
|
|
Jul 06 06:20:08 PM PDT 24 |
Jul 06 06:22:41 PM PDT 24 |
57658617808 ps |
T103 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.1965964334 |
|
|
Jul 06 06:13:59 PM PDT 24 |
Jul 06 06:19:39 PM PDT 24 |
136326081102 ps |
T442 |
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.4132493809 |
|
|
Jul 06 06:17:03 PM PDT 24 |
Jul 06 06:17:06 PM PDT 24 |
2095038538 ps |
T199 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.675268518 |
|
|
Jul 06 06:15:41 PM PDT 24 |
Jul 06 06:15:43 PM PDT 24 |
2529740940 ps |
T443 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3670793406 |
|
|
Jul 06 06:14:45 PM PDT 24 |
Jul 06 06:14:56 PM PDT 24 |
3703888678 ps |
T146 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.1727513404 |
|
|
Jul 06 06:17:13 PM PDT 24 |
Jul 06 06:17:20 PM PDT 24 |
16526969689 ps |
T444 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1716735545 |
|
|
Jul 06 06:16:07 PM PDT 24 |
Jul 06 06:16:08 PM PDT 24 |
2153116221 ps |
T445 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.215691140 |
|
|
Jul 06 06:15:09 PM PDT 24 |
Jul 06 06:15:13 PM PDT 24 |
2520198856 ps |
T380 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.943199789 |
|
|
Jul 06 06:14:54 PM PDT 24 |
Jul 06 06:21:36 PM PDT 24 |
148650055188 ps |
T446 |
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3078215404 |
|
|
Jul 06 06:16:13 PM PDT 24 |
Jul 06 06:16:20 PM PDT 24 |
2510865538 ps |
T447 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2636424796 |
|
|
Jul 06 06:17:04 PM PDT 24 |
Jul 06 06:17:08 PM PDT 24 |
2519241344 ps |
T448 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.3224232795 |
|
|
Jul 06 06:13:07 PM PDT 24 |
Jul 06 06:13:12 PM PDT 24 |
2113347841 ps |
T294 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.735210077 |
|
|
Jul 06 06:13:45 PM PDT 24 |
Jul 06 06:14:42 PM PDT 24 |
22012900994 ps |
T449 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.341918214 |
|
|
Jul 06 06:13:50 PM PDT 24 |
Jul 06 06:13:54 PM PDT 24 |
2536877396 ps |
T450 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.2151573986 |
|
|
Jul 06 06:15:50 PM PDT 24 |
Jul 06 06:15:53 PM PDT 24 |
3642020779 ps |
T311 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2175876418 |
|
|
Jul 06 06:19:23 PM PDT 24 |
Jul 06 06:19:37 PM PDT 24 |
15727545933 ps |
T451 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2707235796 |
|
|
Jul 06 06:19:45 PM PDT 24 |
Jul 06 06:19:48 PM PDT 24 |
2473323354 ps |
T225 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all.3708860804 |
|
|
Jul 06 06:16:24 PM PDT 24 |
Jul 06 06:20:07 PM PDT 24 |
95360638613 ps |
T180 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.260678046 |
|
|
Jul 06 06:18:18 PM PDT 24 |
Jul 06 06:18:24 PM PDT 24 |
2600067274 ps |
T94 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3523387163 |
|
|
Jul 06 06:18:53 PM PDT 24 |
Jul 06 06:19:17 PM PDT 24 |
131143873034 ps |
T452 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3025029515 |
|
|
Jul 06 06:17:44 PM PDT 24 |
Jul 06 06:17:47 PM PDT 24 |
2148505651 ps |
T270 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3381457098 |
|
|
Jul 06 06:13:46 PM PDT 24 |
Jul 06 06:15:43 PM PDT 24 |
54789903278 ps |
T453 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3104906787 |
|
|
Jul 06 06:14:28 PM PDT 24 |
Jul 06 06:14:30 PM PDT 24 |
2485900027 ps |
T283 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.728857509 |
|
|
Jul 06 06:17:46 PM PDT 24 |
Jul 06 06:22:27 PM PDT 24 |
108548931421 ps |
T454 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2165977084 |
|
|
Jul 06 06:15:41 PM PDT 24 |
Jul 06 06:15:50 PM PDT 24 |
3174888565 ps |
T455 |
/workspace/coverage/default/34.sysrst_ctrl_smoke.880135010 |
|
|
Jul 06 06:17:52 PM PDT 24 |
Jul 06 06:17:53 PM PDT 24 |
2252756200 ps |
T384 |
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3876645276 |
|
|
Jul 06 06:20:04 PM PDT 24 |
Jul 06 06:20:53 PM PDT 24 |
77191067541 ps |
T456 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2389710871 |
|
|
Jul 06 06:15:41 PM PDT 24 |
Jul 06 06:15:46 PM PDT 24 |
2515587551 ps |
T457 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.805630338 |
|
|
Jul 06 06:19:42 PM PDT 24 |
Jul 06 06:19:44 PM PDT 24 |
3201064408 ps |
T458 |
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.763338202 |
|
|
Jul 06 06:16:18 PM PDT 24 |
Jul 06 06:16:23 PM PDT 24 |
2090242238 ps |
T459 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.247634806 |
|
|
Jul 06 06:19:44 PM PDT 24 |
Jul 06 06:19:47 PM PDT 24 |
2017980306 ps |
T460 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.1371840047 |
|
|
Jul 06 06:16:38 PM PDT 24 |
Jul 06 06:16:40 PM PDT 24 |
2132538131 ps |
T461 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1383486681 |
|
|
Jul 06 06:17:39 PM PDT 24 |
Jul 06 06:17:47 PM PDT 24 |
2457151224 ps |