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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.35 96.43 100.00 97.44 98.78 99.61 94.03


Total test records in report: 915
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T176 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1565851566 Jul 10 06:24:16 PM PDT 24 Jul 10 06:24:39 PM PDT 24 26383273516 ps
T177 /workspace/coverage/default/21.sysrst_ctrl_alert_test.1263521703 Jul 10 06:22:40 PM PDT 24 Jul 10 06:22:43 PM PDT 24 2042204692 ps
T178 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1288122803 Jul 10 06:23:15 PM PDT 24 Jul 10 06:25:04 PM PDT 24 84251135598 ps
T179 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.4034017507 Jul 10 06:24:27 PM PDT 24 Jul 10 06:24:45 PM PDT 24 22104726280 ps
T317 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.3002355852 Jul 10 06:22:44 PM PDT 24 Jul 10 06:27:23 PM PDT 24 107346489251 ps
T452 /workspace/coverage/default/22.sysrst_ctrl_smoke.3869020871 Jul 10 06:22:37 PM PDT 24 Jul 10 06:22:39 PM PDT 24 2130689587 ps
T280 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.505674660 Jul 10 06:20:52 PM PDT 24 Jul 10 06:21:22 PM PDT 24 22016671569 ps
T453 /workspace/coverage/default/43.sysrst_ctrl_alert_test.1172602031 Jul 10 06:23:50 PM PDT 24 Jul 10 06:23:55 PM PDT 24 2020027810 ps
T193 /workspace/coverage/default/48.sysrst_ctrl_stress_all.4076692336 Jul 10 06:24:13 PM PDT 24 Jul 10 06:24:31 PM PDT 24 14968903081 ps
T222 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.3261705620 Jul 10 06:24:10 PM PDT 24 Jul 10 06:24:29 PM PDT 24 3845262967 ps
T152 /workspace/coverage/default/10.sysrst_ctrl_stress_all.507174772 Jul 10 06:21:44 PM PDT 24 Jul 10 06:21:57 PM PDT 24 10822558283 ps
T454 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.266880819 Jul 10 06:24:26 PM PDT 24 Jul 10 06:25:37 PM PDT 24 25582128620 ps
T455 /workspace/coverage/default/27.sysrst_ctrl_alert_test.2386798238 Jul 10 06:22:59 PM PDT 24 Jul 10 06:23:06 PM PDT 24 2013491607 ps
T456 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2706172485 Jul 10 06:20:20 PM PDT 24 Jul 10 06:20:28 PM PDT 24 2544912305 ps
T457 /workspace/coverage/default/46.sysrst_ctrl_stress_all.1758772180 Jul 10 06:24:02 PM PDT 24 Jul 10 06:24:20 PM PDT 24 13117561775 ps
T458 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3944574445 Jul 10 06:24:09 PM PDT 24 Jul 10 06:24:21 PM PDT 24 3763965101 ps
T459 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2247855603 Jul 10 06:21:40 PM PDT 24 Jul 10 06:21:43 PM PDT 24 2923954700 ps
T460 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1050729801 Jul 10 06:21:23 PM PDT 24 Jul 10 06:21:36 PM PDT 24 4560435475 ps
T356 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2907637377 Jul 10 06:23:56 PM PDT 24 Jul 10 06:24:57 PM PDT 24 49047979845 ps
T251 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.431829173 Jul 10 06:23:07 PM PDT 24 Jul 10 06:24:36 PM PDT 24 134893079324 ps
T461 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.3433156912 Jul 10 06:22:24 PM PDT 24 Jul 10 06:22:27 PM PDT 24 2484894429 ps
T462 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.405066595 Jul 10 06:23:36 PM PDT 24 Jul 10 06:23:44 PM PDT 24 2510286814 ps
T463 /workspace/coverage/default/32.sysrst_ctrl_alert_test.2687345040 Jul 10 06:23:21 PM PDT 24 Jul 10 06:23:24 PM PDT 24 2028826580 ps
T464 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.1740719401 Jul 10 06:23:22 PM PDT 24 Jul 10 06:23:27 PM PDT 24 3575684377 ps
T465 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1562840947 Jul 10 06:23:06 PM PDT 24 Jul 10 06:23:08 PM PDT 24 2137247556 ps
T318 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.3556086896 Jul 10 06:22:05 PM PDT 24 Jul 10 06:32:37 PM PDT 24 241270437097 ps
T361 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1787140070 Jul 10 06:23:45 PM PDT 24 Jul 10 06:27:23 PM PDT 24 81550604684 ps
T466 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1851718658 Jul 10 06:22:36 PM PDT 24 Jul 10 06:22:39 PM PDT 24 2467511884 ps
T467 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.2754506254 Jul 10 06:22:35 PM PDT 24 Jul 10 06:22:42 PM PDT 24 2612602326 ps
T91 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.4075747114 Jul 10 06:24:20 PM PDT 24 Jul 10 06:30:33 PM PDT 24 133301448678 ps
T468 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1718270469 Jul 10 06:21:23 PM PDT 24 Jul 10 06:21:39 PM PDT 24 23356799412 ps
T469 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.2705473523 Jul 10 06:21:03 PM PDT 24 Jul 10 06:21:06 PM PDT 24 2158969632 ps
T168 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.2217216996 Jul 10 06:23:31 PM PDT 24 Jul 10 06:23:33 PM PDT 24 3688856716 ps
T470 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2472103326 Jul 10 06:20:38 PM PDT 24 Jul 10 06:20:40 PM PDT 24 2249350442 ps
T104 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.965386319 Jul 10 06:23:40 PM PDT 24 Jul 10 06:24:27 PM PDT 24 55575418113 ps
T471 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1034897568 Jul 10 06:23:47 PM PDT 24 Jul 10 06:23:52 PM PDT 24 2460003995 ps
T472 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2545399255 Jul 10 06:24:13 PM PDT 24 Jul 10 06:24:30 PM PDT 24 2508417796 ps
T473 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3651278380 Jul 10 06:23:45 PM PDT 24 Jul 10 06:23:49 PM PDT 24 2631045675 ps
T246 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.2921353553 Jul 10 06:22:13 PM PDT 24 Jul 10 06:22:37 PM PDT 24 56810981876 ps
T474 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3679394753 Jul 10 06:22:42 PM PDT 24 Jul 10 06:22:47 PM PDT 24 2518912578 ps
T143 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1003351549 Jul 10 06:23:07 PM PDT 24 Jul 10 06:25:51 PM PDT 24 990817107411 ps
T210 /workspace/coverage/default/23.sysrst_ctrl_alert_test.3937971978 Jul 10 06:22:42 PM PDT 24 Jul 10 06:22:45 PM PDT 24 2042092129 ps
T211 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3597691719 Jul 10 06:21:17 PM PDT 24 Jul 10 06:21:25 PM PDT 24 2610154482 ps
T212 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.332037497 Jul 10 06:21:47 PM PDT 24 Jul 10 06:25:40 PM PDT 24 3524825894746 ps
T195 /workspace/coverage/default/20.sysrst_ctrl_stress_all.2475244269 Jul 10 06:22:28 PM PDT 24 Jul 10 06:23:04 PM PDT 24 13283066375 ps
T197 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3500343671 Jul 10 06:24:21 PM PDT 24 Jul 10 06:24:49 PM PDT 24 26096143134 ps
T198 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.1521461481 Jul 10 06:23:28 PM PDT 24 Jul 10 06:23:32 PM PDT 24 2529933434 ps
T199 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2884878194 Jul 10 06:21:29 PM PDT 24 Jul 10 06:24:27 PM PDT 24 67798580071 ps
T200 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2970320418 Jul 10 06:22:49 PM PDT 24 Jul 10 06:22:56 PM PDT 24 3611640247 ps
T201 /workspace/coverage/default/22.sysrst_ctrl_alert_test.3029495876 Jul 10 06:22:43 PM PDT 24 Jul 10 06:22:50 PM PDT 24 2011880963 ps
T202 /workspace/coverage/default/20.sysrst_ctrl_smoke.3253335051 Jul 10 06:22:22 PM PDT 24 Jul 10 06:22:26 PM PDT 24 2119991451 ps
T203 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.2962809879 Jul 10 06:21:46 PM PDT 24 Jul 10 06:21:54 PM PDT 24 2455628929 ps
T204 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1966106304 Jul 10 06:22:12 PM PDT 24 Jul 10 06:26:41 PM PDT 24 273650971749 ps
T205 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2489492754 Jul 10 06:23:55 PM PDT 24 Jul 10 06:23:58 PM PDT 24 2210447009 ps
T180 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.497511266 Jul 10 06:21:58 PM PDT 24 Jul 10 06:23:38 PM PDT 24 1067842498751 ps
T475 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.1595167204 Jul 10 06:24:15 PM PDT 24 Jul 10 06:24:31 PM PDT 24 2446523783 ps
T96 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.901110445 Jul 10 06:23:53 PM PDT 24 Jul 10 06:24:23 PM PDT 24 138331387008 ps
T129 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3980094126 Jul 10 06:24:08 PM PDT 24 Jul 10 06:24:17 PM PDT 24 2517198117 ps
T130 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.1481462969 Jul 10 06:21:24 PM PDT 24 Jul 10 06:21:31 PM PDT 24 2769246652 ps
T131 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1863813557 Jul 10 06:23:53 PM PDT 24 Jul 10 06:24:01 PM PDT 24 2509931958 ps
T132 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.203901380 Jul 10 06:23:44 PM PDT 24 Jul 10 06:23:53 PM PDT 24 2507734807 ps
T133 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3351193794 Jul 10 06:20:59 PM PDT 24 Jul 10 06:21:06 PM PDT 24 2462138109 ps
T134 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.1199500017 Jul 10 06:23:45 PM PDT 24 Jul 10 06:25:24 PM PDT 24 165571030832 ps
T105 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.2358673326 Jul 10 06:24:02 PM PDT 24 Jul 10 06:30:49 PM PDT 24 151896596144 ps
T106 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.2416924230 Jul 10 06:22:29 PM PDT 24 Jul 10 06:23:10 PM PDT 24 56962692207 ps
T135 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2807992529 Jul 10 06:23:06 PM PDT 24 Jul 10 06:23:10 PM PDT 24 2482870513 ps
T476 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.2855384500 Jul 10 06:22:49 PM PDT 24 Jul 10 06:22:56 PM PDT 24 2202175778 ps
T477 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.2714600559 Jul 10 06:20:11 PM PDT 24 Jul 10 06:20:17 PM PDT 24 2508777824 ps
T478 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.4235966592 Jul 10 06:20:38 PM PDT 24 Jul 10 06:20:42 PM PDT 24 2476025267 ps
T479 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1407432756 Jul 10 06:23:36 PM PDT 24 Jul 10 06:23:41 PM PDT 24 2166682260 ps
T480 /workspace/coverage/default/31.sysrst_ctrl_alert_test.955902196 Jul 10 06:23:15 PM PDT 24 Jul 10 06:23:18 PM PDT 24 2153665376 ps
T481 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.1396370424 Jul 10 06:23:16 PM PDT 24 Jul 10 06:28:02 PM PDT 24 117040720466 ps
T371 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3456677315 Jul 10 06:22:35 PM PDT 24 Jul 10 06:22:50 PM PDT 24 379376138747 ps
T482 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3057483378 Jul 10 06:24:03 PM PDT 24 Jul 10 06:24:10 PM PDT 24 3429786275 ps
T483 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3298657375 Jul 10 06:23:08 PM PDT 24 Jul 10 06:23:11 PM PDT 24 2625438950 ps
T484 /workspace/coverage/default/38.sysrst_ctrl_alert_test.3008187960 Jul 10 06:23:38 PM PDT 24 Jul 10 06:23:44 PM PDT 24 2015067349 ps
T485 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3584091962 Jul 10 06:22:13 PM PDT 24 Jul 10 06:22:17 PM PDT 24 2524583678 ps
T486 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1171150089 Jul 10 06:24:11 PM PDT 24 Jul 10 06:24:24 PM PDT 24 4555989650 ps
T223 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.185122738 Jul 10 06:23:33 PM PDT 24 Jul 10 06:23:41 PM PDT 24 3129791885 ps
T487 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3285513806 Jul 10 06:22:13 PM PDT 24 Jul 10 06:22:24 PM PDT 24 4196617687 ps
T488 /workspace/coverage/default/48.sysrst_ctrl_alert_test.3760676659 Jul 10 06:24:09 PM PDT 24 Jul 10 06:24:18 PM PDT 24 2035914138 ps
T489 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.3991283544 Jul 10 06:23:00 PM PDT 24 Jul 10 06:23:03 PM PDT 24 2627127385 ps
T490 /workspace/coverage/default/34.sysrst_ctrl_smoke.3729461020 Jul 10 06:23:22 PM PDT 24 Jul 10 06:23:25 PM PDT 24 2126727136 ps
T491 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.886912960 Jul 10 06:24:11 PM PDT 24 Jul 10 06:24:21 PM PDT 24 2651370892 ps
T492 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.586418418 Jul 10 06:21:54 PM PDT 24 Jul 10 06:22:02 PM PDT 24 2609944690 ps
T493 /workspace/coverage/default/32.sysrst_ctrl_stress_all.2761689730 Jul 10 06:23:14 PM PDT 24 Jul 10 06:23:34 PM PDT 24 14991810331 ps
T252 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.4136899201 Jul 10 06:21:28 PM PDT 24 Jul 10 06:23:02 PM PDT 24 35532239878 ps
T494 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1690716034 Jul 10 06:22:03 PM PDT 24 Jul 10 06:22:10 PM PDT 24 3675384908 ps
T153 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.735528733 Jul 10 06:23:34 PM PDT 24 Jul 10 06:23:49 PM PDT 24 6400402969 ps
T364 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.341892893 Jul 10 06:24:09 PM PDT 24 Jul 10 06:24:31 PM PDT 24 24105129063 ps
T495 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1684914537 Jul 10 06:24:03 PM PDT 24 Jul 10 06:24:13 PM PDT 24 2512878655 ps
T496 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1464032394 Jul 10 06:22:13 PM PDT 24 Jul 10 06:22:17 PM PDT 24 2529291995 ps
T285 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1303327369 Jul 10 06:22:49 PM PDT 24 Jul 10 06:23:43 PM PDT 24 19874000755 ps
T497 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.1006288435 Jul 10 06:22:01 PM PDT 24 Jul 10 06:22:13 PM PDT 24 4517943695 ps
T498 /workspace/coverage/default/18.sysrst_ctrl_alert_test.3090074730 Jul 10 06:22:22 PM PDT 24 Jul 10 06:22:24 PM PDT 24 2043000825 ps
T499 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.1357736525 Jul 10 06:23:23 PM PDT 24 Jul 10 06:23:35 PM PDT 24 3902421343 ps
T500 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3325077901 Jul 10 06:23:52 PM PDT 24 Jul 10 06:23:56 PM PDT 24 7424457771 ps
T194 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1762506914 Jul 10 06:21:22 PM PDT 24 Jul 10 06:22:21 PM PDT 24 88768651079 ps
T501 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1864338476 Jul 10 06:22:31 PM PDT 24 Jul 10 06:22:34 PM PDT 24 2630075714 ps
T324 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1682948603 Jul 10 06:22:17 PM PDT 24 Jul 10 06:26:52 PM PDT 24 109047799645 ps
T331 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3834074815 Jul 10 06:22:55 PM PDT 24 Jul 10 06:23:37 PM PDT 24 67977588723 ps
T213 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.2336967742 Jul 10 06:23:06 PM PDT 24 Jul 10 06:23:08 PM PDT 24 3471874155 ps
T502 /workspace/coverage/default/7.sysrst_ctrl_smoke.2968551240 Jul 10 06:21:17 PM PDT 24 Jul 10 06:21:22 PM PDT 24 2114736880 ps
T503 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2501204053 Jul 10 06:23:28 PM PDT 24 Jul 10 06:23:31 PM PDT 24 3929569182 ps
T504 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2663004665 Jul 10 06:23:40 PM PDT 24 Jul 10 06:24:06 PM PDT 24 13424760520 ps
T505 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.3150213846 Jul 10 06:22:48 PM PDT 24 Jul 10 06:26:06 PM PDT 24 74690504717 ps
T89 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2129188391 Jul 10 06:23:49 PM PDT 24 Jul 10 06:24:37 PM PDT 24 74882269319 ps
T214 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1659442666 Jul 10 06:22:29 PM PDT 24 Jul 10 06:25:16 PM PDT 24 68063724428 ps
T506 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.2441614410 Jul 10 06:22:43 PM PDT 24 Jul 10 06:22:50 PM PDT 24 3907957381 ps
T507 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3405468314 Jul 10 06:23:46 PM PDT 24 Jul 10 06:23:50 PM PDT 24 2622494733 ps
T254 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.2768394235 Jul 10 06:23:08 PM PDT 24 Jul 10 06:27:36 PM PDT 24 103833197591 ps
T508 /workspace/coverage/default/45.sysrst_ctrl_alert_test.3101567228 Jul 10 06:24:02 PM PDT 24 Jul 10 06:24:10 PM PDT 24 2018680469 ps
T247 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.3925021809 Jul 10 06:22:21 PM PDT 24 Jul 10 06:22:59 PM PDT 24 38624210185 ps
T509 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1438293050 Jul 10 06:23:49 PM PDT 24 Jul 10 06:23:53 PM PDT 24 2236489180 ps
T510 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2912652990 Jul 10 06:22:08 PM PDT 24 Jul 10 06:22:15 PM PDT 24 2079320108 ps
T511 /workspace/coverage/default/23.sysrst_ctrl_smoke.2879939406 Jul 10 06:22:44 PM PDT 24 Jul 10 06:22:47 PM PDT 24 2124742734 ps
T512 /workspace/coverage/default/38.sysrst_ctrl_stress_all.929682232 Jul 10 06:23:38 PM PDT 24 Jul 10 06:23:51 PM PDT 24 9237834468 ps
T216 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.1355830499 Jul 10 06:21:17 PM PDT 24 Jul 10 06:21:29 PM PDT 24 4882885899 ps
T513 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2068276656 Jul 10 06:21:15 PM PDT 24 Jul 10 06:21:17 PM PDT 24 2077826373 ps
T514 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.752212754 Jul 10 06:22:19 PM PDT 24 Jul 10 06:22:22 PM PDT 24 2215526123 ps
T515 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3644184528 Jul 10 06:21:18 PM PDT 24 Jul 10 06:21:24 PM PDT 24 2044480309 ps
T516 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.66350688 Jul 10 06:22:06 PM PDT 24 Jul 10 06:22:10 PM PDT 24 2619884760 ps
T517 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.4052279566 Jul 10 06:22:37 PM PDT 24 Jul 10 06:22:42 PM PDT 24 2516666836 ps
T518 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3946354790 Jul 10 06:22:56 PM PDT 24 Jul 10 06:23:05 PM PDT 24 2610718513 ps
T519 /workspace/coverage/default/33.sysrst_ctrl_stress_all.2764966036 Jul 10 06:23:24 PM PDT 24 Jul 10 06:23:33 PM PDT 24 6197956974 ps
T360 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1157830406 Jul 10 06:21:17 PM PDT 24 Jul 10 06:21:49 PM PDT 24 87112490782 ps
T520 /workspace/coverage/default/39.sysrst_ctrl_alert_test.3570468372 Jul 10 06:23:48 PM PDT 24 Jul 10 06:23:52 PM PDT 24 2040339054 ps
T521 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1907192337 Jul 10 06:21:22 PM PDT 24 Jul 10 06:21:28 PM PDT 24 2964365793 ps
T323 /workspace/coverage/default/24.sysrst_ctrl_stress_all.4112810906 Jul 10 06:22:49 PM PDT 24 Jul 10 06:23:30 PM PDT 24 55457387904 ps
T522 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1774171444 Jul 10 06:24:27 PM PDT 24 Jul 10 06:26:06 PM PDT 24 90569007329 ps
T321 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.2230705748 Jul 10 06:23:29 PM PDT 24 Jul 10 06:23:45 PM PDT 24 105512965869 ps
T523 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.2402132678 Jul 10 06:23:15 PM PDT 24 Jul 10 06:23:18 PM PDT 24 3506085339 ps
T524 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3178100854 Jul 10 06:24:04 PM PDT 24 Jul 10 06:24:14 PM PDT 24 2093242455 ps
T322 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.934196906 Jul 10 06:24:20 PM PDT 24 Jul 10 06:28:33 PM PDT 24 106655264814 ps
T525 /workspace/coverage/default/7.sysrst_ctrl_stress_all.1210790594 Jul 10 06:21:24 PM PDT 24 Jul 10 06:21:33 PM PDT 24 12094718974 ps
T526 /workspace/coverage/default/19.sysrst_ctrl_stress_all.2791689241 Jul 10 06:22:25 PM PDT 24 Jul 10 06:22:50 PM PDT 24 12727275924 ps
T92 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3230788851 Jul 10 06:24:15 PM PDT 24 Jul 10 06:24:42 PM PDT 24 82806154803 ps
T527 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1430168295 Jul 10 06:23:36 PM PDT 24 Jul 10 06:23:43 PM PDT 24 2057490219 ps
T330 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.1644097256 Jul 10 06:22:07 PM PDT 24 Jul 10 06:27:08 PM PDT 24 121720177600 ps
T528 /workspace/coverage/default/41.sysrst_ctrl_alert_test.1980469705 Jul 10 06:23:44 PM PDT 24 Jul 10 06:23:49 PM PDT 24 2018576307 ps
T107 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3129714864 Jul 10 06:21:13 PM PDT 24 Jul 10 06:21:40 PM PDT 24 41931907764 ps
T529 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.149691643 Jul 10 06:24:01 PM PDT 24 Jul 10 06:24:12 PM PDT 24 4616042883 ps
T530 /workspace/coverage/default/0.sysrst_ctrl_alert_test.812893224 Jul 10 06:20:22 PM PDT 24 Jul 10 06:20:24 PM PDT 24 2040064574 ps
T531 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.4056554830 Jul 10 06:21:49 PM PDT 24 Jul 10 06:21:57 PM PDT 24 2611582054 ps
T532 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.554654111 Jul 10 06:23:36 PM PDT 24 Jul 10 06:23:41 PM PDT 24 2617749814 ps
T533 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.2995812159 Jul 10 06:22:22 PM PDT 24 Jul 10 06:22:25 PM PDT 24 2172435531 ps
T534 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.938088957 Jul 10 06:21:27 PM PDT 24 Jul 10 06:21:30 PM PDT 24 2485235735 ps
T535 /workspace/coverage/default/5.sysrst_ctrl_smoke.1370832365 Jul 10 06:21:06 PM PDT 24 Jul 10 06:21:13 PM PDT 24 2109665784 ps
T286 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.571924375 Jul 10 06:22:55 PM PDT 24 Jul 10 06:26:00 PM PDT 24 142697471608 ps
T536 /workspace/coverage/default/30.sysrst_ctrl_stress_all.1271086478 Jul 10 06:23:11 PM PDT 24 Jul 10 06:23:22 PM PDT 24 7697170288 ps
T537 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.4139987199 Jul 10 06:22:57 PM PDT 24 Jul 10 06:24:39 PM PDT 24 41501212287 ps
T538 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3876522738 Jul 10 06:22:49 PM PDT 24 Jul 10 07:02:53 PM PDT 24 910570950923 ps
T539 /workspace/coverage/default/4.sysrst_ctrl_alert_test.752219447 Jul 10 06:21:05 PM PDT 24 Jul 10 06:21:12 PM PDT 24 2017675082 ps
T540 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1938170312 Jul 10 06:20:40 PM PDT 24 Jul 10 06:20:43 PM PDT 24 3393692091 ps
T215 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.3610051843 Jul 10 06:22:50 PM PDT 24 Jul 10 06:23:01 PM PDT 24 3761369476 ps
T541 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.813232983 Jul 10 06:20:14 PM PDT 24 Jul 10 06:21:59 PM PDT 24 42718285971 ps
T542 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2333986349 Jul 10 06:24:22 PM PDT 24 Jul 10 06:25:22 PM PDT 24 81904664417 ps
T543 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.2747116360 Jul 10 06:23:22 PM PDT 24 Jul 10 06:24:25 PM PDT 24 89296353363 ps
T341 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3706791840 Jul 10 06:24:15 PM PDT 24 Jul 10 06:25:14 PM PDT 24 74834970009 ps
T544 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1128502555 Jul 10 06:21:37 PM PDT 24 Jul 10 06:21:41 PM PDT 24 2618613199 ps
T255 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1641751793 Jul 10 06:24:03 PM PDT 24 Jul 10 06:29:29 PM PDT 24 122930282175 ps
T350 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.970523869 Jul 10 06:24:20 PM PDT 24 Jul 10 06:24:42 PM PDT 24 79946892314 ps
T545 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3709475517 Jul 10 06:21:10 PM PDT 24 Jul 10 06:21:12 PM PDT 24 3537330187 ps
T546 /workspace/coverage/default/42.sysrst_ctrl_smoke.1738130951 Jul 10 06:23:45 PM PDT 24 Jul 10 06:23:49 PM PDT 24 2122973218 ps
T547 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.4070039578 Jul 10 06:22:11 PM PDT 24 Jul 10 06:22:20 PM PDT 24 3168777608 ps
T548 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.2428524760 Jul 10 06:23:20 PM PDT 24 Jul 10 06:23:23 PM PDT 24 2543721364 ps
T208 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.2298112371 Jul 10 06:22:01 PM PDT 24 Jul 10 06:22:05 PM PDT 24 2493968812 ps
T549 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1880444486 Jul 10 06:23:57 PM PDT 24 Jul 10 06:24:01 PM PDT 24 2468919328 ps
T550 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.1145300653 Jul 10 06:22:17 PM PDT 24 Jul 10 06:22:25 PM PDT 24 2511550908 ps
T551 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.3818199995 Jul 10 06:22:07 PM PDT 24 Jul 10 06:22:15 PM PDT 24 2461716994 ps
T552 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1271172402 Jul 10 06:21:29 PM PDT 24 Jul 10 06:21:32 PM PDT 24 2535995712 ps
T553 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2501084637 Jul 10 06:21:17 PM PDT 24 Jul 10 06:21:21 PM PDT 24 3612352177 ps
T554 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.4233371033 Jul 10 06:20:50 PM PDT 24 Jul 10 06:20:56 PM PDT 24 2613645991 ps
T555 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2452156718 Jul 10 06:24:08 PM PDT 24 Jul 10 06:24:38 PM PDT 24 630307199993 ps
T556 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.3559694585 Jul 10 06:22:18 PM PDT 24 Jul 10 06:22:22 PM PDT 24 2492016156 ps
T557 /workspace/coverage/default/10.sysrst_ctrl_alert_test.3691411213 Jul 10 06:21:39 PM PDT 24 Jul 10 06:21:46 PM PDT 24 2011944623 ps
T558 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.3010331303 Jul 10 06:22:26 PM PDT 24 Jul 10 06:22:29 PM PDT 24 2185529083 ps
T559 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.253425914 Jul 10 06:21:56 PM PDT 24 Jul 10 06:22:05 PM PDT 24 3359570808 ps
T560 /workspace/coverage/default/10.sysrst_ctrl_smoke.2865923973 Jul 10 06:21:39 PM PDT 24 Jul 10 06:21:42 PM PDT 24 2127953805 ps
T561 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1966308760 Jul 10 06:21:46 PM PDT 24 Jul 10 06:21:50 PM PDT 24 3093925954 ps
T562 /workspace/coverage/default/9.sysrst_ctrl_alert_test.473108325 Jul 10 06:21:40 PM PDT 24 Jul 10 06:21:47 PM PDT 24 2016437523 ps
T563 /workspace/coverage/default/49.sysrst_ctrl_alert_test.2376439611 Jul 10 06:24:10 PM PDT 24 Jul 10 06:24:22 PM PDT 24 2036960289 ps
T564 /workspace/coverage/default/15.sysrst_ctrl_alert_test.563587629 Jul 10 06:22:06 PM PDT 24 Jul 10 06:22:13 PM PDT 24 2012424968 ps
T565 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.212453840 Jul 10 06:22:53 PM PDT 24 Jul 10 06:22:57 PM PDT 24 2058640810 ps
T566 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2703270980 Jul 10 06:20:10 PM PDT 24 Jul 10 06:20:18 PM PDT 24 2615065363 ps
T567 /workspace/coverage/default/15.sysrst_ctrl_stress_all.3444484836 Jul 10 06:22:07 PM PDT 24 Jul 10 06:22:11 PM PDT 24 7790562327 ps
T97 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3914776648 Jul 10 06:23:39 PM PDT 24 Jul 10 06:23:43 PM PDT 24 7860852197 ps
T353 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3096616270 Jul 10 06:22:43 PM PDT 24 Jul 10 06:24:32 PM PDT 24 40712142255 ps
T568 /workspace/coverage/default/1.sysrst_ctrl_alert_test.3134509786 Jul 10 06:20:33 PM PDT 24 Jul 10 06:20:36 PM PDT 24 2026591692 ps
T569 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3301079051 Jul 10 06:22:57 PM PDT 24 Jul 10 06:23:00 PM PDT 24 3583903617 ps
T570 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.4156930884 Jul 10 06:24:06 PM PDT 24 Jul 10 06:24:14 PM PDT 24 2876645544 ps
T571 /workspace/coverage/default/30.sysrst_ctrl_smoke.61322178 Jul 10 06:23:09 PM PDT 24 Jul 10 06:23:13 PM PDT 24 2121342633 ps
T572 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3986133524 Jul 10 06:22:22 PM PDT 24 Jul 10 06:24:17 PM PDT 24 45809249726 ps
T573 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2161067117 Jul 10 06:24:13 PM PDT 24 Jul 10 06:24:25 PM PDT 24 2491178320 ps
T574 /workspace/coverage/default/40.sysrst_ctrl_stress_all.1503439219 Jul 10 06:23:41 PM PDT 24 Jul 10 06:23:47 PM PDT 24 11062320244 ps
T575 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.2083242638 Jul 10 06:23:15 PM PDT 24 Jul 10 06:23:24 PM PDT 24 2442260480 ps
T328 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1597417355 Jul 10 06:24:26 PM PDT 24 Jul 10 06:29:11 PM PDT 24 111833174753 ps
T95 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1701556319 Jul 10 06:21:36 PM PDT 24 Jul 10 06:25:16 PM PDT 24 120143452417 ps
T576 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.4162328648 Jul 10 06:23:23 PM PDT 24 Jul 10 06:23:26 PM PDT 24 2035197785 ps
T577 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.206342526 Jul 10 06:22:48 PM PDT 24 Jul 10 06:22:51 PM PDT 24 2521366319 ps
T578 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.4021448505 Jul 10 06:21:59 PM PDT 24 Jul 10 06:22:02 PM PDT 24 3242262892 ps
T357 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.900219060 Jul 10 06:20:27 PM PDT 24 Jul 10 06:21:56 PM PDT 24 69355719387 ps
T579 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1255262209 Jul 10 06:21:17 PM PDT 24 Jul 10 06:21:20 PM PDT 24 2532140373 ps
T98 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.3080270545 Jul 10 06:23:26 PM PDT 24 Jul 10 06:23:52 PM PDT 24 54656808450 ps
T580 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.680692227 Jul 10 06:22:56 PM PDT 24 Jul 10 06:23:00 PM PDT 24 3035038535 ps
T581 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.1956259981 Jul 10 06:22:36 PM PDT 24 Jul 10 06:22:40 PM PDT 24 2770095273 ps
T582 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3822977473 Jul 10 06:21:42 PM PDT 24 Jul 10 06:21:45 PM PDT 24 2641666499 ps
T583 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1033743629 Jul 10 06:23:02 PM PDT 24 Jul 10 06:23:04 PM PDT 24 3487761586 ps
T136 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1119033118 Jul 10 06:23:58 PM PDT 24 Jul 10 06:24:02 PM PDT 24 5604654940 ps
T584 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.3835065651 Jul 10 06:21:51 PM PDT 24 Jul 10 06:22:02 PM PDT 24 3932236536 ps
T585 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.812547691 Jul 10 06:21:40 PM PDT 24 Jul 10 06:21:44 PM PDT 24 2987293378 ps
T586 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.609385032 Jul 10 06:23:39 PM PDT 24 Jul 10 06:23:43 PM PDT 24 2262981030 ps
T587 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3853477578 Jul 10 06:24:02 PM PDT 24 Jul 10 06:24:15 PM PDT 24 3322917764 ps
T369 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1578291359 Jul 10 06:21:53 PM PDT 24 Jul 10 06:22:38 PM PDT 24 1327571880214 ps
T588 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2427483628 Jul 10 06:24:03 PM PDT 24 Jul 10 06:24:15 PM PDT 24 3904710353 ps
T589 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.1100711117 Jul 10 06:22:43 PM PDT 24 Jul 10 06:22:46 PM PDT 24 2472232092 ps
T590 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.2975002143 Jul 10 06:22:56 PM PDT 24 Jul 10 06:23:04 PM PDT 24 2703362316 ps
T591 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.917740701 Jul 10 06:21:17 PM PDT 24 Jul 10 06:21:19 PM PDT 24 2532628470 ps
T592 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.2766388199 Jul 10 06:22:42 PM PDT 24 Jul 10 06:22:44 PM PDT 24 2688092935 ps
T593 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2408263335 Jul 10 06:23:07 PM PDT 24 Jul 10 06:23:09 PM PDT 24 2645759173 ps
T594 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.4080676781 Jul 10 06:23:26 PM PDT 24 Jul 10 06:23:29 PM PDT 24 4405716077 ps
T595 /workspace/coverage/default/25.sysrst_ctrl_stress_all.310906016 Jul 10 06:22:56 PM PDT 24 Jul 10 06:27:26 PM PDT 24 318694200375 ps
T596 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.931149603 Jul 10 06:22:23 PM PDT 24 Jul 10 06:22:31 PM PDT 24 2508574538 ps
T597 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.3658467062 Jul 10 06:22:13 PM PDT 24 Jul 10 06:22:17 PM PDT 24 2457489357 ps
T598 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.1079315274 Jul 10 06:20:45 PM PDT 24 Jul 10 06:20:47 PM PDT 24 2242596284 ps
T599 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.363891358 Jul 10 06:22:24 PM PDT 24 Jul 10 06:22:33 PM PDT 24 2609021256 ps
T600 /workspace/coverage/default/44.sysrst_ctrl_alert_test.1325047655 Jul 10 06:23:57 PM PDT 24 Jul 10 06:24:05 PM PDT 24 2011224768 ps
T601 /workspace/coverage/default/47.sysrst_ctrl_smoke.2209167164 Jul 10 06:24:03 PM PDT 24 Jul 10 06:24:10 PM PDT 24 2119911277 ps
T602 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.4238385287 Jul 10 06:20:15 PM PDT 24 Jul 10 06:20:18 PM PDT 24 6989176763 ps
T368 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1377853459 Jul 10 06:24:25 PM PDT 24 Jul 10 06:25:57 PM PDT 24 142289525376 ps
T603 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.915773366 Jul 10 06:22:03 PM PDT 24 Jul 10 06:22:07 PM PDT 24 2519403530 ps
T604 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.179190475 Jul 10 06:22:58 PM PDT 24 Jul 10 06:24:44 PM PDT 24 175974134966 ps
T605 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3318295627 Jul 10 06:21:54 PM PDT 24 Jul 10 06:21:56 PM PDT 24 2558350043 ps
T606 /workspace/coverage/default/43.sysrst_ctrl_stress_all.2706251476 Jul 10 06:23:52 PM PDT 24 Jul 10 06:24:02 PM PDT 24 10778364102 ps
T108 /workspace/coverage/default/35.sysrst_ctrl_stress_all.3378260143 Jul 10 06:23:26 PM PDT 24 Jul 10 06:23:41 PM PDT 24 10918029737 ps
T607 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3609571999 Jul 10 06:21:07 PM PDT 24 Jul 10 06:21:14 PM PDT 24 2610700990 ps
T608 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.2408493885 Jul 10 06:21:23 PM PDT 24 Jul 10 06:26:27 PM PDT 24 125407423647 ps
T609 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.917399752 Jul 10 06:21:03 PM PDT 24 Jul 10 06:21:06 PM PDT 24 3291617604 ps
T610 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2155572243 Jul 10 06:22:13 PM PDT 24 Jul 10 06:22:17 PM PDT 24 2100394263 ps
T207 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.1257020187 Jul 10 06:23:46 PM PDT 24 Jul 10 06:28:34 PM PDT 24 1076338275499 ps
T611 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.1723731494 Jul 10 06:23:07 PM PDT 24 Jul 10 06:23:11 PM PDT 24 2491342211 ps
T370 /workspace/coverage/default/26.sysrst_ctrl_stress_all.3032265587 Jul 10 06:22:57 PM PDT 24 Jul 10 06:23:36 PM PDT 24 87430606964 ps
T612 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.2252389075 Jul 10 06:21:41 PM PDT 24 Jul 10 06:21:45 PM PDT 24 2532543269 ps
T613 /workspace/coverage/default/13.sysrst_ctrl_alert_test.918251045 Jul 10 06:21:59 PM PDT 24 Jul 10 06:22:06 PM PDT 24 2013566751 ps
T242 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2530480190 Jul 10 06:20:27 PM PDT 24 Jul 10 06:23:34 PM PDT 24 81036583852 ps
T614 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.94852169 Jul 10 06:23:36 PM PDT 24 Jul 10 06:23:39 PM PDT 24 2633126634 ps
T615 /workspace/coverage/default/12.sysrst_ctrl_alert_test.812251243 Jul 10 06:21:53 PM PDT 24 Jul 10 06:22:00 PM PDT 24 2012635392 ps
T616 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1500101765 Jul 10 06:21:35 PM PDT 24 Jul 10 06:22:04 PM PDT 24 11483511361 ps
T617 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1704168994 Jul 10 06:23:48 PM PDT 24 Jul 10 06:25:23 PM PDT 24 1562525073174 ps
T348 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.4103418992 Jul 10 06:24:20 PM PDT 24 Jul 10 06:24:43 PM PDT 24 77493319952 ps
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