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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.86 99.20 96.66 100.00 94.87 98.63 99.23 89.44


Total test records in report: 916
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T605 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2723310771 Jul 18 05:55:44 PM PDT 24 Jul 18 05:55:54 PM PDT 24 2619573427 ps
T606 /workspace/coverage/default/24.sysrst_ctrl_stress_all.2210543270 Jul 18 05:55:46 PM PDT 24 Jul 18 05:56:03 PM PDT 24 6741350939 ps
T607 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.2657111963 Jul 18 05:56:29 PM PDT 24 Jul 18 05:56:36 PM PDT 24 2183123473 ps
T608 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2386987855 Jul 18 05:56:55 PM PDT 24 Jul 18 05:58:13 PM PDT 24 27081911969 ps
T609 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2886859599 Jul 18 05:56:32 PM PDT 24 Jul 18 05:56:39 PM PDT 24 4596833736 ps
T610 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3073723091 Jul 18 05:56:07 PM PDT 24 Jul 18 05:56:11 PM PDT 24 2520225753 ps
T611 /workspace/coverage/default/23.sysrst_ctrl_stress_all.790859796 Jul 18 05:55:51 PM PDT 24 Jul 18 05:56:26 PM PDT 24 14038882357 ps
T158 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.3546754755 Jul 18 05:55:32 PM PDT 24 Jul 18 06:20:23 PM PDT 24 1907189079629 ps
T256 /workspace/coverage/default/26.sysrst_ctrl_stress_all.3778338271 Jul 18 05:56:12 PM PDT 24 Jul 18 05:57:51 PM PDT 24 77272611514 ps
T612 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2959939251 Jul 18 05:56:22 PM PDT 24 Jul 18 05:56:27 PM PDT 24 2517294966 ps
T613 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1773394519 Jul 18 05:56:10 PM PDT 24 Jul 18 05:56:18 PM PDT 24 2164025496 ps
T614 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.508094770 Jul 18 05:55:56 PM PDT 24 Jul 18 05:56:07 PM PDT 24 2616783492 ps
T615 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.4052077019 Jul 18 05:55:43 PM PDT 24 Jul 18 05:55:53 PM PDT 24 3713683353 ps
T616 /workspace/coverage/default/20.sysrst_ctrl_alert_test.474467991 Jul 18 05:56:31 PM PDT 24 Jul 18 05:56:39 PM PDT 24 2038167719 ps
T617 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3662168664 Jul 18 05:56:36 PM PDT 24 Jul 18 05:57:46 PM PDT 24 27082371970 ps
T618 /workspace/coverage/default/9.sysrst_ctrl_alert_test.3512292156 Jul 18 05:55:18 PM PDT 24 Jul 18 05:55:21 PM PDT 24 2035292188 ps
T133 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1810580188 Jul 18 05:56:16 PM PDT 24 Jul 18 05:56:20 PM PDT 24 6015375524 ps
T619 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.2079172785 Jul 18 05:55:09 PM PDT 24 Jul 18 05:55:18 PM PDT 24 3051828635 ps
T620 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2867386609 Jul 18 05:56:22 PM PDT 24 Jul 18 05:56:32 PM PDT 24 2611673533 ps
T621 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1653762131 Jul 18 05:56:12 PM PDT 24 Jul 18 05:56:21 PM PDT 24 3629622310 ps
T622 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1227253600 Jul 18 05:55:44 PM PDT 24 Jul 18 05:55:57 PM PDT 24 2751426821 ps
T623 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1959683889 Jul 18 05:55:46 PM PDT 24 Jul 18 05:55:55 PM PDT 24 2555754256 ps
T245 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.2671705763 Jul 18 05:55:50 PM PDT 24 Jul 18 05:58:58 PM PDT 24 144953084641 ps
T624 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.92487228 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:14 PM PDT 24 2511265137 ps
T625 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2147138745 Jul 18 05:56:41 PM PDT 24 Jul 18 05:56:51 PM PDT 24 2626234149 ps
T626 /workspace/coverage/default/47.sysrst_ctrl_alert_test.2746430995 Jul 18 05:56:44 PM PDT 24 Jul 18 05:56:55 PM PDT 24 2038673980 ps
T627 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.731983054 Jul 18 05:55:50 PM PDT 24 Jul 18 05:56:03 PM PDT 24 2618001003 ps
T345 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.39203673 Jul 18 05:56:24 PM PDT 24 Jul 18 05:57:56 PM PDT 24 180280455958 ps
T628 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3599012256 Jul 18 05:55:57 PM PDT 24 Jul 18 05:56:07 PM PDT 24 2514270864 ps
T204 /workspace/coverage/default/28.sysrst_ctrl_stress_all.2706827861 Jul 18 05:56:10 PM PDT 24 Jul 18 05:56:47 PM PDT 24 14260454964 ps
T629 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3617142653 Jul 18 05:56:29 PM PDT 24 Jul 18 05:56:39 PM PDT 24 3203869544 ps
T630 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.780333204 Jul 18 05:55:47 PM PDT 24 Jul 18 05:55:59 PM PDT 24 3666479329 ps
T631 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3952803396 Jul 18 05:56:10 PM PDT 24 Jul 18 05:56:21 PM PDT 24 3212117823 ps
T632 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3339703634 Jul 18 05:56:28 PM PDT 24 Jul 18 05:56:39 PM PDT 24 2192403035 ps
T216 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.2461723027 Jul 18 05:55:48 PM PDT 24 Jul 18 05:56:10 PM PDT 24 5032977020 ps
T257 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.1085023671 Jul 18 05:56:27 PM PDT 24 Jul 18 05:57:02 PM PDT 24 97031187633 ps
T370 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.3829815174 Jul 18 05:55:00 PM PDT 24 Jul 18 05:56:57 PM PDT 24 42922747818 ps
T633 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1111748517 Jul 18 05:56:27 PM PDT 24 Jul 18 05:56:36 PM PDT 24 2475215894 ps
T634 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1470422477 Jul 18 05:56:43 PM PDT 24 Jul 18 05:56:59 PM PDT 24 2512330406 ps
T635 /workspace/coverage/default/4.sysrst_ctrl_alert_test.325564842 Jul 18 05:55:19 PM PDT 24 Jul 18 05:55:23 PM PDT 24 2014476169 ps
T636 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.4053803793 Jul 18 05:56:51 PM PDT 24 Jul 18 05:57:34 PM PDT 24 55269445265 ps
T637 /workspace/coverage/default/35.sysrst_ctrl_stress_all.2669021615 Jul 18 05:56:10 PM PDT 24 Jul 18 05:56:30 PM PDT 24 6626330487 ps
T638 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2834276047 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:11 PM PDT 24 6485778164 ps
T639 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2874372522 Jul 18 05:56:16 PM PDT 24 Jul 18 05:56:20 PM PDT 24 2605022458 ps
T640 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3687894462 Jul 18 05:55:11 PM PDT 24 Jul 18 05:55:17 PM PDT 24 3197987727 ps
T641 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1602159572 Jul 18 05:54:56 PM PDT 24 Jul 18 05:55:03 PM PDT 24 2516492590 ps
T642 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1115455143 Jul 18 05:56:31 PM PDT 24 Jul 18 05:56:44 PM PDT 24 6950866835 ps
T643 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1364767891 Jul 18 06:06:49 PM PDT 24 Jul 18 06:07:00 PM PDT 24 3449664828 ps
T358 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1943333500 Jul 18 05:56:44 PM PDT 24 Jul 18 05:57:45 PM PDT 24 76488250535 ps
T644 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.4159916315 Jul 18 05:55:10 PM PDT 24 Jul 18 05:55:22 PM PDT 24 3578055897 ps
T645 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.809277615 Jul 18 05:56:41 PM PDT 24 Jul 18 05:56:55 PM PDT 24 26146083996 ps
T646 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2128125667 Jul 18 05:55:09 PM PDT 24 Jul 18 05:55:21 PM PDT 24 10553918589 ps
T174 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2498017892 Jul 18 05:55:57 PM PDT 24 Jul 18 05:56:51 PM PDT 24 117536790026 ps
T647 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.1099374012 Jul 18 05:56:14 PM PDT 24 Jul 18 05:56:23 PM PDT 24 3256541781 ps
T648 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2470589135 Jul 18 05:55:31 PM PDT 24 Jul 18 05:55:36 PM PDT 24 2518966783 ps
T649 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3010998835 Jul 18 05:55:18 PM PDT 24 Jul 18 05:55:23 PM PDT 24 2545419625 ps
T650 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.2835110220 Jul 18 05:56:37 PM PDT 24 Jul 18 05:56:48 PM PDT 24 2694174138 ps
T651 /workspace/coverage/default/10.sysrst_ctrl_smoke.355652174 Jul 18 05:55:44 PM PDT 24 Jul 18 05:55:50 PM PDT 24 2212656745 ps
T652 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.4008108422 Jul 18 05:56:12 PM PDT 24 Jul 18 05:56:18 PM PDT 24 2114180144 ps
T653 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.3713158207 Jul 18 05:56:26 PM PDT 24 Jul 18 05:56:36 PM PDT 24 3645754659 ps
T654 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3372724148 Jul 18 05:56:40 PM PDT 24 Jul 18 05:56:53 PM PDT 24 5846025062 ps
T655 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.4249248480 Jul 18 05:55:08 PM PDT 24 Jul 18 05:55:13 PM PDT 24 3578555466 ps
T656 /workspace/coverage/default/26.sysrst_ctrl_alert_test.2775989613 Jul 18 05:56:14 PM PDT 24 Jul 18 05:56:24 PM PDT 24 2013952795 ps
T102 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.3212568119 Jul 18 05:56:26 PM PDT 24 Jul 18 05:58:54 PM PDT 24 52050759253 ps
T657 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3815545174 Jul 18 05:56:46 PM PDT 24 Jul 18 05:56:58 PM PDT 24 2527996531 ps
T78 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.1871591675 Jul 18 05:54:51 PM PDT 24 Jul 18 05:55:48 PM PDT 24 36119706452 ps
T658 /workspace/coverage/default/43.sysrst_ctrl_alert_test.2554390619 Jul 18 05:56:38 PM PDT 24 Jul 18 05:56:51 PM PDT 24 2010750047 ps
T659 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.807644344 Jul 18 05:55:43 PM PDT 24 Jul 18 05:55:51 PM PDT 24 2240532864 ps
T660 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.4023083367 Jul 18 05:54:54 PM PDT 24 Jul 18 05:55:04 PM PDT 24 2511730080 ps
T148 /workspace/coverage/default/17.sysrst_ctrl_stress_all.3401192797 Jul 18 05:55:46 PM PDT 24 Jul 18 05:56:24 PM PDT 24 14254469441 ps
T661 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2217018583 Jul 18 05:56:09 PM PDT 24 Jul 18 05:56:13 PM PDT 24 2623699370 ps
T662 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.649095657 Jul 18 05:55:54 PM PDT 24 Jul 18 05:56:03 PM PDT 24 2471340931 ps
T663 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.348254719 Jul 18 05:56:37 PM PDT 24 Jul 18 05:56:48 PM PDT 24 3367560805 ps
T305 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1585976532 Jul 18 05:56:18 PM PDT 24 Jul 18 05:57:33 PM PDT 24 26509557436 ps
T664 /workspace/coverage/default/2.sysrst_ctrl_alert_test.1603427436 Jul 18 05:55:00 PM PDT 24 Jul 18 05:55:11 PM PDT 24 2008839973 ps
T665 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3817936194 Jul 18 05:55:52 PM PDT 24 Jul 18 05:56:01 PM PDT 24 2567377413 ps
T666 /workspace/coverage/default/13.sysrst_ctrl_alert_test.902058120 Jul 18 05:55:34 PM PDT 24 Jul 18 05:55:44 PM PDT 24 2010827938 ps
T667 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1614433631 Jul 18 05:56:37 PM PDT 24 Jul 18 05:56:47 PM PDT 24 2518453676 ps
T668 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.663128273 Jul 18 05:56:23 PM PDT 24 Jul 18 05:57:01 PM PDT 24 55226642484 ps
T669 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.119661641 Jul 18 05:55:18 PM PDT 24 Jul 18 05:55:27 PM PDT 24 2610624033 ps
T103 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.865984346 Jul 18 05:55:54 PM PDT 24 Jul 18 06:03:41 PM PDT 24 175782251172 ps
T670 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2965742672 Jul 18 05:55:53 PM PDT 24 Jul 18 05:56:02 PM PDT 24 2630332254 ps
T671 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.3452572988 Jul 18 05:55:54 PM PDT 24 Jul 18 05:56:03 PM PDT 24 3113634647 ps
T672 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.2420927195 Jul 18 05:55:43 PM PDT 24 Jul 18 05:56:02 PM PDT 24 275056393019 ps
T673 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.2449319391 Jul 18 05:56:34 PM PDT 24 Jul 18 05:56:45 PM PDT 24 2522647815 ps
T674 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1021917006 Jul 18 05:55:17 PM PDT 24 Jul 18 05:55:33 PM PDT 24 24603124101 ps
T675 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3142333624 Jul 18 05:55:48 PM PDT 24 Jul 18 05:56:08 PM PDT 24 4385311854 ps
T676 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.3464550573 Jul 18 05:56:13 PM PDT 24 Jul 18 05:56:19 PM PDT 24 2504782068 ps
T677 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1546949988 Jul 18 05:56:38 PM PDT 24 Jul 18 05:56:47 PM PDT 24 4365365272 ps
T678 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3813247474 Jul 18 05:55:18 PM PDT 24 Jul 18 05:55:22 PM PDT 24 2460077150 ps
T239 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.849052466 Jul 18 05:56:56 PM PDT 24 Jul 18 06:03:38 PM PDT 24 161903877735 ps
T679 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.1879233900 Jul 18 05:55:09 PM PDT 24 Jul 18 05:55:20 PM PDT 24 3635726511 ps
T680 /workspace/coverage/default/0.sysrst_ctrl_alert_test.1485567778 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:09 PM PDT 24 2013994162 ps
T681 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.807087534 Jul 18 05:55:54 PM PDT 24 Jul 18 05:56:13 PM PDT 24 21040276877 ps
T682 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.2084270075 Jul 18 05:55:50 PM PDT 24 Jul 18 05:57:23 PM PDT 24 65062748134 ps
T85 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.866873228 Jul 18 05:56:45 PM PDT 24 Jul 18 05:57:02 PM PDT 24 5314887569 ps
T207 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2134180977 Jul 18 05:55:46 PM PDT 24 Jul 18 05:56:01 PM PDT 24 2547789417 ps
T208 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2451001460 Jul 18 05:55:44 PM PDT 24 Jul 18 05:55:56 PM PDT 24 6035635278 ps
T209 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.228218825 Jul 18 05:56:46 PM PDT 24 Jul 18 05:57:20 PM PDT 24 47974167617 ps
T210 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1730928573 Jul 18 05:55:24 PM PDT 24 Jul 18 05:55:26 PM PDT 24 2233806085 ps
T211 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3278654220 Jul 18 05:55:30 PM PDT 24 Jul 18 05:55:42 PM PDT 24 4495536827 ps
T212 /workspace/coverage/default/13.sysrst_ctrl_stress_all.2985320156 Jul 18 05:55:25 PM PDT 24 Jul 18 05:55:34 PM PDT 24 13159449944 ps
T213 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2463161875 Jul 18 05:55:27 PM PDT 24 Jul 18 05:55:36 PM PDT 24 2448157893 ps
T214 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1525456147 Jul 18 05:55:33 PM PDT 24 Jul 18 05:55:38 PM PDT 24 2629439318 ps
T215 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.1464341494 Jul 18 05:56:24 PM PDT 24 Jul 18 05:57:05 PM PDT 24 71395003521 ps
T683 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.330168521 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:06 PM PDT 24 2557064824 ps
T684 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.21944931 Jul 18 05:56:12 PM PDT 24 Jul 18 05:56:22 PM PDT 24 2018163791 ps
T685 /workspace/coverage/default/49.sysrst_ctrl_alert_test.2938524624 Jul 18 05:56:50 PM PDT 24 Jul 18 05:57:03 PM PDT 24 2010273826 ps
T686 /workspace/coverage/default/42.sysrst_ctrl_alert_test.1253562460 Jul 18 05:56:33 PM PDT 24 Jul 18 05:56:44 PM PDT 24 2014869952 ps
T687 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.4067877308 Jul 18 05:55:57 PM PDT 24 Jul 18 05:56:06 PM PDT 24 3380347443 ps
T205 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.1142238835 Jul 18 05:55:35 PM PDT 24 Jul 18 05:55:48 PM PDT 24 3439402693 ps
T688 /workspace/coverage/default/45.sysrst_ctrl_alert_test.258549440 Jul 18 05:56:41 PM PDT 24 Jul 18 05:56:55 PM PDT 24 2011733283 ps
T689 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.15534699 Jul 18 05:55:31 PM PDT 24 Jul 18 05:55:42 PM PDT 24 6990323500 ps
T690 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1687251583 Jul 18 05:56:25 PM PDT 24 Jul 18 05:56:35 PM PDT 24 2469763821 ps
T691 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1280034349 Jul 18 05:56:46 PM PDT 24 Jul 18 05:58:06 PM PDT 24 26832870124 ps
T692 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.608241743 Jul 18 05:55:43 PM PDT 24 Jul 18 06:01:16 PM PDT 24 132459589345 ps
T693 /workspace/coverage/default/16.sysrst_ctrl_smoke.421432206 Jul 18 05:55:39 PM PDT 24 Jul 18 05:55:43 PM PDT 24 2120776791 ps
T694 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1659549416 Jul 18 05:56:12 PM PDT 24 Jul 18 05:56:24 PM PDT 24 5662976138 ps
T175 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1654235344 Jul 18 05:56:30 PM PDT 24 Jul 18 05:58:30 PM PDT 24 48206618886 ps
T695 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.744825171 Jul 18 05:56:07 PM PDT 24 Jul 18 05:56:11 PM PDT 24 2553377691 ps
T696 /workspace/coverage/default/16.sysrst_ctrl_alert_test.3175007430 Jul 18 05:55:56 PM PDT 24 Jul 18 05:56:04 PM PDT 24 2098225985 ps
T149 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.324998019 Jul 18 05:55:44 PM PDT 24 Jul 18 05:55:53 PM PDT 24 4076783334 ps
T697 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.1885111344 Jul 18 05:55:56 PM PDT 24 Jul 18 05:56:05 PM PDT 24 3197493286 ps
T346 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.3318648630 Jul 18 05:56:40 PM PDT 24 Jul 18 05:59:12 PM PDT 24 159471114911 ps
T698 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2048015558 Jul 18 05:56:26 PM PDT 24 Jul 18 05:56:40 PM PDT 24 3222979088 ps
T699 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1252345402 Jul 18 05:55:47 PM PDT 24 Jul 18 05:56:02 PM PDT 24 2611977358 ps
T104 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.3143433740 Jul 18 05:55:46 PM PDT 24 Jul 18 05:59:50 PM PDT 24 86199400058 ps
T700 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1795960853 Jul 18 05:54:58 PM PDT 24 Jul 18 06:05:10 PM PDT 24 1023766909517 ps
T378 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.3853078886 Jul 18 05:56:26 PM PDT 24 Jul 18 06:03:46 PM PDT 24 189879101302 ps
T701 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.1812276257 Jul 18 05:55:50 PM PDT 24 Jul 18 05:56:01 PM PDT 24 2536020212 ps
T351 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.4249794624 Jul 18 05:56:45 PM PDT 24 Jul 18 06:01:44 PM PDT 24 116727006190 ps
T702 /workspace/coverage/default/29.sysrst_ctrl_stress_all.2798857478 Jul 18 05:56:22 PM PDT 24 Jul 18 05:57:00 PM PDT 24 13353021382 ps
T703 /workspace/coverage/default/36.sysrst_ctrl_smoke.2966296276 Jul 18 05:56:33 PM PDT 24 Jul 18 05:56:45 PM PDT 24 2114750998 ps
T704 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1527247896 Jul 18 05:55:16 PM PDT 24 Jul 18 05:55:19 PM PDT 24 2468703435 ps
T705 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1401960556 Jul 18 05:56:43 PM PDT 24 Jul 18 05:59:23 PM PDT 24 56563217433 ps
T706 /workspace/coverage/default/7.sysrst_ctrl_smoke.1113425222 Jul 18 05:55:28 PM PDT 24 Jul 18 05:55:32 PM PDT 24 2123059536 ps
T707 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1608417658 Jul 18 05:56:27 PM PDT 24 Jul 18 05:56:38 PM PDT 24 2511536394 ps
T708 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.311200450 Jul 18 05:56:27 PM PDT 24 Jul 18 05:56:37 PM PDT 24 2252902190 ps
T709 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.267391431 Jul 18 05:56:44 PM PDT 24 Jul 18 05:56:58 PM PDT 24 2619676772 ps
T710 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.516346827 Jul 18 05:56:30 PM PDT 24 Jul 18 05:56:37 PM PDT 24 2166728726 ps
T711 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2404354626 Jul 18 05:56:39 PM PDT 24 Jul 18 05:56:49 PM PDT 24 3406739023 ps
T86 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2090432281 Jul 18 05:56:12 PM PDT 24 Jul 18 05:57:58 PM PDT 24 158659816926 ps
T185 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.2500983701 Jul 18 05:56:21 PM PDT 24 Jul 18 05:56:24 PM PDT 24 3187805627 ps
T186 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3170817701 Jul 18 05:55:50 PM PDT 24 Jul 18 05:56:05 PM PDT 24 5144766430 ps
T187 /workspace/coverage/default/49.sysrst_ctrl_stress_all.2234494162 Jul 18 05:56:48 PM PDT 24 Jul 18 05:57:01 PM PDT 24 6635473533 ps
T188 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3977503056 Jul 18 05:54:59 PM PDT 24 Jul 18 05:55:06 PM PDT 24 2674314833 ps
T189 /workspace/coverage/default/12.sysrst_ctrl_alert_test.2453176202 Jul 18 05:55:34 PM PDT 24 Jul 18 05:55:38 PM PDT 24 2114607635 ps
T190 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.3727056530 Jul 18 05:55:05 PM PDT 24 Jul 18 05:55:11 PM PDT 24 2652877577 ps
T191 /workspace/coverage/default/15.sysrst_ctrl_stress_all.2187803511 Jul 18 05:55:41 PM PDT 24 Jul 18 05:56:08 PM PDT 24 693206996172 ps
T192 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.508142203 Jul 18 05:55:37 PM PDT 24 Jul 18 05:55:41 PM PDT 24 5035266528 ps
T193 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1741249334 Jul 18 05:56:27 PM PDT 24 Jul 18 05:56:40 PM PDT 24 6649846692 ps
T712 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.746272811 Jul 18 05:56:28 PM PDT 24 Jul 18 05:56:34 PM PDT 24 2668325014 ps
T713 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.2756968525 Jul 18 05:56:22 PM PDT 24 Jul 18 05:56:26 PM PDT 24 2647476559 ps
T714 /workspace/coverage/default/22.sysrst_ctrl_smoke.3261607002 Jul 18 05:55:43 PM PDT 24 Jul 18 05:55:50 PM PDT 24 2131782805 ps
T206 /workspace/coverage/default/36.sysrst_ctrl_stress_all.510725084 Jul 18 05:56:22 PM PDT 24 Jul 18 05:57:02 PM PDT 24 14816352991 ps
T715 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3575629810 Jul 18 05:55:31 PM PDT 24 Jul 18 05:55:36 PM PDT 24 10260798531 ps
T716 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.456728921 Jul 18 05:56:00 PM PDT 24 Jul 18 05:56:07 PM PDT 24 2473830977 ps
T717 /workspace/coverage/default/31.sysrst_ctrl_smoke.758499843 Jul 18 05:56:28 PM PDT 24 Jul 18 05:56:38 PM PDT 24 2110938054 ps
T286 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.3000323007 Jul 18 05:55:00 PM PDT 24 Jul 18 05:55:59 PM PDT 24 42055477509 ps
T718 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3060492202 Jul 18 05:56:23 PM PDT 24 Jul 18 05:56:30 PM PDT 24 2521793480 ps
T719 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.1686657115 Jul 18 05:56:31 PM PDT 24 Jul 18 05:56:39 PM PDT 24 2920309209 ps
T720 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1440630216 Jul 18 05:55:36 PM PDT 24 Jul 18 05:55:41 PM PDT 24 2729610224 ps
T721 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2009481285 Jul 18 05:54:57 PM PDT 24 Jul 18 05:55:07 PM PDT 24 2067979684 ps
T722 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1212804998 Jul 18 05:56:12 PM PDT 24 Jul 18 05:56:19 PM PDT 24 2107475202 ps
T723 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.756441279 Jul 18 05:55:22 PM PDT 24 Jul 18 05:57:01 PM PDT 24 41109465690 ps
T724 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1658524146 Jul 18 05:56:31 PM PDT 24 Jul 18 05:56:39 PM PDT 24 2249037066 ps
T307 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3925596571 Jul 18 05:56:33 PM PDT 24 Jul 18 05:57:00 PM PDT 24 18437168949 ps
T725 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.409347653 Jul 18 05:54:53 PM PDT 24 Jul 18 05:54:58 PM PDT 24 2214135090 ps
T726 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.405885709 Jul 18 05:56:36 PM PDT 24 Jul 18 05:56:44 PM PDT 24 2981049988 ps
T355 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1828504442 Jul 18 05:56:31 PM PDT 24 Jul 18 06:01:40 PM PDT 24 112102579525 ps
T727 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.634937146 Jul 18 05:55:48 PM PDT 24 Jul 18 05:56:03 PM PDT 24 2474336687 ps
T728 /workspace/coverage/default/40.sysrst_ctrl_alert_test.410226662 Jul 18 05:56:35 PM PDT 24 Jul 18 05:56:43 PM PDT 24 2039142028 ps
T729 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.820944925 Jul 18 05:56:22 PM PDT 24 Jul 18 05:56:52 PM PDT 24 27845712112 ps
T730 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3921744431 Jul 18 05:56:33 PM PDT 24 Jul 18 05:56:45 PM PDT 24 2510693618 ps
T731 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.2158185541 Jul 18 05:55:41 PM PDT 24 Jul 18 05:55:49 PM PDT 24 5325126457 ps
T732 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2085340929 Jul 18 05:56:42 PM PDT 24 Jul 18 05:57:07 PM PDT 24 23098647519 ps
T733 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.4194059087 Jul 18 05:55:30 PM PDT 24 Jul 18 05:55:34 PM PDT 24 4157736816 ps
T734 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.202412710 Jul 18 05:56:08 PM PDT 24 Jul 18 05:56:11 PM PDT 24 2544849444 ps
T371 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.2475677895 Jul 18 05:56:07 PM PDT 24 Jul 18 05:56:44 PM PDT 24 54175022172 ps
T735 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3359898892 Jul 18 05:56:33 PM PDT 24 Jul 18 05:57:33 PM PDT 24 21359185624 ps
T736 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.2133795158 Jul 18 05:55:01 PM PDT 24 Jul 18 05:56:54 PM PDT 24 80796864638 ps
T737 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.4009515929 Jul 18 05:56:32 PM PDT 24 Jul 18 05:57:06 PM PDT 24 10740813549 ps
T738 /workspace/coverage/default/5.sysrst_ctrl_alert_test.2880838760 Jul 18 05:55:23 PM PDT 24 Jul 18 05:55:25 PM PDT 24 2056824928 ps
T739 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1804781249 Jul 18 05:55:18 PM PDT 24 Jul 18 05:55:23 PM PDT 24 2616429243 ps
T740 /workspace/coverage/default/30.sysrst_ctrl_stress_all.402358027 Jul 18 05:56:10 PM PDT 24 Jul 18 05:56:19 PM PDT 24 6906380392 ps
T741 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.450550744 Jul 18 05:54:56 PM PDT 24 Jul 18 05:55:04 PM PDT 24 2618143227 ps
T742 /workspace/coverage/default/42.sysrst_ctrl_smoke.4013113189 Jul 18 05:56:18 PM PDT 24 Jul 18 05:56:26 PM PDT 24 2109688226 ps
T352 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.1077778041 Jul 18 05:55:46 PM PDT 24 Jul 18 05:57:09 PM PDT 24 119135733959 ps
T743 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2022425087 Jul 18 05:56:22 PM PDT 24 Jul 18 05:57:33 PM PDT 24 98162791479 ps
T744 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1292791643 Jul 18 05:55:45 PM PDT 24 Jul 18 05:55:53 PM PDT 24 2151519451 ps
T385 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1185779628 Jul 18 05:55:49 PM PDT 24 Jul 18 05:57:52 PM PDT 24 53282358976 ps
T745 /workspace/coverage/default/33.sysrst_ctrl_alert_test.26656170 Jul 18 05:56:10 PM PDT 24 Jul 18 05:56:18 PM PDT 24 2010984129 ps
T746 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.4064805983 Jul 18 05:56:57 PM PDT 24 Jul 18 05:57:28 PM PDT 24 71018572453 ps
T747 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.1236665320 Jul 18 05:55:34 PM PDT 24 Jul 18 05:55:42 PM PDT 24 2620486854 ps
T372 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.1384567430 Jul 18 05:56:35 PM PDT 24 Jul 18 05:57:07 PM PDT 24 40626773893 ps
T748 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.3935835333 Jul 18 05:56:26 PM PDT 24 Jul 18 05:56:38 PM PDT 24 4735482097 ps
T749 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.1529862214 Jul 18 05:55:33 PM PDT 24 Jul 18 05:55:43 PM PDT 24 2443570320 ps
T750 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.3532654762 Jul 18 05:55:41 PM PDT 24 Jul 18 05:55:51 PM PDT 24 2218174080 ps
T751 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2565835951 Jul 18 05:55:29 PM PDT 24 Jul 18 05:55:37 PM PDT 24 2177153175 ps
T287 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.118113658 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:59 PM PDT 24 42038064809 ps
T752 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.1877702059 Jul 18 05:55:14 PM PDT 24 Jul 18 05:56:11 PM PDT 24 150488373307 ps
T753 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.2812091753 Jul 18 05:55:45 PM PDT 24 Jul 18 05:55:58 PM PDT 24 2229391819 ps
T754 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.218489434 Jul 18 05:56:08 PM PDT 24 Jul 18 05:56:18 PM PDT 24 3294275664 ps
T316 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.895917028 Jul 18 05:56:23 PM PDT 24 Jul 18 05:57:14 PM PDT 24 71763158809 ps
T755 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.626739218 Jul 18 05:56:23 PM PDT 24 Jul 18 05:56:32 PM PDT 24 2054532357 ps
T756 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3515505020 Jul 18 05:55:44 PM PDT 24 Jul 18 05:55:52 PM PDT 24 2625945033 ps
T757 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.2984918726 Jul 18 05:55:41 PM PDT 24 Jul 18 05:55:52 PM PDT 24 2466338605 ps
T758 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.248198704 Jul 18 05:55:17 PM PDT 24 Jul 18 05:56:37 PM PDT 24 31081319141 ps
T759 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.2437988401 Jul 18 05:56:42 PM PDT 24 Jul 18 05:57:35 PM PDT 24 127351195137 ps
T760 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.2074648127 Jul 18 05:55:54 PM PDT 24 Jul 18 05:56:07 PM PDT 24 2142875170 ps
T761 /workspace/coverage/default/2.sysrst_ctrl_smoke.588442973 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:05 PM PDT 24 2123087830 ps
T762 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1623747555 Jul 18 05:55:47 PM PDT 24 Jul 18 05:56:02 PM PDT 24 2460782789 ps
T763 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2852890166 Jul 18 05:55:40 PM PDT 24 Jul 18 05:56:57 PM PDT 24 34616096603 ps
T764 /workspace/coverage/default/20.sysrst_ctrl_stress_all.4029227392 Jul 18 05:55:45 PM PDT 24 Jul 18 05:56:02 PM PDT 24 8382998987 ps
T765 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3497584614 Jul 18 05:56:32 PM PDT 24 Jul 18 05:57:49 PM PDT 24 26831892482 ps
T766 /workspace/coverage/default/32.sysrst_ctrl_stress_all.2698672657 Jul 18 05:56:13 PM PDT 24 Jul 18 06:02:27 PM PDT 24 155584902384 ps
T767 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.1450749887 Jul 18 05:56:09 PM PDT 24 Jul 18 05:56:19 PM PDT 24 3254364331 ps
T768 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3620466063 Jul 18 05:55:37 PM PDT 24 Jul 18 05:57:37 PM PDT 24 44280416175 ps
T769 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.3248236014 Jul 18 05:56:09 PM PDT 24 Jul 18 05:56:18 PM PDT 24 2516249813 ps
T770 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2941903912 Jul 18 05:56:17 PM PDT 24 Jul 18 05:56:22 PM PDT 24 3731131446 ps
T771 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.3659839469 Jul 18 05:55:43 PM PDT 24 Jul 18 05:55:50 PM PDT 24 2710924105 ps
T772 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3378158446 Jul 18 05:56:31 PM PDT 24 Jul 18 05:56:43 PM PDT 24 2610431987 ps
T773 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.658684269 Jul 18 05:56:24 PM PDT 24 Jul 18 05:56:40 PM PDT 24 70880553255 ps
T774 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3431921729 Jul 18 05:56:43 PM PDT 24 Jul 18 05:56:59 PM PDT 24 3368054323 ps
T362 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2940635484 Jul 18 05:56:49 PM PDT 24 Jul 18 06:00:37 PM PDT 24 89286361426 ps
T775 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.2934692180 Jul 18 05:56:12 PM PDT 24 Jul 18 05:56:25 PM PDT 24 3387058138 ps
T776 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.3531207863 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:06 PM PDT 24 2562637607 ps
T777 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1832969923 Jul 18 05:55:00 PM PDT 24 Jul 18 05:56:07 PM PDT 24 24830525406 ps
T778 /workspace/coverage/default/38.sysrst_ctrl_smoke.3108052303 Jul 18 05:56:16 PM PDT 24 Jul 18 05:56:20 PM PDT 24 2206356253 ps
T779 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3968892087 Jul 18 05:55:38 PM PDT 24 Jul 18 05:55:48 PM PDT 24 3261763303 ps
T780 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.1821831039 Jul 18 05:55:27 PM PDT 24 Jul 18 05:55:31 PM PDT 24 2480534541 ps
T781 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.637071656 Jul 18 05:56:37 PM PDT 24 Jul 18 05:56:50 PM PDT 24 2752373157 ps
T782 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.1720824631 Jul 18 05:56:45 PM PDT 24 Jul 18 05:56:58 PM PDT 24 3064436270 ps
T783 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.1024637859 Jul 18 05:56:33 PM PDT 24 Jul 18 05:56:39 PM PDT 24 3181787588 ps
T784 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.953508531 Jul 18 05:56:51 PM PDT 24 Jul 18 05:58:08 PM PDT 24 55823023281 ps
T785 /workspace/coverage/default/14.sysrst_ctrl_stress_all.2411692239 Jul 18 05:55:47 PM PDT 24 Jul 18 05:56:22 PM PDT 24 13102259387 ps
T786 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.1466515963 Jul 18 05:55:53 PM PDT 24 Jul 18 05:56:02 PM PDT 24 2538945278 ps
T357 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.2911174885 Jul 18 05:56:16 PM PDT 24 Jul 18 05:59:46 PM PDT 24 84113759534 ps
T787 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3535057776 Jul 18 05:56:43 PM PDT 24 Jul 18 05:56:55 PM PDT 24 2484660989 ps
T788 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.749735385 Jul 18 05:56:27 PM PDT 24 Jul 18 05:56:39 PM PDT 24 2609322583 ps
T789 /workspace/coverage/default/23.sysrst_ctrl_alert_test.2408948516 Jul 18 05:55:48 PM PDT 24 Jul 18 05:55:57 PM PDT 24 2043607449 ps
T354 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.244183576 Jul 18 05:55:10 PM PDT 24 Jul 18 06:00:50 PM PDT 24 125907080408 ps
T87 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2834863528 Jul 18 05:56:30 PM PDT 24 Jul 18 05:56:50 PM PDT 24 106342230928 ps
T790 /workspace/coverage/default/34.sysrst_ctrl_alert_test.3835023303 Jul 18 05:56:39 PM PDT 24 Jul 18 05:56:52 PM PDT 24 2013164029 ps
T791 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3230058071 Jul 18 05:55:41 PM PDT 24 Jul 18 05:55:50 PM PDT 24 3683945052 ps
T792 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.4222499180 Jul 18 05:55:46 PM PDT 24 Jul 18 05:57:57 PM PDT 24 96507283186 ps
T793 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2391800548 Jul 18 05:55:15 PM PDT 24 Jul 18 05:55:19 PM PDT 24 2469525381 ps
T794 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.1366099650 Jul 18 05:56:24 PM PDT 24 Jul 18 05:56:30 PM PDT 24 2625994854 ps
T795 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.2714660088 Jul 18 05:56:11 PM PDT 24 Jul 18 05:56:16 PM PDT 24 2653029725 ps
T796 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.611046563 Jul 18 05:56:23 PM PDT 24 Jul 18 05:56:36 PM PDT 24 4727516262 ps
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