Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.86 99.20 96.66 100.00 94.87 98.63 99.23 89.44


Total tests in report: 916
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
43.74 43.74 59.73 59.73 44.11 44.11 83.56 83.56 2.56 2.56 64.18 64.18 49.33 49.33 2.72 2.72 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2139434057
69.17 25.43 82.03 22.30 71.51 27.40 92.69 9.13 46.79 44.23 84.03 19.85 77.26 27.94 29.85 27.13 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1393398273
82.57 13.40 95.43 13.40 89.05 17.54 96.80 4.11 64.74 17.95 95.27 11.24 93.83 16.57 42.87 13.03 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3337220323
86.19 3.62 97.24 1.81 91.94 2.88 96.80 0.00 81.41 16.67 97.01 1.74 95.95 2.12 42.97 0.10 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.3384893671
87.86 1.67 97.26 0.02 91.94 0.00 96.80 0.00 82.05 0.64 97.04 0.04 95.95 0.00 54.00 11.03 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1029160351
89.10 1.24 97.28 0.02 93.00 1.06 97.49 0.68 82.05 0.00 97.08 0.04 96.05 0.10 60.77 6.77 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.3631512482
90.25 1.14 97.50 0.22 93.20 0.20 97.49 0.00 82.69 0.64 97.12 0.04 96.34 0.29 67.38 6.62 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3230235851
91.23 0.99 98.06 0.56 93.23 0.03 97.49 0.00 88.46 5.77 97.67 0.55 96.34 0.00 67.38 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.1871591675
92.05 0.82 98.17 0.11 93.68 0.46 97.49 0.00 88.46 0.00 97.67 0.00 96.53 0.19 72.36 4.97 /workspace/coverage/default/27.sysrst_ctrl_stress_all.3907993025
92.71 0.66 98.17 0.00 93.81 0.13 97.95 0.46 88.46 0.00 97.71 0.04 96.92 0.39 75.95 3.59 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2072274053
93.14 0.43 98.30 0.13 93.88 0.08 97.95 0.00 90.38 1.92 97.86 0.15 97.21 0.29 76.41 0.46 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2090432281
93.55 0.41 98.45 0.15 94.14 0.25 97.95 0.00 90.38 0.00 97.86 0.00 97.21 0.00 78.87 2.46 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.446254745
93.85 0.30 98.53 0.07 94.26 0.13 97.95 0.00 91.67 1.28 97.93 0.07 97.50 0.29 79.13 0.26 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1358469779
94.13 0.28 98.53 0.00 94.29 0.03 99.54 1.60 91.67 0.00 97.93 0.00 97.59 0.10 79.38 0.26 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.3004121173
94.39 0.26 98.62 0.09 94.36 0.08 99.54 0.00 92.95 1.28 98.04 0.11 97.78 0.19 79.44 0.05 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3274657114
94.63 0.24 98.64 0.02 94.36 0.00 99.54 0.00 92.95 0.00 98.08 0.04 97.78 0.00 81.03 1.59 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.1407719559
94.83 0.20 98.73 0.09 94.51 0.15 99.77 0.23 92.95 0.00 98.08 0.00 97.78 0.00 81.95 0.92 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.4097322880
95.00 0.18 98.79 0.06 94.84 0.33 99.77 0.00 93.59 0.64 98.11 0.04 97.98 0.19 81.95 0.00 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3511497359
95.17 0.17 98.82 0.04 94.99 0.15 99.77 0.00 94.23 0.64 98.15 0.04 98.27 0.29 81.95 0.00 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.1889860315
95.32 0.15 98.82 0.00 94.99 0.00 99.77 0.00 94.23 0.00 98.15 0.00 98.27 0.00 83.03 1.08 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.444086596
95.48 0.15 98.82 0.00 94.99 0.00 99.77 0.00 94.23 0.00 98.15 0.00 98.27 0.00 84.10 1.08 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1039633338
95.63 0.15 98.88 0.06 95.25 0.25 99.77 0.00 94.23 0.00 98.23 0.07 98.94 0.67 84.10 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.3521227558
95.78 0.15 98.88 0.00 96.13 0.88 99.77 0.00 94.23 0.00 98.23 0.00 98.94 0.00 84.26 0.15 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3972270744
95.90 0.13 98.90 0.02 96.13 0.00 99.77 0.00 94.23 0.00 98.23 0.00 98.94 0.00 85.13 0.87 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.870526931
96.02 0.12 98.94 0.04 96.16 0.03 99.77 0.00 94.87 0.64 98.26 0.04 99.04 0.10 85.13 0.00 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2834863528
96.10 0.08 98.94 0.00 96.16 0.00 99.77 0.00 94.87 0.00 98.26 0.00 99.04 0.00 85.69 0.56 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.895917028
96.17 0.07 98.96 0.02 96.18 0.03 99.77 0.00 94.87 0.00 98.30 0.04 99.13 0.10 86.00 0.31 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.1671972540
96.24 0.07 98.96 0.00 96.18 0.00 99.77 0.00 94.87 0.00 98.30 0.00 99.13 0.00 86.46 0.46 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2025671187
96.29 0.05 99.01 0.06 96.26 0.08 100.00 0.23 94.87 0.00 98.30 0.00 99.13 0.00 86.46 0.00 /workspace/coverage/default/14.sysrst_ctrl_alert_test.4032836937
96.34 0.05 99.05 0.04 96.41 0.15 100.00 0.00 94.87 0.00 98.37 0.07 99.23 0.10 86.46 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2346382434
96.39 0.05 99.07 0.02 96.41 0.00 100.00 0.00 94.87 0.00 98.37 0.00 99.23 0.00 86.77 0.31 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3244210170
96.43 0.05 99.12 0.06 96.41 0.00 100.00 0.00 94.87 0.00 98.48 0.11 99.23 0.00 86.92 0.15 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.4185685674
96.48 0.04 99.12 0.00 96.41 0.00 100.00 0.00 94.87 0.00 98.48 0.00 99.23 0.00 87.23 0.31 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.302259650
96.51 0.03 99.12 0.00 96.41 0.00 100.00 0.00 94.87 0.00 98.48 0.00 99.23 0.00 87.44 0.21 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.2453373070
96.54 0.03 99.12 0.00 96.41 0.00 100.00 0.00 94.87 0.00 98.48 0.00 99.23 0.00 87.64 0.21 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3661923175
96.56 0.02 99.14 0.02 96.41 0.00 100.00 0.00 94.87 0.00 98.52 0.04 99.23 0.00 87.74 0.10 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.203402860
96.58 0.02 99.14 0.00 96.41 0.00 100.00 0.00 94.87 0.00 98.52 0.00 99.23 0.00 87.90 0.15 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.2395277501
96.60 0.02 99.14 0.00 96.41 0.00 100.00 0.00 94.87 0.00 98.52 0.00 99.23 0.00 88.05 0.15 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1828504442
96.63 0.02 99.14 0.00 96.56 0.15 100.00 0.00 94.87 0.00 98.52 0.00 99.23 0.00 88.05 0.00 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.4189395625
96.64 0.02 99.18 0.04 96.56 0.00 100.00 0.00 94.87 0.00 98.60 0.07 99.23 0.00 88.05 0.00 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2498017892
96.66 0.02 99.20 0.02 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.04 99.23 0.00 88.10 0.05 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1342622887
96.67 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.21 0.10 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.3829815174
96.69 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.31 0.10 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1654235344
96.70 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.41 0.10 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.244183576
96.72 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.51 0.10 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1943333500
96.73 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.62 0.10 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.994616690
96.74 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.72 0.10 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.4034095598
96.75 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.77 0.05 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2599429655
96.76 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.82 0.05 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.630590827
96.77 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.87 0.05 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.95566093
96.77 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.92 0.05 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.2548438484
96.78 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 88.97 0.05 /workspace/coverage/default/11.sysrst_ctrl_stress_all.2949749251
96.79 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.03 0.05 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.4290192197
96.80 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.08 0.05 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.608241743
96.80 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.13 0.05 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.375485898
96.81 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.18 0.05 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.86111823
96.82 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.23 0.05 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2637862651
96.83 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.28 0.05 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.897144623
96.83 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.33 0.05 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3513348075
96.84 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.38 0.05 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2532333044
96.85 0.01 99.20 0.00 96.56 0.00 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.44 0.05 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2940635484
96.85 0.01 99.20 0.00 96.59 0.03 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.44 0.00 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2465660510
96.85 0.01 99.20 0.00 96.61 0.03 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.44 0.00 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2269554533
96.86 0.01 99.20 0.00 96.64 0.03 100.00 0.00 94.87 0.00 98.63 0.00 99.23 0.00 89.44 0.00 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2494366835


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.194520083
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3658097507
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2780883234
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.4174506018
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.4159379336
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.1064835738
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.1661933404
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2442559717
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2814160210
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.4181801933
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1279459278
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.151052323
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.430343284
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2031545737
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3199807745
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3862265073
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3310853416
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3949003727
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2728432166
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.50036687
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3854766160
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3380876993
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.4287911241
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1829077427
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2422943036
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3474995903
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3956914614
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2222362466
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3668372173
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2915543994
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.112976632
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3041621563
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3537725930
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.4110607718
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2718479520
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.3980607682
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.415510424
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3616288915
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1960407459
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3462092343
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1958184602
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.610562474
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.41212396
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1254877861
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3251225910
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.4229095877
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3863163108
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.755671059
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.536402610
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.908213751
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.444672719
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.1470421344
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3434809722
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.3409437487
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.1163632880
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.3900464991
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2756863848
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2711404538
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1602595418
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.3896054151
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.417619799
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.953993686
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2081963528
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.4200368644
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3984634801
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.1795316019
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2372286615
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.1863048808
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.3501010909
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.1005627210
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.4057652106
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.1236341913
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1128438613
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.3682144384
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.2024267449
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.3811369174
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.964899628
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.1738220493
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.2890772656
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.4006339903
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.300107298
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.3853661173
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.4218325019
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.1836582806
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.351337407
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.1008337510
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.443035700
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.4112253339
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.2647012536
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.4153783364
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/workspace/coverage/default/42.sysrst_ctrl_alert_test.1253562460
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1080448705
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3212568119
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3617142653
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3935835333
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3506493051
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1351832433
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3816014942
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2874372522
/workspace/coverage/default/42.sysrst_ctrl_smoke.4013113189
/workspace/coverage/default/42.sysrst_ctrl_stress_all.318206878
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.567386996
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.824517385
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2554390619
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3305796248
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.825245969
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2886859599
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1452856568
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.267391431
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2959939251
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1658524146
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4148330909
/workspace/coverage/default/43.sysrst_ctrl_smoke.2949734089
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1775893297
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3056708387
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.417361106
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3894055435
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1264831196
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2033295971
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1855837145
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.26560520
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1867782885
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1269575528
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3339703634
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.959532008
/workspace/coverage/default/44.sysrst_ctrl_smoke.2776840727
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3479985596
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1278292421
/workspace/coverage/default/45.sysrst_ctrl_alert_test.258549440
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2404354626
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2437988401
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2048015558
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1426139291
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2147138745
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.4250762098
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1873218270
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2827411811
/workspace/coverage/default/45.sysrst_ctrl_smoke.480507050
/workspace/coverage/default/45.sysrst_ctrl_stress_all.523544324
/workspace/coverage/default/46.sysrst_ctrl_alert_test.52048013
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1530946981
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.484076629
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2343669080
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2835110220
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.4248140810
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1685243456
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1605538285
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1053489143
/workspace/coverage/default/46.sysrst_ctrl_smoke.3907249061
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1175781756
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.4009515929
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3431921729
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2746430995
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3968552692
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2118785113
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1388866198
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1867005756
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1720824631
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.746272811
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.716856892
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4046487773
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1614433631
/workspace/coverage/default/47.sysrst_ctrl_smoke.2224643365
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3375521921
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1422077790
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1068807656
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1591030177
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2565096510
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.396899006
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1546949988
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3359193533
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.53057598
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3255170959
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2435052731
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1470422477
/workspace/coverage/default/48.sysrst_ctrl_smoke.2895296478
/workspace/coverage/default/48.sysrst_ctrl_stress_all.360708393
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.1089460848
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3851933362
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2938524624
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3304109906
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2775424945
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3135997833
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.599305559
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.866873228
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2306494407
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3535057776
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3852111236
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3815545174
/workspace/coverage/default/49.sysrst_ctrl_smoke.213440032
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2234494162
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1939849991
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3630020314
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2880838760
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3011150514
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1371210757
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2436473925
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2297207919
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2079172785
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1804781249
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1057315823
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1730928573
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2674129462
/workspace/coverage/default/5.sysrst_ctrl_smoke.2741816716
/workspace/coverage/default/5.sysrst_ctrl_stress_all.983907995
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3311580206
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1970378711
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.4064805983
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.4249794624
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3786831773
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.490561257
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.228218825
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.809277615
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2371543704
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2998460242
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1401960556
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1461588221
/workspace/coverage/default/6.sysrst_ctrl_alert_test.751822570
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.4159916315
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.630856417
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3891557468
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.27086945
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.119661641
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2325680747
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2583843680
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3300974521
/workspace/coverage/default/6.sysrst_ctrl_smoke.3913367116
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1193319567
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.810713228
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2485430870
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1684829066
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.4227913720
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2706286887
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1096069409
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.555335004
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2413752735
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3186077154
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.645986794
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2249932888
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.4249248480
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.451378692
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.928495172
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2125818980
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1932377322
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1527247896
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1278267911
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1557556906
/workspace/coverage/default/7.sysrst_ctrl_smoke.1113425222
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1750515330
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2940356268
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2128125667
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1036954396
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3487037234
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2944655719
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.578137241
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.241346776
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2085340929
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.4031210277
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2095095543
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.815442016
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.4027527223
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2792390498
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3278654220
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2365164505
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1525456147
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2463161875
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2909930054
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2444122886
/workspace/coverage/default/8.sysrst_ctrl_smoke.2260649745
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2430964047
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3224484895
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.953508531
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3966974831
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1280034349
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.4053803793
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3512292156
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2981272543
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1877702059
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3620466063
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.508142203
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1717032782
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3152025079
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3506107699
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1058293574
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2470589135
/workspace/coverage/default/9.sysrst_ctrl_smoke.2381793485
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3859741430
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2451001460
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3239075345
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.4115598239
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1173477561
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.849052466
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2386987855
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.139252111
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1232897339




Total test records in report: 916
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T5 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.3490861850 Jul 18 05:55:28 PM PDT 24 Jul 18 05:55:35 PM PDT 24 2132746517 ps
T1 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3511497359 Jul 18 05:56:41 PM PDT 24 Jul 18 05:56:56 PM PDT 24 5235605562 ps
T6 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2589080884 Jul 18 05:54:57 PM PDT 24 Jul 18 05:55:10 PM PDT 24 3443293883 ps
T13 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1029752316 Jul 18 05:56:26 PM PDT 24 Jul 18 05:56:37 PM PDT 24 2446449730 ps
T14 /workspace/coverage/default/5.sysrst_ctrl_stress_all.983907995 Jul 18 05:55:14 PM PDT 24 Jul 18 05:55:48 PM PDT 24 13578660979 ps
T15 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2139434057 Jul 18 05:55:50 PM PDT 24 Jul 18 05:56:07 PM PDT 24 3317108640 ps
T16 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.2726806016 Jul 18 05:55:51 PM PDT 24 Jul 18 05:56:04 PM PDT 24 3526824323 ps
T17 /workspace/coverage/default/35.sysrst_ctrl_smoke.2500268679 Jul 18 05:56:16 PM PDT 24 Jul 18 05:56:26 PM PDT 24 2111802013 ps
T18 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.300379768 Jul 18 05:56:33 PM PDT 24 Jul 18 05:56:41 PM PDT 24 2054703453 ps
T19 /workspace/coverage/default/48.sysrst_ctrl_alert_test.1068807656 Jul 18 05:56:45 PM PDT 24 Jul 18 05:56:57 PM PDT 24 2037375906 ps
T20 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.287754811 Jul 18 05:55:09 PM PDT 24 Jul 18 05:55:20 PM PDT 24 3147116335 ps
T2 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.1512351730 Jul 18 05:56:13 PM PDT 24 Jul 18 05:56:19 PM PDT 24 3229208657 ps
T57 /workspace/coverage/default/29.sysrst_ctrl_alert_test.3232316875 Jul 18 05:56:16 PM PDT 24 Jul 18 05:56:25 PM PDT 24 2011219689 ps
T3 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3244210170 Jul 18 05:55:34 PM PDT 24 Jul 18 05:58:00 PM PDT 24 56861626895 ps
T4 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.4152060908 Jul 18 05:56:18 PM PDT 24 Jul 18 05:56:48 PM PDT 24 837301004865 ps
T7 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1393398273 Jul 18 05:55:28 PM PDT 24 Jul 18 05:59:57 PM PDT 24 1047877296030 ps
T58 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.1419794653 Jul 18 05:56:28 PM PDT 24 Jul 18 05:56:34 PM PDT 24 2139984499 ps
T48 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3304109906 Jul 18 05:56:47 PM PDT 24 Jul 18 05:57:04 PM PDT 24 3304691328 ps
T59 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3416977938 Jul 18 05:56:14 PM PDT 24 Jul 18 05:56:24 PM PDT 24 2483096597 ps
T60 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1730997044 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:06 PM PDT 24 2482397342 ps
T26 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1704783872 Jul 18 05:55:42 PM PDT 24 Jul 18 05:55:51 PM PDT 24 2516153088 ps
T61 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.50278955 Jul 18 05:55:49 PM PDT 24 Jul 18 05:55:59 PM PDT 24 2497449666 ps
T27 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.587141084 Jul 18 05:55:48 PM PDT 24 Jul 18 05:55:59 PM PDT 24 2625904343 ps
T8 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.2365164505 Jul 18 05:55:42 PM PDT 24 Jul 18 05:55:52 PM PDT 24 2938054723 ps
T9 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.810713228 Jul 18 05:55:29 PM PDT 24 Jul 18 05:56:47 PM PDT 24 28742462189 ps
T62 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2596375348 Jul 18 05:56:14 PM PDT 24 Jul 18 05:56:23 PM PDT 24 3279427454 ps
T63 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.928495172 Jul 18 05:55:08 PM PDT 24 Jul 18 05:55:11 PM PDT 24 4362868166 ps
T10 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.4097322880 Jul 18 05:57:00 PM PDT 24 Jul 18 05:59:54 PM PDT 24 64583311143 ps
T49 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1098196595 Jul 18 05:55:09 PM PDT 24 Jul 18 05:55:13 PM PDT 24 2245621953 ps
T69 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1009717270 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:06 PM PDT 24 2626479852 ps
T11 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3186077154 Jul 18 05:58:38 PM PDT 24 Jul 18 05:59:06 PM PDT 24 62986880709 ps
T31 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.741928443 Jul 18 05:56:06 PM PDT 24 Jul 18 05:56:10 PM PDT 24 5622486117 ps
T252 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.1539533959 Jul 18 05:55:45 PM PDT 24 Jul 18 05:55:59 PM PDT 24 2846327312 ps
T253 /workspace/coverage/default/48.sysrst_ctrl_smoke.2895296478 Jul 18 05:56:47 PM PDT 24 Jul 18 05:57:00 PM PDT 24 2123234031 ps
T12 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.1418841602 Jul 18 05:56:33 PM PDT 24 Jul 18 05:56:41 PM PDT 24 2792950114 ps
T151 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2217177263 Jul 18 05:54:57 PM PDT 24 Jul 18 05:55:05 PM PDT 24 2138714519 ps
T50 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.1215959896 Jul 18 05:56:10 PM PDT 24 Jul 18 05:56:15 PM PDT 24 3527432638 ps
T70 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1569962251 Jul 18 05:56:05 PM PDT 24 Jul 18 05:56:08 PM PDT 24 2644332244 ps
T67 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.23961612 Jul 18 05:55:42 PM PDT 24 Jul 18 05:55:54 PM PDT 24 2484263945 ps
T68 /workspace/coverage/default/43.sysrst_ctrl_stress_all.1775893297 Jul 18 05:56:38 PM PDT 24 Jul 18 05:57:03 PM PDT 24 6934018501 ps
T51 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.2601182442 Jul 18 05:55:00 PM PDT 24 Jul 18 05:55:08 PM PDT 24 3303930831 ps
T152 /workspace/coverage/default/18.sysrst_ctrl_smoke.1689378600 Jul 18 05:55:43 PM PDT 24 Jul 18 05:55:54 PM PDT 24 2111412389 ps
T21 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3230235851 Jul 18 05:55:34 PM PDT 24 Jul 18 05:57:04 PM PDT 24 360455372398 ps
T52 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.730797851 Jul 18 05:55:24 PM PDT 24 Jul 18 05:55:50 PM PDT 24 40589517439 ps
T105 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.72232297 Jul 18 05:54:57 PM PDT 24 Jul 18 05:55:03 PM PDT 24 2448718693 ps
T106 /workspace/coverage/default/37.sysrst_ctrl_smoke.3318751920 Jul 18 05:56:33 PM PDT 24 Jul 18 05:56:41 PM PDT 24 2123697257 ps
T107 /workspace/coverage/default/33.sysrst_ctrl_smoke.1821007017 Jul 18 05:56:14 PM PDT 24 Jul 18 05:56:20 PM PDT 24 2117889763 ps
T108 /workspace/coverage/default/19.sysrst_ctrl_smoke.587660883 Jul 18 05:55:48 PM PDT 24 Jul 18 05:56:02 PM PDT 24 2112452414 ps
T64 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.3555852742 Jul 18 05:55:47 PM PDT 24 Jul 18 05:55:59 PM PDT 24 6470905148 ps
T37 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3337220323 Jul 18 05:56:41 PM PDT 24 Jul 18 05:58:12 PM PDT 24 119963008922 ps
T71 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.4071351299 Jul 18 05:56:11 PM PDT 24 Jul 18 05:56:17 PM PDT 24 2525163576 ps
T72 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.4290192197 Jul 18 05:55:23 PM PDT 24 Jul 18 05:55:29 PM PDT 24 2518867364 ps
T300 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2252478413 Jul 18 05:56:19 PM PDT 24 Jul 18 05:56:28 PM PDT 24 2768752167 ps
T386 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1605538285 Jul 18 05:56:39 PM PDT 24 Jul 18 05:56:49 PM PDT 24 2248587918 ps
T53 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3396464141 Jul 18 05:56:17 PM PDT 24 Jul 18 05:57:14 PM PDT 24 39001479865 ps
T54 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1457104342 Jul 18 05:56:35 PM PDT 24 Jul 18 05:56:46 PM PDT 24 24647983064 ps
T232 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.2156100785 Jul 18 05:56:15 PM PDT 24 Jul 18 05:56:24 PM PDT 24 2260439383 ps
T233 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.777684100 Jul 18 05:54:59 PM PDT 24 Jul 18 05:55:12 PM PDT 24 2507951766 ps
T39 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.3359193533 Jul 18 05:56:41 PM PDT 24 Jul 18 05:56:53 PM PDT 24 3575301687 ps
T34 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.4034095598 Jul 18 05:56:45 PM PDT 24 Jul 18 05:57:38 PM PDT 24 65102670195 ps
T234 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.993473819 Jul 18 05:55:51 PM PDT 24 Jul 18 05:56:05 PM PDT 24 2455092083 ps
T92 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3683224362 Jul 18 05:56:28 PM PDT 24 Jul 18 05:56:42 PM PDT 24 3629245557 ps
T235 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.1614186165 Jul 18 05:54:51 PM PDT 24 Jul 18 05:54:55 PM PDT 24 2175826626 ps
T236 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2418460896 Jul 18 05:55:56 PM PDT 24 Jul 18 05:56:06 PM PDT 24 2457925550 ps
T237 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.4228854386 Jul 18 05:55:54 PM PDT 24 Jul 18 05:56:02 PM PDT 24 2038068188 ps
T45 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.203402860 Jul 18 05:55:03 PM PDT 24 Jul 18 05:55:56 PM PDT 24 22031177496 ps
T55 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1145940093 Jul 18 05:56:11 PM PDT 24 Jul 18 05:56:48 PM PDT 24 25582433125 ps
T109 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3501175505 Jul 18 05:54:58 PM PDT 24 Jul 18 05:56:27 PM PDT 24 131598890279 ps
T32 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.446254745 Jul 18 05:56:45 PM PDT 24 Jul 18 05:57:42 PM PDT 24 96857227266 ps
T387 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3891557468 Jul 18 05:55:07 PM PDT 24 Jul 18 05:55:11 PM PDT 24 3454887824 ps
T38 /workspace/coverage/default/12.sysrst_ctrl_stress_all.2723515075 Jul 18 05:55:44 PM PDT 24 Jul 18 05:57:54 PM PDT 24 124482431215 ps
T35 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.1388057913 Jul 18 05:56:15 PM PDT 24 Jul 18 05:57:40 PM PDT 24 115407372311 ps
T246 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.2358629302 Jul 18 05:56:31 PM PDT 24 Jul 18 05:56:44 PM PDT 24 2609332276 ps
T247 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1873218270 Jul 18 05:56:44 PM PDT 24 Jul 18 05:56:54 PM PDT 24 2351451258 ps
T248 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2827411811 Jul 18 05:56:29 PM PDT 24 Jul 18 05:56:36 PM PDT 24 2534680135 ps
T56 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3135997833 Jul 18 05:56:44 PM PDT 24 Jul 18 05:57:24 PM PDT 24 23586010606 ps
T113 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.4027527223 Jul 18 05:55:33 PM PDT 24 Jul 18 05:58:31 PM PDT 24 73975701750 ps
T93 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.4031210277 Jul 18 05:56:46 PM PDT 24 Jul 18 05:57:04 PM PDT 24 26139743320 ps
T249 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3255170959 Jul 18 05:56:41 PM PDT 24 Jul 18 05:56:56 PM PDT 24 2446538819 ps
T250 /workspace/coverage/default/14.sysrst_ctrl_alert_test.4032836937 Jul 18 05:55:38 PM PDT 24 Jul 18 05:55:42 PM PDT 24 2040462801 ps
T114 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.3415007677 Jul 18 05:54:56 PM PDT 24 Jul 18 05:56:53 PM PDT 24 40740048503 ps
T261 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2444122886 Jul 18 05:55:23 PM PDT 24 Jul 18 05:55:26 PM PDT 24 2531165672 ps
T262 /workspace/coverage/default/13.sysrst_ctrl_smoke.3728744599 Jul 18 05:55:29 PM PDT 24 Jul 18 05:55:33 PM PDT 24 2178080931 ps
T110 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.582621562 Jul 18 05:54:59 PM PDT 24 Jul 18 05:55:12 PM PDT 24 2541755479 ps
T111 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2025671187 Jul 18 05:55:31 PM PDT 24 Jul 18 05:57:24 PM PDT 24 79210248789 ps
T33 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.106143551 Jul 18 05:54:53 PM PDT 24 Jul 18 05:57:06 PM PDT 24 99714650259 ps
T65 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1039633338 Jul 18 05:55:08 PM PDT 24 Jul 18 05:55:38 PM PDT 24 63381661561 ps
T77 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.825245969 Jul 18 05:56:27 PM PDT 24 Jul 18 05:57:29 PM PDT 24 86145669701 ps
T73 /workspace/coverage/default/6.sysrst_ctrl_stress_all.1193319567 Jul 18 05:55:06 PM PDT 24 Jul 18 05:55:15 PM PDT 24 9786737120 ps
T112 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.250150680 Jul 18 05:54:57 PM PDT 24 Jul 18 05:55:09 PM PDT 24 2525453626 ps
T388 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.599305559 Jul 18 05:56:42 PM PDT 24 Jul 18 05:56:59 PM PDT 24 4743865321 ps
T389 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.1049587735 Jul 18 05:55:43 PM PDT 24 Jul 18 05:55:53 PM PDT 24 2069705227 ps
T301 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.4230546722 Jul 18 05:55:53 PM PDT 24 Jul 18 05:56:03 PM PDT 24 2487057403 ps
T390 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.1299973396 Jul 18 05:55:48 PM PDT 24 Jul 18 05:55:58 PM PDT 24 3215288519 ps
T36 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.2565096510 Jul 18 05:56:39 PM PDT 24 Jul 18 05:58:06 PM PDT 24 63926983114 ps
T391 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.971145919 Jul 18 05:56:25 PM PDT 24 Jul 18 05:56:40 PM PDT 24 3904003908 ps
T227 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.139252111 Jul 18 05:56:54 PM PDT 24 Jul 18 05:57:59 PM PDT 24 91360583832 ps
T392 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2661882795 Jul 18 05:55:00 PM PDT 24 Jul 18 05:55:12 PM PDT 24 2611223612 ps
T393 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2122449052 Jul 18 05:55:45 PM PDT 24 Jul 18 05:56:00 PM PDT 24 2608739259 ps
T394 /workspace/coverage/default/40.sysrst_ctrl_smoke.4097213574 Jul 18 05:56:26 PM PDT 24 Jul 18 05:56:33 PM PDT 24 2121716968 ps
T395 /workspace/coverage/default/29.sysrst_ctrl_smoke.1877726599 Jul 18 05:56:02 PM PDT 24 Jul 18 05:56:11 PM PDT 24 2112975289 ps
T88 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.950759697 Jul 18 05:55:41 PM PDT 24 Jul 18 05:55:47 PM PDT 24 5009108449 ps
T159 /workspace/coverage/default/48.sysrst_ctrl_stress_all.360708393 Jul 18 05:57:00 PM PDT 24 Jul 18 05:57:12 PM PDT 24 7956265865 ps
T66 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1299440080 Jul 18 05:55:43 PM PDT 24 Jul 18 05:55:55 PM PDT 24 6470889502 ps
T40 /workspace/coverage/default/44.sysrst_ctrl_stress_all.3479985596 Jul 18 05:56:30 PM PDT 24 Jul 18 05:57:10 PM PDT 24 18162288182 ps
T160 /workspace/coverage/default/9.sysrst_ctrl_smoke.2381793485 Jul 18 05:55:36 PM PDT 24 Jul 18 05:55:41 PM PDT 24 2133246938 ps
T161 /workspace/coverage/default/4.sysrst_ctrl_stress_all.1582081784 Jul 18 05:55:14 PM PDT 24 Jul 18 05:55:20 PM PDT 24 6886158898 ps
T162 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2297207919 Jul 18 05:55:15 PM PDT 24 Jul 18 05:55:19 PM PDT 24 3163010881 ps
T163 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.1407719559 Jul 18 05:55:48 PM PDT 24 Jul 18 06:03:08 PM PDT 24 170288266696 ps
T164 /workspace/coverage/default/1.sysrst_ctrl_smoke.1110939427 Jul 18 05:54:57 PM PDT 24 Jul 18 05:55:08 PM PDT 24 2111970954 ps
T150 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.1053237882 Jul 18 05:55:45 PM PDT 24 Jul 18 05:57:56 PM PDT 24 53888477654 ps
T46 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.3693179491 Jul 18 05:56:18 PM PDT 24 Jul 18 05:56:25 PM PDT 24 5771819348 ps
T74 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.407329604 Jul 18 05:55:47 PM PDT 24 Jul 18 05:55:57 PM PDT 24 2956794571 ps
T173 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2764580774 Jul 18 05:56:25 PM PDT 24 Jul 18 05:56:34 PM PDT 24 4002755607 ps
T396 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3467880611 Jul 18 05:55:54 PM PDT 24 Jul 18 05:56:03 PM PDT 24 2077416371 ps
T94 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.3907709124 Jul 18 05:55:46 PM PDT 24 Jul 18 05:56:33 PM PDT 24 28982438684 ps
T75 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.122892114 Jul 18 05:56:25 PM PDT 24 Jul 18 05:56:38 PM PDT 24 11124934486 ps
T303 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.3983581578 Jul 18 05:56:23 PM PDT 24 Jul 18 05:56:30 PM PDT 24 10683575284 ps
T76 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3868599313 Jul 18 05:56:15 PM PDT 24 Jul 18 05:56:27 PM PDT 24 3444515526 ps
T95 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2998460242 Jul 18 05:56:41 PM PDT 24 Jul 18 05:57:05 PM PDT 24 23609150120 ps
T41 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.1089460848 Jul 18 05:56:51 PM PDT 24 Jul 18 05:57:38 PM PDT 24 63103243213 ps
T42 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.3384893671 Jul 18 05:54:58 PM PDT 24 Jul 18 05:56:46 PM PDT 24 41258058877 ps
T295 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.2395277501 Jul 18 05:56:03 PM PDT 24 Jul 18 05:57:14 PM PDT 24 97590168717 ps
T397 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3555079029 Jul 18 05:55:45 PM PDT 24 Jul 18 05:55:54 PM PDT 24 2123729334 ps
T398 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.4240071350 Jul 18 05:56:29 PM PDT 24 Jul 18 05:56:42 PM PDT 24 2511814823 ps
T383 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1224113378 Jul 18 05:55:15 PM PDT 24 Jul 18 05:57:15 PM PDT 24 475571423237 ps
T333 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.3699010604 Jul 18 05:55:47 PM PDT 24 Jul 18 06:03:15 PM PDT 24 168136329183 ps
T399 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.2604860601 Jul 18 05:56:07 PM PDT 24 Jul 18 05:56:14 PM PDT 24 3098205901 ps
T353 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.3701300186 Jul 18 05:55:31 PM PDT 24 Jul 18 05:57:30 PM PDT 24 133730650277 ps
T400 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.221958399 Jul 18 05:55:48 PM PDT 24 Jul 18 05:55:58 PM PDT 24 3563132031 ps
T401 /workspace/coverage/default/7.sysrst_ctrl_stress_all.1750515330 Jul 18 05:55:23 PM PDT 24 Jul 18 05:55:36 PM PDT 24 8810715644 ps
T384 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.277361492 Jul 18 05:55:50 PM PDT 24 Jul 18 05:58:52 PM PDT 24 2500725187489 ps
T240 /workspace/coverage/default/27.sysrst_ctrl_stress_all.3907993025 Jul 18 05:56:11 PM PDT 24 Jul 18 05:56:51 PM PDT 24 146069219133 ps
T402 /workspace/coverage/default/2.sysrst_ctrl_stress_all.1175404905 Jul 18 05:55:01 PM PDT 24 Jul 18 05:55:12 PM PDT 24 6773096782 ps
T336 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.3415266102 Jul 18 05:55:59 PM PDT 24 Jul 18 05:59:21 PM PDT 24 155647068882 ps
T403 /workspace/coverage/default/16.sysrst_ctrl_stress_all.2073975017 Jul 18 05:55:40 PM PDT 24 Jul 18 05:56:05 PM PDT 24 7631684180 ps
T302 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.583915676 Jul 18 05:55:58 PM PDT 24 Jul 18 05:56:11 PM PDT 24 2470465685 ps
T90 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.961755599 Jul 18 05:56:35 PM PDT 24 Jul 18 05:56:45 PM PDT 24 37047477235 ps
T404 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2912982923 Jul 18 05:55:45 PM PDT 24 Jul 18 05:55:58 PM PDT 24 2160174931 ps
T405 /workspace/coverage/default/9.sysrst_ctrl_stress_all.3859741430 Jul 18 05:55:30 PM PDT 24 Jul 18 05:56:01 PM PDT 24 10935540646 ps
T406 /workspace/coverage/default/45.sysrst_ctrl_smoke.480507050 Jul 18 05:56:25 PM PDT 24 Jul 18 05:56:31 PM PDT 24 2158382898 ps
T229 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.994616690 Jul 18 05:56:45 PM PDT 24 Jul 18 06:02:44 PM PDT 24 139928556528 ps
T407 /workspace/coverage/default/22.sysrst_ctrl_alert_test.2789114626 Jul 18 05:55:43 PM PDT 24 Jul 18 05:55:49 PM PDT 24 2042416688 ps
T241 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.451378692 Jul 18 05:55:28 PM PDT 24 Jul 18 05:57:02 PM PDT 24 72277102474 ps
T382 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.4173606610 Jul 18 05:54:57 PM PDT 24 Jul 18 06:02:06 PM PDT 24 353403167071 ps
T115 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1173477561 Jul 18 05:56:55 PM PDT 24 Jul 18 05:57:51 PM PDT 24 76873396168 ps
T340 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.2866270738 Jul 18 05:54:58 PM PDT 24 Jul 18 05:56:12 PM PDT 24 135179170509 ps
T47 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3334057716 Jul 18 05:56:28 PM PDT 24 Jul 18 05:59:23 PM PDT 24 134435064974 ps
T408 /workspace/coverage/default/3.sysrst_ctrl_alert_test.2022078766 Jul 18 05:55:24 PM PDT 24 Jul 18 05:55:26 PM PDT 24 2179370053 ps
T409 /workspace/coverage/default/14.sysrst_ctrl_smoke.2970737141 Jul 18 05:55:25 PM PDT 24 Jul 18 05:55:29 PM PDT 24 2124412040 ps
T169 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.3729130746 Jul 18 05:55:50 PM PDT 24 Jul 18 05:56:09 PM PDT 24 4467368984 ps
T91 /workspace/coverage/default/37.sysrst_ctrl_stress_all.3241762793 Jul 18 05:56:35 PM PDT 24 Jul 18 05:56:55 PM PDT 24 11096396750 ps
T410 /workspace/coverage/default/38.sysrst_ctrl_alert_test.4039650093 Jul 18 05:56:12 PM PDT 24 Jul 18 05:56:18 PM PDT 24 2016544213 ps
T411 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.4160751869 Jul 18 05:56:23 PM PDT 24 Jul 18 05:56:29 PM PDT 24 2626764509 ps
T265 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.3004121173 Jul 18 05:54:53 PM PDT 24 Jul 18 05:55:49 PM PDT 24 42024098408 ps
T288 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.22290611 Jul 18 05:56:26 PM PDT 24 Jul 18 05:56:33 PM PDT 24 3320421305 ps
T230 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3239075345 Jul 18 05:56:51 PM PDT 24 Jul 18 05:57:19 PM PDT 24 29860070931 ps
T289 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.4176631123 Jul 18 05:55:03 PM PDT 24 Jul 18 05:55:18 PM PDT 24 3870615130 ps
T290 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1867782885 Jul 18 06:09:14 PM PDT 24 Jul 18 06:09:26 PM PDT 24 2628790967 ps
T291 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.395140150 Jul 18 05:56:27 PM PDT 24 Jul 18 05:57:31 PM PDT 24 22346328797 ps
T292 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1685243456 Jul 18 05:56:39 PM PDT 24 Jul 18 05:56:48 PM PDT 24 2467261871 ps
T293 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.2548438484 Jul 18 05:55:29 PM PDT 24 Jul 18 06:02:21 PM PDT 24 152981095706 ps
T242 /workspace/coverage/default/25.sysrst_ctrl_stress_all.453608665 Jul 18 05:56:10 PM PDT 24 Jul 18 05:57:18 PM PDT 24 93394966281 ps
T294 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3005597443 Jul 18 05:56:31 PM PDT 24 Jul 18 05:56:38 PM PDT 24 2632625589 ps
T412 /workspace/coverage/default/39.sysrst_ctrl_smoke.561812100 Jul 18 05:56:38 PM PDT 24 Jul 18 05:56:46 PM PDT 24 2145423094 ps
T89 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3548995385 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:12 PM PDT 24 8589685892 ps
T337 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.3798754851 Jul 18 05:56:37 PM PDT 24 Jul 18 05:57:44 PM PDT 24 108555436703 ps
T413 /workspace/coverage/default/6.sysrst_ctrl_smoke.3913367116 Jul 18 05:55:25 PM PDT 24 Jul 18 05:55:30 PM PDT 24 2123122977 ps
T414 /workspace/coverage/default/19.sysrst_ctrl_stress_all.1475238407 Jul 18 05:55:44 PM PDT 24 Jul 18 05:56:13 PM PDT 24 10490863432 ps
T415 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3506493051 Jul 18 05:56:25 PM PDT 24 Jul 18 05:56:31 PM PDT 24 2634978779 ps
T80 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.630590827 Jul 18 05:54:57 PM PDT 24 Jul 18 05:57:54 PM PDT 24 253660496329 ps
T254 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1705591136 Jul 18 05:55:49 PM PDT 24 Jul 18 05:56:19 PM PDT 24 104975694340 ps
T416 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.780471013 Jul 18 05:56:15 PM PDT 24 Jul 18 05:56:22 PM PDT 24 5109229797 ps
T153 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1029160351 Jul 18 05:55:34 PM PDT 24 Jul 18 05:57:23 PM PDT 24 61650829479 ps
T417 /workspace/coverage/default/34.sysrst_ctrl_stress_all.3113754526 Jul 18 05:56:38 PM PDT 24 Jul 18 05:56:47 PM PDT 24 12153915896 ps
T418 /workspace/coverage/default/44.sysrst_ctrl_alert_test.3894055435 Jul 18 05:56:45 PM PDT 24 Jul 18 05:56:57 PM PDT 24 2047629235 ps
T419 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3152025079 Jul 18 05:55:39 PM PDT 24 Jul 18 05:55:43 PM PDT 24 2629331631 ps
T228 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.375485898 Jul 18 05:56:03 PM PDT 24 Jul 18 05:56:33 PM PDT 24 21086501332 ps
T167 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2879078915 Jul 18 05:56:24 PM PDT 24 Jul 18 05:58:31 PM PDT 24 702513267091 ps
T420 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.3720881891 Jul 18 05:55:43 PM PDT 24 Jul 18 05:55:51 PM PDT 24 3012819093 ps
T350 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.870526931 Jul 18 05:56:28 PM PDT 24 Jul 18 05:58:30 PM PDT 24 44832262140 ps
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T421 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1885172766 Jul 18 05:55:49 PM PDT 24 Jul 18 05:55:59 PM PDT 24 2463619992 ps
T422 /workspace/coverage/default/41.sysrst_ctrl_alert_test.2494680173 Jul 18 05:56:29 PM PDT 24 Jul 18 05:56:40 PM PDT 24 2014089746 ps
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T424 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.2980148007 Jul 18 05:54:59 PM PDT 24 Jul 18 05:55:10 PM PDT 24 2156297602 ps
T425 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.1364106002 Jul 18 05:55:43 PM PDT 24 Jul 18 05:55:49 PM PDT 24 2622969672 ps
T184 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.26560520 Jul 18 05:56:25 PM PDT 24 Jul 18 05:56:33 PM PDT 24 2969794354 ps
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T427 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.171407095 Jul 18 05:55:15 PM PDT 24 Jul 18 05:55:26 PM PDT 24 3479680494 ps
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T429 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.746178041 Jul 18 05:55:14 PM PDT 24 Jul 18 05:55:18 PM PDT 24 3718716095 ps
T430 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.4187618938 Jul 18 05:56:34 PM PDT 24 Jul 18 05:56:42 PM PDT 24 2466249599 ps
T116 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.4185685674 Jul 18 05:56:20 PM PDT 24 Jul 18 05:57:11 PM PDT 24 1273133595669 ps
T231 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2466406227 Jul 18 05:56:11 PM PDT 24 Jul 18 05:57:19 PM PDT 24 25328791966 ps
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T178 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1388866198 Jul 18 05:56:44 PM PDT 24 Jul 18 05:57:29 PM PDT 24 25840835669 ps
T179 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.2236513718 Jul 18 05:56:10 PM PDT 24 Jul 18 05:58:06 PM PDT 24 89276187570 ps
T180 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3391106504 Jul 18 05:55:09 PM PDT 24 Jul 18 05:55:18 PM PDT 24 2516041462 ps
T181 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.2453373070 Jul 18 05:55:25 PM PDT 24 Jul 18 05:57:15 PM PDT 24 212007647044 ps
T154 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1874832089 Jul 18 05:55:49 PM PDT 24 Jul 18 05:57:18 PM PDT 24 34744222378 ps
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T183 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2413752735 Jul 18 05:56:46 PM PDT 24 Jul 18 05:57:34 PM PDT 24 53637945262 ps
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T431 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4046487773 Jul 18 05:56:29 PM PDT 24 Jul 18 05:56:40 PM PDT 24 2248342069 ps
T338 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.52019433 Jul 18 05:55:43 PM PDT 24 Jul 18 05:57:42 PM PDT 24 158721899902 ps
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T196 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.4248140810 Jul 18 05:56:42 PM PDT 24 Jul 18 05:56:58 PM PDT 24 2611851931 ps
T197 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1970378711 Jul 18 05:55:13 PM PDT 24 Jul 18 05:55:18 PM PDT 24 11664138818 ps
T198 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.630856417 Jul 18 05:55:15 PM PDT 24 Jul 18 05:58:59 PM PDT 24 94938139664 ps
T199 /workspace/coverage/default/38.sysrst_ctrl_stress_all.2432896072 Jul 18 05:56:13 PM PDT 24 Jul 18 05:56:33 PM PDT 24 629090791425 ps
T200 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.518397008 Jul 18 05:56:19 PM PDT 24 Jul 18 05:56:23 PM PDT 24 2529135185 ps
T201 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.2014962325 Jul 18 05:55:45 PM PDT 24 Jul 18 05:55:55 PM PDT 24 2632988170 ps
T202 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2306494407 Jul 18 05:56:43 PM PDT 24 Jul 18 05:56:54 PM PDT 24 2664946145 ps
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T432 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2435052731 Jul 18 05:56:51 PM PDT 24 Jul 18 05:57:00 PM PDT 24 2254474756 ps
T44 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.3146498298 Jul 18 05:56:40 PM PDT 24 Jul 18 05:56:49 PM PDT 24 2539924366 ps
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T434 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2343669080 Jul 18 05:56:41 PM PDT 24 Jul 18 05:56:54 PM PDT 24 2862660856 ps
T435 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.3626344509 Jul 18 05:56:13 PM PDT 24 Jul 18 05:56:22 PM PDT 24 2049900785 ps
T436 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1557556906 Jul 18 05:55:26 PM PDT 24 Jul 18 05:55:35 PM PDT 24 2513930842 ps
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T437 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.1721048625 Jul 18 05:55:47 PM PDT 24 Jul 18 05:55:57 PM PDT 24 3280761762 ps
T438 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3851933362 Jul 18 05:56:46 PM PDT 24 Jul 18 05:56:57 PM PDT 24 5420944746 ps
T379 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.374378564 Jul 18 05:55:51 PM PDT 24 Jul 18 05:58:02 PM PDT 24 177370434032 ps
T439 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1318001713 Jul 18 05:55:50 PM PDT 24 Jul 18 05:56:06 PM PDT 24 2511050587 ps
T440 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.2085284907 Jul 18 05:56:18 PM PDT 24 Jul 18 05:56:22 PM PDT 24 2730217639 ps
T441 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2189210890 Jul 18 05:55:04 PM PDT 24 Jul 18 05:55:10 PM PDT 24 2537759710 ps
T442 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3662042098 Jul 18 05:55:01 PM PDT 24 Jul 18 05:55:08 PM PDT 24 2238066342 ps
T360 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.897144623 Jul 18 05:56:43 PM PDT 24 Jul 18 06:00:33 PM PDT 24 82662998124 ps
T117 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.503833253 Jul 18 05:55:50 PM PDT 24 Jul 18 05:56:07 PM PDT 24 8898479256 ps
T365 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3966974831 Jul 18 05:56:45 PM PDT 24 Jul 18 06:01:21 PM PDT 24 99701364336 ps
T443 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.2221142806 Jul 18 05:56:09 PM PDT 24 Jul 18 05:56:12 PM PDT 24 2147155134 ps
T444 /workspace/coverage/default/27.sysrst_ctrl_alert_test.1769411821 Jul 18 05:56:00 PM PDT 24 Jul 18 05:56:06 PM PDT 24 2031862010 ps
T82 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.3307269861 Jul 18 05:55:59 PM PDT 24 Jul 18 05:59:26 PM PDT 24 6268427297617 ps
T118 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2521591168 Jul 18 05:56:39 PM PDT 24 Jul 18 05:57:37 PM PDT 24 78414064376 ps
T134 /workspace/coverage/default/0.sysrst_ctrl_smoke.2592126817 Jul 18 05:54:58 PM PDT 24 Jul 18 05:55:09 PM PDT 24 2112676531 ps
T135 /workspace/coverage/default/32.sysrst_ctrl_alert_test.1206085736 Jul 18 05:56:07 PM PDT 24 Jul 18 05:56:14 PM PDT 24 2009937639 ps
T136 /workspace/coverage/default/17.sysrst_ctrl_smoke.2858494547 Jul 18 05:55:42 PM PDT 24 Jul 18 05:55:50 PM PDT 24 2118395433 ps
T137 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.1426139291 Jul 18 05:56:42 PM PDT 24 Jul 18 05:56:55 PM PDT 24 5390044277 ps
T138 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.2039872712 Jul 18 05:56:02 PM PDT 24 Jul 18 05:56:13 PM PDT 24 5571180709 ps
T139 /workspace/coverage/default/11.sysrst_ctrl_smoke.3438030637 Jul 18 05:55:30 PM PDT 24 Jul 18 05:55:39 PM PDT 24 2112479029 ps
T97 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.2190950897 Jul 18 05:56:38 PM PDT 24 Jul 18 05:58:12 PM PDT 24 137001362802 ps
T140 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2485430870 Jul 18 05:55:07 PM PDT 24 Jul 18 05:55:16 PM PDT 24 5128046657 ps
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