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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.80 99.35 96.71 100.00 96.79 98.82 99.52 93.38


Total test records in report: 914
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T463 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.214071723 Jul 22 04:48:18 PM PDT 24 Jul 22 04:48:23 PM PDT 24 4033516408 ps
T254 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3088023290 Jul 22 04:47:58 PM PDT 24 Jul 22 04:48:27 PM PDT 24 40552554949 ps
T256 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3668330036 Jul 22 04:50:18 PM PDT 24 Jul 22 04:51:30 PM PDT 24 114625208281 ps
T464 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.2756736157 Jul 22 04:49:46 PM PDT 24 Jul 22 04:49:49 PM PDT 24 2535562350 ps
T465 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3352020214 Jul 22 04:48:31 PM PDT 24 Jul 22 04:48:33 PM PDT 24 7072831256 ps
T466 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.1898844062 Jul 22 04:49:03 PM PDT 24 Jul 22 04:49:10 PM PDT 24 2612692908 ps
T467 /workspace/coverage/default/31.sysrst_ctrl_smoke.2275453828 Jul 22 04:50:19 PM PDT 24 Jul 22 04:50:26 PM PDT 24 2111740783 ps
T468 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.24467824 Jul 22 04:51:28 PM PDT 24 Jul 22 04:51:31 PM PDT 24 2267669996 ps
T469 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3551743727 Jul 22 04:51:56 PM PDT 24 Jul 22 04:51:59 PM PDT 24 2041612245 ps
T470 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1961381768 Jul 22 04:48:18 PM PDT 24 Jul 22 04:48:24 PM PDT 24 2138403972 ps
T471 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.1976493348 Jul 22 04:51:16 PM PDT 24 Jul 22 04:51:18 PM PDT 24 7069745976 ps
T302 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1505676185 Jul 22 04:48:00 PM PDT 24 Jul 22 04:49:06 PM PDT 24 23171046841 ps
T472 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1820902055 Jul 22 04:51:33 PM PDT 24 Jul 22 04:51:36 PM PDT 24 2483108786 ps
T473 /workspace/coverage/default/38.sysrst_ctrl_stress_all.956712551 Jul 22 04:51:07 PM PDT 24 Jul 22 04:58:49 PM PDT 24 189734592430 ps
T232 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.202720417 Jul 22 04:51:55 PM PDT 24 Jul 22 04:51:57 PM PDT 24 2893248129 ps
T474 /workspace/coverage/default/6.sysrst_ctrl_alert_test.487810318 Jul 22 04:48:28 PM PDT 24 Jul 22 04:48:31 PM PDT 24 2026377983 ps
T386 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.134354342 Jul 22 04:51:33 PM PDT 24 Jul 22 04:51:50 PM PDT 24 47955369616 ps
T203 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.1182792099 Jul 22 04:50:38 PM PDT 24 Jul 22 04:50:43 PM PDT 24 3268838145 ps
T475 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.968166589 Jul 22 04:49:40 PM PDT 24 Jul 22 04:49:43 PM PDT 24 2629020385 ps
T476 /workspace/coverage/default/31.sysrst_ctrl_alert_test.517930430 Jul 22 04:50:48 PM PDT 24 Jul 22 04:50:50 PM PDT 24 2054722952 ps
T477 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.1870975475 Jul 22 04:48:00 PM PDT 24 Jul 22 04:48:03 PM PDT 24 2629884781 ps
T85 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.647240748 Jul 22 04:51:44 PM PDT 24 Jul 22 04:51:58 PM PDT 24 31183622711 ps
T478 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2200802873 Jul 22 04:48:10 PM PDT 24 Jul 22 04:48:16 PM PDT 24 3248359137 ps
T145 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2422806441 Jul 22 04:49:37 PM PDT 24 Jul 22 04:50:28 PM PDT 24 19412252557 ps
T479 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.1247311336 Jul 22 04:51:13 PM PDT 24 Jul 22 04:51:14 PM PDT 24 3379211491 ps
T314 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.1081972751 Jul 22 04:48:48 PM PDT 24 Jul 22 04:48:50 PM PDT 24 2558626554 ps
T480 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.1163078651 Jul 22 04:51:28 PM PDT 24 Jul 22 04:51:31 PM PDT 24 3672203876 ps
T481 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2556706247 Jul 22 04:51:44 PM PDT 24 Jul 22 04:51:52 PM PDT 24 2508764313 ps
T482 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3219437344 Jul 22 04:51:13 PM PDT 24 Jul 22 04:51:16 PM PDT 24 2227516719 ps
T146 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.1913226789 Jul 22 04:48:36 PM PDT 24 Jul 22 04:48:47 PM PDT 24 4760378863 ps
T483 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.426871355 Jul 22 04:49:43 PM PDT 24 Jul 22 04:49:48 PM PDT 24 2613563193 ps
T75 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1850003072 Jul 22 04:49:48 PM PDT 24 Jul 22 04:52:04 PM PDT 24 58789142732 ps
T484 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.3852228555 Jul 22 04:52:31 PM PDT 24 Jul 22 04:52:35 PM PDT 24 3966254197 ps
T485 /workspace/coverage/default/33.sysrst_ctrl_alert_test.111039295 Jul 22 04:50:37 PM PDT 24 Jul 22 04:50:40 PM PDT 24 2030188801 ps
T354 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2040698020 Jul 22 04:51:53 PM PDT 24 Jul 22 04:53:12 PM PDT 24 30754846779 ps
T77 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.4064266609 Jul 22 04:49:24 PM PDT 24 Jul 22 04:49:28 PM PDT 24 4793473063 ps
T226 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.3281841042 Jul 22 04:51:04 PM PDT 24 Jul 22 04:52:21 PM PDT 24 85432641263 ps
T227 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.402910574 Jul 22 04:51:50 PM PDT 24 Jul 22 04:51:53 PM PDT 24 2468287079 ps
T228 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.265477462 Jul 22 04:52:10 PM PDT 24 Jul 22 04:54:54 PM PDT 24 60944848718 ps
T86 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.2128983149 Jul 22 04:48:41 PM PDT 24 Jul 22 04:51:28 PM PDT 24 106961872148 ps
T178 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.1703355638 Jul 22 04:50:02 PM PDT 24 Jul 22 04:50:14 PM PDT 24 3989998838 ps
T229 /workspace/coverage/default/1.sysrst_ctrl_smoke.2024902306 Jul 22 04:47:50 PM PDT 24 Jul 22 04:47:57 PM PDT 24 2110871635 ps
T230 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.325123463 Jul 22 04:49:39 PM PDT 24 Jul 22 04:51:15 PM PDT 24 148591490638 ps
T231 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1258858836 Jul 22 04:49:53 PM PDT 24 Jul 22 04:49:56 PM PDT 24 2466762620 ps
T149 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2642765556 Jul 22 04:48:12 PM PDT 24 Jul 22 04:48:39 PM PDT 24 41502032293 ps
T486 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.566584906 Jul 22 04:50:19 PM PDT 24 Jul 22 04:50:29 PM PDT 24 3425550216 ps
T487 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2753110886 Jul 22 04:49:48 PM PDT 24 Jul 22 04:49:50 PM PDT 24 2866810732 ps
T488 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.2176844622 Jul 22 04:50:19 PM PDT 24 Jul 22 04:50:23 PM PDT 24 2196968059 ps
T131 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1776735963 Jul 22 04:49:25 PM PDT 24 Jul 22 04:49:28 PM PDT 24 5924031769 ps
T489 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.2691394805 Jul 22 04:50:47 PM PDT 24 Jul 22 04:50:50 PM PDT 24 2637166972 ps
T490 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1758474689 Jul 22 04:49:54 PM PDT 24 Jul 22 04:50:00 PM PDT 24 2050560025 ps
T132 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2372258185 Jul 22 04:48:50 PM PDT 24 Jul 22 04:50:35 PM PDT 24 328538300151 ps
T491 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.3340813323 Jul 22 04:48:51 PM PDT 24 Jul 22 04:49:01 PM PDT 24 3288831436 ps
T87 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3090013883 Jul 22 04:50:01 PM PDT 24 Jul 22 04:50:04 PM PDT 24 3407303859 ps
T355 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3715250098 Jul 22 04:52:10 PM PDT 24 Jul 22 04:52:50 PM PDT 24 83121266001 ps
T492 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1581612450 Jul 22 04:54:59 PM PDT 24 Jul 22 04:55:06 PM PDT 24 4720748864 ps
T493 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.1144144743 Jul 22 04:50:30 PM PDT 24 Jul 22 04:50:35 PM PDT 24 2087662940 ps
T494 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.388815647 Jul 22 04:48:59 PM PDT 24 Jul 22 04:49:06 PM PDT 24 3396277868 ps
T495 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.46585056 Jul 22 04:53:07 PM PDT 24 Jul 22 04:53:11 PM PDT 24 5409848183 ps
T140 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.3251869827 Jul 22 04:48:30 PM PDT 24 Jul 22 04:48:40 PM PDT 24 4314214451 ps
T496 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1859897692 Jul 22 04:49:37 PM PDT 24 Jul 22 04:49:51 PM PDT 24 4951949263 ps
T153 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.526255714 Jul 22 04:49:28 PM PDT 24 Jul 22 04:55:34 PM PDT 24 1095317560300 ps
T497 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2972046076 Jul 22 04:48:38 PM PDT 24 Jul 22 04:48:46 PM PDT 24 2511578634 ps
T359 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.888200151 Jul 22 04:48:38 PM PDT 24 Jul 22 04:53:12 PM PDT 24 105389360810 ps
T498 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1255769105 Jul 22 04:49:46 PM PDT 24 Jul 22 04:49:49 PM PDT 24 2529440096 ps
T147 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.1836073422 Jul 22 04:49:15 PM PDT 24 Jul 22 04:49:18 PM PDT 24 3417852468 ps
T499 /workspace/coverage/default/25.sysrst_ctrl_smoke.2446439118 Jul 22 04:49:53 PM PDT 24 Jul 22 04:49:55 PM PDT 24 2251026496 ps
T500 /workspace/coverage/default/29.sysrst_ctrl_smoke.2420662474 Jul 22 04:50:11 PM PDT 24 Jul 22 04:50:13 PM PDT 24 2143775949 ps
T268 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.2752261223 Jul 22 04:49:44 PM PDT 24 Jul 22 04:51:15 PM PDT 24 148744130249 ps
T372 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1617173261 Jul 22 04:54:43 PM PDT 24 Jul 22 04:56:37 PM PDT 24 45310973835 ps
T501 /workspace/coverage/default/11.sysrst_ctrl_smoke.1289180482 Jul 22 04:48:49 PM PDT 24 Jul 22 04:48:54 PM PDT 24 2113190241 ps
T502 /workspace/coverage/default/46.sysrst_ctrl_alert_test.1445789641 Jul 22 04:51:44 PM PDT 24 Jul 22 04:51:50 PM PDT 24 2015356754 ps
T503 /workspace/coverage/default/7.sysrst_ctrl_alert_test.3014908188 Jul 22 04:48:40 PM PDT 24 Jul 22 04:48:47 PM PDT 24 2009772116 ps
T88 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.3626660891 Jul 22 04:51:54 PM PDT 24 Jul 22 04:52:31 PM PDT 24 57886729165 ps
T504 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.3583394977 Jul 22 04:49:24 PM PDT 24 Jul 22 04:49:32 PM PDT 24 2510488165 ps
T505 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3918864484 Jul 22 04:49:04 PM PDT 24 Jul 22 04:49:07 PM PDT 24 2499970213 ps
T506 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.2104727469 Jul 22 04:49:47 PM PDT 24 Jul 22 04:49:50 PM PDT 24 2526749403 ps
T141 /workspace/coverage/default/28.sysrst_ctrl_stress_all.2037776940 Jul 22 04:50:12 PM PDT 24 Jul 22 04:50:32 PM PDT 24 9965301658 ps
T507 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2323148843 Jul 22 04:50:58 PM PDT 24 Jul 22 04:51:02 PM PDT 24 2103432985 ps
T508 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.1973066170 Jul 22 04:49:36 PM PDT 24 Jul 22 04:49:44 PM PDT 24 2445929500 ps
T509 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.992160403 Jul 22 04:51:54 PM PDT 24 Jul 22 04:51:55 PM PDT 24 2775167388 ps
T148 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.1207527477 Jul 22 04:50:20 PM PDT 24 Jul 22 04:50:30 PM PDT 24 5394358443 ps
T510 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.2853858709 Jul 22 04:48:46 PM PDT 24 Jul 22 04:48:51 PM PDT 24 2455902851 ps
T511 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.1823094152 Jul 22 04:48:10 PM PDT 24 Jul 22 04:49:58 PM PDT 24 161212109031 ps
T281 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.2717196388 Jul 22 04:48:00 PM PDT 24 Jul 22 04:48:56 PM PDT 24 22013373549 ps
T512 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.3837215293 Jul 22 04:50:13 PM PDT 24 Jul 22 04:50:16 PM PDT 24 2976303432 ps
T513 /workspace/coverage/default/41.sysrst_ctrl_smoke.3399296913 Jul 22 04:51:15 PM PDT 24 Jul 22 04:51:21 PM PDT 24 2109597376 ps
T514 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.4027604444 Jul 22 04:49:36 PM PDT 24 Jul 22 04:49:39 PM PDT 24 2968464357 ps
T515 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1710371535 Jul 22 04:54:59 PM PDT 24 Jul 22 04:56:01 PM PDT 24 51419893516 ps
T516 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.3569288482 Jul 22 04:47:49 PM PDT 24 Jul 22 04:47:50 PM PDT 24 4515556220 ps
T517 /workspace/coverage/default/48.sysrst_ctrl_alert_test.3048104669 Jul 22 04:52:02 PM PDT 24 Jul 22 04:52:05 PM PDT 24 2039694570 ps
T189 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.41216448 Jul 22 04:49:36 PM PDT 24 Jul 22 04:49:39 PM PDT 24 5543835953 ps
T204 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.2502955265 Jul 22 04:51:16 PM PDT 24 Jul 22 04:51:18 PM PDT 24 2557726143 ps
T205 /workspace/coverage/default/15.sysrst_ctrl_alert_test.1746169595 Jul 22 04:49:12 PM PDT 24 Jul 22 04:49:18 PM PDT 24 2010732731 ps
T167 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.412196844 Jul 22 04:50:19 PM PDT 24 Jul 22 04:52:23 PM PDT 24 51066885395 ps
T206 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.3599942982 Jul 22 04:50:20 PM PDT 24 Jul 22 04:50:23 PM PDT 24 4892157485 ps
T207 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.1768398942 Jul 22 04:49:52 PM PDT 24 Jul 22 04:50:00 PM PDT 24 2610994294 ps
T208 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.644292246 Jul 22 04:51:28 PM PDT 24 Jul 22 04:51:35 PM PDT 24 4963204700 ps
T209 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.402848368 Jul 22 04:50:19 PM PDT 24 Jul 22 04:50:56 PM PDT 24 27908592607 ps
T210 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3131191274 Jul 22 04:50:18 PM PDT 24 Jul 22 05:04:35 PM PDT 24 645765538897 ps
T211 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3705320961 Jul 22 04:48:37 PM PDT 24 Jul 22 04:48:38 PM PDT 24 2349440295 ps
T518 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1729710369 Jul 22 04:49:54 PM PDT 24 Jul 22 04:50:01 PM PDT 24 2611570678 ps
T519 /workspace/coverage/default/18.sysrst_ctrl_smoke.4105992337 Jul 22 04:49:25 PM PDT 24 Jul 22 04:49:28 PM PDT 24 2128946157 ps
T125 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.3849301350 Jul 22 04:49:39 PM PDT 24 Jul 22 04:49:41 PM PDT 24 6620836529 ps
T384 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1696854593 Jul 22 04:51:16 PM PDT 24 Jul 22 05:02:10 PM PDT 24 252837884527 ps
T520 /workspace/coverage/default/26.sysrst_ctrl_stress_all.2923029089 Jul 22 04:50:00 PM PDT 24 Jul 22 04:52:32 PM PDT 24 60167806777 ps
T521 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.699081640 Jul 22 04:50:58 PM PDT 24 Jul 22 04:51:01 PM PDT 24 2477442819 ps
T522 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.956645751 Jul 22 04:50:58 PM PDT 24 Jul 22 04:51:05 PM PDT 24 2479608063 ps
T523 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.110808434 Jul 22 04:48:01 PM PDT 24 Jul 22 04:48:04 PM PDT 24 2479854315 ps
T524 /workspace/coverage/default/2.sysrst_ctrl_stress_all.128835268 Jul 22 04:48:00 PM PDT 24 Jul 22 04:48:28 PM PDT 24 12419632364 ps
T525 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2702291374 Jul 22 04:48:57 PM PDT 24 Jul 22 04:51:42 PM PDT 24 74764712858 ps
T526 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3864568769 Jul 22 04:48:21 PM PDT 24 Jul 22 04:48:23 PM PDT 24 2109050665 ps
T89 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.3623190567 Jul 22 04:50:00 PM PDT 24 Jul 22 04:50:22 PM PDT 24 30105566760 ps
T156 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.627068725 Jul 22 04:49:03 PM PDT 24 Jul 22 04:49:06 PM PDT 24 3478508463 ps
T527 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.352293906 Jul 22 04:51:13 PM PDT 24 Jul 22 04:51:20 PM PDT 24 2512352370 ps
T528 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1267797640 Jul 22 04:51:21 PM PDT 24 Jul 22 04:51:27 PM PDT 24 2510791023 ps
T529 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2232213009 Jul 22 04:50:20 PM PDT 24 Jul 22 04:50:28 PM PDT 24 2510374132 ps
T530 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1112308473 Jul 22 04:50:29 PM PDT 24 Jul 22 04:51:33 PM PDT 24 24973730639 ps
T531 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.879489487 Jul 22 04:49:44 PM PDT 24 Jul 22 04:49:46 PM PDT 24 2113227032 ps
T532 /workspace/coverage/default/22.sysrst_ctrl_alert_test.3895935144 Jul 22 04:49:44 PM PDT 24 Jul 22 04:49:50 PM PDT 24 2011821509 ps
T388 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3474922082 Jul 22 04:51:23 PM PDT 24 Jul 22 04:53:08 PM PDT 24 39986386087 ps
T533 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2117852691 Jul 22 04:50:15 PM PDT 24 Jul 22 04:51:23 PM PDT 24 25079253298 ps
T534 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.4223575066 Jul 22 04:50:12 PM PDT 24 Jul 22 04:50:17 PM PDT 24 7526553818 ps
T535 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.38032370 Jul 22 04:48:12 PM PDT 24 Jul 22 04:48:14 PM PDT 24 2488155878 ps
T126 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.90547811 Jul 22 04:50:37 PM PDT 24 Jul 22 04:53:12 PM PDT 24 67479689706 ps
T536 /workspace/coverage/default/45.sysrst_ctrl_alert_test.397690624 Jul 22 04:51:47 PM PDT 24 Jul 22 04:51:53 PM PDT 24 2009608675 ps
T537 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2649938005 Jul 22 04:52:02 PM PDT 24 Jul 22 04:52:03 PM PDT 24 3228699086 ps
T538 /workspace/coverage/default/41.sysrst_ctrl_alert_test.279591769 Jul 22 04:53:08 PM PDT 24 Jul 22 04:53:09 PM PDT 24 2089055697 ps
T539 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.388570331 Jul 22 04:50:45 PM PDT 24 Jul 22 04:50:49 PM PDT 24 2588306073 ps
T540 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.346658060 Jul 22 04:48:37 PM PDT 24 Jul 22 04:48:45 PM PDT 24 2610829140 ps
T541 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.551634724 Jul 22 04:50:25 PM PDT 24 Jul 22 04:50:28 PM PDT 24 7468712571 ps
T542 /workspace/coverage/default/21.sysrst_ctrl_alert_test.4196537064 Jul 22 04:49:36 PM PDT 24 Jul 22 04:49:43 PM PDT 24 2014495313 ps
T543 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.1445740295 Jul 22 04:49:14 PM PDT 24 Jul 22 05:01:34 PM PDT 24 303557563213 ps
T544 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.3140302189 Jul 22 04:50:27 PM PDT 24 Jul 22 04:50:37 PM PDT 24 3101733727 ps
T78 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.4064325655 Jul 22 04:50:28 PM PDT 24 Jul 22 04:50:31 PM PDT 24 4546353263 ps
T234 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1998189491 Jul 22 04:48:00 PM PDT 24 Jul 22 04:48:04 PM PDT 24 4488815577 ps
T235 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.4240344063 Jul 22 04:50:16 PM PDT 24 Jul 22 04:50:20 PM PDT 24 3768195031 ps
T236 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.4129305816 Jul 22 04:50:20 PM PDT 24 Jul 22 04:50:24 PM PDT 24 2526257534 ps
T237 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2711601782 Jul 22 04:48:28 PM PDT 24 Jul 22 04:49:30 PM PDT 24 6105044832100 ps
T238 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3552634850 Jul 22 04:49:02 PM PDT 24 Jul 22 04:53:15 PM PDT 24 99441364262 ps
T239 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.4263917119 Jul 22 04:50:18 PM PDT 24 Jul 22 04:50:21 PM PDT 24 2526052282 ps
T240 /workspace/coverage/default/33.sysrst_ctrl_stress_all.567630417 Jul 22 04:50:37 PM PDT 24 Jul 22 04:50:44 PM PDT 24 9917772939 ps
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T548 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.120004207 Jul 22 04:49:05 PM PDT 24 Jul 22 04:49:08 PM PDT 24 2637333191 ps
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T553 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2538849067 Jul 22 04:47:52 PM PDT 24 Jul 22 04:47:59 PM PDT 24 2242378474 ps
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T317 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1301700683 Jul 22 04:48:48 PM PDT 24 Jul 22 04:49:33 PM PDT 24 35963958752 ps
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T349 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3856580555 Jul 22 04:52:09 PM PDT 24 Jul 22 04:53:25 PM PDT 24 113667265990 ps
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T562 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.4074325216 Jul 22 04:51:20 PM PDT 24 Jul 22 04:51:28 PM PDT 24 2614261184 ps
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T564 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.4266223261 Jul 22 04:52:39 PM PDT 24 Jul 22 04:52:47 PM PDT 24 5168588048 ps
T243 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2130377316 Jul 22 04:51:57 PM PDT 24 Jul 22 04:57:20 PM PDT 24 132412484275 ps
T565 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1196577365 Jul 22 04:50:20 PM PDT 24 Jul 22 04:50:25 PM PDT 24 3776457329 ps
T566 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2107875497 Jul 22 04:52:06 PM PDT 24 Jul 22 04:52:09 PM PDT 24 2535647331 ps
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T318 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4114861099 Jul 22 04:51:45 PM PDT 24 Jul 22 04:52:37 PM PDT 24 85289865746 ps
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T569 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.391446424 Jul 22 04:48:28 PM PDT 24 Jul 22 04:48:33 PM PDT 24 2468276680 ps
T273 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.3086262326 Jul 22 04:49:38 PM PDT 24 Jul 22 04:57:15 PM PDT 24 186753094583 ps
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T195 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2196484981 Jul 22 04:48:01 PM PDT 24 Jul 22 04:48:08 PM PDT 24 4208309281 ps
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T197 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1801592132 Jul 22 04:48:47 PM PDT 24 Jul 22 04:48:54 PM PDT 24 2025105735 ps
T198 /workspace/coverage/default/43.sysrst_ctrl_smoke.656265470 Jul 22 04:51:25 PM PDT 24 Jul 22 04:51:31 PM PDT 24 2112005462 ps
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T200 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.4001090448 Jul 22 04:48:55 PM PDT 24 Jul 22 04:48:58 PM PDT 24 4938328951 ps
T201 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3485790738 Jul 22 04:50:02 PM PDT 24 Jul 22 04:50:04 PM PDT 24 2137803933 ps
T202 /workspace/coverage/default/10.sysrst_ctrl_smoke.3290204255 Jul 22 04:50:09 PM PDT 24 Jul 22 04:50:13 PM PDT 24 2118794748 ps
T362 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.292216468 Jul 22 04:52:08 PM PDT 24 Jul 22 04:56:26 PM PDT 24 117824341558 ps
T570 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3725086133 Jul 22 04:48:38 PM PDT 24 Jul 22 04:48:41 PM PDT 24 2538756457 ps
T358 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.4052496442 Jul 22 04:52:22 PM PDT 24 Jul 22 04:57:49 PM PDT 24 125732973595 ps
T361 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2524206167 Jul 22 04:52:20 PM PDT 24 Jul 22 04:54:16 PM PDT 24 94703967091 ps
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T389 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.4243351170 Jul 22 04:48:37 PM PDT 24 Jul 22 04:55:11 PM PDT 24 1836346639203 ps
T571 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.2999703075 Jul 22 04:50:09 PM PDT 24 Jul 22 04:50:12 PM PDT 24 2521860433 ps
T351 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3364837340 Jul 22 04:53:53 PM PDT 24 Jul 22 04:56:20 PM PDT 24 69864718629 ps
T572 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1075707891 Jul 22 04:49:44 PM PDT 24 Jul 22 04:50:44 PM PDT 24 51643931525 ps
T573 /workspace/coverage/default/14.sysrst_ctrl_smoke.264629385 Jul 22 04:49:03 PM PDT 24 Jul 22 04:49:09 PM PDT 24 2111994605 ps
T574 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3154469855 Jul 22 04:49:34 PM PDT 24 Jul 22 04:49:37 PM PDT 24 11943751194 ps
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T369 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.1361913845 Jul 22 04:49:14 PM PDT 24 Jul 22 04:52:19 PM PDT 24 66903246071 ps
T576 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.1399560585 Jul 22 04:49:36 PM PDT 24 Jul 22 04:49:44 PM PDT 24 2609270899 ps
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T578 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.2567908163 Jul 22 04:50:14 PM PDT 24 Jul 22 04:50:18 PM PDT 24 3030467180 ps
T579 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2850289627 Jul 22 04:50:38 PM PDT 24 Jul 22 04:50:41 PM PDT 24 2916568673 ps
T580 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1861922140 Jul 22 04:48:22 PM PDT 24 Jul 22 04:48:25 PM PDT 24 2476725395 ps
T128 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.711742704 Jul 22 04:49:13 PM PDT 24 Jul 22 04:49:52 PM PDT 24 31528735965 ps
T193 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.1106673661 Jul 22 04:47:50 PM PDT 24 Jul 22 04:47:53 PM PDT 24 2791619004 ps
T581 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.3413655612 Jul 22 04:47:51 PM PDT 24 Jul 22 04:49:27 PM PDT 24 144569280393 ps
T582 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2048364924 Jul 22 04:49:39 PM PDT 24 Jul 22 04:49:42 PM PDT 24 2534220684 ps
T583 /workspace/coverage/default/5.sysrst_ctrl_stress_all.3743914632 Jul 22 04:48:27 PM PDT 24 Jul 22 04:48:35 PM PDT 24 1005261632003 ps
T584 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.1643277587 Jul 22 04:50:56 PM PDT 24 Jul 22 04:50:59 PM PDT 24 2526897662 ps
T192 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.474751916 Jul 22 04:51:06 PM PDT 24 Jul 22 04:51:09 PM PDT 24 3506334606 ps
T585 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.1760104914 Jul 22 04:51:17 PM PDT 24 Jul 22 04:51:34 PM PDT 24 22602954753 ps
T586 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3442177898 Jul 22 04:53:18 PM PDT 24 Jul 22 04:53:21 PM PDT 24 4134876357 ps
T587 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2280175936 Jul 22 04:51:16 PM PDT 24 Jul 22 04:51:19 PM PDT 24 9432351782 ps
T588 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2597607194 Jul 22 04:51:16 PM PDT 24 Jul 22 04:51:21 PM PDT 24 2513056717 ps
T356 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3759584272 Jul 22 04:52:09 PM PDT 24 Jul 22 04:53:38 PM PDT 24 66940183538 ps
T589 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1788406643 Jul 22 04:49:35 PM PDT 24 Jul 22 04:49:37 PM PDT 24 2529960944 ps
T590 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.1691814335 Jul 22 04:50:18 PM PDT 24 Jul 22 04:50:22 PM PDT 24 1039225788501 ps
T591 /workspace/coverage/default/39.sysrst_ctrl_alert_test.370958727 Jul 22 04:53:11 PM PDT 24 Jul 22 04:53:18 PM PDT 24 2015796046 ps
T592 /workspace/coverage/default/38.sysrst_ctrl_alert_test.1795048317 Jul 22 04:53:21 PM PDT 24 Jul 22 04:53:23 PM PDT 24 2034290579 ps
T593 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2292949097 Jul 22 04:48:38 PM PDT 24 Jul 22 04:48:43 PM PDT 24 2619913972 ps
T346 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.961157344 Jul 22 04:51:57 PM PDT 24 Jul 22 04:54:47 PM PDT 24 79756412962 ps
T594 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2027530705 Jul 22 04:49:18 PM PDT 24 Jul 22 04:49:21 PM PDT 24 2508178587 ps
T595 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.518745488 Jul 22 04:48:37 PM PDT 24 Jul 22 04:48:47 PM PDT 24 3441722211 ps
T596 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2877022561 Jul 22 04:51:35 PM PDT 24 Jul 22 04:51:37 PM PDT 24 2555380785 ps
T597 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1098149017 Jul 22 04:51:16 PM PDT 24 Jul 22 04:51:18 PM PDT 24 3631329462 ps
T135 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.889791519 Jul 22 04:49:52 PM PDT 24 Jul 22 04:50:02 PM PDT 24 181719033902 ps
T598 /workspace/coverage/default/11.sysrst_ctrl_alert_test.1660291937 Jul 22 04:49:36 PM PDT 24 Jul 22 04:49:38 PM PDT 24 2028978416 ps
T599 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.3124122625 Jul 22 04:50:31 PM PDT 24 Jul 22 04:50:34 PM PDT 24 3396770230 ps
T600 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.1571513705 Jul 22 04:49:14 PM PDT 24 Jul 22 04:49:17 PM PDT 24 2538069857 ps
T601 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.365119436 Jul 22 04:49:37 PM PDT 24 Jul 22 04:50:57 PM PDT 24 63105585113 ps
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