Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.70	99.29	96.38	100.00	96.15	98.74	99.42	93.92

Total tests in report: 920

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
62.89	62.89	77.65	77.65	65.29	65.29	84.47	84.47	39.74	39.74	79.89	79.89	69.17	69.17	24.00	24.00	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1803115092
80.82	17.93	94.33	16.68	87.01	21.71	96.35	11.87	80.13	40.38	94.53	14.64	88.73	19.56	24.65	0.65	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.123390771
86.11	5.29	96.38	2.05	90.09	3.08	96.80	0.46	80.13	0.00	96.23	1.70	89.79	1.06	53.34	28.69	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3909791141
88.65	2.55	97.54	1.16	91.58	1.49	97.26	0.46	86.54	6.41	97.26	1.04	95.66	5.88	54.74	1.40	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1192212716
90.28	1.63	97.80	0.26	92.04	0.46	97.49	0.23	87.18	0.64	97.30	0.04	95.86	0.19	64.32	9.58	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.713648178
91.51	1.23	97.82	0.02	93.05	1.01	98.17	0.68	87.18	0.00	97.34	0.04	95.86	0.00	71.15	6.84	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.3133364701
92.55	1.04	98.12	0.30	93.28	0.23	98.17	0.00	89.74	2.56	97.63	0.30	96.72	0.87	74.17	3.01	/workspace/coverage/default/20.sysrst_ctrl_stress_all.17906455
93.10	0.55	98.32	0.21	93.76	0.48	98.17	0.00	89.74	0.00	97.63	0.00	97.11	0.39	76.96	2.80	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2862415743
93.62	0.52	98.38	0.06	93.81	0.05	98.17	0.00	90.38	0.64	97.71	0.07	97.21	0.10	79.71	2.74	/workspace/coverage/default/19.sysrst_ctrl_stress_all.4272989056
94.15	0.52	98.58	0.21	93.96	0.15	98.17	0.00	92.95	2.56	97.97	0.26	97.69	0.48	79.71	0.00	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.434462300
94.51	0.36	98.64	0.06	94.06	0.10	98.17	0.00	92.95	0.00	97.97	0.00	97.69	0.00	82.08	2.37	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.3133505448
94.82	0.31	98.73	0.09	94.19	0.13	98.17	0.00	93.59	0.64	98.00	0.04	97.88	0.19	83.15	1.08	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2191629073
95.10	0.28	98.73	0.00	94.21	0.03	99.77	1.60	93.59	0.00	98.00	0.00	97.98	0.10	83.42	0.27	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.1432114790
95.37	0.27	98.73	0.00	94.99	0.78	99.77	0.00	93.59	0.00	98.00	0.00	98.17	0.19	84.34	0.91	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.301427132
95.63	0.26	98.82	0.09	95.05	0.05	99.77	0.00	94.87	1.28	98.11	0.11	98.36	0.19	84.45	0.11	/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.3968967593
95.88	0.24	98.86	0.04	95.05	0.00	99.77	0.00	94.87	0.00	98.11	0.00	98.36	0.00	86.11	1.67	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.968868010
96.06	0.19	98.90	0.04	95.05	0.00	99.77	0.00	94.87	0.00	98.19	0.07	98.36	0.00	87.30	1.18	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3178855276
96.23	0.17	98.92	0.02	95.05	0.00	99.77	0.00	94.87	0.00	98.19	0.00	98.36	0.00	88.48	1.18	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1023228819
96.38	0.15	98.96	0.04	95.10	0.05	99.77	0.00	95.51	0.64	98.23	0.04	98.46	0.10	88.64	0.16	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2683254930
96.51	0.13	99.01	0.06	95.20	0.10	99.77	0.00	95.51	0.00	98.30	0.07	99.13	0.67	88.64	0.00	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.927382077
96.63	0.12	99.05	0.04	95.22	0.03	99.77	0.00	96.15	0.64	98.34	0.04	99.23	0.10	88.64	0.00	/workspace/coverage/default/29.sysrst_ctrl_edge_detect.2998693448
96.71	0.08	99.07	0.02	95.30	0.08	99.77	0.00	96.15	0.00	98.41	0.07	99.23	0.00	89.02	0.38	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.945539124
96.78	0.08	99.07	0.00	95.30	0.00	99.77	0.00	96.15	0.00	98.41	0.00	99.23	0.00	89.56	0.54	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1651793357
96.85	0.07	99.07	0.00	95.30	0.00	99.77	0.00	96.15	0.00	98.41	0.00	99.23	0.00	90.04	0.48	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2315733591
96.92	0.07	99.10	0.04	95.50	0.20	99.77	0.00	96.15	0.00	98.48	0.07	99.23	0.00	90.20	0.16	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.553921523
96.98	0.06	99.10	0.00	95.50	0.00	99.77	0.00	96.15	0.00	98.48	0.00	99.23	0.00	90.64	0.43	/workspace/coverage/default/10.sysrst_ctrl_combo_detect.4193245618
97.03	0.05	99.16	0.06	95.58	0.08	100.00	0.23	96.15	0.00	98.48	0.00	99.23	0.00	90.64	0.00	/workspace/coverage/default/12.sysrst_ctrl_alert_test.1452742423
97.08	0.05	99.16	0.00	95.60	0.03	100.00	0.00	96.15	0.00	98.48	0.00	99.33	0.10	90.85	0.22	/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2846039825
97.13	0.05	99.16	0.00	95.60	0.00	100.00	0.00	96.15	0.00	98.48	0.00	99.33	0.00	91.17	0.32	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.4195965654
97.17	0.04	99.16	0.00	95.90	0.30	100.00	0.00	96.15	0.00	98.48	0.00	99.33	0.00	91.17	0.00	/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1432711952
97.21	0.04	99.16	0.00	96.18	0.28	100.00	0.00	96.15	0.00	98.48	0.00	99.33	0.00	91.17	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3144214552
97.25	0.04	99.23	0.07	96.18	0.00	100.00	0.00	96.15	0.00	98.63	0.15	99.33	0.00	91.23	0.05	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2827132516
97.29	0.04	99.23	0.00	96.18	0.00	100.00	0.00	96.15	0.00	98.63	0.00	99.33	0.00	91.50	0.27	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1262318778
97.32	0.03	99.23	0.00	96.18	0.00	100.00	0.00	96.15	0.00	98.63	0.00	99.33	0.00	91.71	0.22	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.4099441182
97.35	0.03	99.23	0.00	96.18	0.00	100.00	0.00	96.15	0.00	98.63	0.00	99.33	0.00	91.93	0.22	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.2975766168
97.38	0.03	99.23	0.00	96.18	0.00	100.00	0.00	96.15	0.00	98.63	0.00	99.33	0.00	92.14	0.22	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1633145693
97.40	0.02	99.25	0.02	96.18	0.00	100.00	0.00	96.15	0.00	98.67	0.04	99.33	0.00	92.25	0.11	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.142936766
97.43	0.02	99.25	0.00	96.18	0.00	100.00	0.00	96.15	0.00	98.67	0.00	99.33	0.00	92.41	0.16	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3970924165
97.45	0.02	99.25	0.00	96.18	0.00	100.00	0.00	96.15	0.00	98.67	0.00	99.33	0.00	92.57	0.16	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.3752413353
97.47	0.02	99.25	0.00	96.18	0.00	100.00	0.00	96.15	0.00	98.67	0.00	99.33	0.00	92.73	0.16	/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.4107645407
97.49	0.02	99.25	0.00	96.21	0.03	100.00	0.00	96.15	0.00	98.67	0.00	99.33	0.00	92.84	0.11	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2218910099
97.51	0.02	99.25	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.67	0.00	99.33	0.00	92.95	0.11	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.1643946178
97.52	0.02	99.25	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.67	0.00	99.33	0.00	93.06	0.11	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.3095977315
97.54	0.02	99.25	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.67	0.00	99.33	0.00	93.16	0.11	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2110509558
97.55	0.02	99.25	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.67	0.00	99.33	0.00	93.27	0.11	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3088227408
97.57	0.02	99.25	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.67	0.00	99.33	0.00	93.38	0.11	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.4043454904
97.58	0.01	99.25	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.67	0.00	99.42	0.10	93.38	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.1443553022
97.59	0.01	99.27	0.02	96.21	0.00	100.00	0.00	96.15	0.00	98.71	0.04	99.42	0.00	93.38	0.00	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.3856942294
97.60	0.01	99.29	0.02	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.04	99.42	0.00	93.38	0.00	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.2202409273
97.61	0.01	99.29	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.43	0.05	/workspace/coverage/default/12.sysrst_ctrl_stress_all.3816749346
97.62	0.01	99.29	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.49	0.05	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.4144999401
97.62	0.01	99.29	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.54	0.05	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.4244751562
97.63	0.01	99.29	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.60	0.05	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1584245276
97.64	0.01	99.29	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.65	0.05	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.581542979
97.65	0.01	99.29	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.70	0.05	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.709377263
97.65	0.01	99.29	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.76	0.05	/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1568230422
97.66	0.01	99.29	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.81	0.05	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3884328546
97.67	0.01	99.29	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.86	0.05	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.752506228
97.68	0.01	99.29	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.92	0.05	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1167056223
97.68	0.01	99.29	0.00	96.26	0.05	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.92	0.00	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3145446377
97.69	0.01	99.29	0.00	96.28	0.03	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.92	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3821892662
97.69	0.01	99.29	0.00	96.31	0.03	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.92	0.00	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2833751073
97.69	0.01	99.29	0.00	96.33	0.03	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.92	0.00	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.460558138
97.70	0.01	99.29	0.00	96.36	0.03	100.00	0.00	96.15	0.00	98.74	0.00	99.42	0.00	93.92	0.00	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2521378335

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2695812968
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.2001046768
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3804386714
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.894261636
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.4123706785
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3570927191
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.953226838
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1344773407
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2005783779
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2107339522
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.688786968
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2572343461
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2527308475
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3152764156
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2532136658
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3312947082
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.135739005
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.958804885
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3253326545
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.677670741
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1598485209
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1635271028
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.2104701672
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.716507243
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.450704799
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3524446276
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.871596919
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.116300061
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1597374998
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.3959278119
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1956705244
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3578957161
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.600602037
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1648522339
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.43739191
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.697373421
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.4228587194
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3505546083
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.562607256
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.350467705
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2096771351
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1408888487
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.3435417968
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1183968563
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1099061785
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.1264611407
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2735583558
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3436701929
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3588385567
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2934346838
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.408362127
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2294363924
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.4098761474
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.1926812695
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2088020089
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1676352485
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.1289394095
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/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1522384843
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.918435537
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.1725508023
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.826724157
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.316811672
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1539628321
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3882708039
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.2210649717
/workspace/coverage/default/4.sysrst_ctrl_smoke.2305352643
/workspace/coverage/default/4.sysrst_ctrl_stress_all.908972436
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1368640341
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.786108737
/workspace/coverage/default/40.sysrst_ctrl_alert_test.1845696672
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1526953684
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.1573354588
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2852434486
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2993471494
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.2674781801
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2842963605
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2579513886
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.4185210534
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.359221483
/workspace/coverage/default/40.sysrst_ctrl_smoke.1103534105
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2257703024
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.1776181310
/workspace/coverage/default/41.sysrst_ctrl_alert_test.825976913
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.85745352
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.234105603
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3580465959
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.2151427499
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2760319244
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.527537038
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.725813012
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2889562623
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2562458899
/workspace/coverage/default/41.sysrst_ctrl_smoke.1941125696
/workspace/coverage/default/41.sysrst_ctrl_stress_all.110185196
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2940269249
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3469664561
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.815752136
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2806985224
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2139000601
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1593041868
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3541087531
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.4258770797
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1317317343
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2031164939
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1431254782
/workspace/coverage/default/42.sysrst_ctrl_smoke.963910892
/workspace/coverage/default/42.sysrst_ctrl_stress_all.620189581
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2928402705
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3958560512
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1738759022
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3374366842
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3818430685
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.751139046
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3022926683
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.333809847
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.911312412
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2120463868
/workspace/coverage/default/43.sysrst_ctrl_smoke.2453690086
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2761727096
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2652564245
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.358569674
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3771006148
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1109439413
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3923522877
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.419536537
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.174409234
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1194395646
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.340887173
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3295592919
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1610633255
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2855935432
/workspace/coverage/default/44.sysrst_ctrl_smoke.3104401318
/workspace/coverage/default/44.sysrst_ctrl_stress_all.4144274471
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3507901236
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.4265823345
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1869190661
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.641539637
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2403614865
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.4087990416
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2987339956
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1515374025
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2123404247
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1093161432
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2880089046
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1518323500
/workspace/coverage/default/45.sysrst_ctrl_smoke.742008060
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3345065761
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.892317879
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3284150502
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3844159762
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3864825511
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1894736671
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3969965577
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3656289303
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1703307952
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1504950875
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2582001080
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.826654487
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1990924293
/workspace/coverage/default/46.sysrst_ctrl_smoke.3547893709
/workspace/coverage/default/46.sysrst_ctrl_stress_all.804710505
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2938017057
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1087441154
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2157907850
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2893850595
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3606890055
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2064369822
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.242758485
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.4097263488
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1637617821
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3553880009
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4160643790
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4067794483
/workspace/coverage/default/47.sysrst_ctrl_smoke.4064912240
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3336295161
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3845592821
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3164600675
/workspace/coverage/default/48.sysrst_ctrl_alert_test.4154295632
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2146867144
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1164123302
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2990409235
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2387577362
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.4257823974
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2344101350
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2882225981
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.259311752
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.162383321
/workspace/coverage/default/48.sysrst_ctrl_smoke.2493779603
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1515548400
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2561185261
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1530607183
/workspace/coverage/default/49.sysrst_ctrl_alert_test.928081343
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3678368346
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1554814745
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.14183042
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3955979503
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1303307109
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1290384232
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3669938153
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.940870312
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1998438614
/workspace/coverage/default/49.sysrst_ctrl_smoke.2545469499
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1147489144
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1506100303
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2612900663
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1127790651
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3674382285
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.4123844359
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3016439947
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.792866288
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.165668879
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3265661385
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2247969398
/workspace/coverage/default/5.sysrst_ctrl_smoke.2204760466
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3241202973
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2994909569
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2229253912
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.538305689
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1861940600
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2389833969
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3144874552
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2611996006
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.4017261640
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2678235374
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.360594646
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2557267629
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.663513719
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3741366207
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2248307115
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3542356145
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1689034449
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2050549804
/workspace/coverage/default/6.sysrst_ctrl_smoke.332912498
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3839416757
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3361460083
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2193858379
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2634766769
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.4176160853
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3693527626
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.721179974
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.4117162177
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2354404824
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2600618927
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3010425035
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1197722394
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2785389765
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2244534047
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2403914521
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3762512716
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1822136668
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2020105146
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.953156215
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2394329426
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1263277750
/workspace/coverage/default/7.sysrst_ctrl_smoke.3294065038
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1265843419
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3666267872
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3845449773
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.782993539
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1521593412
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.758580943
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1848348097
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.467362351
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1173583368
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3898471946
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2542278395
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3129875847
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3553926358
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1714782042
/workspace/coverage/default/8.sysrst_ctrl_smoke.1128585190
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1431978184
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1007186805
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2837804700
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.537174039
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3072934348
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2935955586
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2194321158
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1229319170
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3831351066
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1646880243
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.455698816
/workspace/coverage/default/9.sysrst_ctrl_alert_test.793253651
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3298750291
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.844953251
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2953445917
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1136688894
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3354542565
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1483618231
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3207222223
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3950418590
/workspace/coverage/default/9.sysrst_ctrl_smoke.3810941777
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3872599195
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2186448112
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3672820423
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4047288067
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.292188661
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2907785071
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2881125889
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.862911674
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2941351040
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3130526857
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2434681073
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3312172899

Total test records in report: 920

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2191629073	Jul 23 05:39:36 PM PDT 24	Jul 23 05:40:22 PM PDT 24	673929772837 ps
T4	/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.48532785	Jul 23 05:42:09 PM PDT 24	Jul 23 05:42:12 PM PDT 24	3347455547 ps
T5	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2078829615	Jul 23 05:40:11 PM PDT 24	Jul 23 05:40:15 PM PDT 24	2533137106 ps
T13	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1297248892	Jul 23 05:41:43 PM PDT 24	Jul 23 05:41:51 PM PDT 24	2609459523 ps
T14	/workspace/coverage/default/16.sysrst_ctrl_smoke.2002389302	Jul 23 05:40:25 PM PDT 24	Jul 23 05:40:32 PM PDT 24	2108642748 ps
T2	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2862415743	Jul 23 05:41:38 PM PDT 24	Jul 23 05:49:17 PM PDT 24	185568011826 ps
T15	/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1833907931	Jul 23 05:40:36 PM PDT 24	Jul 23 05:40:44 PM PDT 24	2611255207 ps
T16	/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.2114972020	Jul 23 05:40:41 PM PDT 24	Jul 23 05:40:44 PM PDT 24	2152785338 ps
T17	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.2132313259	Jul 23 05:41:58 PM PDT 24	Jul 23 05:42:02 PM PDT 24	3445747513 ps
T3	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1803115092	Jul 23 05:39:25 PM PDT 24	Jul 23 05:40:32 PM PDT 24	68029536844 ps
T6	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2935955586	Jul 23 05:43:02 PM PDT 24	Jul 23 05:44:43 PM PDT 24	38420509209 ps
T46	/workspace/coverage/default/4.sysrst_ctrl_smoke.2305352643	Jul 23 05:39:09 PM PDT 24	Jul 23 05:39:16 PM PDT 24	2115303195 ps
T7	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.2961798435	Jul 23 05:41:16 PM PDT 24	Jul 23 05:42:12 PM PDT 24	20880314985 ps
T47	/workspace/coverage/default/42.sysrst_ctrl_smoke.963910892	Jul 23 05:42:26 PM PDT 24	Jul 23 05:42:28 PM PDT 24	2139707500 ps
T48	/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3798971121	Jul 23 05:40:23 PM PDT 24	Jul 23 05:40:31 PM PDT 24	2735215576 ps
T49	/workspace/coverage/default/23.sysrst_ctrl_smoke.4259587962	Jul 23 05:40:54 PM PDT 24	Jul 23 05:41:01 PM PDT 24	2109666482 ps
T50	/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.3043368143	Jul 23 05:40:43 PM PDT 24	Jul 23 05:40:51 PM PDT 24	3022532619 ps
T8	/workspace/coverage/default/40.sysrst_ctrl_stress_all.2257703024	Jul 23 05:42:15 PM PDT 24	Jul 23 05:42:24 PM PDT 24	9831920161 ps
T51	/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.2151427499	Jul 23 05:42:22 PM PDT 24	Jul 23 05:42:28 PM PDT 24	3422581619 ps
T52	/workspace/coverage/default/44.sysrst_ctrl_alert_test.3771006148	Jul 23 05:42:34 PM PDT 24	Jul 23 05:42:37 PM PDT 24	2045410890 ps
T22	/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.953156215	Jul 23 05:39:37 PM PDT 24	Jul 23 05:39:44 PM PDT 24	2474895729 ps
T9	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.1749267818	Jul 23 05:40:18 PM PDT 24	Jul 23 05:40:22 PM PDT 24	2827641772 ps
T280	/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.2310571035	Jul 23 05:41:13 PM PDT 24	Jul 23 05:41:18 PM PDT 24	2049510043 ps
T10	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.945539124	Jul 23 05:41:24 PM PDT 24	Jul 23 05:43:53 PM PDT 24	59786229776 ps
T23	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.467362351	Jul 23 05:39:42 PM PDT 24	Jul 23 05:40:47 PM PDT 24	23582550849 ps
T103	/workspace/coverage/default/34.sysrst_ctrl_smoke.2280536860	Jul 23 05:41:44 PM PDT 24	Jul 23 05:41:48 PM PDT 24	2142449192 ps
T11	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1192212716	Jul 23 05:42:55 PM PDT 24	Jul 23 05:44:59 PM PDT 24	49309202513 ps
T60	/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.881634889	Jul 23 05:40:54 PM PDT 24	Jul 23 05:41:03 PM PDT 24	2612394984 ps
T12	/workspace/coverage/default/31.sysrst_ctrl_stress_all.527162832	Jul 23 05:41:36 PM PDT 24	Jul 23 05:41:51 PM PDT 24	11229705459 ps
T94	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.411391610	Jul 23 05:40:10 PM PDT 24	Jul 23 05:40:18 PM PDT 24	2509819933 ps
T39	/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.782993539	Jul 23 05:42:53 PM PDT 24	Jul 23 05:44:30 PM PDT 24	40470076480 ps
T53	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.4064625093	Jul 23 05:40:35 PM PDT 24	Jul 23 05:40:38 PM PDT 24	6432375955 ps
T54	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.1142976913	Jul 23 05:39:03 PM PDT 24	Jul 23 05:39:10 PM PDT 24	5020907085 ps
T28	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1167056223	Jul 23 05:43:01 PM PDT 24	Jul 23 05:44:31 PM PDT 24	135580578854 ps
T33	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.922632410	Jul 23 05:41:47 PM PDT 24	Jul 23 05:42:16 PM PDT 24	274916452026 ps
T40	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.2975766168	Jul 23 05:41:14 PM PDT 24	Jul 23 05:41:24 PM PDT 24	3735356842 ps
T116	/workspace/coverage/default/13.sysrst_ctrl_smoke.3603468475	Jul 23 05:40:05 PM PDT 24	Jul 23 05:40:11 PM PDT 24	2113541601 ps
T117	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3818430685	Jul 23 05:42:27 PM PDT 24	Jul 23 05:42:41 PM PDT 24	4415287270 ps
T41	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.123390771	Jul 23 05:38:32 PM PDT 24	Jul 23 05:38:46 PM PDT 24	34571016192 ps
T118	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.918435537	Jul 23 05:39:19 PM PDT 24	Jul 23 05:39:24 PM PDT 24	2779348541 ps
T119	/workspace/coverage/default/22.sysrst_ctrl_smoke.3111588833	Jul 23 05:40:50 PM PDT 24	Jul 23 05:40:53 PM PDT 24	2130832438 ps
T120	/workspace/coverage/default/9.sysrst_ctrl_smoke.3810941777	Jul 23 05:39:48 PM PDT 24	Jul 23 05:39:54 PM PDT 24	2113465299 ps
T121	/workspace/coverage/default/37.sysrst_ctrl_smoke.3268890818	Jul 23 05:42:00 PM PDT 24	Jul 23 05:42:08 PM PDT 24	2110262114 ps
T122	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2855935432	Jul 23 05:42:30 PM PDT 24	Jul 23 05:42:34 PM PDT 24	2530100407 ps
T29	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1522384843	Jul 23 05:39:18 PM PDT 24	Jul 23 05:39:35 PM PDT 24	69871262592 ps
T233	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1927848951	Jul 23 05:40:49 PM PDT 24	Jul 23 05:40:52 PM PDT 24	2530474938 ps
T78	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1306820689	Jul 23 05:39:10 PM PDT 24	Jul 23 05:39:13 PM PDT 24	2419973994 ps
T234	/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.3336862994	Jul 23 05:42:13 PM PDT 24	Jul 23 05:42:15 PM PDT 24	4505204703 ps
T42	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.1354252115	Jul 23 05:41:30 PM PDT 24	Jul 23 05:44:37 PM PDT 24	144470055018 ps
T30	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.713648178	Jul 23 05:42:55 PM PDT 24	Jul 23 05:43:36 PM PDT 24	86052815989 ps
T56	/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.165668879	Jul 23 05:39:24 PM PDT 24	Jul 23 05:39:27 PM PDT 24	2475888550 ps
T360	/workspace/coverage/default/3.sysrst_ctrl_smoke.1806904079	Jul 23 05:39:02 PM PDT 24	Jul 23 05:39:04 PM PDT 24	2135913630 ps
T43	/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3426782621	Jul 23 05:42:04 PM PDT 24	Jul 23 05:42:16 PM PDT 24	4011127411 ps
T361	/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.4179011329	Jul 23 05:40:45 PM PDT 24	Jul 23 05:40:50 PM PDT 24	2201290912 ps
T44	/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3298750291	Jul 23 05:39:48 PM PDT 24	Jul 23 05:39:51 PM PDT 24	3222853020 ps
T31	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1651793357	Jul 23 05:39:25 PM PDT 24	Jul 23 05:42:31 PM PDT 24	74340203659 ps
T362	/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2248307115	Jul 23 05:39:31 PM PDT 24	Jul 23 05:39:33 PM PDT 24	2645182971 ps
T61	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2760319244	Jul 23 05:42:19 PM PDT 24	Jul 23 05:42:28 PM PDT 24	3478832661 ps
T358	/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.410044804	Jul 23 05:39:53 PM PDT 24	Jul 23 05:39:56 PM PDT 24	2544719698 ps
T32	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.2202409273	Jul 23 05:42:01 PM PDT 24	Jul 23 05:42:12 PM PDT 24	4877955115 ps
T359	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.4249002020	Jul 23 05:41:59 PM PDT 24	Jul 23 05:42:04 PM PDT 24	2532882147 ps
T363	/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.2442076024	Jul 23 05:41:30 PM PDT 24	Jul 23 05:41:33 PM PDT 24	2056089640 ps
T364	/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.2502169866	Jul 23 05:40:46 PM PDT 24	Jul 23 05:40:54 PM PDT 24	2171413306 ps
T365	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2599945236	Jul 23 05:38:52 PM PDT 24	Jul 23 05:39:00 PM PDT 24	2402115921 ps
T366	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2842963605	Jul 23 05:42:17 PM PDT 24	Jul 23 05:42:21 PM PDT 24	2612645551 ps
T203	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.3133505448	Jul 23 05:40:31 PM PDT 24	Jul 23 05:44:35 PM PDT 24	130126091635 ps
T367	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.3956003695	Jul 23 05:42:06 PM PDT 24	Jul 23 05:42:13 PM PDT 24	2514872145 ps
T34	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1368640341	Jul 23 05:39:18 PM PDT 24	Jul 23 05:40:15 PM PDT 24	39371273138 ps
T368	/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.2172055326	Jul 23 05:41:30 PM PDT 24	Jul 23 05:41:37 PM PDT 24	3833267943 ps
T369	/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.2428201790	Jul 23 05:41:31 PM PDT 24	Jul 23 05:41:33 PM PDT 24	2649295325 ps
T370	/workspace/coverage/default/6.sysrst_ctrl_smoke.332912498	Jul 23 05:39:25 PM PDT 24	Jul 23 05:39:32 PM PDT 24	2115408673 ps
T45	/workspace/coverage/default/44.sysrst_ctrl_stress_all.4144274471	Jul 23 05:42:32 PM PDT 24	Jul 23 05:42:35 PM PDT 24	8882586568 ps
T35	/workspace/coverage/default/26.sysrst_ctrl_stress_all.1803164301	Jul 23 05:41:15 PM PDT 24	Jul 23 05:43:03 PM PDT 24	44608681328 ps
T149	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.2674781801	Jul 23 05:42:13 PM PDT 24	Jul 23 05:42:22 PM PDT 24	2908878574 ps
T371	/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2993471494	Jul 23 05:42:13 PM PDT 24	Jul 23 05:42:25 PM PDT 24	4060686304 ps
T57	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.3586470941	Jul 23 05:39:03 PM PDT 24	Jul 23 05:39:07 PM PDT 24	2469475052 ps
T55	/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1432711952	Jul 23 05:40:10 PM PDT 24	Jul 23 05:40:13 PM PDT 24	8505547360 ps
T63	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.3858018698	Jul 23 05:40:19 PM PDT 24	Jul 23 05:40:28 PM PDT 24	7314360530 ps
T36	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.434462300	Jul 23 05:39:04 PM PDT 24	Jul 23 05:39:15 PM PDT 24	4145521606 ps
T101	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2785389765	Jul 23 05:39:36 PM PDT 24	Jul 23 05:39:46 PM PDT 24	3125272742 ps
T58	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.33808129	Jul 23 05:38:25 PM PDT 24	Jul 23 05:38:33 PM PDT 24	2480606306 ps
T144	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2631997829	Jul 23 05:41:29 PM PDT 24	Jul 23 05:41:36 PM PDT 24	2508241481 ps
T145	/workspace/coverage/default/17.sysrst_ctrl_alert_test.307902543	Jul 23 05:40:34 PM PDT 24	Jul 23 05:40:38 PM PDT 24	2021522635 ps
T102	/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1555211973	Jul 23 05:40:46 PM PDT 24	Jul 23 05:40:51 PM PDT 24	3497463239 ps
T37	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3909791141	Jul 23 05:42:26 PM PDT 24	Jul 23 05:43:56 PM PDT 24	149088918465 ps
T59	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2582001080	Jul 23 05:42:32 PM PDT 24	Jul 23 05:42:37 PM PDT 24	2455430678 ps
T95	/workspace/coverage/default/3.sysrst_ctrl_stress_all.2116205949	Jul 23 05:39:11 PM PDT 24	Jul 23 05:39:21 PM PDT 24	14830476158 ps
T96	/workspace/coverage/default/44.sysrst_ctrl_smoke.3104401318	Jul 23 05:42:27 PM PDT 24	Jul 23 05:42:35 PM PDT 24	2112304417 ps
T38	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2484238686	Jul 23 05:42:13 PM PDT 24	Jul 23 05:43:33 PM PDT 24	1622635677990 ps
T97	/workspace/coverage/default/38.sysrst_ctrl_edge_detect.1657496133	Jul 23 05:42:06 PM PDT 24	Jul 23 05:42:08 PM PDT 24	5316959381 ps
T98	/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.1420725704	Jul 23 05:41:52 PM PDT 24	Jul 23 05:41:55 PM PDT 24	4286519571 ps
T99	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1290384232	Jul 23 05:42:46 PM PDT 24	Jul 23 05:42:49 PM PDT 24	2633541492 ps
T100	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.4068705238	Jul 23 05:41:59 PM PDT 24	Jul 23 05:42:02 PM PDT 24	3809191458 ps
T62	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2626386609	Jul 23 05:41:49 PM PDT 24	Jul 23 05:43:54 PM PDT 24	45189104645 ps
T166	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.2902142858	Jul 23 05:40:35 PM PDT 24	Jul 23 05:40:38 PM PDT 24	4693068138 ps
T76	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3507901236	Jul 23 05:42:35 PM PDT 24	Jul 23 05:45:50 PM PDT 24	1380066003321 ps
T372	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3295592919	Jul 23 05:42:27 PM PDT 24	Jul 23 05:42:32 PM PDT 24	2489389891 ps
T206	/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2403614865	Jul 23 05:42:33 PM PDT 24	Jul 23 05:47:14 PM PDT 24	106355475719 ps
T373	/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1738759022	Jul 23 05:42:28 PM PDT 24	Jul 23 05:54:33 PM PDT 24	284199507205 ps
T374	/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.758237549	Jul 23 05:41:23 PM PDT 24	Jul 23 05:41:31 PM PDT 24	2609038809 ps
T375	/workspace/coverage/default/20.sysrst_ctrl_smoke.2683025254	Jul 23 05:40:47 PM PDT 24	Jul 23 05:40:54 PM PDT 24	2109599133 ps
T151	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3898471946	Jul 23 05:39:43 PM PDT 24	Jul 23 05:39:47 PM PDT 24	3369145550 ps
T376	/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.396427546	Jul 23 05:41:38 PM PDT 24	Jul 23 05:41:47 PM PDT 24	2511118096 ps
T377	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2543850233	Jul 23 05:42:00 PM PDT 24	Jul 23 05:42:13 PM PDT 24	4237821553 ps
T202	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.968868010	Jul 23 05:43:02 PM PDT 24	Jul 23 05:47:02 PM PDT 24	97483067907 ps
T104	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3666267872	Jul 23 05:39:38 PM PDT 24	Jul 23 05:39:44 PM PDT 24	12415727038 ps
T350	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3651954913	Jul 23 05:41:30 PM PDT 24	Jul 23 05:42:04 PM PDT 24	47846749969 ps
T64	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.3641170363	Jul 23 05:41:37 PM PDT 24	Jul 23 05:44:29 PM PDT 24	66967633694 ps
T214	/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3669938153	Jul 23 05:42:47 PM PDT 24	Jul 23 05:42:53 PM PDT 24	2474064797 ps
T215	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1995870341	Jul 23 05:40:00 PM PDT 24	Jul 23 05:40:01 PM PDT 24	2942223352 ps
T65	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2315733591	Jul 23 05:42:30 PM PDT 24	Jul 23 05:46:21 PM PDT 24	172147821029 ps
T216	/workspace/coverage/default/49.sysrst_ctrl_smoke.2545469499	Jul 23 05:42:54 PM PDT 24	Jul 23 05:42:58 PM PDT 24	2126116286 ps
T217	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.1964620331	Jul 23 05:41:23 PM PDT 24	Jul 23 05:41:26 PM PDT 24	2037825763 ps
T218	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1317317343	Jul 23 05:42:20 PM PDT 24	Jul 23 05:42:27 PM PDT 24	2460821958 ps
T219	/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.259311752	Jul 23 05:42:39 PM PDT 24	Jul 23 05:42:43 PM PDT 24	2262480402 ps
T220	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3284150502	Jul 23 05:42:34 PM PDT 24	Jul 23 05:42:39 PM PDT 24	6539734067 ps
T221	/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.166207669	Jul 23 05:41:51 PM PDT 24	Jul 23 05:41:59 PM PDT 24	4374777351 ps
T228	/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2387577362	Jul 23 05:42:40 PM PDT 24	Jul 23 05:42:43 PM PDT 24	3208315704 ps
T229	/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3127806400	Jul 23 05:41:43 PM PDT 24	Jul 23 05:41:47 PM PDT 24	2487618954 ps
T230	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2615823770	Jul 23 05:40:36 PM PDT 24	Jul 23 05:40:40 PM PDT 24	2449954464 ps
T378	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1739909943	Jul 23 05:40:44 PM PDT 24	Jul 23 05:40:53 PM PDT 24	3224569765 ps
T379	/workspace/coverage/default/46.sysrst_ctrl_smoke.3547893709	Jul 23 05:42:35 PM PDT 24	Jul 23 05:42:39 PM PDT 24	2131092162 ps
T308	/workspace/coverage/default/30.sysrst_ctrl_combo_detect.1076760739	Jul 23 05:41:27 PM PDT 24	Jul 23 05:41:51 PM PDT 24	147823064174 ps
T380	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1593041868	Jul 23 05:42:22 PM PDT 24	Jul 23 05:42:27 PM PDT 24	2772733633 ps
T273	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.2270956421	Jul 23 05:40:05 PM PDT 24	Jul 23 05:43:44 PM PDT 24	215445951540 ps
T309	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.808558678	Jul 23 05:41:42 PM PDT 24	Jul 23 05:42:15 PM PDT 24	49766497950 ps
T26	/workspace/coverage/default/28.sysrst_ctrl_stress_all.1982819024	Jul 23 05:41:37 PM PDT 24	Jul 23 05:42:29 PM PDT 24	158978960823 ps
T381	/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3798758608	Jul 23 05:39:57 PM PDT 24	Jul 23 05:39:59 PM PDT 24	2244329294 ps
T382	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.329383147	Jul 23 05:38:38 PM PDT 24	Jul 23 05:38:43 PM PDT 24	2513526552 ps
T383	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2344101350	Jul 23 05:42:39 PM PDT 24	Jul 23 05:42:42 PM PDT 24	2633158746 ps
T27	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3580465959	Jul 23 05:42:19 PM PDT 24	Jul 23 05:44:26 PM PDT 24	104148645611 ps
T286	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3817838256	Jul 23 05:40:59 PM PDT 24	Jul 23 05:41:37 PM PDT 24	14651282630 ps
T79	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.4144999401	Jul 23 05:40:33 PM PDT 24	Jul 23 05:41:47 PM PDT 24	59132999665 ps
T289	/workspace/coverage/default/18.sysrst_ctrl_smoke.1132582286	Jul 23 05:40:37 PM PDT 24	Jul 23 05:40:39 PM PDT 24	2146326996 ps
T290	/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1084812823	Jul 23 05:41:00 PM PDT 24	Jul 23 05:41:05 PM PDT 24	2630596274 ps
T244	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.1432114790	Jul 23 05:39:09 PM PDT 24	Jul 23 05:39:37 PM PDT 24	42110503277 ps
T257	/workspace/coverage/default/13.sysrst_ctrl_alert_test.1762208285	Jul 23 05:40:12 PM PDT 24	Jul 23 05:40:15 PM PDT 24	2024230966 ps
T105	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.892317879	Jul 23 05:42:33 PM PDT 24	Jul 23 05:42:51 PM PDT 24	61292161953 ps
T268	/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3207222223	Jul 23 05:39:49 PM PDT 24	Jul 23 05:39:57 PM PDT 24	2026598539 ps
T106	/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2447633816	Jul 23 05:41:31 PM PDT 24	Jul 23 05:41:39 PM PDT 24	7456063185 ps
T107	/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.603444258	Jul 23 05:41:12 PM PDT 24	Jul 23 05:41:29 PM PDT 24	850755231550 ps
T269	/workspace/coverage/default/33.sysrst_ctrl_stress_all.3106744217	Jul 23 05:41:44 PM PDT 24	Jul 23 05:41:51 PM PDT 24	7122954771 ps
T270	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.989871360	Jul 23 05:41:29 PM PDT 24	Jul 23 05:44:00 PM PDT 24	63695730550 ps
T271	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.268732115	Jul 23 05:40:56 PM PDT 24	Jul 23 05:41:00 PM PDT 24	2543416242 ps
T272	/workspace/coverage/default/12.sysrst_ctrl_alert_test.1452742423	Jul 23 05:40:06 PM PDT 24	Jul 23 05:40:10 PM PDT 24	2018434157 ps
T384	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.879701718	Jul 23 05:40:47 PM PDT 24	Jul 23 05:40:51 PM PDT 24	2528641590 ps
T140	/workspace/coverage/default/47.sysrst_ctrl_edge_detect.4097263488	Jul 23 05:42:40 PM PDT 24	Jul 23 05:42:44 PM PDT 24	3179277105 ps
T223	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.4032668196	Jul 23 05:40:27 PM PDT 24	Jul 23 05:42:28 PM PDT 24	182833599362 ps
T314	/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2907785071	Jul 23 05:43:02 PM PDT 24	Jul 23 05:43:56 PM PDT 24	69490380080 ps
T284	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3393979445	Jul 23 05:40:23 PM PDT 24	Jul 23 05:40:31 PM PDT 24	5709434431 ps
T385	/workspace/coverage/default/14.sysrst_ctrl_alert_test.3170913153	Jul 23 05:40:20 PM PDT 24	Jul 23 05:40:25 PM PDT 24	2010335035 ps
T386	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3948929262	Jul 23 05:40:56 PM PDT 24	Jul 23 05:41:00 PM PDT 24	4045774156 ps
T281	/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1316962410	Jul 23 05:41:24 PM PDT 24	Jul 23 05:41:32 PM PDT 24	2471530147 ps
T141	/workspace/coverage/default/21.sysrst_ctrl_stress_all.338267284	Jul 23 05:40:52 PM PDT 24	Jul 23 05:40:57 PM PDT 24	10958654857 ps
T80	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3130526857	Jul 23 05:43:01 PM PDT 24	Jul 23 05:44:02 PM PDT 24	23329714632 ps
T69	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2218910099	Jul 23 05:38:41 PM PDT 24	Jul 23 05:40:56 PM PDT 24	106179258327 ps
T387	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1173583368	Jul 23 05:39:44 PM PDT 24	Jul 23 05:39:50 PM PDT 24	3482220524 ps
T108	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2561185261	Jul 23 05:42:52 PM PDT 24	Jul 23 05:45:24 PM PDT 24	1272235501776 ps
T313	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2954780282	Jul 23 05:41:30 PM PDT 24	Jul 23 05:42:10 PM PDT 24	58087266129 ps
T388	/workspace/coverage/default/25.sysrst_ctrl_edge_detect.2424536503	Jul 23 05:41:06 PM PDT 24	Jul 23 05:41:15 PM PDT 24	2706462865 ps
T389	/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.3065008832	Jul 23 05:41:15 PM PDT 24	Jul 23 05:41:19 PM PDT 24	2527811994 ps
T390	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2174739714	Jul 23 05:41:30 PM PDT 24	Jul 23 05:41:39 PM PDT 24	2468002590 ps
T391	/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.1862526634	Jul 23 05:41:38 PM PDT 24	Jul 23 05:41:41 PM PDT 24	2634198930 ps
T392	/workspace/coverage/default/47.sysrst_ctrl_stress_all.3336295161	Jul 23 05:42:38 PM PDT 24	Jul 23 05:43:04 PM PDT 24	9130632204 ps
T393	/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.211099340	Jul 23 05:41:03 PM PDT 24	Jul 23 05:41:06 PM PDT 24	2536520182 ps
T394	/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.164538032	Jul 23 05:38:38 PM PDT 24	Jul 23 05:38:41 PM PDT 24	2940564436 ps
T395	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.604677251	Jul 23 05:41:07 PM PDT 24	Jul 23 05:41:11 PM PDT 24	2530999398 ps
T285	/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.1776181310	Jul 23 05:42:13 PM PDT 24	Jul 23 05:42:15 PM PDT 24	3820571354 ps
T396	/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.2138451556	Jul 23 05:40:09 PM PDT 24	Jul 23 05:40:13 PM PDT 24	3150064841 ps
T71	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.2831125884	Jul 23 05:41:41 PM PDT 24	Jul 23 05:41:49 PM PDT 24	3617490060 ps
T129	/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.944277282	Jul 23 05:39:54 PM PDT 24	Jul 23 05:39:56 PM PDT 24	2632377904 ps
T130	/workspace/coverage/default/18.sysrst_ctrl_alert_test.3303439796	Jul 23 05:40:41 PM PDT 24	Jul 23 05:40:47 PM PDT 24	2011672668 ps
T131	/workspace/coverage/default/25.sysrst_ctrl_stress_all.239357395	Jul 23 05:41:06 PM PDT 24	Jul 23 05:41:41 PM PDT 24	13641782905 ps
T132	/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.2016151976	Jul 23 05:41:45 PM PDT 24	Jul 23 05:41:49 PM PDT 24	2628612712 ps
T133	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.1030002212	Jul 23 05:39:55 PM PDT 24	Jul 23 05:39:58 PM PDT 24	3281161461 ps
T134	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.886146865	Jul 23 05:40:42 PM PDT 24	Jul 23 05:41:21 PM PDT 24	40142440077 ps
T135	/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3022926683	Jul 23 05:42:27 PM PDT 24	Jul 23 05:42:32 PM PDT 24	2629660149 ps
T136	/workspace/coverage/default/17.sysrst_ctrl_smoke.3273335646	Jul 23 05:40:29 PM PDT 24	Jul 23 05:40:36 PM PDT 24	2111117101 ps
T137	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1171768588	Jul 23 05:42:14 PM PDT 24	Jul 23 05:42:18 PM PDT 24	2164725379 ps
T139	/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2652564245	Jul 23 05:42:27 PM PDT 24	Jul 23 05:44:58 PM PDT 24	73765031274 ps
T238	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1023228819	Jul 23 05:42:14 PM PDT 24	Jul 23 05:50:15 PM PDT 24	194361858473 ps
T239	/workspace/coverage/default/39.sysrst_ctrl_smoke.2084488214	Jul 23 05:42:13 PM PDT 24	Jul 23 05:42:15 PM PDT 24	2224042730 ps
T109	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.4019581205	Jul 23 05:38:52 PM PDT 24	Jul 23 05:38:55 PM PDT 24	8531046943 ps
T240	/workspace/coverage/default/33.sysrst_ctrl_alert_test.221696237	Jul 23 05:41:43 PM PDT 24	Jul 23 05:41:47 PM PDT 24	2031454825 ps
T205	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.4043454904	Jul 23 05:43:02 PM PDT 24	Jul 23 05:44:00 PM PDT 24	62243639782 ps
T340	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.752506228	Jul 23 05:42:53 PM PDT 24	Jul 23 05:43:15 PM PDT 24	91463497760 ps
T397	/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1990924293	Jul 23 05:42:34 PM PDT 24	Jul 23 05:42:39 PM PDT 24	2518148989 ps
T74	/workspace/coverage/default/11.sysrst_ctrl_stress_all.2885686309	Jul 23 05:40:06 PM PDT 24	Jul 23 05:40:26 PM PDT 24	9393058402 ps
T180	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.1279866040	Jul 23 05:40:10 PM PDT 24	Jul 23 05:41:48 PM PDT 24	69002433231 ps
T181	/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.190125832	Jul 23 05:41:57 PM PDT 24	Jul 23 05:42:05 PM PDT 24	2608139242 ps
T182	/workspace/coverage/default/6.sysrst_ctrl_alert_test.2678235374	Jul 23 05:39:30 PM PDT 24	Jul 23 05:39:32 PM PDT 24	2024889514 ps
T183	/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2880089046	Jul 23 05:42:35 PM PDT 24	Jul 23 05:42:38 PM PDT 24	2045342322 ps
T184	/workspace/coverage/default/37.sysrst_ctrl_alert_test.2169336290	Jul 23 05:42:10 PM PDT 24	Jul 23 05:42:12 PM PDT 24	2034724534 ps
T185	/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1483618231	Jul 23 05:39:47 PM PDT 24	Jul 23 05:39:54 PM PDT 24	2457824446 ps
T186	/workspace/coverage/default/21.sysrst_ctrl_alert_test.1493158648	Jul 23 05:40:56 PM PDT 24	Jul 23 05:41:00 PM PDT 24	2025633912 ps
T187	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.1868348855	Jul 23 05:41:07 PM PDT 24	Jul 23 05:45:38 PM PDT 24	107203015570 ps
T188	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.3852045063	Jul 23 05:40:07 PM PDT 24	Jul 23 05:40:11 PM PDT 24	2488875796 ps
T398	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.1493306272	Jul 23 05:40:22 PM PDT 24	Jul 23 05:40:25 PM PDT 24	2453024911 ps
T399	/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.1168499128	Jul 23 05:40:10 PM PDT 24	Jul 23 05:40:13 PM PDT 24	2661944424 ps
T312	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.1198507630	Jul 23 05:41:51 PM PDT 24	Jul 23 05:42:58 PM PDT 24	81945608683 ps
T400	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1146669190	Jul 23 05:40:06 PM PDT 24	Jul 23 05:40:09 PM PDT 24	2527702467 ps
T142	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.2203753999	Jul 23 05:40:48 PM PDT 24	Jul 23 05:40:51 PM PDT 24	3730180623 ps
T224	/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2846039825	Jul 23 05:39:49 PM PDT 24	Jul 23 05:44:07 PM PDT 24	116067953916 ps
T401	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.2212637313	Jul 23 05:40:42 PM PDT 24	Jul 23 05:40:50 PM PDT 24	2443733433 ps
T402	/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2953445917	Jul 23 05:39:53 PM PDT 24	Jul 23 05:39:56 PM PDT 24	3942201400 ps
T110	/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2193858379	Jul 23 05:39:31 PM PDT 24	Jul 23 05:39:34 PM PDT 24	8080215514 ps
T225	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1471854533	Jul 23 05:38:31 PM PDT 24	Jul 23 05:40:17 PM PDT 24	171377144572 ps
T222	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.11705458	Jul 23 05:40:11 PM PDT 24	Jul 23 05:43:29 PM PDT 24	77892467317 ps
T403	/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.792866288	Jul 23 05:39:25 PM PDT 24	Jul 23 05:39:32 PM PDT 24	2613990283 ps
T165	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.3673669946	Jul 23 05:40:35 PM PDT 24	Jul 23 05:40:42 PM PDT 24	3014527885 ps
T404	/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.333809847	Jul 23 05:42:26 PM PDT 24	Jul 23 05:42:29 PM PDT 24	2469837385 ps
T405	/workspace/coverage/default/11.sysrst_ctrl_smoke.2858927911	Jul 23 05:39:58 PM PDT 24	Jul 23 05:40:05 PM PDT 24	2110767389 ps
T406	/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.484135421	Jul 23 05:41:48 PM PDT 24	Jul 23 05:41:51 PM PDT 24	2034718752 ps
T407	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4160643790	Jul 23 05:42:39 PM PDT 24	Jul 23 05:42:46 PM PDT 24	2057013439 ps
T200	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.292188661	Jul 23 05:43:01 PM PDT 24	Jul 23 05:44:20 PM PDT 24	75281714543 ps
T81	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3693527626	Jul 23 05:42:54 PM PDT 24	Jul 23 05:43:13 PM PDT 24	27605252753 ps
T82	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1861940600	Jul 23 05:42:53 PM PDT 24	Jul 23 05:43:03 PM PDT 24	26389278802 ps
T321	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.537174039	Jul 23 05:43:02 PM PDT 24	Jul 23 05:47:11 PM PDT 24	89932758719 ps
T408	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3401350280	Jul 23 05:41:13 PM PDT 24	Jul 23 05:41:17 PM PDT 24	2526779976 ps
T409	/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.4258770797	Jul 23 05:42:21 PM PDT 24	Jul 23 05:42:26 PM PDT 24	2616073170 ps
T410	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1773729775	Jul 23 05:40:53 PM PDT 24	Jul 23 05:41:02 PM PDT 24	2951038061 ps
T342	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2403914521	Jul 23 05:39:38 PM PDT 24	Jul 23 05:42:15 PM PDT 24	64168367839 ps
T311	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2194321158	Jul 23 05:43:01 PM PDT 24	Jul 23 05:47:15 PM PDT 24	96842028449 ps
T411	/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.658416103	Jul 23 05:40:35 PM PDT 24	Jul 23 05:40:42 PM PDT 24	4453119684 ps
T412	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1641517859	Jul 23 05:41:55 PM PDT 24	Jul 23 05:42:00 PM PDT 24	242549718004 ps
T413	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1518323500	Jul 23 05:42:32 PM PDT 24	Jul 23 05:42:35 PM PDT 24	2527904597 ps
T414	/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2031164939	Jul 23 05:42:19 PM PDT 24	Jul 23 05:42:26 PM PDT 24	2141704247 ps
T143	/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3741366207	Jul 23 05:39:32 PM PDT 24	Jul 23 05:39:38 PM PDT 24	2969982506 ps
T415	/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2895210629	Jul 23 05:41:25 PM PDT 24	Jul 23 05:41:31 PM PDT 24	4364670107 ps
T416	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.581576656	Jul 23 05:40:31 PM PDT 24	Jul 23 05:40:33 PM PDT 24	2470452704 ps
T343	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1646880243	Jul 23 05:43:02 PM PDT 24	Jul 23 05:44:05 PM PDT 24	127162918904 ps
T417	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3336708860	Jul 23 05:41:29 PM PDT 24	Jul 23 05:41:33 PM PDT 24	2472938028 ps
T66	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.309596633	Jul 23 05:38:44 PM PDT 24	Jul 23 05:39:28 PM PDT 24	35092216377 ps
T418	/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.3845264056	Jul 23 05:40:59 PM PDT 24	Jul 23 05:41:02 PM PDT 24	2639981996 ps
T419	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2912483289	Jul 23 05:40:34 PM PDT 24	Jul 23 05:40:41 PM PDT 24	2511690596 ps
T420	/workspace/coverage/default/7.sysrst_ctrl_smoke.3294065038	Jul 23 05:39:36 PM PDT 24	Jul 23 05:39:39 PM PDT 24	2127526786 ps
T421	/workspace/coverage/default/29.sysrst_ctrl_alert_test.1109672193	Jul 23 05:41:31 PM PDT 24	Jul 23 05:41:34 PM PDT 24	2048088541 ps
T422	/workspace/coverage/default/30.sysrst_ctrl_smoke.1531962887	Jul 23 05:41:30 PM PDT 24	Jul 23 05:41:37 PM PDT 24	2111156293 ps
T423	/workspace/coverage/default/23.sysrst_ctrl_alert_test.2990813772	Jul 23 05:41:00 PM PDT 24	Jul 23 05:41:04 PM PDT 24	2032583257 ps
T67	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.538305689	Jul 23 05:42:57 PM PDT 24	Jul 23 05:43:52 PM PDT 24	77505883364 ps
T424	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.455698816	Jul 23 05:43:03 PM PDT 24	Jul 23 05:44:46 PM PDT 24	38222903328 ps
T425	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.1629771979	Jul 23 05:40:38 PM PDT 24	Jul 23 05:41:22 PM PDT 24	16395715044 ps
T426	/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.3861273247	Jul 23 05:40:56 PM PDT 24	Jul 23 05:41:02 PM PDT 24	3153645153 ps
T427	/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.3651846819	Jul 23 05:40:19 PM PDT 24	Jul 23 05:40:28 PM PDT 24	3148523496 ps
T282	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.647431650	Jul 23 05:42:04 PM PDT 24	Jul 23 05:42:13 PM PDT 24	2461003737 ps
T83	/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2354404824	Jul 23 05:42:54 PM PDT 24	Jul 23 05:43:01 PM PDT 24	25398073920 ps
T274	/workspace/coverage/default/39.sysrst_ctrl_stress_all.3776727948	Jul 23 05:42:14 PM PDT 24	Jul 23 05:42:19 PM PDT 24	7611230196 ps
T428	/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1235489974	Jul 23 05:41:15 PM PDT 24	Jul 23 05:41:23 PM PDT 24	2185592559 ps
T429	/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.532290233	Jul 23 05:38:53 PM PDT 24	Jul 23 05:38:56 PM PDT 24	2537324644 ps
T68	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.1551814202	Jul 23 05:42:06 PM PDT 24	Jul 23 05:42:09 PM PDT 24	3693100126 ps