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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.69 98.82 96.94 100.00 96.15 98.26 99.52 94.13


Total test records in report: 913
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T426 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2675193782 Jul 27 05:44:07 PM PDT 24 Jul 27 05:44:14 PM PDT 24 4418533034 ps
T119 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1061944577 Jul 27 05:43:24 PM PDT 24 Jul 27 05:43:28 PM PDT 24 5793404680 ps
T427 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.3213546702 Jul 27 05:42:41 PM PDT 24 Jul 27 05:42:48 PM PDT 24 2611908179 ps
T161 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.2862840489 Jul 27 05:43:20 PM PDT 24 Jul 27 05:43:25 PM PDT 24 5487493066 ps
T428 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.370646757 Jul 27 05:43:32 PM PDT 24 Jul 27 05:43:35 PM PDT 24 2534659650 ps
T70 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.3764105474 Jul 27 05:42:44 PM PDT 24 Jul 27 05:42:59 PM PDT 24 22053037348 ps
T258 /workspace/coverage/default/26.sysrst_ctrl_alert_test.1664154577 Jul 27 05:43:40 PM PDT 24 Jul 27 05:43:43 PM PDT 24 2022886754 ps
T232 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1131147106 Jul 27 05:44:28 PM PDT 24 Jul 27 05:44:45 PM PDT 24 23596592937 ps
T71 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.554111011 Jul 27 05:42:38 PM PDT 24 Jul 27 05:43:27 PM PDT 24 42046840111 ps
T259 /workspace/coverage/default/44.sysrst_ctrl_smoke.1098241900 Jul 27 05:44:19 PM PDT 24 Jul 27 05:44:25 PM PDT 24 2111278443 ps
T260 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.870703646 Jul 27 05:44:16 PM PDT 24 Jul 27 05:44:49 PM PDT 24 48619364888 ps
T101 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.2665870605 Jul 27 05:44:30 PM PDT 24 Jul 27 05:45:16 PM PDT 24 37169449019 ps
T261 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.212094427 Jul 27 05:43:26 PM PDT 24 Jul 27 05:43:33 PM PDT 24 7217748045 ps
T262 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.913394067 Jul 27 05:44:36 PM PDT 24 Jul 27 05:48:00 PM PDT 24 85472722886 ps
T241 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.1330600353 Jul 27 05:42:59 PM PDT 24 Jul 27 05:43:34 PM PDT 24 57401836527 ps
T357 /workspace/coverage/default/34.sysrst_ctrl_stress_all.1846891663 Jul 27 05:43:55 PM PDT 24 Jul 27 05:44:44 PM PDT 24 20178135612 ps
T429 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.541925463 Jul 27 05:43:25 PM PDT 24 Jul 27 05:43:33 PM PDT 24 2609618230 ps
T430 /workspace/coverage/default/30.sysrst_ctrl_alert_test.13122458 Jul 27 05:43:53 PM PDT 24 Jul 27 05:43:59 PM PDT 24 2013754088 ps
T311 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3831324701 Jul 27 05:43:01 PM PDT 24 Jul 27 05:43:50 PM PDT 24 71997638183 ps
T431 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3025270958 Jul 27 05:44:28 PM PDT 24 Jul 27 05:44:33 PM PDT 24 3183120138 ps
T432 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.612822487 Jul 27 05:44:18 PM PDT 24 Jul 27 05:44:25 PM PDT 24 2463306694 ps
T245 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1584066159 Jul 27 05:44:30 PM PDT 24 Jul 27 05:45:48 PM PDT 24 171183502584 ps
T91 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3277021959 Jul 27 05:44:28 PM PDT 24 Jul 27 05:45:22 PM PDT 24 40558391673 ps
T332 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3331358462 Jul 27 05:44:30 PM PDT 24 Jul 27 05:49:21 PM PDT 24 106669536751 ps
T162 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.2135939825 Jul 27 05:43:23 PM PDT 24 Jul 27 05:43:30 PM PDT 24 3058334295 ps
T433 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.2360839671 Jul 27 05:42:55 PM PDT 24 Jul 27 05:42:57 PM PDT 24 11799584042 ps
T434 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.326045996 Jul 27 05:44:17 PM PDT 24 Jul 27 05:44:20 PM PDT 24 3532874447 ps
T435 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.728000160 Jul 27 05:44:07 PM PDT 24 Jul 27 05:44:17 PM PDT 24 3509660145 ps
T436 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1403625090 Jul 27 05:42:45 PM PDT 24 Jul 27 05:42:51 PM PDT 24 3681824977 ps
T437 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1929158272 Jul 27 05:43:26 PM PDT 24 Jul 27 05:43:31 PM PDT 24 2840042920 ps
T438 /workspace/coverage/default/26.sysrst_ctrl_stress_all.3754009249 Jul 27 05:43:36 PM PDT 24 Jul 27 05:44:01 PM PDT 24 12262038069 ps
T249 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.3015900211 Jul 27 05:43:49 PM PDT 24 Jul 27 05:48:35 PM PDT 24 102690691097 ps
T439 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3162566033 Jul 27 05:43:01 PM PDT 24 Jul 27 05:43:04 PM PDT 24 2251981557 ps
T440 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.4166798231 Jul 27 05:43:57 PM PDT 24 Jul 27 05:44:01 PM PDT 24 4024606454 ps
T441 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1718521497 Jul 27 05:44:29 PM PDT 24 Jul 27 05:46:00 PM PDT 24 32987148865 ps
T442 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.857344054 Jul 27 05:42:34 PM PDT 24 Jul 27 05:42:37 PM PDT 24 2523975624 ps
T443 /workspace/coverage/default/16.sysrst_ctrl_stress_all.1617488380 Jul 27 05:43:25 PM PDT 24 Jul 27 05:43:41 PM PDT 24 6214721629 ps
T444 /workspace/coverage/default/29.sysrst_ctrl_alert_test.1625016493 Jul 27 05:43:38 PM PDT 24 Jul 27 05:43:42 PM PDT 24 2021503805 ps
T445 /workspace/coverage/default/47.sysrst_ctrl_alert_test.1705100305 Jul 27 05:44:27 PM PDT 24 Jul 27 05:44:28 PM PDT 24 2040370804 ps
T446 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2749502476 Jul 27 05:44:31 PM PDT 24 Jul 27 05:44:33 PM PDT 24 2536238455 ps
T447 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1020140734 Jul 27 05:42:45 PM PDT 24 Jul 27 05:42:52 PM PDT 24 4954089292 ps
T242 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3567221075 Jul 27 05:42:59 PM PDT 24 Jul 27 05:45:20 PM PDT 24 57345727078 ps
T448 /workspace/coverage/default/44.sysrst_ctrl_alert_test.2909411479 Jul 27 05:44:30 PM PDT 24 Jul 27 05:44:32 PM PDT 24 2043936260 ps
T148 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.3962226289 Jul 27 05:44:26 PM PDT 24 Jul 27 05:44:30 PM PDT 24 2507683051 ps
T449 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.665550888 Jul 27 05:43:30 PM PDT 24 Jul 27 05:43:32 PM PDT 24 2663254592 ps
T327 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.500913531 Jul 27 05:43:34 PM PDT 24 Jul 27 05:44:45 PM PDT 24 102922967164 ps
T450 /workspace/coverage/default/32.sysrst_ctrl_alert_test.1755083835 Jul 27 05:43:48 PM PDT 24 Jul 27 05:43:50 PM PDT 24 2023463446 ps
T120 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.729900608 Jul 27 05:43:40 PM PDT 24 Jul 27 05:43:47 PM PDT 24 6789933613 ps
T243 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.2079261266 Jul 27 05:44:14 PM PDT 24 Jul 27 05:48:45 PM PDT 24 103448993423 ps
T451 /workspace/coverage/default/8.sysrst_ctrl_smoke.2825324114 Jul 27 05:43:07 PM PDT 24 Jul 27 05:43:14 PM PDT 24 2111082178 ps
T452 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2190573610 Jul 27 05:44:19 PM PDT 24 Jul 27 05:44:20 PM PDT 24 2065692825 ps
T453 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2873014438 Jul 27 05:42:48 PM PDT 24 Jul 27 05:42:59 PM PDT 24 3965434525 ps
T454 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2489821 Jul 27 05:43:35 PM PDT 24 Jul 27 05:43:38 PM PDT 24 2620675147 ps
T455 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.142611522 Jul 27 05:43:32 PM PDT 24 Jul 27 05:43:38 PM PDT 24 2481022259 ps
T456 /workspace/coverage/default/28.sysrst_ctrl_stress_all.3484621439 Jul 27 05:43:37 PM PDT 24 Jul 27 05:43:43 PM PDT 24 8858183605 ps
T457 /workspace/coverage/default/46.sysrst_ctrl_smoke.3351759913 Jul 27 05:44:16 PM PDT 24 Jul 27 05:44:22 PM PDT 24 2109114905 ps
T235 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.2876760902 Jul 27 05:43:07 PM PDT 24 Jul 27 05:44:25 PM PDT 24 28832164795 ps
T306 /workspace/coverage/default/22.sysrst_ctrl_stress_all.3592565701 Jul 27 05:43:31 PM PDT 24 Jul 27 05:53:24 PM PDT 24 248700088841 ps
T458 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.764537490 Jul 27 05:43:57 PM PDT 24 Jul 27 05:44:03 PM PDT 24 2510874386 ps
T459 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.766675580 Jul 27 05:44:16 PM PDT 24 Jul 27 05:44:18 PM PDT 24 2534575133 ps
T460 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3311767361 Jul 27 05:42:40 PM PDT 24 Jul 27 05:42:53 PM PDT 24 4899749810 ps
T236 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3204402715 Jul 27 05:44:29 PM PDT 24 Jul 27 05:46:17 PM PDT 24 46141371086 ps
T461 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.55436376 Jul 27 05:42:37 PM PDT 24 Jul 27 05:42:40 PM PDT 24 2435137394 ps
T462 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.1930041448 Jul 27 05:43:01 PM PDT 24 Jul 27 05:43:03 PM PDT 24 2461750277 ps
T334 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2548538588 Jul 27 05:44:30 PM PDT 24 Jul 27 05:47:03 PM PDT 24 57599460831 ps
T146 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.539492946 Jul 27 05:43:52 PM PDT 24 Jul 27 05:43:55 PM PDT 24 3334744580 ps
T194 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.2912048419 Jul 27 05:42:57 PM PDT 24 Jul 27 05:43:00 PM PDT 24 3092493660 ps
T463 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.2485139778 Jul 27 05:44:00 PM PDT 24 Jul 27 05:44:02 PM PDT 24 2539716223 ps
T464 /workspace/coverage/default/12.sysrst_ctrl_stress_all.3724905714 Jul 27 05:43:04 PM PDT 24 Jul 27 05:43:27 PM PDT 24 11495150308 ps
T361 /workspace/coverage/default/45.sysrst_ctrl_stress_all.2081107137 Jul 27 05:44:18 PM PDT 24 Jul 27 05:45:56 PM PDT 24 673374884760 ps
T352 /workspace/coverage/default/30.sysrst_ctrl_stress_all.1017407716 Jul 27 05:43:54 PM PDT 24 Jul 27 05:47:34 PM PDT 24 82842591722 ps
T465 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1233722127 Jul 27 05:42:42 PM PDT 24 Jul 27 05:42:44 PM PDT 24 2458785766 ps
T466 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2989215177 Jul 27 05:42:38 PM PDT 24 Jul 27 05:42:42 PM PDT 24 2487331362 ps
T467 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3938074717 Jul 27 05:43:24 PM PDT 24 Jul 27 05:43:30 PM PDT 24 2460044180 ps
T468 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3584371932 Jul 27 05:43:30 PM PDT 24 Jul 27 05:43:32 PM PDT 24 3229320480 ps
T323 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2878342232 Jul 27 05:44:36 PM PDT 24 Jul 27 05:47:48 PM PDT 24 75238515591 ps
T251 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1963931153 Jul 27 05:44:33 PM PDT 24 Jul 27 05:45:25 PM PDT 24 63503807436 ps
T230 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.372322215 Jul 27 05:42:51 PM PDT 24 Jul 27 05:44:01 PM PDT 24 25077845550 ps
T469 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3327654770 Jul 27 05:42:45 PM PDT 24 Jul 27 05:44:22 PM PDT 24 840368134583 ps
T470 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.1811144062 Jul 27 05:43:18 PM PDT 24 Jul 27 05:43:28 PM PDT 24 4135679909 ps
T237 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.748975191 Jul 27 05:43:04 PM PDT 24 Jul 27 05:43:21 PM PDT 24 24602607171 ps
T471 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3484768530 Jul 27 05:43:50 PM PDT 24 Jul 27 05:43:53 PM PDT 24 2525797232 ps
T244 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.2698178990 Jul 27 05:42:50 PM PDT 24 Jul 27 05:46:06 PM PDT 24 71955994519 ps
T472 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1938612814 Jul 27 05:43:01 PM PDT 24 Jul 27 05:43:07 PM PDT 24 2120224889 ps
T473 /workspace/coverage/default/15.sysrst_ctrl_stress_all.725776174 Jul 27 05:43:06 PM PDT 24 Jul 27 05:43:15 PM PDT 24 6546623440 ps
T344 /workspace/coverage/default/39.sysrst_ctrl_stress_all.1346764767 Jul 27 05:44:10 PM PDT 24 Jul 27 05:46:28 PM PDT 24 173627328625 ps
T328 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.861473810 Jul 27 05:42:52 PM PDT 24 Jul 27 05:44:18 PM PDT 24 73588739963 ps
T474 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2866878402 Jul 27 05:42:56 PM PDT 24 Jul 27 05:43:00 PM PDT 24 2466276230 ps
T475 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.3576734138 Jul 27 05:43:36 PM PDT 24 Jul 27 05:43:39 PM PDT 24 2463811042 ps
T476 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3257900251 Jul 27 05:44:26 PM PDT 24 Jul 27 05:45:04 PM PDT 24 55526089536 ps
T138 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.456531873 Jul 27 05:43:16 PM PDT 24 Jul 27 05:43:22 PM PDT 24 3518389062 ps
T477 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.1661808102 Jul 27 05:43:33 PM PDT 24 Jul 27 05:43:40 PM PDT 24 2464935500 ps
T174 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.4137147685 Jul 27 05:43:27 PM PDT 24 Jul 27 05:43:31 PM PDT 24 2483023964 ps
T478 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.778930222 Jul 27 05:43:05 PM PDT 24 Jul 27 05:43:13 PM PDT 24 2612551665 ps
T209 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.1508687097 Jul 27 05:44:13 PM PDT 24 Jul 27 05:44:17 PM PDT 24 2884959046 ps
T479 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.1361413971 Jul 27 05:42:51 PM PDT 24 Jul 27 05:42:53 PM PDT 24 2636241761 ps
T362 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1317535084 Jul 27 05:43:09 PM PDT 24 Jul 27 05:47:00 PM PDT 24 894770207660 ps
T342 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.1350425093 Jul 27 05:43:44 PM PDT 24 Jul 27 05:45:30 PM PDT 24 76621081084 ps
T480 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3734201234 Jul 27 05:44:07 PM PDT 24 Jul 27 05:44:16 PM PDT 24 3457308023 ps
T481 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2766552993 Jul 27 05:43:40 PM PDT 24 Jul 27 05:43:48 PM PDT 24 2611106677 ps
T121 /workspace/coverage/default/46.sysrst_ctrl_stress_all.1412334096 Jul 27 05:44:25 PM PDT 24 Jul 27 05:44:30 PM PDT 24 15632812480 ps
T331 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2460879535 Jul 27 05:44:34 PM PDT 24 Jul 27 05:46:30 PM PDT 24 82204559462 ps
T482 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.704572997 Jul 27 05:42:58 PM PDT 24 Jul 27 05:43:00 PM PDT 24 2423748395 ps
T304 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.412179892 Jul 27 05:44:18 PM PDT 24 Jul 27 05:45:57 PM PDT 24 157254779587 ps
T483 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1946251236 Jul 27 05:42:54 PM PDT 24 Jul 27 05:43:07 PM PDT 24 4833694584 ps
T484 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1136257705 Jul 27 05:42:54 PM PDT 24 Jul 27 05:43:11 PM PDT 24 64573504819 ps
T485 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1067510298 Jul 27 05:43:25 PM PDT 24 Jul 27 05:43:32 PM PDT 24 2450490820 ps
T486 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.2460441650 Jul 27 05:43:49 PM PDT 24 Jul 27 05:43:51 PM PDT 24 2141518570 ps
T487 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.171318760 Jul 27 05:44:31 PM PDT 24 Jul 27 05:44:33 PM PDT 24 2515680050 ps
T353 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.1098818743 Jul 27 05:43:51 PM PDT 24 Jul 27 05:45:00 PM PDT 24 109148931990 ps
T488 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.4280798708 Jul 27 05:43:53 PM PDT 24 Jul 27 05:49:07 PM PDT 24 1038403602784 ps
T329 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2760733497 Jul 27 05:44:13 PM PDT 24 Jul 27 05:47:28 PM PDT 24 74438858468 ps
T489 /workspace/coverage/default/11.sysrst_ctrl_stress_all.3284436614 Jul 27 05:43:01 PM PDT 24 Jul 27 05:43:08 PM PDT 24 11201386154 ps
T490 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2023265449 Jul 27 05:43:54 PM PDT 24 Jul 27 05:43:58 PM PDT 24 3817964429 ps
T195 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.3921602881 Jul 27 05:42:43 PM PDT 24 Jul 27 05:42:56 PM PDT 24 5591224784 ps
T491 /workspace/coverage/default/20.sysrst_ctrl_alert_test.2285908483 Jul 27 05:43:27 PM PDT 24 Jul 27 05:43:33 PM PDT 24 2011392996 ps
T492 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3588987363 Jul 27 05:42:39 PM PDT 24 Jul 27 05:42:41 PM PDT 24 2135916958 ps
T493 /workspace/coverage/default/5.sysrst_ctrl_stress_all.3267674233 Jul 27 05:42:50 PM PDT 24 Jul 27 05:44:07 PM PDT 24 138029113082 ps
T494 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1041773850 Jul 27 05:43:56 PM PDT 24 Jul 27 05:43:59 PM PDT 24 2522978597 ps
T102 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.3948785230 Jul 27 05:43:08 PM PDT 24 Jul 27 05:43:54 PM PDT 24 70353329765 ps
T305 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.1091015180 Jul 27 05:42:59 PM PDT 24 Jul 27 05:47:44 PM PDT 24 161912903711 ps
T356 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3811434747 Jul 27 05:43:38 PM PDT 24 Jul 27 05:44:51 PM PDT 24 26335308241 ps
T495 /workspace/coverage/default/24.sysrst_ctrl_alert_test.3538753326 Jul 27 05:43:32 PM PDT 24 Jul 27 05:43:34 PM PDT 24 2033668352 ps
T496 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.1024688648 Jul 27 05:43:30 PM PDT 24 Jul 27 05:43:36 PM PDT 24 2194869923 ps
T497 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2004390532 Jul 27 05:42:42 PM PDT 24 Jul 27 05:42:47 PM PDT 24 21369462830 ps
T318 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.502796659 Jul 27 05:44:05 PM PDT 24 Jul 27 05:46:34 PM PDT 24 119286416909 ps
T310 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.1790906045 Jul 27 05:44:08 PM PDT 24 Jul 27 05:45:03 PM PDT 24 75184217393 ps
T498 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.562039021 Jul 27 05:43:32 PM PDT 24 Jul 27 05:43:39 PM PDT 24 2453735753 ps
T499 /workspace/coverage/default/49.sysrst_ctrl_stress_all.2761355224 Jul 27 05:44:28 PM PDT 24 Jul 27 05:44:35 PM PDT 24 11385611339 ps
T500 /workspace/coverage/default/11.sysrst_ctrl_alert_test.2629993444 Jul 27 05:43:01 PM PDT 24 Jul 27 05:43:07 PM PDT 24 2011560535 ps
T149 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.752046338 Jul 27 05:43:25 PM PDT 24 Jul 27 05:44:16 PM PDT 24 25460153135 ps
T501 /workspace/coverage/default/13.sysrst_ctrl_alert_test.2900337833 Jul 27 05:43:08 PM PDT 24 Jul 27 05:43:12 PM PDT 24 2012268911 ps
T502 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3931830076 Jul 27 05:44:13 PM PDT 24 Jul 27 05:44:23 PM PDT 24 3678124190 ps
T324 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2814996388 Jul 27 05:44:35 PM PDT 24 Jul 27 05:45:56 PM PDT 24 125476566183 ps
T503 /workspace/coverage/default/21.sysrst_ctrl_stress_all.3560166007 Jul 27 05:43:39 PM PDT 24 Jul 27 05:43:48 PM PDT 24 6742394453 ps
T504 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.141009179 Jul 27 05:43:03 PM PDT 24 Jul 27 05:43:06 PM PDT 24 2494718317 ps
T505 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.46552664 Jul 27 05:43:15 PM PDT 24 Jul 27 05:43:18 PM PDT 24 2523077458 ps
T506 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.2606407870 Jul 27 05:43:14 PM PDT 24 Jul 27 05:43:16 PM PDT 24 12262874173 ps
T507 /workspace/coverage/default/7.sysrst_ctrl_alert_test.3313718050 Jul 27 05:42:59 PM PDT 24 Jul 27 05:43:05 PM PDT 24 2012067257 ps
T508 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3268240508 Jul 27 05:43:53 PM PDT 24 Jul 27 05:43:58 PM PDT 24 3103979293 ps
T509 /workspace/coverage/default/41.sysrst_ctrl_alert_test.1930280873 Jul 27 05:44:13 PM PDT 24 Jul 27 05:44:19 PM PDT 24 2009533253 ps
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T515 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3222810903 Jul 27 05:43:14 PM PDT 24 Jul 27 05:43:16 PM PDT 24 2109680324 ps
T343 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.2941887211 Jul 27 05:43:37 PM PDT 24 Jul 27 05:47:27 PM PDT 24 98506975397 ps
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T196 /workspace/coverage/default/48.sysrst_ctrl_stress_all.395552447 Jul 27 05:44:35 PM PDT 24 Jul 27 05:45:12 PM PDT 24 14978657837 ps
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T520 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3919451942 Jul 27 05:43:44 PM PDT 24 Jul 27 05:43:46 PM PDT 24 2533102127 ps
T521 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2573972756 Jul 27 05:44:12 PM PDT 24 Jul 27 05:44:14 PM PDT 24 4212458916 ps
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T523 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2619752867 Jul 27 05:43:51 PM PDT 24 Jul 27 05:43:53 PM PDT 24 2936502144 ps
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T530 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.2314484957 Jul 27 05:42:59 PM PDT 24 Jul 27 05:43:01 PM PDT 24 3438114859 ps
T531 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.884460687 Jul 27 05:43:02 PM PDT 24 Jul 27 05:43:10 PM PDT 24 2457299646 ps
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T537 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.3699705134 Jul 27 05:43:11 PM PDT 24 Jul 27 05:43:13 PM PDT 24 3616269377 ps
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T540 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2979352395 Jul 27 05:44:22 PM PDT 24 Jul 27 05:44:28 PM PDT 24 3881548460 ps
T541 /workspace/coverage/default/33.sysrst_ctrl_alert_test.2278264347 Jul 27 05:43:49 PM PDT 24 Jul 27 05:43:55 PM PDT 24 2012919355 ps
T542 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.833351041 Jul 27 05:44:23 PM PDT 24 Jul 27 05:44:25 PM PDT 24 2129911919 ps
T543 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1045303577 Jul 27 05:42:49 PM PDT 24 Jul 27 05:42:52 PM PDT 24 3207885174 ps
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T548 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3276472531 Jul 27 05:42:49 PM PDT 24 Jul 27 05:42:54 PM PDT 24 3407393783 ps
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T550 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.3123262977 Jul 27 05:42:57 PM PDT 24 Jul 27 05:43:00 PM PDT 24 4246813065 ps
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T72 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.2829504974 Jul 27 05:42:43 PM PDT 24 Jul 27 05:43:08 PM PDT 24 42150114562 ps
T552 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1156915559 Jul 27 05:42:41 PM PDT 24 Jul 27 05:42:45 PM PDT 24 2615409854 ps
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T220 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.559791874 Jul 27 05:43:52 PM PDT 24 Jul 27 05:43:54 PM PDT 24 4869472443 ps
T555 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.3162351269 Jul 27 05:43:53 PM PDT 24 Jul 27 05:44:02 PM PDT 24 3154582490 ps
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T557 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.843258727 Jul 27 05:43:12 PM PDT 24 Jul 27 05:43:17 PM PDT 24 3667625912 ps
T558 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.1921668340 Jul 27 05:43:43 PM PDT 24 Jul 27 05:43:51 PM PDT 24 2612919481 ps
T559 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1293487683 Jul 27 05:43:34 PM PDT 24 Jul 27 05:43:36 PM PDT 24 2531647900 ps
T560 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.3195028635 Jul 27 05:43:13 PM PDT 24 Jul 27 05:43:14 PM PDT 24 2132863415 ps
T561 /workspace/coverage/default/3.sysrst_ctrl_stress_all.3133239584 Jul 27 05:42:43 PM PDT 24 Jul 27 05:43:02 PM PDT 24 11014694941 ps
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T563 /workspace/coverage/default/46.sysrst_ctrl_alert_test.3313821048 Jul 27 05:44:23 PM PDT 24 Jul 27 05:44:25 PM PDT 24 2033630677 ps
T564 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3123744058 Jul 27 05:43:35 PM PDT 24 Jul 27 05:43:42 PM PDT 24 2512787155 ps
T565 /workspace/coverage/default/43.sysrst_ctrl_stress_all.1481135625 Jul 27 05:44:15 PM PDT 24 Jul 27 05:44:37 PM PDT 24 7715210329 ps
T566 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2907297130 Jul 27 05:44:23 PM PDT 24 Jul 27 05:44:25 PM PDT 24 2518350609 ps
T567 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3840645819 Jul 27 05:44:38 PM PDT 24 Jul 27 05:44:53 PM PDT 24 60858808170 ps
T568 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2138769113 Jul 27 05:44:28 PM PDT 24 Jul 27 05:45:04 PM PDT 24 27593232688 ps
T569 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2967316741 Jul 27 05:44:34 PM PDT 24 Jul 27 05:45:16 PM PDT 24 33034545491 ps
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T571 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3396780834 Jul 27 05:44:23 PM PDT 24 Jul 27 05:44:29 PM PDT 24 2236788576 ps
T572 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3545621534 Jul 27 05:42:44 PM PDT 24 Jul 27 05:42:51 PM PDT 24 2454198817 ps
T573 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3395366115 Jul 27 05:43:11 PM PDT 24 Jul 27 05:43:14 PM PDT 24 3707133473 ps
T185 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2166367400 Jul 27 05:43:37 PM PDT 24 Jul 27 05:45:10 PM PDT 24 38436249582 ps
T104 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.172607468 Jul 27 05:43:19 PM PDT 24 Jul 27 05:44:11 PM PDT 24 75969974320 ps
T574 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3647856261 Jul 27 05:42:41 PM PDT 24 Jul 27 05:42:43 PM PDT 24 2625696912 ps
T575 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.446913390 Jul 27 05:42:45 PM PDT 24 Jul 27 05:42:52 PM PDT 24 2220864730 ps
T576 /workspace/coverage/default/42.sysrst_ctrl_smoke.983919514 Jul 27 05:44:08 PM PDT 24 Jul 27 05:44:10 PM PDT 24 2132924015 ps
T577 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3532484593 Jul 27 05:42:32 PM PDT 24 Jul 27 05:42:34 PM PDT 24 2208681624 ps
T578 /workspace/coverage/default/14.sysrst_ctrl_stress_all.3591930746 Jul 27 05:43:12 PM PDT 24 Jul 27 05:43:41 PM PDT 24 14806911315 ps
T105 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.107575951 Jul 27 05:43:27 PM PDT 24 Jul 27 05:50:35 PM PDT 24 157335225382 ps
T106 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.3746819118 Jul 27 05:43:57 PM PDT 24 Jul 27 05:45:53 PM PDT 24 45091932388 ps
T579 /workspace/coverage/default/36.sysrst_ctrl_smoke.2196350053 Jul 27 05:44:01 PM PDT 24 Jul 27 05:44:04 PM PDT 24 2121512341 ps
T580 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2085247748 Jul 27 05:44:23 PM PDT 24 Jul 27 05:45:24 PM PDT 24 27082586149 ps
T581 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.4091797740 Jul 27 05:44:10 PM PDT 24 Jul 27 05:44:12 PM PDT 24 3042658100 ps
T582 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2377727456 Jul 27 05:43:57 PM PDT 24 Jul 27 05:44:03 PM PDT 24 2155231663 ps
T583 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.367707545 Jul 27 05:42:44 PM PDT 24 Jul 27 05:42:46 PM PDT 24 4242803083 ps
T107 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1633892412 Jul 27 05:43:52 PM PDT 24 Jul 27 05:44:37 PM PDT 24 41506714343 ps
T584 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3003515190 Jul 27 05:43:12 PM PDT 24 Jul 27 05:43:19 PM PDT 24 2512082143 ps
T585 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.4142410136 Jul 27 05:44:10 PM PDT 24 Jul 27 05:44:18 PM PDT 24 2510510825 ps
T586 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.3219263680 Jul 27 05:43:25 PM PDT 24 Jul 27 05:43:30 PM PDT 24 2128448701 ps
T587 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1331847145 Jul 27 05:42:52 PM PDT 24 Jul 27 05:43:17 PM PDT 24 18875411382 ps
T588 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3433298804 Jul 27 05:44:13 PM PDT 24 Jul 27 05:44:20 PM PDT 24 7737809952 ps
T589 /workspace/coverage/default/19.sysrst_ctrl_alert_test.2359154097 Jul 27 05:43:27 PM PDT 24 Jul 27 05:43:29 PM PDT 24 2048377721 ps
T590 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.121678732 Jul 27 05:43:54 PM PDT 24 Jul 27 05:44:00 PM PDT 24 2035220967 ps
T591 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2415538682 Jul 27 05:43:31 PM PDT 24 Jul 27 05:43:35 PM PDT 24 2791927164 ps
T592 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.92769867 Jul 27 05:44:27 PM PDT 24 Jul 27 05:45:23 PM PDT 24 22827703502 ps
T593 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.262491528 Jul 27 05:43:50 PM PDT 24 Jul 27 05:43:53 PM PDT 24 2483155833 ps
T594 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.2184800289 Jul 27 05:43:16 PM PDT 24 Jul 27 05:43:27 PM PDT 24 3594954331 ps
T595 /workspace/coverage/default/17.sysrst_ctrl_alert_test.421452006 Jul 27 05:43:09 PM PDT 24 Jul 27 05:43:11 PM PDT 24 2033418994 ps
T596 /workspace/coverage/default/12.sysrst_ctrl_alert_test.2951507617 Jul 27 05:43:07 PM PDT 24 Jul 27 05:43:13 PM PDT 24 2014788413 ps
T256 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.71992621 Jul 27 05:42:42 PM PDT 24 Jul 27 05:43:10 PM PDT 24 42093142655 ps
T597 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.4083479591 Jul 27 05:42:43 PM PDT 24 Jul 27 05:42:46 PM PDT 24 3891838745 ps
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