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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.69 98.82 96.94 100.00 96.15 98.26 99.52 94.13


Total test records in report: 913
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T598 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1861251322 Jul 27 05:43:01 PM PDT 24 Jul 27 05:43:03 PM PDT 24 2630222433 ps
T599 /workspace/coverage/default/7.sysrst_ctrl_smoke.2840342538 Jul 27 05:42:48 PM PDT 24 Jul 27 05:42:50 PM PDT 24 2127005789 ps
T302 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.1902583617 Jul 27 05:43:49 PM PDT 24 Jul 27 05:45:20 PM PDT 24 40172162893 ps
T600 /workspace/coverage/default/30.sysrst_ctrl_smoke.3260132020 Jul 27 05:43:39 PM PDT 24 Jul 27 05:43:42 PM PDT 24 2121620037 ps
T601 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.465774859 Jul 27 05:43:36 PM PDT 24 Jul 27 05:43:40 PM PDT 24 2482230207 ps
T602 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1495711215 Jul 27 05:42:46 PM PDT 24 Jul 27 05:42:49 PM PDT 24 2532508214 ps
T603 /workspace/coverage/default/35.sysrst_ctrl_alert_test.1574498984 Jul 27 05:43:55 PM PDT 24 Jul 27 05:44:00 PM PDT 24 2016387237 ps
T604 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.994091160 Jul 27 05:44:27 PM PDT 24 Jul 27 05:45:13 PM PDT 24 63440110284 ps
T605 /workspace/coverage/default/3.sysrst_ctrl_smoke.172704438 Jul 27 05:42:50 PM PDT 24 Jul 27 05:42:57 PM PDT 24 2109576622 ps
T606 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.642860982 Jul 27 05:43:58 PM PDT 24 Jul 27 05:44:02 PM PDT 24 2470261373 ps
T76 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.3880579520 Jul 27 05:42:53 PM PDT 24 Jul 27 05:43:14 PM PDT 24 31725798894 ps
T607 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1790007367 Jul 27 05:44:38 PM PDT 24 Jul 27 05:44:57 PM PDT 24 29856465079 ps
T608 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1164639977 Jul 27 05:43:40 PM PDT 24 Jul 27 05:43:50 PM PDT 24 3703600116 ps
T609 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2556682946 Jul 27 05:42:59 PM PDT 24 Jul 27 05:43:06 PM PDT 24 2510893679 ps
T610 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1745013810 Jul 27 05:43:08 PM PDT 24 Jul 27 05:43:11 PM PDT 24 2042303752 ps
T184 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2330936300 Jul 27 05:42:34 PM PDT 24 Jul 27 05:44:03 PM PDT 24 310707491772 ps
T611 /workspace/coverage/default/8.sysrst_ctrl_stress_all.3477209968 Jul 27 05:42:49 PM PDT 24 Jul 27 05:43:14 PM PDT 24 9222274169 ps
T612 /workspace/coverage/default/18.sysrst_ctrl_smoke.4115077680 Jul 27 05:43:16 PM PDT 24 Jul 27 05:43:18 PM PDT 24 2125622376 ps
T613 /workspace/coverage/default/1.sysrst_ctrl_smoke.2341976835 Jul 27 05:42:36 PM PDT 24 Jul 27 05:42:42 PM PDT 24 2111217075 ps
T614 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2592845760 Jul 27 05:44:05 PM PDT 24 Jul 27 05:44:09 PM PDT 24 2512248480 ps
T615 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3466491345 Jul 27 05:42:42 PM PDT 24 Jul 27 05:43:19 PM PDT 24 36588818372 ps
T616 /workspace/coverage/default/40.sysrst_ctrl_alert_test.1748344136 Jul 27 05:44:04 PM PDT 24 Jul 27 05:44:08 PM PDT 24 2016036416 ps
T134 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.777286002 Jul 27 05:43:36 PM PDT 24 Jul 27 05:43:46 PM PDT 24 3199931223 ps
T617 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3911331138 Jul 27 05:43:23 PM PDT 24 Jul 27 05:43:26 PM PDT 24 2526943775 ps
T618 /workspace/coverage/default/13.sysrst_ctrl_smoke.3056435078 Jul 27 05:43:03 PM PDT 24 Jul 27 05:43:08 PM PDT 24 2111694539 ps
T619 /workspace/coverage/default/29.sysrst_ctrl_smoke.3293617574 Jul 27 05:43:40 PM PDT 24 Jul 27 05:43:42 PM PDT 24 2117811567 ps
T620 /workspace/coverage/default/28.sysrst_ctrl_alert_test.55669812 Jul 27 05:43:40 PM PDT 24 Jul 27 05:43:44 PM PDT 24 2016361725 ps
T621 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1226447878 Jul 27 05:44:19 PM PDT 24 Jul 27 05:44:27 PM PDT 24 2512648482 ps
T622 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2041594241 Jul 27 05:43:37 PM PDT 24 Jul 27 05:43:39 PM PDT 24 2638068419 ps
T226 /workspace/coverage/default/23.sysrst_ctrl_stress_all.4195231635 Jul 27 05:43:29 PM PDT 24 Jul 27 05:43:40 PM PDT 24 8752975770 ps
T623 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.2482588302 Jul 27 05:43:50 PM PDT 24 Jul 27 05:43:52 PM PDT 24 2647088760 ps
T624 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3762343429 Jul 27 05:43:30 PM PDT 24 Jul 27 05:43:34 PM PDT 24 3518240842 ps
T625 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.856001086 Jul 27 05:42:56 PM PDT 24 Jul 27 05:42:59 PM PDT 24 4871059278 ps
T626 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1549783750 Jul 27 05:42:54 PM PDT 24 Jul 27 05:42:59 PM PDT 24 2512089854 ps
T88 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2511228274 Jul 27 05:43:53 PM PDT 24 Jul 27 05:46:46 PM PDT 24 283166815494 ps
T627 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.951169013 Jul 27 05:43:54 PM PDT 24 Jul 27 05:44:00 PM PDT 24 2060826332 ps
T628 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3220327170 Jul 27 05:43:06 PM PDT 24 Jul 27 05:43:17 PM PDT 24 4018820114 ps
T150 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1184440080 Jul 27 05:43:31 PM PDT 24 Jul 27 05:43:34 PM PDT 24 4313030096 ps
T629 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.366507560 Jul 27 05:43:21 PM PDT 24 Jul 27 05:43:25 PM PDT 24 2617790603 ps
T321 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.3489104317 Jul 27 05:43:55 PM PDT 24 Jul 27 05:44:55 PM PDT 24 47134205555 ps
T630 /workspace/coverage/default/27.sysrst_ctrl_alert_test.1910282498 Jul 27 05:43:36 PM PDT 24 Jul 27 05:43:38 PM PDT 24 2038098484 ps
T631 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3204825913 Jul 27 05:43:24 PM PDT 24 Jul 27 05:43:40 PM PDT 24 75776020475 ps
T314 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.182203789 Jul 27 05:43:29 PM PDT 24 Jul 27 05:45:01 PM PDT 24 156374806889 ps
T632 /workspace/coverage/default/36.sysrst_ctrl_stress_all.589078299 Jul 27 05:43:58 PM PDT 24 Jul 27 05:44:30 PM PDT 24 11521932279 ps
T633 /workspace/coverage/default/24.sysrst_ctrl_stress_all.1380123912 Jul 27 05:43:28 PM PDT 24 Jul 27 05:43:53 PM PDT 24 9821125194 ps
T634 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3258919918 Jul 27 05:42:59 PM PDT 24 Jul 27 05:43:07 PM PDT 24 2511660952 ps
T85 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.734136469 Jul 27 05:44:28 PM PDT 24 Jul 27 05:46:28 PM PDT 24 99600043017 ps
T635 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3017319896 Jul 27 05:43:07 PM PDT 24 Jul 27 05:43:15 PM PDT 24 2510485499 ps
T636 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.2582043529 Jul 27 05:42:51 PM PDT 24 Jul 27 05:45:18 PM PDT 24 56281247217 ps
T358 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1702054930 Jul 27 05:43:38 PM PDT 24 Jul 27 05:45:00 PM PDT 24 30284762569 ps
T637 /workspace/coverage/default/42.sysrst_ctrl_alert_test.910797400 Jul 27 05:44:09 PM PDT 24 Jul 27 05:44:12 PM PDT 24 2023887597 ps
T638 /workspace/coverage/default/32.sysrst_ctrl_smoke.746911467 Jul 27 05:43:49 PM PDT 24 Jul 27 05:43:55 PM PDT 24 2108709302 ps
T639 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.637741665 Jul 27 05:44:28 PM PDT 24 Jul 27 05:44:34 PM PDT 24 2452817807 ps
T335 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3743817293 Jul 27 05:44:09 PM PDT 24 Jul 27 05:49:22 PM PDT 24 127481648242 ps
T640 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.2159160629 Jul 27 05:43:38 PM PDT 24 Jul 27 05:43:40 PM PDT 24 2987808402 ps
T108 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.569579397 Jul 27 05:43:57 PM PDT 24 Jul 27 05:44:46 PM PDT 24 284178977205 ps
T200 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3570266045 Jul 27 05:43:13 PM PDT 24 Jul 27 05:43:16 PM PDT 24 2483635002 ps
T201 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.3707296199 Jul 27 05:43:14 PM PDT 24 Jul 27 05:43:16 PM PDT 24 2955346265 ps
T202 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.3583955518 Jul 27 05:43:43 PM PDT 24 Jul 27 05:46:33 PM PDT 24 162780356517 ps
T203 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1895247287 Jul 27 05:44:20 PM PDT 24 Jul 27 05:44:26 PM PDT 24 2610253102 ps
T204 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.85174980 Jul 27 05:42:43 PM PDT 24 Jul 27 05:42:50 PM PDT 24 4565456776 ps
T205 /workspace/coverage/default/41.sysrst_ctrl_stress_all.1278849391 Jul 27 05:44:18 PM PDT 24 Jul 27 05:44:37 PM PDT 24 7220905976 ps
T206 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2370230518 Jul 27 05:42:33 PM PDT 24 Jul 27 05:42:40 PM PDT 24 2164702631 ps
T207 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3631207727 Jul 27 05:42:52 PM PDT 24 Jul 27 05:42:58 PM PDT 24 4635042595 ps
T208 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3524284932 Jul 27 05:43:51 PM PDT 24 Jul 27 05:43:53 PM PDT 24 2051685221 ps
T641 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2577330340 Jul 27 05:44:10 PM PDT 24 Jul 27 05:44:12 PM PDT 24 2063047240 ps
T336 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.854008627 Jul 27 05:43:25 PM PDT 24 Jul 27 05:46:25 PM PDT 24 69099079348 ps
T642 /workspace/coverage/default/27.sysrst_ctrl_stress_all.1667392928 Jul 27 05:43:41 PM PDT 24 Jul 27 05:44:29 PM PDT 24 72336293003 ps
T643 /workspace/coverage/default/5.sysrst_ctrl_alert_test.3952429047 Jul 27 05:42:45 PM PDT 24 Jul 27 05:42:49 PM PDT 24 2018075727 ps
T644 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3393179765 Jul 27 05:44:16 PM PDT 24 Jul 27 05:44:23 PM PDT 24 2093913128 ps
T271 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1841061049 Jul 27 05:44:11 PM PDT 24 Jul 27 05:46:02 PM PDT 24 49122143251 ps
T645 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.563099354 Jul 27 05:44:23 PM PDT 24 Jul 27 05:45:43 PM PDT 24 125004998193 ps
T646 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.3155989438 Jul 27 05:44:04 PM PDT 24 Jul 27 05:44:06 PM PDT 24 2643094120 ps
T647 /workspace/coverage/default/4.sysrst_ctrl_alert_test.513178609 Jul 27 05:42:57 PM PDT 24 Jul 27 05:43:03 PM PDT 24 2016600895 ps
T648 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3792469437 Jul 27 05:43:55 PM PDT 24 Jul 27 05:44:07 PM PDT 24 4066379275 ps
T649 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2413784170 Jul 27 05:44:23 PM PDT 24 Jul 27 05:44:25 PM PDT 24 3256635797 ps
T650 /workspace/coverage/default/10.sysrst_ctrl_alert_test.1280746271 Jul 27 05:42:55 PM PDT 24 Jul 27 05:42:56 PM PDT 24 2059252356 ps
T217 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.1279468554 Jul 27 05:43:56 PM PDT 24 Jul 27 05:43:58 PM PDT 24 5660107711 ps
T272 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.2492487591 Jul 27 05:43:39 PM PDT 24 Jul 27 05:45:02 PM PDT 24 131094178933 ps
T651 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1599337223 Jul 27 05:44:15 PM PDT 24 Jul 27 05:44:16 PM PDT 24 3002791232 ps
T652 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2167187922 Jul 27 05:42:58 PM PDT 24 Jul 27 05:43:36 PM PDT 24 42199503217 ps
T315 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1213194320 Jul 27 05:43:55 PM PDT 24 Jul 27 05:48:00 PM PDT 24 87936120141 ps
T253 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.1509997601 Jul 27 05:43:53 PM PDT 24 Jul 27 05:45:54 PM PDT 24 171577400505 ps
T653 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3847324160 Jul 27 05:43:37 PM PDT 24 Jul 27 05:43:42 PM PDT 24 2514571505 ps
T654 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3306693246 Jul 27 05:44:22 PM PDT 24 Jul 27 05:44:27 PM PDT 24 3187198948 ps
T655 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.428995045 Jul 27 05:43:37 PM PDT 24 Jul 27 05:45:52 PM PDT 24 55040613417 ps
T656 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2401961471 Jul 27 05:43:23 PM PDT 24 Jul 27 05:43:27 PM PDT 24 2467141096 ps
T657 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.2323681844 Jul 27 05:44:22 PM PDT 24 Jul 27 05:44:31 PM PDT 24 3234263853 ps
T658 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1327869769 Jul 27 05:42:59 PM PDT 24 Jul 27 05:43:06 PM PDT 24 6402794773 ps
T659 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.173657608 Jul 27 05:42:43 PM PDT 24 Jul 27 05:42:51 PM PDT 24 4074281534 ps
T197 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.2782523038 Jul 27 05:43:46 PM PDT 24 Jul 27 05:43:48 PM PDT 24 5878110852 ps
T660 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3985006849 Jul 27 05:43:34 PM PDT 24 Jul 27 05:43:39 PM PDT 24 3422174588 ps
T661 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3742457533 Jul 27 05:43:52 PM PDT 24 Jul 27 05:44:02 PM PDT 24 3877243678 ps
T662 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.4091803553 Jul 27 05:43:43 PM PDT 24 Jul 27 05:43:46 PM PDT 24 2189382553 ps
T663 /workspace/coverage/default/41.sysrst_ctrl_smoke.3866632588 Jul 27 05:44:10 PM PDT 24 Jul 27 05:44:12 PM PDT 24 2142645266 ps
T664 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3718440806 Jul 27 05:44:13 PM PDT 24 Jul 27 05:44:15 PM PDT 24 2466596507 ps
T665 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.2534269109 Jul 27 05:44:10 PM PDT 24 Jul 27 05:44:13 PM PDT 24 2883772858 ps
T666 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.2343684254 Jul 27 05:43:29 PM PDT 24 Jul 27 05:43:38 PM PDT 24 3995893955 ps
T667 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.4248530190 Jul 27 05:42:52 PM PDT 24 Jul 27 05:43:00 PM PDT 24 2464037356 ps
T668 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1540510640 Jul 27 05:43:45 PM PDT 24 Jul 27 05:43:48 PM PDT 24 2536167304 ps
T669 /workspace/coverage/default/43.sysrst_ctrl_alert_test.3393570002 Jul 27 05:44:16 PM PDT 24 Jul 27 05:44:22 PM PDT 24 2011461460 ps
T670 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.1595477204 Jul 27 05:43:46 PM PDT 24 Jul 27 05:43:48 PM PDT 24 3024863538 ps
T198 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.3608979636 Jul 27 05:43:27 PM PDT 24 Jul 27 05:43:36 PM PDT 24 4466549920 ps
T671 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.1210130168 Jul 27 05:43:41 PM PDT 24 Jul 27 05:43:46 PM PDT 24 4978319499 ps
T354 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1824863252 Jul 27 05:44:06 PM PDT 24 Jul 27 05:44:51 PM PDT 24 29089994857 ps
T317 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1863353285 Jul 27 05:43:37 PM PDT 24 Jul 27 05:47:59 PM PDT 24 102830608987 ps
T672 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.16455590 Jul 27 05:44:10 PM PDT 24 Jul 27 05:44:13 PM PDT 24 3844387541 ps
T673 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.166309665 Jul 27 05:42:39 PM PDT 24 Jul 27 05:42:45 PM PDT 24 3156223805 ps
T674 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.3658898707 Jul 27 05:43:01 PM PDT 24 Jul 27 05:43:08 PM PDT 24 2623152394 ps
T339 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.2815364897 Jul 27 05:43:25 PM PDT 24 Jul 27 05:43:50 PM PDT 24 120642310966 ps
T675 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.834346305 Jul 27 05:43:59 PM PDT 24 Jul 27 05:44:14 PM PDT 24 24848196223 ps
T676 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2517051425 Jul 27 05:44:28 PM PDT 24 Jul 27 05:44:34 PM PDT 24 2590304491 ps
T333 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3050320781 Jul 27 05:44:30 PM PDT 24 Jul 27 05:48:15 PM PDT 24 89516573280 ps
T677 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3707126124 Jul 27 05:43:37 PM PDT 24 Jul 27 05:43:41 PM PDT 24 2614218904 ps
T678 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1508551428 Jul 27 05:44:13 PM PDT 24 Jul 27 05:44:18 PM PDT 24 2613754008 ps
T679 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.962122009 Jul 27 05:43:38 PM PDT 24 Jul 27 05:43:39 PM PDT 24 2528642651 ps
T680 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1807541766 Jul 27 05:44:22 PM PDT 24 Jul 27 05:44:24 PM PDT 24 2484390781 ps
T128 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.309289045 Jul 27 05:43:54 PM PDT 24 Jul 27 05:44:01 PM PDT 24 4702170273 ps
T681 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2247979759 Jul 27 05:42:36 PM PDT 24 Jul 27 05:42:39 PM PDT 24 3278638308 ps
T682 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.668431161 Jul 27 05:43:36 PM PDT 24 Jul 27 05:43:39 PM PDT 24 2627619861 ps
T53 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.3370300927 Jul 27 05:42:32 PM PDT 24 Jul 27 05:42:51 PM PDT 24 38980140543 ps
T683 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3826985907 Jul 27 05:44:27 PM PDT 24 Jul 27 05:44:29 PM PDT 24 2632520967 ps
T684 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3786296929 Jul 27 05:43:39 PM PDT 24 Jul 27 05:43:43 PM PDT 24 2109734829 ps
T685 /workspace/coverage/default/33.sysrst_ctrl_smoke.2316120789 Jul 27 05:43:51 PM PDT 24 Jul 27 05:43:58 PM PDT 24 2114057969 ps
T686 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.2276204021 Jul 27 05:43:16 PM PDT 24 Jul 27 05:46:31 PM PDT 24 70072571960 ps
T687 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.2277450605 Jul 27 05:43:19 PM PDT 24 Jul 27 05:43:23 PM PDT 24 2515972762 ps
T688 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.505607349 Jul 27 05:42:39 PM PDT 24 Jul 27 05:42:43 PM PDT 24 2614972613 ps
T689 /workspace/coverage/default/1.sysrst_ctrl_stress_all.431029281 Jul 27 05:42:43 PM PDT 24 Jul 27 05:50:42 PM PDT 24 181063694408 ps
T690 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.2541989926 Jul 27 05:43:14 PM PDT 24 Jul 27 05:43:58 PM PDT 24 68031168147 ps
T691 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.629076555 Jul 27 05:43:22 PM PDT 24 Jul 27 05:43:24 PM PDT 24 2636584547 ps
T692 /workspace/coverage/default/45.sysrst_ctrl_alert_test.3418701688 Jul 27 05:44:14 PM PDT 24 Jul 27 05:44:16 PM PDT 24 2051650205 ps
T693 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.918102461 Jul 27 05:42:44 PM PDT 24 Jul 27 05:42:47 PM PDT 24 3750361824 ps
T694 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2218876299 Jul 27 05:43:53 PM PDT 24 Jul 27 05:45:01 PM PDT 24 27583863408 ps
T695 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.4253811747 Jul 27 05:43:38 PM PDT 24 Jul 27 05:43:42 PM PDT 24 3053062054 ps
T696 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.3304024688 Jul 27 05:43:21 PM PDT 24 Jul 27 05:43:31 PM PDT 24 3970652408 ps
T227 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1999995162 Jul 27 05:43:17 PM PDT 24 Jul 27 05:43:59 PM PDT 24 32650645473 ps
T697 /workspace/coverage/default/48.sysrst_ctrl_smoke.2699006014 Jul 27 05:44:21 PM PDT 24 Jul 27 05:44:23 PM PDT 24 2129478917 ps
T698 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3167816661 Jul 27 05:43:37 PM PDT 24 Jul 27 05:43:40 PM PDT 24 2117996378 ps
T699 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.1120676865 Jul 27 05:43:48 PM PDT 24 Jul 27 05:44:36 PM PDT 24 78875745795 ps
T257 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.923274316 Jul 27 05:42:39 PM PDT 24 Jul 27 05:43:42 PM PDT 24 42017449821 ps
T700 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2661675245 Jul 27 05:43:15 PM PDT 24 Jul 27 05:43:58 PM PDT 24 66491238448 ps
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T316 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.2790057448 Jul 27 05:43:02 PM PDT 24 Jul 27 05:44:51 PM PDT 24 144193127428 ps
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T705 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.1529885030 Jul 27 05:43:19 PM PDT 24 Jul 27 05:43:21 PM PDT 24 2524620464 ps
T706 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3687812591 Jul 27 05:44:33 PM PDT 24 Jul 27 05:45:11 PM PDT 24 75198885790 ps
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T709 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.2467599985 Jul 27 05:43:38 PM PDT 24 Jul 27 05:43:41 PM PDT 24 2485402397 ps
T710 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.4063295936 Jul 27 05:44:30 PM PDT 24 Jul 27 05:44:38 PM PDT 24 2624882707 ps
T711 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1268728958 Jul 27 05:42:52 PM PDT 24 Jul 27 05:42:57 PM PDT 24 58898602115 ps
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T715 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.965763679 Jul 27 05:44:27 PM PDT 24 Jul 27 05:44:33 PM PDT 24 2035504455 ps
T716 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.3603731833 Jul 27 05:43:01 PM PDT 24 Jul 27 05:43:25 PM PDT 24 35033260101 ps
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T719 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2245416835 Jul 27 05:42:43 PM PDT 24 Jul 27 05:42:47 PM PDT 24 2462818912 ps
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T721 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.1981990126 Jul 27 05:43:35 PM PDT 24 Jul 27 05:44:53 PM PDT 24 127906017614 ps
T722 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2974299966 Jul 27 05:43:06 PM PDT 24 Jul 27 05:43:09 PM PDT 24 2568011118 ps
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T724 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.1358932686 Jul 27 05:43:40 PM PDT 24 Jul 27 05:43:44 PM PDT 24 2846687769 ps
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T729 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.631393473 Jul 27 05:42:38 PM PDT 24 Jul 27 05:42:40 PM PDT 24 3451262808 ps
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T730 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.748255559 Jul 27 05:43:47 PM PDT 24 Jul 27 05:43:51 PM PDT 24 2616720184 ps
T731 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3242257041 Jul 27 05:42:56 PM PDT 24 Jul 27 05:42:59 PM PDT 24 3617127419 ps
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T733 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.4125411151 Jul 27 05:43:31 PM PDT 24 Jul 27 05:43:37 PM PDT 24 3161079527 ps
T734 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1802341250 Jul 27 05:44:33 PM PDT 24 Jul 27 05:44:51 PM PDT 24 26858717645 ps
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T736 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.772371650 Jul 27 05:43:29 PM PDT 24 Jul 27 05:45:12 PM PDT 24 119648652424 ps
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T738 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2160147799 Jul 27 05:42:41 PM PDT 24 Jul 27 05:42:43 PM PDT 24 2533707143 ps
T325 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3146639228 Jul 27 05:44:39 PM PDT 24 Jul 27 05:48:48 PM PDT 24 193175486738 ps
T133 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2325469021 Jul 27 05:43:27 PM PDT 24 Jul 27 05:45:50 PM PDT 24 1148801228217 ps
T739 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3577122851 Jul 27 05:43:54 PM PDT 24 Jul 27 05:43:56 PM PDT 24 9296415522 ps
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T741 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1620518159 Jul 27 05:44:25 PM PDT 24 Jul 27 05:45:00 PM PDT 24 53100165618 ps
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T250 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.599387024 Jul 27 05:44:38 PM PDT 24 Jul 27 05:50:51 PM PDT 24 143956264665 ps
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T341 /workspace/coverage/default/9.sysrst_ctrl_stress_all.3676969177 Jul 27 05:42:48 PM PDT 24 Jul 27 05:44:47 PM PDT 24 89625728197 ps
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T326 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2347443016 Jul 27 05:43:19 PM PDT 24 Jul 27 05:44:10 PM PDT 24 124660957588 ps
T747 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.1924865326 Jul 27 05:43:06 PM PDT 24 Jul 27 05:43:08 PM PDT 24 2525657658 ps
T748 /workspace/coverage/default/2.sysrst_ctrl_alert_test.1726677730 Jul 27 05:42:44 PM PDT 24 Jul 27 05:42:45 PM PDT 24 2074952904 ps
T363 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2714379113 Jul 27 05:44:04 PM PDT 24 Jul 27 05:44:55 PM PDT 24 80185538901 ps
T749 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1289264455 Jul 27 05:44:16 PM PDT 24 Jul 27 05:44:17 PM PDT 24 4226634194 ps
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T754 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.101877178 Jul 27 05:43:49 PM PDT 24 Jul 27 05:43:56 PM PDT 24 2611031076 ps
T755 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.1713644219 Jul 27 05:42:39 PM PDT 24 Jul 27 05:42:41 PM PDT 24 2166612602 ps
T756 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3643887161 Jul 27 05:44:05 PM PDT 24 Jul 27 05:44:12 PM PDT 24 2509407091 ps
T757 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1823072480 Jul 27 05:43:28 PM PDT 24 Jul 27 05:44:04 PM PDT 24 73602773642 ps
T758 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.1720574158 Jul 27 05:43:02 PM PDT 24 Jul 27 05:44:39 PM PDT 24 68767425600 ps
T759 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.4271468337 Jul 27 05:44:22 PM PDT 24 Jul 27 05:44:25 PM PDT 24 2517462269 ps
T760 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.3896601811 Jul 27 05:43:52 PM PDT 24 Jul 27 05:43:57 PM PDT 24 4321052462 ps
T761 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1718913563 Jul 27 05:44:30 PM PDT 24 Jul 27 05:45:22 PM PDT 24 83913277715 ps
T762 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3823910369 Jul 27 05:44:26 PM PDT 24 Jul 27 05:44:31 PM PDT 24 3158542675 ps
T763 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.3848842452 Jul 27 05:44:10 PM PDT 24 Jul 27 05:44:17 PM PDT 24 2762200888 ps
T764 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.114759879 Jul 27 05:43:29 PM PDT 24 Jul 27 05:43:30 PM PDT 24 2187927817 ps
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T765 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.3313117718 Jul 27 05:42:34 PM PDT 24 Jul 27 05:42:36 PM PDT 24 4598891688 ps
T766 /workspace/coverage/default/22.sysrst_ctrl_smoke.2624761156 Jul 27 05:43:22 PM PDT 24 Jul 27 05:43:24 PM PDT 24 2128325409 ps
T767 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1265653558 Jul 27 05:43:37 PM PDT 24 Jul 27 05:45:43 PM PDT 24 58083320454 ps
T768 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2420783039 Jul 27 05:44:04 PM PDT 24 Jul 27 05:44:08 PM PDT 24 2619835881 ps
T769 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.759363081 Jul 27 05:43:25 PM PDT 24 Jul 27 05:47:30 PM PDT 24 95004676598 ps
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T770 /workspace/coverage/default/2.sysrst_ctrl_stress_all.1901529263 Jul 27 05:42:45 PM PDT 24 Jul 27 05:43:20 PM PDT 24 13496037031 ps
T771 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.24603628 Jul 27 05:43:23 PM PDT 24 Jul 27 05:43:28 PM PDT 24 3077612728 ps
T345 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.4265130420 Jul 27 05:43:08 PM PDT 24 Jul 27 05:44:11 PM PDT 24 115567808828 ps
T772 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.4133224995 Jul 27 05:42:41 PM PDT 24 Jul 27 05:42:44 PM PDT 24 2529680426 ps
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T774 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2015059039 Jul 27 05:43:07 PM PDT 24 Jul 27 05:43:38 PM PDT 24 49116551557 ps
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T776 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.370286455 Jul 27 05:43:37 PM PDT 24 Jul 27 05:43:38 PM PDT 24 2595093930 ps
T777 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.1532281815 Jul 27 05:43:02 PM PDT 24 Jul 27 05:43:05 PM PDT 24 2520930188 ps
T778 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.3596726460 Jul 27 05:42:34 PM PDT 24 Jul 27 05:42:58 PM PDT 24 35743385144 ps
T779 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.4104789807 Jul 27 05:44:07 PM PDT 24 Jul 27 05:59:42 PM PDT 24 1241746109497 ps
T780 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2604869886 Jul 27 05:44:33 PM PDT 24 Jul 27 05:46:32 PM PDT 24 95529517620 ps
T781 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3529144503 Jul 27 05:43:30 PM PDT 24 Jul 27 05:43:37 PM PDT 24 2510375740 ps
T782 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1983949619 Jul 27 05:43:53 PM PDT 24 Jul 27 05:43:58 PM PDT 24 3145623764 ps
T783 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4150467545 Jul 27 05:44:37 PM PDT 24 Jul 27 05:51:09 PM PDT 24 158254511171 ps
T784 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.3959297568 Jul 27 05:43:31 PM PDT 24 Jul 27 05:43:32 PM PDT 24 3585060323 ps
T785 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1749408195 Jul 27 05:42:52 PM PDT 24 Jul 27 05:42:57 PM PDT 24 3386552826 ps
T786 /workspace/coverage/default/13.sysrst_ctrl_stress_all.3774977187 Jul 27 05:43:08 PM PDT 24 Jul 27 05:43:11 PM PDT 24 6388356147 ps
T787 /workspace/coverage/default/49.sysrst_ctrl_smoke.1027511594 Jul 27 05:44:28 PM PDT 24 Jul 27 05:44:30 PM PDT 24 2133118932 ps
T788 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.420054223 Jul 27 05:43:17 PM PDT 24 Jul 27 05:43:23 PM PDT 24 3710935662 ps
T789 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1988328104 Jul 27 05:43:12 PM PDT 24 Jul 27 05:43:15 PM PDT 24 2479435879 ps
T790 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2480569757 Jul 27 05:44:28 PM PDT 24 Jul 27 05:44:30 PM PDT 24 2312861778 ps
T791 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3541101399 Jul 27 05:44:33 PM PDT 24 Jul 27 05:45:36 PM PDT 24 24330326770 ps
T792 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2128892317 Jul 27 05:42:44 PM PDT 24 Jul 27 05:42:49 PM PDT 24 3339934536 ps
T793 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.660382329 Jul 27 05:43:36 PM PDT 24 Jul 27 05:45:29 PM PDT 24 134161632645 ps
T68 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.3128073119 Jul 27 04:51:38 PM PDT 24 Jul 27 04:51:43 PM PDT 24 2124964038 ps
T26 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3687300583 Jul 27 04:51:37 PM PDT 24 Jul 27 04:51:43 PM PDT 24 2024331691 ps
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