Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.69	98.82	96.94	100.00	96.15	98.26	99.52	94.13

Total tests in report: 913

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
61.52	61.52	78.02	78.02	67.01	67.01	84.70	84.70	26.92	26.92	80.44	80.44	69.46	69.46	24.06	24.06	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1250486659
74.40	12.88	90.91	12.89	84.02	17.01	88.81	4.11	41.67	14.74	91.24	10.79	84.68	15.22	39.45	15.39	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2615735380
81.35	6.96	95.09	4.18	88.55	4.52	92.12	3.31	60.90	19.23	94.97	3.73	92.58	7.90	45.26	5.81	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2825794015
85.04	3.68	96.77	1.68	91.51	2.96	92.12	0.00	78.85	17.95	96.49	1.52	94.22	1.64	45.32	0.05	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1198516335
87.84	2.80	97.52	0.75	92.32	0.81	92.81	0.68	82.69	3.85	96.97	0.48	95.47	1.25	57.10	11.79	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2680143530
89.23	1.39	97.59	0.07	93.66	1.34	93.49	0.68	82.69	0.00	97.08	0.11	95.57	0.10	64.53	7.43	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.2534963594
90.46	1.23	97.76	0.17	93.83	0.18	98.17	4.68	82.69	0.00	97.08	0.00	95.57	0.00	68.08	3.55	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.913958176
91.26	0.80	97.84	0.07	93.96	0.13	98.17	0.00	83.97	1.28	97.15	0.07	95.95	0.39	71.74	3.66	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.569579397
92.05	0.80	98.17	0.34	94.16	0.20	98.17	0.00	87.18	3.21	97.49	0.33	96.82	0.87	72.39	0.65	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.272990913
92.77	0.72	98.17	0.00	94.16	0.00	98.17	0.00	87.18	0.00	97.49	0.00	96.82	0.00	77.40	5.01	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2714379113
93.42	0.65	98.19	0.02	94.16	0.00	98.17	0.00	87.18	0.00	97.52	0.04	96.82	0.00	81.86	4.47	/workspace/coverage/default/22.sysrst_ctrl_stress_all.3592565701
94.02	0.61	98.25	0.06	94.24	0.08	98.17	0.00	88.46	1.28	97.60	0.07	97.11	0.29	84.34	2.48	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2728888824
94.43	0.40	98.25	0.00	94.29	0.05	98.17	0.00	91.03	2.56	97.60	0.00	97.21	0.10	84.45	0.11	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2331193653
94.69	0.26	98.32	0.07	94.36	0.08	98.17	0.00	91.67	0.64	97.71	0.11	97.40	0.19	85.20	0.75	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2330936300
94.95	0.26	98.36	0.04	94.59	0.23	98.17	0.00	91.67	0.00	97.71	0.00	97.69	0.29	86.44	1.24	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.2946680477
95.19	0.25	98.40	0.04	94.67	0.08	98.17	0.00	92.31	0.64	97.74	0.04	97.98	0.29	87.08	0.65	/workspace/coverage/default/19.sysrst_ctrl_stress_all.1473633189
95.43	0.24	98.45	0.06	94.74	0.08	99.54	1.37	92.31	0.00	97.74	0.00	97.98	0.00	87.24	0.16	/workspace/coverage/default/1.sysrst_ctrl_alert_test.2421261505
95.66	0.23	98.49	0.04	94.82	0.08	99.54	0.00	92.95	0.64	97.78	0.04	98.07	0.10	87.94	0.70	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2511228274
95.83	0.17	98.49	0.00	94.82	0.00	99.54	0.00	92.95	0.00	97.78	0.00	98.07	0.00	89.13	1.18	/workspace/coverage/default/42.sysrst_ctrl_stress_all.2049107727
95.97	0.15	98.53	0.04	94.89	0.08	99.54	0.00	93.59	0.64	97.86	0.07	98.27	0.19	89.13	0.00	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3179525942
96.10	0.13	98.53	0.00	95.73	0.83	99.54	0.00	93.59	0.00	97.86	0.00	98.27	0.00	89.18	0.05	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.216755742
96.22	0.12	98.56	0.04	95.75	0.03	99.54	0.00	94.23	0.64	97.89	0.04	98.36	0.10	89.18	0.00	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.2117831957
96.34	0.12	98.56	0.00	95.85	0.10	99.54	0.00	94.23	0.00	97.89	0.00	99.04	0.67	89.24	0.05	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2750746015
96.44	0.11	98.60	0.04	95.85	0.00	99.54	0.00	94.87	0.64	97.97	0.07	99.04	0.00	89.24	0.00	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.4137147685
96.55	0.10	98.62	0.02	95.90	0.05	99.54	0.00	94.87	0.00	97.97	0.00	99.04	0.00	89.88	0.65	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2553927772
96.65	0.10	98.64	0.02	95.90	0.00	99.54	0.00	95.51	0.64	98.00	0.04	99.04	0.00	89.88	0.00	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.3608979636
96.75	0.10	98.66	0.02	95.90	0.00	99.54	0.00	96.15	0.64	98.04	0.04	99.04	0.00	89.88	0.00	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2166367400
96.84	0.10	98.66	0.00	95.93	0.03	100.00	0.46	96.15	0.00	98.04	0.00	99.13	0.10	89.99	0.11	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.923274316
96.93	0.08	98.66	0.00	95.98	0.05	100.00	0.00	96.15	0.00	98.04	0.00	99.23	0.10	90.42	0.43	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3357404249
97.01	0.08	98.68	0.02	95.98	0.00	100.00	0.00	96.15	0.00	98.04	0.00	99.23	0.00	90.96	0.54	/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1641289590
97.06	0.06	98.69	0.02	95.98	0.00	100.00	0.00	96.15	0.00	98.04	0.00	99.23	0.00	91.33	0.38	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3175455419
97.12	0.05	98.69	0.00	95.98	0.00	100.00	0.00	96.15	0.00	98.04	0.00	99.23	0.00	91.71	0.38	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.182203789
97.17	0.05	98.73	0.04	96.13	0.15	100.00	0.00	96.15	0.00	98.11	0.07	99.33	0.10	91.71	0.00	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2928692713
97.22	0.05	98.73	0.00	96.44	0.30	100.00	0.00	96.15	0.00	98.11	0.00	99.33	0.00	91.77	0.05	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1332537760
97.26	0.04	98.75	0.02	96.44	0.00	100.00	0.00	96.15	0.00	98.11	0.00	99.33	0.00	92.03	0.27	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.4011804504
97.30	0.04	98.75	0.00	96.44	0.00	100.00	0.00	96.15	0.00	98.11	0.00	99.33	0.00	92.30	0.27	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.502796659
97.32	0.03	98.75	0.00	96.61	0.18	100.00	0.00	96.15	0.00	98.11	0.00	99.33	0.00	92.30	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3370300927
97.35	0.03	98.75	0.00	96.64	0.03	100.00	0.00	96.15	0.00	98.11	0.00	99.42	0.10	92.36	0.05	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.748975191
97.37	0.02	98.79	0.04	96.64	0.00	100.00	0.00	96.15	0.00	98.19	0.07	99.42	0.00	92.41	0.05	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2325469021
97.39	0.02	98.79	0.00	96.64	0.00	100.00	0.00	96.15	0.00	98.19	0.00	99.42	0.00	92.57	0.16	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2939219043
97.42	0.02	98.79	0.00	96.64	0.00	100.00	0.00	96.15	0.00	98.19	0.00	99.42	0.00	92.73	0.16	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3836130954
97.44	0.02	98.79	0.00	96.71	0.08	100.00	0.00	96.15	0.00	98.19	0.00	99.42	0.00	92.79	0.05	/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.3572483146
97.45	0.02	98.79	0.00	96.74	0.03	100.00	0.00	96.15	0.00	98.19	0.00	99.52	0.10	92.79	0.00	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3799394134
97.47	0.02	98.79	0.00	96.74	0.00	100.00	0.00	96.15	0.00	98.19	0.00	99.52	0.00	92.90	0.11	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.3352920059
97.48	0.02	98.79	0.00	96.74	0.00	100.00	0.00	96.15	0.00	98.19	0.00	99.52	0.00	93.00	0.11	/workspace/coverage/default/0.sysrst_ctrl_stress_all.38255674
97.50	0.02	98.79	0.00	96.74	0.00	100.00	0.00	96.15	0.00	98.19	0.00	99.52	0.00	93.11	0.11	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.4265130420
97.52	0.02	98.79	0.00	96.74	0.00	100.00	0.00	96.15	0.00	98.19	0.00	99.52	0.00	93.22	0.11	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.854008627
97.53	0.02	98.79	0.00	96.74	0.00	100.00	0.00	96.15	0.00	98.19	0.00	99.52	0.00	93.33	0.11	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.3489104317
97.54	0.01	98.79	0.00	96.84	0.10	100.00	0.00	96.15	0.00	98.19	0.00	99.52	0.00	93.33	0.00	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1273506785
97.56	0.01	98.79	0.00	96.87	0.03	100.00	0.00	96.15	0.00	98.19	0.00	99.52	0.00	93.38	0.05	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.599387024
97.56	0.01	98.81	0.02	96.87	0.00	100.00	0.00	96.15	0.00	98.23	0.04	99.52	0.00	93.38	0.00	/workspace/coverage/default/18.sysrst_ctrl_stress_all.2928022459
97.57	0.01	98.82	0.02	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.04	99.52	0.00	93.38	0.00	/workspace/coverage/default/22.sysrst_ctrl_edge_detect.1184440080
97.58	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.43	0.05	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.2297522902
97.59	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.49	0.05	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.2276204021
97.60	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.54	0.05	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2347443016
97.60	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.60	0.05	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.2815364897
97.61	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.65	0.05	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.1371079058
97.62	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.70	0.05	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1863353285
97.63	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.76	0.05	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.1120676865
97.63	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.81	0.05	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1213194320
97.64	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.86	0.05	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.2790057448
97.65	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.92	0.05	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1824863252
97.66	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	93.97	0.05	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4226227369
97.66	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	94.03	0.05	/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2878342232
97.67	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	94.08	0.05	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3331358462
97.68	0.01	98.82	0.00	96.87	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	94.13	0.05	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3366499900
97.68	0.01	98.82	0.00	96.89	0.03	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	94.13	0.00	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1317535084
97.69	0.01	98.82	0.00	96.92	0.03	100.00	0.00	96.15	0.00	98.26	0.00	99.52	0.00	94.13	0.00	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3277021959

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.1805332239
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.2455249932
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1607168682
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3066036105
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1882884579
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.412832907
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1111738477
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2505263539
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1498622394
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.592239815
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1748071803
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.135011607
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3209874522
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.3233558343
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3588180336
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2936492477
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2526352010
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2595754957
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.377115419
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3373587890
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.568930741
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.4227539543
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1785497716
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2495665340
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.94712163
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.4227436355
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.3309009203
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2539526066
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2620697095
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.1125767968
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.673253962
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.4031593998
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.4077107796
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2161407575
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3687300583
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2215162449
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.292643536
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.807968315
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1570251580
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3152230684
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.58366428
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.777237046
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2779508315
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1650325475
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1413729880
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1440552336
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/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.704572997
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2004479908
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.918102461
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.3921602881
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1156915559
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2245416835
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3588987363
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3410256635
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.2829504974
/workspace/coverage/default/4.sysrst_ctrl_smoke.877831385
/workspace/coverage/default/4.sysrst_ctrl_stress_all.1616387052
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3997855985
/workspace/coverage/default/40.sysrst_ctrl_alert_test.1748344136
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.911104178
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.16455590
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1760398318
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2029467640
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1272726738
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.903941538
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3048647712
/workspace/coverage/default/40.sysrst_ctrl_smoke.1331223979
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2496099490
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1408985053
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2573972756
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1930280873
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.4155392634
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.1790906045
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3743817293
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.3848842452
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2064493639
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1508551428
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3718440806
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1070561139
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3015732092
/workspace/coverage/default/41.sysrst_ctrl_smoke.3866632588
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1278849391
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2487748991
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3433298804
/workspace/coverage/default/42.sysrst_ctrl_alert_test.910797400
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3931830076
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2956843114
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2760733497
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2829440821
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2534269109
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2332808341
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1338106155
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.833351041
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.4142410136
/workspace/coverage/default/42.sysrst_ctrl_smoke.983919514
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1841061049
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3393570002
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1385582921
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2079261266
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1709153485
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1508687097
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1895247287
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1101916033
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3393179765
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.217411148
/workspace/coverage/default/43.sysrst_ctrl_smoke.2728746102
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1481135625
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1645049499
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1280761012
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2909411479
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.959704959
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1757082364
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2085247748
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.326045996
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.903350839
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.612822487
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2480569757
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1251318986
/workspace/coverage/default/44.sysrst_ctrl_smoke.1098241900
/workspace/coverage/default/44.sysrst_ctrl_stress_all.673355583
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.734136469
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2979352395
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3418701688
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3306693246
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.412179892
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.870703646
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1599337223
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3763755244
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3140934995
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.766675580
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3396780834
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1678291305
/workspace/coverage/default/45.sysrst_ctrl_smoke.405874082
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2081107137
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1289264455
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3313821048
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.4185687261
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1994501511
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1531116663
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.15872354
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3962226289
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1825272569
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.171318760
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2190573610
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1226447878
/workspace/coverage/default/46.sysrst_ctrl_smoke.3351759913
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1412334096
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2966351885
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1471981920
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1705100305
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2413784170
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.563099354
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1718913563
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2907297130
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.2100928932
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.4063295936
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3706439806
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2087399062
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2749502476
/workspace/coverage/default/47.sysrst_ctrl_smoke.4177212266
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3853071884
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1622632276
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3652479690
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3441117288
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2665870605
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3257900251
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3025270958
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2420436251
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3052217973
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.637741665
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.58696573
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.4271468337
/workspace/coverage/default/48.sysrst_ctrl_smoke.2699006014
/workspace/coverage/default/48.sysrst_ctrl_stress_all.395552447
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.389331800
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3433249907
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3823910369
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2727148797
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3638584796
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3799266005
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2323681844
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3826985907
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1807541766
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.965763679
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.911940404
/workspace/coverage/default/49.sysrst_ctrl_smoke.1027511594
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2761355224
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1620518159
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2517051425
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3952429047
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2004390532
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1091015180
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2167187922
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1045303577
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1576565065
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1776437288
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1233722127
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1192817799
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.619914821
/workspace/coverage/default/5.sysrst_ctrl_smoke.3836362524
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3267674233
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.221259828
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1327869769
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1907855172
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3428851686
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1951726607
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2248750935
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3818988467
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.913394067
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3204402715
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3050320781
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.608081268
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2611958070
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.4083479591
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2698325943
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.372322215
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.85174980
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2791957578
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3647856261
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3545621534
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.446913390
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2513233815
/workspace/coverage/default/6.sysrst_ctrl_smoke.3668283767
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2535104357
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3327654770
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3840645819
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.994091160
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2138769113
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1718521497
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3541101399
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.460691722
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3313718050
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.669234411
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2334940443
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1136257705
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2873014438
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2124118802
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.113989267
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.141009179
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.4040448940
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1495711215
/workspace/coverage/default/7.sysrst_ctrl_smoke.2840342538
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2685798075
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.4130554878
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3656430853
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4150467545
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1802341250
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.92769867
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2460879535
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1963931153
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3687812591
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2814996388
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1210961864
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1412640673
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1749408195
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1330600353
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1645146439
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3135634835
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1106328813
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1046682318
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4154298486
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.806095728
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2556682946
/workspace/coverage/default/8.sysrst_ctrl_smoke.2825324114
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3477209968
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1846707966
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3631207727
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2548538588
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1324156664
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1131147106
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2623846946
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1584066159
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2967316741
/workspace/coverage/default/9.sysrst_ctrl_alert_test.378278305
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.136217160
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.4291584017
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.861473810
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.923704485
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3658898707
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3878277410
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2866878402
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1938612814
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.913154318
/workspace/coverage/default/9.sysrst_ctrl_smoke.18349925
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3676969177
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1331847145
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1268728958
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2604869886
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2282166846
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2454447313
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1790007367
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2850145224
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3146639228

Total test records in report: 913

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2966351885	Jul 27 05:44:24 PM PDT 24	Jul 27 05:45:02 PM PDT 24	13713074815 ps
T1	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.2946680477	Jul 27 05:42:36 PM PDT 24	Jul 27 05:43:48 PM PDT 24	103321447425 ps
T2	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1250486659	Jul 27 05:43:17 PM PDT 24	Jul 27 05:43:33 PM PDT 24	54583948743 ps
T12	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2232884251	Jul 27 05:43:54 PM PDT 24	Jul 27 05:44:45 PM PDT 24	1683054237779 ps
T13	/workspace/coverage/default/38.sysrst_ctrl_smoke.1820508361	Jul 27 05:43:59 PM PDT 24	Jul 27 05:44:02 PM PDT 24	2117808934 ps
T14	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1709153485	Jul 27 05:44:18 PM PDT 24	Jul 27 05:44:27 PM PDT 24	3375123216 ps
T3	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3126903091	Jul 27 05:43:04 PM PDT 24	Jul 27 05:43:26 PM PDT 24	31906102383 ps
T15	/workspace/coverage/default/39.sysrst_ctrl_smoke.537848620	Jul 27 05:44:08 PM PDT 24	Jul 27 05:44:13 PM PDT 24	2114028866 ps
T16	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1320282268	Jul 27 05:44:06 PM PDT 24	Jul 27 05:44:08 PM PDT 24	2208703161 ps
T17	/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3015732092	Jul 27 05:44:11 PM PDT 24	Jul 27 05:44:18 PM PDT 24	2510950339 ps
T5	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3836130954	Jul 27 05:44:42 PM PDT 24	Jul 27 05:48:58 PM PDT 24	167765175580 ps
T49	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.238031453	Jul 27 05:43:14 PM PDT 24	Jul 27 05:43:18 PM PDT 24	4027903149 ps
T23	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.4130554878	Jul 27 05:43:01 PM PDT 24	Jul 27 05:43:38 PM PDT 24	30625622651 ps
T24	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2374092111	Jul 27 05:43:50 PM PDT 24	Jul 27 05:44:56 PM PDT 24	110040884014 ps
T25	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2454447313	Jul 27 05:44:41 PM PDT 24	Jul 27 05:44:52 PM PDT 24	39693282236 ps
T50	/workspace/coverage/default/25.sysrst_ctrl_smoke.2026303186	Jul 27 05:43:28 PM PDT 24	Jul 27 05:43:30 PM PDT 24	2135223669 ps
T51	/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1776437288	Jul 27 05:42:41 PM PDT 24	Jul 27 05:42:45 PM PDT 24	2621923295 ps
T6	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.470621718	Jul 27 05:42:38 PM PDT 24	Jul 27 05:43:28 PM PDT 24	35262727468 ps
T52	/workspace/coverage/default/0.sysrst_ctrl_alert_test.2417858175	Jul 27 05:42:38 PM PDT 24	Jul 27 05:42:43 PM PDT 24	2010196900 ps
T7	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3997855985	Jul 27 05:42:42 PM PDT 24	Jul 27 05:42:45 PM PDT 24	8303363035 ps
T45	/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1385582921	Jul 27 05:44:16 PM PDT 24	Jul 27 05:44:18 PM PDT 24	3281813195 ps
T8	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1645146439	Jul 27 05:42:55 PM PDT 24	Jul 27 05:44:07 PM PDT 24	53683828936 ps
T9	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.2319845184	Jul 27 05:42:38 PM PDT 24	Jul 27 05:42:41 PM PDT 24	3107706549 ps
T46	/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.136217160	Jul 27 05:42:49 PM PDT 24	Jul 27 05:42:54 PM PDT 24	2994703414 ps
T61	/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.3572483146	Jul 27 05:43:55 PM PDT 24	Jul 27 05:43:58 PM PDT 24	2533814377 ps
T10	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.221259828	Jul 27 05:42:45 PM PDT 24	Jul 27 05:43:05 PM PDT 24	27013253773 ps
T11	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3656430853	Jul 27 05:42:58 PM PDT 24	Jul 27 05:43:07 PM PDT 24	10865037054 ps
T31	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2615735380	Jul 27 05:44:29 PM PDT 24	Jul 27 05:46:16 PM PDT 24	156809708459 ps
T109	/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.15872354	Jul 27 05:44:18 PM PDT 24	Jul 27 05:44:29 PM PDT 24	3862704252 ps
T29	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2956843114	Jul 27 05:44:14 PM PDT 24	Jul 27 05:51:35 PM PDT 24	172875344566 ps
T47	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.3978391242	Jul 27 05:42:32 PM PDT 24	Jul 27 05:44:57 PM PDT 24	116272937299 ps
T54	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.794659260	Jul 27 05:43:10 PM PDT 24	Jul 27 05:43:15 PM PDT 24	7736880025 ps
T22	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2680143530	Jul 27 05:42:51 PM PDT 24	Jul 27 05:44:15 PM PDT 24	129816124679 ps
T38	/workspace/coverage/default/0.sysrst_ctrl_stress_all.38255674	Jul 27 05:42:38 PM PDT 24	Jul 27 05:46:00 PM PDT 24	141853485937 ps
T32	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.913958176	Jul 27 05:44:35 PM PDT 24	Jul 27 05:45:52 PM PDT 24	145921222031 ps
T80	/workspace/coverage/default/38.sysrst_ctrl_alert_test.81873664	Jul 27 05:44:18 PM PDT 24	Jul 27 05:44:20 PM PDT 24	2031006991 ps
T81	/workspace/coverage/default/49.sysrst_ctrl_alert_test.3433249907	Jul 27 05:44:25 PM PDT 24	Jul 27 05:44:31 PM PDT 24	2012522241 ps
T62	/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2679073345	Jul 27 05:42:52 PM PDT 24	Jul 27 05:42:58 PM PDT 24	2611381258 ps
T48	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.3182434631	Jul 27 05:43:28 PM PDT 24	Jul 27 05:43:37 PM PDT 24	3286871268 ps
T30	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1324156664	Jul 27 05:44:38 PM PDT 24	Jul 27 05:44:58 PM PDT 24	27495731893 ps
T56	/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4154298486	Jul 27 05:42:58 PM PDT 24	Jul 27 05:43:11 PM PDT 24	2457403109 ps
T110	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2087399062	Jul 27 05:44:24 PM PDT 24	Jul 27 05:44:26 PM PDT 24	2228167699 ps
T44	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1408985053	Jul 27 05:44:16 PM PDT 24	Jul 27 05:46:31 PM PDT 24	58044417062 ps
T129	/workspace/coverage/default/16.sysrst_ctrl_smoke.3879804873	Jul 27 05:43:06 PM PDT 24	Jul 27 05:43:07 PM PDT 24	2191558319 ps
T55	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2068626703	Jul 27 05:43:51 PM PDT 24	Jul 27 05:43:57 PM PDT 24	3817538619 ps
T57	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1338106155	Jul 27 05:44:12 PM PDT 24	Jul 27 05:44:14 PM PDT 24	2486674553 ps
T130	/workspace/coverage/default/35.sysrst_ctrl_smoke.100772176	Jul 27 05:43:46 PM PDT 24	Jul 27 05:43:49 PM PDT 24	2121245924 ps
T58	/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.2220382164	Jul 27 05:43:55 PM PDT 24	Jul 27 05:44:02 PM PDT 24	2448991614 ps
T111	/workspace/coverage/default/42.sysrst_ctrl_stress_all.2049107727	Jul 27 05:44:13 PM PDT 24	Jul 27 05:45:03 PM PDT 24	140535693732 ps
T131	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.113989267	Jul 27 05:42:48 PM PDT 24	Jul 27 05:42:56 PM PDT 24	2609444536 ps
T34	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1887709859	Jul 27 05:43:38 PM PDT 24	Jul 27 05:46:35 PM PDT 24	71376472233 ps
T36	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2825794015	Jul 27 05:43:13 PM PDT 24	Jul 27 05:43:37 PM PDT 24	38813863720 ps
T141	/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1591205931	Jul 27 05:43:34 PM PDT 24	Jul 27 05:43:37 PM PDT 24	3991727881 ps
T59	/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.900525069	Jul 27 05:43:01 PM PDT 24	Jul 27 05:43:02 PM PDT 24	2475661668 ps
T33	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1951726607	Jul 27 05:44:29 PM PDT 24	Jul 27 05:45:50 PM PDT 24	33240539529 ps
T142	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2513233815	Jul 27 05:42:45 PM PDT 24	Jul 27 05:42:50 PM PDT 24	2512899274 ps
T143	/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1265418573	Jul 27 05:43:16 PM PDT 24	Jul 27 05:43:17 PM PDT 24	2091787614 ps
T35	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2917794354	Jul 27 05:43:01 PM PDT 24	Jul 27 05:43:38 PM PDT 24	288092155463 ps
T39	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1198516335	Jul 27 05:42:33 PM PDT 24	Jul 27 05:42:57 PM PDT 24	37854201235 ps
T144	/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1046682318	Jul 27 05:42:47 PM PDT 24	Jul 27 05:42:48 PM PDT 24	2810471269 ps
T145	/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.3345477949	Jul 27 05:43:38 PM PDT 24	Jul 27 05:43:39 PM PDT 24	2542209947 ps
T221	/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.3427145839	Jul 27 05:43:38 PM PDT 24	Jul 27 05:43:39 PM PDT 24	2650516464 ps
T222	/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1315626809	Jul 27 05:43:58 PM PDT 24	Jul 27 05:44:03 PM PDT 24	3331686152 ps
T60	/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2282303528	Jul 27 05:43:52 PM PDT 24	Jul 27 05:44:00 PM PDT 24	2459561161 ps
T223	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.654103214	Jul 27 05:43:56 PM PDT 24	Jul 27 05:43:59 PM PDT 24	2630045586 ps
T224	/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3048647712	Jul 27 05:44:07 PM PDT 24	Jul 27 05:44:09 PM PDT 24	2532468198 ps
T225	/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3197992222	Jul 27 05:42:59 PM PDT 24	Jul 27 05:43:02 PM PDT 24	2621533658 ps
T366	/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.3201679353	Jul 27 05:43:04 PM PDT 24	Jul 27 05:43:10 PM PDT 24	2191239299 ps
T364	/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.619914821	Jul 27 05:42:56 PM PDT 24	Jul 27 05:43:00 PM PDT 24	2514609419 ps
T367	/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2595918070	Jul 27 05:43:22 PM PDT 24	Jul 27 05:43:30 PM PDT 24	8072011993 ps
T368	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2513595284	Jul 27 05:43:45 PM PDT 24	Jul 27 05:43:51 PM PDT 24	2147887397 ps
T63	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2553927772	Jul 27 05:44:30 PM PDT 24	Jul 27 05:48:09 PM PDT 24	81315905171 ps
T365	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.913154318	Jul 27 05:42:45 PM PDT 24	Jul 27 05:42:48 PM PDT 24	2529222166 ps
T42	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.3554851591	Jul 27 05:43:47 PM PDT 24	Jul 27 05:43:50 PM PDT 24	5399590467 ps
T255	/workspace/coverage/default/1.sysrst_ctrl_alert_test.2421261505	Jul 27 05:42:41 PM PDT 24	Jul 27 05:42:43 PM PDT 24	2037878750 ps
T268	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.4249302193	Jul 27 05:43:36 PM PDT 24	Jul 27 05:43:40 PM PDT 24	2514041407 ps
T369	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.851280621	Jul 27 05:43:37 PM PDT 24	Jul 27 05:43:47 PM PDT 24	3543720849 ps
T246	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.329851917	Jul 27 05:43:18 PM PDT 24	Jul 27 05:44:41 PM PDT 24	123071051920 ps
T269	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2804005417	Jul 27 05:43:03 PM PDT 24	Jul 27 05:43:10 PM PDT 24	2509763793 ps
T370	/workspace/coverage/default/36.sysrst_ctrl_alert_test.786776750	Jul 27 05:43:57 PM PDT 24	Jul 27 05:43:59 PM PDT 24	2037487714 ps
T371	/workspace/coverage/default/37.sysrst_ctrl_alert_test.2712676284	Jul 27 05:43:54 PM PDT 24	Jul 27 05:43:57 PM PDT 24	2019806449 ps
T66	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.272990913	Jul 27 05:43:03 PM PDT 24	Jul 27 05:45:49 PM PDT 24	65366851723 ps
T122	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2331193653	Jul 27 05:43:29 PM PDT 24	Jul 27 05:44:32 PM PDT 24	92467914445 ps
T123	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.1966217588	Jul 27 05:44:11 PM PDT 24	Jul 27 05:45:40 PM PDT 24	126689707449 ps
T124	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1678291305	Jul 27 05:44:12 PM PDT 24	Jul 27 05:44:19 PM PDT 24	2510436578 ps
T125	/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2087512304	Jul 27 05:43:55 PM PDT 24	Jul 27 05:43:57 PM PDT 24	2626364868 ps
T126	/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1011462614	Jul 27 05:43:56 PM PDT 24	Jul 27 05:43:58 PM PDT 24	2494940884 ps
T97	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.567589086	Jul 27 05:43:00 PM PDT 24	Jul 27 05:44:55 PM PDT 24	44215525401 ps
T67	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1471981920	Jul 27 05:44:21 PM PDT 24	Jul 27 05:44:22 PM PDT 24	6813502951 ps
T64	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2716074515	Jul 27 05:42:39 PM PDT 24	Jul 27 05:42:42 PM PDT 24	2513170665 ps
T127	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2334940443	Jul 27 05:42:52 PM PDT 24	Jul 27 05:47:12 PM PDT 24	96038648569 ps
T254	/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1179540196	Jul 27 05:42:58 PM PDT 24	Jul 27 05:43:02 PM PDT 24	2615777771 ps
T37	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.3756332625	Jul 27 05:43:19 PM PDT 24	Jul 27 05:43:22 PM PDT 24	4859420134 ps
T65	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4226227369	Jul 27 05:44:33 PM PDT 24	Jul 27 05:47:23 PM PDT 24	115656219498 ps
T40	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3357404249	Jul 27 05:44:24 PM PDT 24	Jul 27 05:45:31 PM PDT 24	101742513282 ps
T211	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2939219043	Jul 27 05:44:38 PM PDT 24	Jul 27 05:45:11 PM PDT 24	108154456312 ps
T212	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3175455419	Jul 27 05:43:33 PM PDT 24	Jul 27 05:44:24 PM PDT 24	86338012388 ps
T213	/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.162908155	Jul 27 05:43:04 PM PDT 24	Jul 27 05:43:06 PM PDT 24	2126920810 ps
T214	/workspace/coverage/default/34.sysrst_ctrl_smoke.1006684600	Jul 27 05:43:51 PM PDT 24	Jul 27 05:43:57 PM PDT 24	2108856093 ps
T90	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1210961864	Jul 27 05:44:28 PM PDT 24	Jul 27 05:45:44 PM PDT 24	41111564730 ps
T215	/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.162195522	Jul 27 05:43:52 PM PDT 24	Jul 27 05:43:55 PM PDT 24	2627561201 ps
T216	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.605402856	Jul 27 05:43:07 PM PDT 24	Jul 27 05:43:08 PM PDT 24	2323571190 ps
T112	/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1622632276	Jul 27 05:44:28 PM PDT 24	Jul 27 05:44:32 PM PDT 24	3011084316 ps
T89	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2728888824	Jul 27 05:42:55 PM PDT 24	Jul 27 05:44:42 PM PDT 24	100252856554 ps
T98	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3366499900	Jul 27 05:44:29 PM PDT 24	Jul 27 05:47:22 PM PDT 24	65062745160 ps
T218	/workspace/coverage/default/19.sysrst_ctrl_smoke.1047959000	Jul 27 05:43:28 PM PDT 24	Jul 27 05:43:30 PM PDT 24	2129088103 ps
T41	/workspace/coverage/default/19.sysrst_ctrl_stress_all.1473633189	Jul 27 05:43:29 PM PDT 24	Jul 27 05:43:52 PM PDT 24	33583303127 ps
T151	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2789176903	Jul 27 05:42:58 PM PDT 24	Jul 27 05:47:11 PM PDT 24	105184200923 ps
T152	/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3371721688	Jul 27 05:43:07 PM PDT 24	Jul 27 05:43:15 PM PDT 24	2608601918 ps
T153	/workspace/coverage/default/25.sysrst_ctrl_alert_test.3204622502	Jul 27 05:43:33 PM PDT 24	Jul 27 05:43:36 PM PDT 24	2013433842 ps
T154	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.4040448940	Jul 27 05:42:57 PM PDT 24	Jul 27 05:42:59 PM PDT 24	2254033071 ps
T155	/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.506076537	Jul 27 05:43:10 PM PDT 24	Jul 27 05:43:13 PM PDT 24	2067923531 ps
T99	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.1195601332	Jul 27 05:42:58 PM PDT 24	Jul 27 05:45:17 PM PDT 24	111488047018 ps
T100	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3818988467	Jul 27 05:44:36 PM PDT 24	Jul 27 05:44:53 PM PDT 24	26093274326 ps
T113	/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.3890350461	Jul 27 05:43:54 PM PDT 24	Jul 27 05:43:57 PM PDT 24	6596104676 ps
T156	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2029467640	Jul 27 05:44:13 PM PDT 24	Jul 27 05:44:17 PM PDT 24	2617688692 ps
T337	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.2445276105	Jul 27 05:43:01 PM PDT 24	Jul 27 05:45:56 PM PDT 24	149217709542 ps
T114	/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3155953151	Jul 27 05:44:03 PM PDT 24	Jul 27 05:44:38 PM PDT 24	4081995502903 ps
T372	/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.759996857	Jul 27 05:43:26 PM PDT 24	Jul 27 05:43:28 PM PDT 24	2104629905 ps
T373	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.2543552474	Jul 27 05:43:40 PM PDT 24	Jul 27 05:43:44 PM PDT 24	2257140726 ps
T374	/workspace/coverage/default/40.sysrst_ctrl_smoke.1331223979	Jul 27 05:44:05 PM PDT 24	Jul 27 05:44:07 PM PDT 24	2136862168 ps
T307	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.3067414469	Jul 27 05:43:58 PM PDT 24	Jul 27 05:49:31 PM PDT 24	155658493803 ps
T247	/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1994501511	Jul 27 05:44:28 PM PDT 24	Jul 27 05:48:26 PM PDT 24	95681044374 ps
T233	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1531116663	Jul 27 05:44:24 PM PDT 24	Jul 27 05:45:07 PM PDT 24	167843944663 ps
T375	/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.3461547904	Jul 27 05:43:15 PM PDT 24	Jul 27 05:43:23 PM PDT 24	2608658370 ps
T376	/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1070561139	Jul 27 05:44:17 PM PDT 24	Jul 27 05:44:23 PM PDT 24	2150989399 ps
T267	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.1035038025	Jul 27 05:43:01 PM PDT 24	Jul 27 05:43:06 PM PDT 24	2468899294 ps
T263	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2487748991	Jul 27 05:44:10 PM PDT 24	Jul 27 05:44:41 PM PDT 24	23476354489 ps
T377	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3878277410	Jul 27 05:42:56 PM PDT 24	Jul 27 05:43:00 PM PDT 24	2618127866 ps
T157	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.1986117546	Jul 27 05:43:02 PM PDT 24	Jul 27 05:43:05 PM PDT 24	3434958566 ps
T199	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.2755348039	Jul 27 05:43:36 PM PDT 24	Jul 27 05:43:39 PM PDT 24	3031623496 ps
T165	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.300595878	Jul 27 05:43:12 PM PDT 24	Jul 27 05:43:15 PM PDT 24	2647645726 ps
T115	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1332537760	Jul 27 05:43:37 PM PDT 24	Jul 27 05:45:30 PM PDT 24	1742942789629 ps
T303	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.3861785002	Jul 27 05:43:38 PM PDT 24	Jul 27 05:44:19 PM PDT 24	60426535251 ps
T378	/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.193258857	Jul 27 05:43:27 PM PDT 24	Jul 27 05:43:30 PM PDT 24	5261560170 ps
T379	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3052217973	Jul 27 05:44:31 PM PDT 24	Jul 27 05:44:33 PM PDT 24	2633893721 ps
T238	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.2550838108	Jul 27 05:44:04 PM PDT 24	Jul 27 05:48:48 PM PDT 24	216835484427 ps
T380	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1846707966	Jul 27 05:42:54 PM PDT 24	Jul 27 05:43:30 PM PDT 24	13808278508 ps
T266	/workspace/coverage/default/38.sysrst_ctrl_stress_all.771119680	Jul 27 05:44:10 PM PDT 24	Jul 27 06:01:42 PM PDT 24	459771687917 ps
T264	/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3019021641	Jul 27 05:43:55 PM PDT 24	Jul 27 05:44:00 PM PDT 24	3486224218 ps
T359	/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1736941135	Jul 27 05:43:39 PM PDT 24	Jul 27 05:43:51 PM PDT 24	297307559522 ps
T381	/workspace/coverage/default/3.sysrst_ctrl_alert_test.46389940	Jul 27 05:43:04 PM PDT 24	Jul 27 05:43:06 PM PDT 24	2039288239 ps
T382	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.3084587048	Jul 27 05:42:43 PM PDT 24	Jul 27 05:42:45 PM PDT 24	2183133160 ps
T231	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1907855172	Jul 27 05:44:32 PM PDT 24	Jul 27 05:46:54 PM PDT 24	56007580036 ps
T383	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3140934995	Jul 27 05:44:19 PM PDT 24	Jul 27 05:44:21 PM PDT 24	2627630750 ps
T95	/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.4185687261	Jul 27 05:44:14 PM PDT 24	Jul 27 05:44:25 PM PDT 24	3647302474 ps
T384	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2829440821	Jul 27 05:44:07 PM PDT 24	Jul 27 05:44:10 PM PDT 24	3699773269 ps
T43	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1760398318	Jul 27 05:44:18 PM PDT 24	Jul 27 05:44:20 PM PDT 24	3397581995 ps
T385	/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3512631142	Jul 27 05:43:32 PM PDT 24	Jul 27 05:43:39 PM PDT 24	2467849908 ps
T386	/workspace/coverage/default/31.sysrst_ctrl_stress_all.3755531127	Jul 27 05:43:48 PM PDT 24	Jul 27 05:44:21 PM PDT 24	13420950446 ps
T116	/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1280761012	Jul 27 05:44:18 PM PDT 24	Jul 27 05:44:20 PM PDT 24	3760026594 ps
T92	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1736156479	Jul 27 05:43:15 PM PDT 24	Jul 27 05:44:36 PM PDT 24	50240469967 ps
T239	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.2931777055	Jul 27 05:43:48 PM PDT 24	Jul 27 05:46:19 PM PDT 24	57219783166 ps
T338	/workspace/coverage/default/9.sysrst_ctrl_combo_detect.4291584017	Jul 27 05:42:59 PM PDT 24	Jul 27 05:48:24 PM PDT 24	145761561004 ps
T387	/workspace/coverage/default/34.sysrst_ctrl_alert_test.3910367434	Jul 27 05:43:47 PM PDT 24	Jul 27 05:43:53 PM PDT 24	2014112805 ps
T388	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2932570817	Jul 27 05:43:27 PM PDT 24	Jul 27 05:43:30 PM PDT 24	2523409217 ps
T389	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1279215248	Jul 27 05:44:04 PM PDT 24	Jul 27 05:44:14 PM PDT 24	3726489480 ps
T390	/workspace/coverage/default/40.sysrst_ctrl_stress_all.2496099490	Jul 27 05:44:05 PM PDT 24	Jul 27 05:44:21 PM PDT 24	9630189853 ps
T391	/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.903941538	Jul 27 05:44:13 PM PDT 24	Jul 27 05:44:15 PM PDT 24	2187250664 ps
T176	/workspace/coverage/default/47.sysrst_ctrl_edge_detect.2100928932	Jul 27 05:44:25 PM PDT 24	Jul 27 05:44:28 PM PDT 24	3413486294 ps
T392	/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.596221504	Jul 27 05:43:18 PM PDT 24	Jul 27 05:43:25 PM PDT 24	2465503006 ps
T393	/workspace/coverage/default/0.sysrst_ctrl_smoke.508798141	Jul 27 05:42:52 PM PDT 24	Jul 27 05:42:53 PM PDT 24	2141404795 ps
T360	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.3400257230	Jul 27 05:43:44 PM PDT 24	Jul 27 05:55:20 PM PDT 24	2665142786052 ps
T164	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3799394134	Jul 27 05:44:14 PM PDT 24	Jul 27 05:44:17 PM PDT 24	2687142625 ps
T94	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.2117831957	Jul 27 05:43:51 PM PDT 24	Jul 27 05:44:00 PM PDT 24	3766757024 ps
T166	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.1175880077	Jul 27 05:43:32 PM PDT 24	Jul 27 05:43:35 PM PDT 24	4441497680 ps
T167	/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3441117288	Jul 27 05:44:28 PM PDT 24	Jul 27 05:44:37 PM PDT 24	3173152638 ps
T168	/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.750059250	Jul 27 05:43:38 PM PDT 24	Jul 27 05:43:45 PM PDT 24	3359520677 ps
T169	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.281087907	Jul 27 05:43:41 PM PDT 24	Jul 27 05:43:50 PM PDT 24	3316289493 ps
T170	/workspace/coverage/default/26.sysrst_ctrl_smoke.3925546878	Jul 27 05:43:39 PM PDT 24	Jul 27 05:43:45 PM PDT 24	2112226217 ps
T171	/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.761856540	Jul 27 05:42:40 PM PDT 24	Jul 27 05:42:48 PM PDT 24	2511478084 ps
T93	/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.389331800	Jul 27 05:44:34 PM PDT 24	Jul 27 05:45:30 PM PDT 24	1682810907979 ps
T172	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1834752478	Jul 27 05:43:29 PM PDT 24	Jul 27 05:43:40 PM PDT 24	3941255925 ps
T163	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.2138849652	Jul 27 05:43:01 PM PDT 24	Jul 27 05:43:13 PM PDT 24	5625952801 ps
T96	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3595419415	Jul 27 05:43:17 PM PDT 24	Jul 27 05:43:24 PM PDT 24	2693912959 ps
T394	/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2541140037	Jul 27 05:43:14 PM PDT 24	Jul 27 05:43:21 PM PDT 24	3962735720 ps
T395	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3823288014	Jul 27 05:43:11 PM PDT 24	Jul 27 05:43:13 PM PDT 24	2634365098 ps
T396	/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1825272569	Jul 27 05:44:16 PM PDT 24	Jul 27 05:44:18 PM PDT 24	2624450167 ps
T397	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.354496822	Jul 27 05:43:02 PM PDT 24	Jul 27 05:43:07 PM PDT 24	3155655215 ps
T398	/workspace/coverage/default/23.sysrst_ctrl_smoke.4011126555	Jul 27 05:43:32 PM PDT 24	Jul 27 05:43:33 PM PDT 24	2162003899 ps
T399	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.3120644624	Jul 27 05:43:52 PM PDT 24	Jul 27 05:43:55 PM PDT 24	2055571137 ps
T117	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.669234411	Jul 27 05:42:54 PM PDT 24	Jul 27 05:43:03 PM PDT 24	3519125355 ps
T400	/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.189692848	Jul 27 05:43:36 PM PDT 24	Jul 27 05:43:43 PM PDT 24	4460536807 ps
T401	/workspace/coverage/default/6.sysrst_ctrl_smoke.3668283767	Jul 27 05:42:53 PM PDT 24	Jul 27 05:42:57 PM PDT 24	2118474571 ps
T402	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1251318986	Jul 27 05:44:13 PM PDT 24	Jul 27 05:44:15 PM PDT 24	2529733973 ps
T403	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.794279770	Jul 27 05:43:35 PM PDT 24	Jul 27 05:43:42 PM PDT 24	2587316579 ps
T404	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1272726738	Jul 27 05:44:07 PM PDT 24	Jul 27 05:44:09 PM PDT 24	2471313078 ps
T330	/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.460691722	Jul 27 05:44:28 PM PDT 24	Jul 27 05:45:06 PM PDT 24	61100356918 ps
T405	/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.4124820067	Jul 27 05:43:28 PM PDT 24	Jul 27 05:43:31 PM PDT 24	2635497465 ps
T406	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.4155392634	Jul 27 05:44:10 PM PDT 24	Jul 27 05:44:14 PM PDT 24	3794774386 ps
T407	/workspace/coverage/default/37.sysrst_ctrl_smoke.1593993841	Jul 27 05:43:56 PM PDT 24	Jul 27 05:44:02 PM PDT 24	2114347942 ps
T408	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3410256635	Jul 27 05:42:49 PM PDT 24	Jul 27 05:42:52 PM PDT 24	2527365211 ps
T409	/workspace/coverage/default/14.sysrst_ctrl_smoke.4039107293	Jul 27 05:43:08 PM PDT 24	Jul 27 05:43:12 PM PDT 24	2120724175 ps
T410	/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.993416437	Jul 27 05:42:38 PM PDT 24	Jul 27 05:42:39 PM PDT 24	2653072103 ps
T270	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.114161260	Jul 27 05:44:06 PM PDT 24	Jul 27 05:45:35 PM PDT 24	33848364773 ps
T274	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3570664301	Jul 27 05:43:27 PM PDT 24	Jul 27 05:43:35 PM PDT 24	2553249510 ps
T275	/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1278146944	Jul 27 05:43:46 PM PDT 24	Jul 27 05:43:50 PM PDT 24	2476547338 ps
T276	/workspace/coverage/default/14.sysrst_ctrl_alert_test.148069997	Jul 27 05:43:05 PM PDT 24	Jul 27 05:43:10 PM PDT 24	2017514952 ps
T277	/workspace/coverage/default/18.sysrst_ctrl_stress_all.2928022459	Jul 27 05:43:20 PM PDT 24	Jul 27 05:43:27 PM PDT 24	10844978419 ps
T278	/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1641289590	Jul 27 05:44:16 PM PDT 24	Jul 27 05:48:18 PM PDT 24	103364114278 ps
T279	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1591920713	Jul 27 05:43:55 PM PDT 24	Jul 27 05:48:24 PM PDT 24	112976793525 ps
T280	/workspace/coverage/default/33.sysrst_ctrl_stress_all.2857506664	Jul 27 05:43:49 PM PDT 24	Jul 27 05:43:54 PM PDT 24	8625127577 ps
T281	/workspace/coverage/default/39.sysrst_ctrl_alert_test.3407208135	Jul 27 05:44:10 PM PDT 24	Jul 27 05:44:14 PM PDT 24	2018075400 ps
T282	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.3298510824	Jul 27 05:43:29 PM PDT 24	Jul 27 05:43:32 PM PDT 24	3550548766 ps
T411	/workspace/coverage/default/8.sysrst_ctrl_alert_test.1412640673	Jul 27 05:42:48 PM PDT 24	Jul 27 05:42:53 PM PDT 24	2011190317 ps
T412	/workspace/coverage/default/6.sysrst_ctrl_alert_test.2611958070	Jul 27 05:42:41 PM PDT 24	Jul 27 05:42:43 PM PDT 24	2028784247 ps
T135	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3179525942	Jul 27 05:44:25 PM PDT 24	Jul 27 05:45:15 PM PDT 24	186172230674 ps
T177	/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.911104178	Jul 27 05:44:12 PM PDT 24	Jul 27 05:44:22 PM PDT 24	3541170002 ps
T178	/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1317734802	Jul 27 05:43:39 PM PDT 24	Jul 27 05:43:46 PM PDT 24	4030933776 ps
T179	/workspace/coverage/default/18.sysrst_ctrl_alert_test.278148764	Jul 27 05:43:33 PM PDT 24	Jul 27 05:43:39 PM PDT 24	2013487211 ps
T180	/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.1050597473	Jul 27 05:42:34 PM PDT 24	Jul 27 05:42:41 PM PDT 24	2613339408 ps
T181	/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.923704485	Jul 27 05:42:57 PM PDT 24	Jul 27 05:43:07 PM PDT 24	3984993625 ps
T182	/workspace/coverage/default/24.sysrst_ctrl_smoke.4229047246	Jul 27 05:43:29 PM PDT 24	Jul 27 05:43:32 PM PDT 24	2115822480 ps
T183	/workspace/coverage/default/27.sysrst_ctrl_smoke.73872078	Jul 27 05:43:39 PM PDT 24	Jul 27 05:43:42 PM PDT 24	2120410436 ps
T75	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.952144538	Jul 27 05:43:54 PM PDT 24	Jul 27 05:46:26 PM PDT 24	120123376966 ps
T118	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.401750441	Jul 27 05:43:05 PM PDT 24	Jul 27 05:43:07 PM PDT 24	5961844764 ps
T413	/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.3814243450	Jul 27 05:43:02 PM PDT 24	Jul 27 05:43:16 PM PDT 24	5496817218 ps
T319	/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2282166846	Jul 27 05:44:30 PM PDT 24	Jul 27 05:47:26 PM PDT 24	70353727521 ps
T158	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2064493639	Jul 27 05:44:13 PM PDT 24	Jul 27 05:44:18 PM PDT 24	3917868628 ps
T173	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.551979209	Jul 27 05:43:41 PM PDT 24	Jul 27 05:44:21 PM PDT 24	25696344258 ps
T414	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.997724004	Jul 27 05:43:11 PM PDT 24	Jul 27 05:43:19 PM PDT 24	10345662687 ps
T415	/workspace/coverage/default/23.sysrst_ctrl_alert_test.1193697156	Jul 27 05:43:38 PM PDT 24	Jul 27 05:43:44 PM PDT 24	2009522503 ps
T320	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.4011804504	Jul 27 05:44:04 PM PDT 24	Jul 27 05:45:07 PM PDT 24	87769619912 ps
T416	/workspace/coverage/default/16.sysrst_ctrl_alert_test.293751878	Jul 27 05:43:25 PM PDT 24	Jul 27 05:43:31 PM PDT 24	2014883638 ps
T265	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2847231010	Jul 27 05:43:34 PM PDT 24	Jul 27 05:44:37 PM PDT 24	47708732838 ps
T417	/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.959704959	Jul 27 05:44:19 PM PDT 24	Jul 27 05:47:25 PM PDT 24	473247778171 ps
T136	/workspace/coverage/default/47.sysrst_ctrl_stress_all.3853071884	Jul 27 05:44:21 PM PDT 24	Jul 27 05:44:56 PM PDT 24	20745933151 ps
T418	/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.889460639	Jul 27 05:43:45 PM PDT 24	Jul 27 05:43:51 PM PDT 24	2110191836 ps
T419	/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3799266005	Jul 27 05:44:29 PM PDT 24	Jul 27 05:44:38 PM PDT 24	3574622699 ps
T420	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.981331790	Jul 27 05:43:54 PM PDT 24	Jul 27 05:43:55 PM PDT 24	2489930174 ps
T421	/workspace/coverage/default/48.sysrst_ctrl_alert_test.3652479690	Jul 27 05:44:25 PM PDT 24	Jul 27 05:44:31 PM PDT 24	2010318857 ps
T422	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3942032213	Jul 27 05:42:37 PM PDT 24	Jul 27 05:42:40 PM PDT 24	2509783196 ps
T423	/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.58696573	Jul 27 05:44:28 PM PDT 24	Jul 27 05:44:34 PM PDT 24	2091672410 ps
T159	/workspace/coverage/default/7.sysrst_ctrl_stress_all.2685798075	Jul 27 05:42:48 PM PDT 24	Jul 27 05:42:58 PM PDT 24	15431750170 ps
T137	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3990018188	Jul 27 05:43:33 PM PDT 24	Jul 27 05:45:31 PM PDT 24	97004626475 ps
T187	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1915099454	Jul 27 05:43:44 PM PDT 24	Jul 27 05:44:12 PM PDT 24	40490866193 ps
T160	/workspace/coverage/default/10.sysrst_ctrl_stress_all.54426678	Jul 27 05:43:00 PM PDT 24	Jul 27 05:43:18 PM PDT 24	16781305867 ps
T188	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.182247040	Jul 27 05:43:52 PM PDT 24	Jul 27 05:43:55 PM PDT 24	3475512362 ps
T189	/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.2911884431	Jul 27 05:43:43 PM PDT 24	Jul 27 05:43:45 PM PDT 24	2544483873 ps
T190	/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2655536899	Jul 27 05:43:27 PM PDT 24	Jul 27 05:43:54 PM PDT 24	431263204301 ps
T191	/workspace/coverage/default/4.sysrst_ctrl_smoke.877831385	Jul 27 05:42:39 PM PDT 24	Jul 27 05:42:40 PM PDT 24	2153535178 ps
T192	/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.873252585	Jul 27 05:43:08 PM PDT 24	Jul 27 05:43:15 PM PDT 24	2224631863 ps
T193	/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2332808341	Jul 27 05:44:13 PM PDT 24	Jul 27 05:44:16 PM PDT 24	2629210238 ps
T234	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.608081268	Jul 27 05:44:30 PM PDT 24	Jul 27 05:45:34 PM PDT 24	50985570679 ps
T424	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.3240291224	Jul 27 05:43:07 PM PDT 24	Jul 27 05:43:09 PM PDT 24	3861775511 ps
T229	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.4251120077	Jul 27 05:43:11 PM PDT 24	Jul 27 05:44:00 PM PDT 24	72363665067 ps
T425	/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1192817799	Jul 27 05:42:48 PM PDT 24	Jul 27 05:42:50 PM PDT 24	2142642269 ps
T132	/workspace/coverage/default/44.sysrst_ctrl_stress_all.673355583	Jul 27 05:44:14 PM PDT 24	Jul 27 05:44:17 PM PDT 24	15868730956 ps
T248	/workspace/coverage/default/29.sysrst_ctrl_stress_all.1697825991	Jul 27 05:43:56 PM PDT 24	Jul 27 05:45:57 PM PDT 24	89929238774 ps
T240	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2698325943	Jul 27 05:42:56 PM PDT 24	Jul 27 05:45:43 PM PDT 24	71225246459 ps