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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.96 99.37 96.71 100.00 96.79 98.85 99.52 94.50


Total test records in report: 915
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T421 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2787567442 Jul 28 05:12:26 PM PDT 24 Jul 28 05:12:50 PM PDT 24 399235413409 ps
T159 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.2272917227 Jul 28 05:13:19 PM PDT 24 Jul 28 05:13:29 PM PDT 24 3940190969 ps
T422 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1071488562 Jul 28 05:12:28 PM PDT 24 Jul 28 05:12:29 PM PDT 24 2125462041 ps
T423 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2825776222 Jul 28 05:12:03 PM PDT 24 Jul 28 05:12:05 PM PDT 24 2567233403 ps
T160 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.194294244 Jul 28 05:12:53 PM PDT 24 Jul 28 05:13:08 PM PDT 24 5362092348 ps
T424 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2646447482 Jul 28 05:12:54 PM PDT 24 Jul 28 05:13:03 PM PDT 24 3163797194 ps
T425 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3899919331 Jul 28 05:12:04 PM PDT 24 Jul 28 05:12:07 PM PDT 24 2629809188 ps
T265 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3702964348 Jul 28 05:12:54 PM PDT 24 Jul 28 05:13:00 PM PDT 24 10295393526 ps
T426 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3910475970 Jul 28 05:13:11 PM PDT 24 Jul 28 05:13:14 PM PDT 24 3803689925 ps
T215 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2629497388 Jul 28 05:12:37 PM PDT 24 Jul 28 05:12:56 PM PDT 24 26358234343 ps
T427 /workspace/coverage/default/37.sysrst_ctrl_smoke.3149364079 Jul 28 05:12:59 PM PDT 24 Jul 28 05:13:01 PM PDT 24 2129085447 ps
T300 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.2214344303 Jul 28 05:13:11 PM PDT 24 Jul 28 05:17:01 PM PDT 24 190684969346 ps
T177 /workspace/coverage/default/38.sysrst_ctrl_stress_all.3642106882 Jul 28 05:13:08 PM PDT 24 Jul 28 05:13:40 PM PDT 24 16104585257 ps
T428 /workspace/coverage/default/11.sysrst_ctrl_alert_test.4131313243 Jul 28 05:12:26 PM PDT 24 Jul 28 05:12:28 PM PDT 24 2047983752 ps
T429 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1608285137 Jul 28 05:13:06 PM PDT 24 Jul 28 05:13:09 PM PDT 24 2524528560 ps
T430 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3468948591 Jul 28 05:13:02 PM PDT 24 Jul 28 05:13:10 PM PDT 24 5446368430 ps
T93 /workspace/coverage/default/2.sysrst_ctrl_stress_all.3062365931 Jul 28 05:11:57 PM PDT 24 Jul 28 05:13:42 PM PDT 24 160349664846 ps
T431 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3655426303 Jul 28 05:11:55 PM PDT 24 Jul 28 05:12:01 PM PDT 24 2106116067 ps
T432 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2228346039 Jul 28 05:12:15 PM PDT 24 Jul 28 05:12:19 PM PDT 24 2478599018 ps
T329 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3550584537 Jul 28 05:12:06 PM PDT 24 Jul 28 05:12:49 PM PDT 24 67634385144 ps
T433 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1144823311 Jul 28 05:12:32 PM PDT 24 Jul 28 05:12:35 PM PDT 24 2487050769 ps
T267 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2462164452 Jul 28 05:11:52 PM PDT 24 Jul 28 05:11:53 PM PDT 24 4052728421 ps
T434 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2240354259 Jul 28 05:11:50 PM PDT 24 Jul 28 05:11:52 PM PDT 24 2562633777 ps
T435 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.532648931 Jul 28 05:13:11 PM PDT 24 Jul 28 05:13:20 PM PDT 24 3454551802 ps
T311 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3810668124 Jul 28 05:13:29 PM PDT 24 Jul 28 05:15:13 PM PDT 24 80875651388 ps
T436 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.2927657560 Jul 28 05:12:02 PM PDT 24 Jul 28 05:12:03 PM PDT 24 3288650024 ps
T437 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.601184939 Jul 28 05:12:44 PM PDT 24 Jul 28 05:12:48 PM PDT 24 2773159722 ps
T317 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2494337416 Jul 28 05:12:36 PM PDT 24 Jul 28 05:13:36 PM PDT 24 46451611452 ps
T438 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.912237512 Jul 28 05:12:06 PM PDT 24 Jul 28 05:12:09 PM PDT 24 3889107392 ps
T439 /workspace/coverage/default/13.sysrst_ctrl_stress_all.2327588944 Jul 28 05:12:28 PM PDT 24 Jul 28 05:12:33 PM PDT 24 19659433721 ps
T302 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4131577189 Jul 28 05:13:30 PM PDT 24 Jul 28 05:16:49 PM PDT 24 77623706186 ps
T440 /workspace/coverage/default/24.sysrst_ctrl_stress_all.3607363181 Jul 28 05:12:39 PM PDT 24 Jul 28 05:12:48 PM PDT 24 13733226050 ps
T441 /workspace/coverage/default/5.sysrst_ctrl_stress_all.2932057595 Jul 28 05:12:07 PM PDT 24 Jul 28 05:12:20 PM PDT 24 18160925782 ps
T152 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2677354641 Jul 28 05:12:25 PM PDT 24 Jul 28 05:13:05 PM PDT 24 199115060941 ps
T442 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2539475343 Jul 28 05:12:36 PM PDT 24 Jul 28 05:12:43 PM PDT 24 7065045442 ps
T316 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3302284417 Jul 28 05:13:28 PM PDT 24 Jul 28 05:14:14 PM PDT 24 69233805485 ps
T94 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.4087484318 Jul 28 05:13:06 PM PDT 24 Jul 28 05:14:17 PM PDT 24 28427910907 ps
T443 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.929218224 Jul 28 05:13:00 PM PDT 24 Jul 28 05:13:04 PM PDT 24 8311777009 ps
T239 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.1694546678 Jul 28 05:11:55 PM PDT 24 Jul 28 05:12:23 PM PDT 24 42102276035 ps
T266 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.2796808145 Jul 28 05:13:04 PM PDT 24 Jul 28 05:14:01 PM PDT 24 893178780428 ps
T444 /workspace/coverage/default/33.sysrst_ctrl_smoke.3849090160 Jul 28 05:12:46 PM PDT 24 Jul 28 05:12:49 PM PDT 24 2120230181 ps
T225 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.410822379 Jul 28 05:13:11 PM PDT 24 Jul 28 05:14:26 PM PDT 24 42639460935 ps
T445 /workspace/coverage/default/7.sysrst_ctrl_alert_test.1561901949 Jul 28 05:11:56 PM PDT 24 Jul 28 05:12:00 PM PDT 24 2016681790 ps
T446 /workspace/coverage/default/26.sysrst_ctrl_stress_all.921746657 Jul 28 05:12:36 PM PDT 24 Jul 28 05:12:47 PM PDT 24 14330051220 ps
T447 /workspace/coverage/default/22.sysrst_ctrl_smoke.847607224 Jul 28 05:12:29 PM PDT 24 Jul 28 05:12:31 PM PDT 24 2125674156 ps
T72 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.425088725 Jul 28 05:12:00 PM PDT 24 Jul 28 05:13:15 PM PDT 24 58495065896 ps
T448 /workspace/coverage/default/37.sysrst_ctrl_alert_test.1759382580 Jul 28 05:13:09 PM PDT 24 Jul 28 05:13:11 PM PDT 24 2032450780 ps
T449 /workspace/coverage/default/8.sysrst_ctrl_smoke.4116442853 Jul 28 05:12:05 PM PDT 24 Jul 28 05:12:11 PM PDT 24 2108915374 ps
T345 /workspace/coverage/default/0.sysrst_ctrl_stress_all.1187060324 Jul 28 05:11:49 PM PDT 24 Jul 28 05:12:25 PM PDT 24 13818759769 ps
T216 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3714943051 Jul 28 05:13:32 PM PDT 24 Jul 28 05:14:06 PM PDT 24 71000795175 ps
T450 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.285937046 Jul 28 05:12:05 PM PDT 24 Jul 28 05:12:13 PM PDT 24 3485899855 ps
T451 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.2499854728 Jul 28 05:12:17 PM PDT 24 Jul 28 05:12:23 PM PDT 24 2027303506 ps
T452 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.494660960 Jul 28 05:12:20 PM PDT 24 Jul 28 05:12:23 PM PDT 24 3118230464 ps
T453 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.811226554 Jul 28 05:12:17 PM PDT 24 Jul 28 05:12:20 PM PDT 24 3273327379 ps
T303 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.601811485 Jul 28 05:13:08 PM PDT 24 Jul 28 05:15:28 PM PDT 24 52543065679 ps
T454 /workspace/coverage/default/18.sysrst_ctrl_stress_all.3375277338 Jul 28 05:12:29 PM PDT 24 Jul 28 05:12:34 PM PDT 24 6708620451 ps
T455 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1682597113 Jul 28 05:12:45 PM PDT 24 Jul 28 05:12:52 PM PDT 24 2510001278 ps
T456 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.3372445148 Jul 28 05:12:52 PM PDT 24 Jul 28 05:12:59 PM PDT 24 5242778435 ps
T315 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2223226170 Jul 28 05:12:47 PM PDT 24 Jul 28 05:13:46 PM PDT 24 138024623651 ps
T457 /workspace/coverage/default/38.sysrst_ctrl_smoke.2567657998 Jul 28 05:13:04 PM PDT 24 Jul 28 05:13:06 PM PDT 24 2136587660 ps
T458 /workspace/coverage/default/29.sysrst_ctrl_alert_test.1649060938 Jul 28 05:12:50 PM PDT 24 Jul 28 05:12:52 PM PDT 24 2032394705 ps
T459 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.439755636 Jul 28 05:12:53 PM PDT 24 Jul 28 05:12:54 PM PDT 24 2216671349 ps
T170 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.722757946 Jul 28 05:12:13 PM PDT 24 Jul 28 05:13:24 PM PDT 24 443884777744 ps
T460 /workspace/coverage/default/32.sysrst_ctrl_smoke.889823730 Jul 28 05:12:52 PM PDT 24 Jul 28 05:12:54 PM PDT 24 2134688987 ps
T461 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1658506533 Jul 28 05:13:08 PM PDT 24 Jul 28 05:13:44 PM PDT 24 55155065672 ps
T161 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3860876651 Jul 28 05:12:37 PM PDT 24 Jul 28 05:13:40 PM PDT 24 301550648219 ps
T462 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2297699841 Jul 28 05:13:03 PM PDT 24 Jul 28 05:13:06 PM PDT 24 2629894970 ps
T110 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.494855089 Jul 28 05:12:07 PM PDT 24 Jul 28 05:12:12 PM PDT 24 7340016897 ps
T463 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.953409522 Jul 28 05:12:34 PM PDT 24 Jul 28 05:12:37 PM PDT 24 3548893613 ps
T120 /workspace/coverage/default/12.sysrst_ctrl_stress_all.1953906248 Jul 28 05:12:27 PM PDT 24 Jul 28 05:13:08 PM PDT 24 17917674342 ps
T111 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.2499064127 Jul 28 05:12:11 PM PDT 24 Jul 28 05:12:13 PM PDT 24 4454722849 ps
T464 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2297658738 Jul 28 05:12:14 PM PDT 24 Jul 28 05:15:20 PM PDT 24 117166789126 ps
T178 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1043371807 Jul 28 05:11:58 PM PDT 24 Jul 28 05:12:01 PM PDT 24 4476331996 ps
T465 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.1534930158 Jul 28 05:12:23 PM PDT 24 Jul 28 05:12:25 PM PDT 24 3401613848 ps
T466 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.2246524388 Jul 28 05:12:21 PM PDT 24 Jul 28 05:12:23 PM PDT 24 2629259299 ps
T222 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.2568100607 Jul 28 05:11:56 PM PDT 24 Jul 28 05:14:22 PM PDT 24 115243841822 ps
T467 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2200719607 Jul 28 05:12:06 PM PDT 24 Jul 28 05:12:08 PM PDT 24 4668889106 ps
T468 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.377934855 Jul 28 05:12:23 PM PDT 24 Jul 28 05:12:30 PM PDT 24 2479090465 ps
T307 /workspace/coverage/default/22.sysrst_ctrl_stress_all.18714050 Jul 28 05:12:45 PM PDT 24 Jul 28 05:16:16 PM PDT 24 167171135731 ps
T469 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3042649073 Jul 28 05:11:40 PM PDT 24 Jul 28 05:11:44 PM PDT 24 2392712798 ps
T73 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1631727324 Jul 28 05:13:11 PM PDT 24 Jul 28 05:16:19 PM PDT 24 145392277250 ps
T470 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.518156891 Jul 28 05:12:36 PM PDT 24 Jul 28 05:12:44 PM PDT 24 2457790075 ps
T471 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.2274979245 Jul 28 05:11:55 PM PDT 24 Jul 28 05:14:20 PM PDT 24 79509996314 ps
T217 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.658935146 Jul 28 05:13:18 PM PDT 24 Jul 28 05:13:37 PM PDT 24 26856629175 ps
T472 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1050841171 Jul 28 05:12:55 PM PDT 24 Jul 28 05:12:59 PM PDT 24 2620990532 ps
T332 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.2447309368 Jul 28 05:12:28 PM PDT 24 Jul 28 05:14:36 PM PDT 24 53219637622 ps
T319 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.828448531 Jul 28 05:12:11 PM PDT 24 Jul 28 05:16:40 PM PDT 24 104667325342 ps
T280 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3075391857 Jul 28 05:12:46 PM PDT 24 Jul 28 05:14:32 PM PDT 24 44855515226 ps
T473 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.2125370371 Jul 28 05:12:30 PM PDT 24 Jul 28 05:12:36 PM PDT 24 2078525515 ps
T474 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3325868087 Jul 28 05:12:35 PM PDT 24 Jul 28 05:12:38 PM PDT 24 2452963877 ps
T475 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.4156319357 Jul 28 05:12:21 PM PDT 24 Jul 28 05:12:28 PM PDT 24 2611408214 ps
T476 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.1466681967 Jul 28 05:11:51 PM PDT 24 Jul 28 05:11:54 PM PDT 24 2527660607 ps
T477 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.4131980519 Jul 28 05:12:46 PM PDT 24 Jul 28 05:12:51 PM PDT 24 2063995990 ps
T478 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.4047326758 Jul 28 05:12:48 PM PDT 24 Jul 28 05:12:49 PM PDT 24 2537090032 ps
T479 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2586967024 Jul 28 05:13:07 PM PDT 24 Jul 28 05:13:08 PM PDT 24 6820215483 ps
T480 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.2720638399 Jul 28 05:12:12 PM PDT 24 Jul 28 05:12:19 PM PDT 24 2390343822 ps
T328 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.283019997 Jul 28 05:13:27 PM PDT 24 Jul 28 05:14:22 PM PDT 24 60842859421 ps
T124 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2537507611 Jul 28 05:12:10 PM PDT 24 Jul 28 05:15:01 PM PDT 24 250777878380 ps
T192 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1205892880 Jul 28 05:12:38 PM PDT 24 Jul 28 05:12:40 PM PDT 24 2635188099 ps
T193 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1953299270 Jul 28 05:13:14 PM PDT 24 Jul 28 05:14:15 PM PDT 24 85363783742 ps
T194 /workspace/coverage/default/11.sysrst_ctrl_smoke.3963686141 Jul 28 05:12:19 PM PDT 24 Jul 28 05:12:25 PM PDT 24 2110418580 ps
T195 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1643402590 Jul 28 05:12:49 PM PDT 24 Jul 28 05:13:29 PM PDT 24 61385242643 ps
T196 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.150565100 Jul 28 05:12:49 PM PDT 24 Jul 28 05:17:52 PM PDT 24 266699735550 ps
T197 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2415146483 Jul 28 05:12:17 PM PDT 24 Jul 28 05:12:25 PM PDT 24 2853791518 ps
T198 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1343163373 Jul 28 05:13:21 PM PDT 24 Jul 28 05:14:02 PM PDT 24 64477640961 ps
T199 /workspace/coverage/default/27.sysrst_ctrl_smoke.204178354 Jul 28 05:12:58 PM PDT 24 Jul 28 05:12:59 PM PDT 24 2173253657 ps
T200 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.2647426653 Jul 28 05:12:14 PM PDT 24 Jul 28 05:12:26 PM PDT 24 4452532734 ps
T481 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.1519401996 Jul 28 05:12:27 PM PDT 24 Jul 28 05:12:35 PM PDT 24 3730755292 ps
T482 /workspace/coverage/default/25.sysrst_ctrl_smoke.694647725 Jul 28 05:12:33 PM PDT 24 Jul 28 05:12:39 PM PDT 24 2112015273 ps
T483 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.801552875 Jul 28 05:12:49 PM PDT 24 Jul 28 05:12:53 PM PDT 24 2265784800 ps
T484 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2842645966 Jul 28 05:12:13 PM PDT 24 Jul 28 05:12:23 PM PDT 24 3291361487 ps
T485 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.2979060977 Jul 28 05:12:20 PM PDT 24 Jul 28 05:12:29 PM PDT 24 3258445907 ps
T486 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.844024414 Jul 28 05:13:07 PM PDT 24 Jul 28 05:13:13 PM PDT 24 6527816435 ps
T304 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.1715661312 Jul 28 05:12:44 PM PDT 24 Jul 28 05:13:01 PM PDT 24 78120422359 ps
T205 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.255788372 Jul 28 05:13:13 PM PDT 24 Jul 28 05:13:21 PM PDT 24 5641671244 ps
T487 /workspace/coverage/default/35.sysrst_ctrl_smoke.3766041746 Jul 28 05:12:54 PM PDT 24 Jul 28 05:12:56 PM PDT 24 2147469892 ps
T488 /workspace/coverage/default/17.sysrst_ctrl_stress_all.3942206267 Jul 28 05:12:25 PM PDT 24 Jul 28 05:16:03 PM PDT 24 729970804540 ps
T489 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2989999838 Jul 28 05:13:29 PM PDT 24 Jul 28 05:14:23 PM PDT 24 35513250372 ps
T490 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1943601611 Jul 28 05:12:51 PM PDT 24 Jul 28 05:12:53 PM PDT 24 2034710455 ps
T491 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.2739149027 Jul 28 05:12:33 PM PDT 24 Jul 28 05:12:43 PM PDT 24 3157060072 ps
T492 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.708053356 Jul 28 05:12:25 PM PDT 24 Jul 28 05:12:28 PM PDT 24 3648698062 ps
T318 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1358324277 Jul 28 05:13:30 PM PDT 24 Jul 28 05:15:03 PM PDT 24 79888321063 ps
T305 /workspace/coverage/default/6.sysrst_ctrl_stress_all.2516150130 Jul 28 05:12:04 PM PDT 24 Jul 28 05:12:58 PM PDT 24 117726677344 ps
T493 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.309122696 Jul 28 05:12:22 PM PDT 24 Jul 28 05:12:29 PM PDT 24 2512698298 ps
T494 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2148811999 Jul 28 05:12:19 PM PDT 24 Jul 28 05:12:26 PM PDT 24 2510858028 ps
T308 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3111608994 Jul 28 05:13:27 PM PDT 24 Jul 28 05:14:11 PM PDT 24 69909988689 ps
T495 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1931946314 Jul 28 05:13:21 PM PDT 24 Jul 28 05:15:35 PM PDT 24 108315486029 ps
T496 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1083286087 Jul 28 05:12:47 PM PDT 24 Jul 28 05:12:54 PM PDT 24 2891709266 ps
T497 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.757802164 Jul 28 05:12:34 PM PDT 24 Jul 28 05:12:38 PM PDT 24 2613828156 ps
T498 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.3215932566 Jul 28 05:12:32 PM PDT 24 Jul 28 05:12:34 PM PDT 24 5650834561 ps
T499 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1489763522 Jul 28 05:12:18 PM PDT 24 Jul 28 05:12:22 PM PDT 24 2486929036 ps
T226 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.4244547377 Jul 28 05:12:07 PM PDT 24 Jul 28 05:12:51 PM PDT 24 65647561168 ps
T500 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.4249216360 Jul 28 05:13:10 PM PDT 24 Jul 28 05:13:12 PM PDT 24 2479196431 ps
T501 /workspace/coverage/default/43.sysrst_ctrl_stress_all.2893010939 Jul 28 05:13:08 PM PDT 24 Jul 28 05:13:10 PM PDT 24 6139686654 ps
T135 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1567850871 Jul 28 05:12:09 PM PDT 24 Jul 28 05:12:43 PM PDT 24 179552466793 ps
T502 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.2917372317 Jul 28 05:11:54 PM PDT 24 Jul 28 05:11:58 PM PDT 24 2516778545 ps
T503 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3018742470 Jul 28 05:12:45 PM PDT 24 Jul 28 05:12:48 PM PDT 24 2631864467 ps
T504 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1727614884 Jul 28 05:12:20 PM PDT 24 Jul 28 05:12:22 PM PDT 24 2972420633 ps
T505 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.747769507 Jul 28 05:12:48 PM PDT 24 Jul 28 05:12:58 PM PDT 24 3524117274 ps
T506 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.3305962481 Jul 28 05:13:08 PM PDT 24 Jul 28 05:13:26 PM PDT 24 25478432358 ps
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T516 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.1228178142 Jul 28 05:12:18 PM PDT 24 Jul 28 05:15:01 PM PDT 24 316823874591 ps
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T518 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1310880501 Jul 28 05:13:13 PM PDT 24 Jul 28 05:13:18 PM PDT 24 2459024397 ps
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T520 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1129834912 Jul 28 05:13:22 PM PDT 24 Jul 28 05:14:56 PM PDT 24 38030808768 ps
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T528 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.1580701499 Jul 28 05:12:53 PM PDT 24 Jul 28 05:13:00 PM PDT 24 2482375161 ps
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T530 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.3846684432 Jul 28 05:12:28 PM PDT 24 Jul 28 05:12:30 PM PDT 24 4890803567 ps
T531 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3112191557 Jul 28 05:12:27 PM PDT 24 Jul 28 05:12:34 PM PDT 24 2450593959 ps
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T533 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.841611310 Jul 28 05:13:30 PM PDT 24 Jul 28 05:13:35 PM PDT 24 2511019738 ps
T534 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3578922539 Jul 28 05:12:56 PM PDT 24 Jul 28 05:13:02 PM PDT 24 3786685976 ps
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T182 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2537171966 Jul 28 05:12:31 PM PDT 24 Jul 28 05:13:25 PM PDT 24 44066778366 ps
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T190 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1011311514 Jul 28 05:11:53 PM PDT 24 Jul 28 05:13:45 PM PDT 24 127099920306 ps
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T539 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.220699401 Jul 28 05:12:59 PM PDT 24 Jul 28 05:13:01 PM PDT 24 2130790282 ps
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T541 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.260751543 Jul 28 05:13:17 PM PDT 24 Jul 28 05:13:20 PM PDT 24 9026222139 ps
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T543 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.2718710633 Jul 28 05:12:39 PM PDT 24 Jul 28 05:12:42 PM PDT 24 4152886577 ps
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T545 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3973436437 Jul 28 05:12:13 PM PDT 24 Jul 28 05:12:19 PM PDT 24 2415558430 ps
T346 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2172451138 Jul 28 05:13:06 PM PDT 24 Jul 28 05:14:55 PM PDT 24 72093847558 ps
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T547 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.360607027 Jul 28 05:13:09 PM PDT 24 Jul 28 05:13:16 PM PDT 24 2649839386 ps
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T550 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3172508109 Jul 28 05:13:06 PM PDT 24 Jul 28 05:13:09 PM PDT 24 3270460523 ps
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T116 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.2790559914 Jul 28 05:12:34 PM PDT 24 Jul 28 05:12:37 PM PDT 24 9257100457 ps
T552 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.824145915 Jul 28 05:12:07 PM PDT 24 Jul 28 05:12:11 PM PDT 24 2618303446 ps
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T554 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2241055702 Jul 28 05:12:41 PM PDT 24 Jul 28 05:12:54 PM PDT 24 4572375462 ps
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T133 /workspace/coverage/default/15.sysrst_ctrl_stress_all.1886782071 Jul 28 05:12:23 PM PDT 24 Jul 28 05:16:15 PM PDT 24 109570169564 ps
T556 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.2243144338 Jul 28 05:12:54 PM PDT 24 Jul 28 05:12:57 PM PDT 24 2637509478 ps
T557 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3131983537 Jul 28 05:13:02 PM PDT 24 Jul 28 05:13:14 PM PDT 24 69943850424 ps
T558 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.3058884431 Jul 28 05:12:19 PM PDT 24 Jul 28 05:12:21 PM PDT 24 3488760471 ps
T559 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3100883669 Jul 28 05:12:13 PM PDT 24 Jul 28 05:12:15 PM PDT 24 3315840311 ps
T560 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.1338147879 Jul 28 05:12:51 PM PDT 24 Jul 28 05:12:58 PM PDT 24 2471666410 ps
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T562 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3029203613 Jul 28 05:12:16 PM PDT 24 Jul 28 05:12:22 PM PDT 24 2256205971 ps
T563 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.3195970671 Jul 28 05:12:58 PM PDT 24 Jul 28 05:13:08 PM PDT 24 3546304658 ps
T564 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.349814224 Jul 28 05:13:22 PM PDT 24 Jul 28 05:13:39 PM PDT 24 41831229168 ps
T180 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.4097995648 Jul 28 05:12:52 PM PDT 24 Jul 28 05:12:58 PM PDT 24 2880998135 ps
T565 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.202395110 Jul 28 05:12:28 PM PDT 24 Jul 28 05:13:45 PM PDT 24 63620005039 ps
T566 /workspace/coverage/default/7.sysrst_ctrl_smoke.3345565703 Jul 28 05:12:06 PM PDT 24 Jul 28 05:12:07 PM PDT 24 2181412828 ps
T567 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.162855130 Jul 28 05:13:03 PM PDT 24 Jul 28 05:13:05 PM PDT 24 2952402032 ps
T568 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.708910537 Jul 28 05:12:39 PM PDT 24 Jul 28 05:12:42 PM PDT 24 3507084959 ps
T269 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1040867163 Jul 28 05:12:16 PM PDT 24 Jul 28 05:12:38 PM PDT 24 41422061054 ps
T327 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.2193496049 Jul 28 05:12:15 PM PDT 24 Jul 28 05:15:23 PM PDT 24 71592724200 ps
T569 /workspace/coverage/default/28.sysrst_ctrl_smoke.1225336266 Jul 28 05:12:54 PM PDT 24 Jul 28 05:13:00 PM PDT 24 2115361270 ps
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T571 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.515142170 Jul 28 05:12:28 PM PDT 24 Jul 28 05:12:34 PM PDT 24 2512703416 ps
T572 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2309149500 Jul 28 05:12:48 PM PDT 24 Jul 28 05:13:38 PM PDT 24 41196637881 ps
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T574 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.1516186437 Jul 28 05:13:01 PM PDT 24 Jul 28 05:14:16 PM PDT 24 108335459344 ps
T575 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.1918104119 Jul 28 05:12:44 PM PDT 24 Jul 28 05:12:52 PM PDT 24 3393764908 ps
T576 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1509288579 Jul 28 05:12:48 PM PDT 24 Jul 28 05:12:53 PM PDT 24 2519258254 ps
T577 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.1783393356 Jul 28 05:11:49 PM PDT 24 Jul 28 05:11:59 PM PDT 24 3540570058 ps
T578 /workspace/coverage/default/17.sysrst_ctrl_smoke.4138456626 Jul 28 05:12:28 PM PDT 24 Jul 28 05:12:30 PM PDT 24 2130318821 ps
T320 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3337250569 Jul 28 05:13:11 PM PDT 24 Jul 28 05:13:50 PM PDT 24 56921915735 ps
T579 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1055149707 Jul 28 05:13:25 PM PDT 24 Jul 28 05:14:34 PM PDT 24 97394238196 ps
T153 /workspace/coverage/default/3.sysrst_ctrl_stress_all.182465690 Jul 28 05:12:02 PM PDT 24 Jul 28 05:12:45 PM PDT 24 16795150548 ps
T227 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.1616470328 Jul 28 05:12:10 PM PDT 24 Jul 28 05:14:24 PM PDT 24 103767377553 ps
T580 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.2867812245 Jul 28 05:12:22 PM PDT 24 Jul 28 05:12:25 PM PDT 24 2159523454 ps
T581 /workspace/coverage/default/6.sysrst_ctrl_alert_test.2501074236 Jul 28 05:12:17 PM PDT 24 Jul 28 05:12:23 PM PDT 24 2013222352 ps
T582 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.2390259573 Jul 28 05:12:42 PM PDT 24 Jul 28 05:12:52 PM PDT 24 3081378625 ps
T117 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3832032741 Jul 28 05:12:34 PM PDT 24 Jul 28 05:12:39 PM PDT 24 3674976001 ps
T583 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2657865756 Jul 28 05:12:01 PM PDT 24 Jul 28 05:12:05 PM PDT 24 2617878221 ps
T228 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.2642579170 Jul 28 05:13:02 PM PDT 24 Jul 28 05:14:07 PM PDT 24 48868942825 ps
T112 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.1996045002 Jul 28 05:13:06 PM PDT 24 Jul 28 05:13:13 PM PDT 24 5026212664 ps
T312 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1553994568 Jul 28 05:12:45 PM PDT 24 Jul 28 05:13:40 PM PDT 24 77983646440 ps
T210 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.1734727605 Jul 28 05:12:00 PM PDT 24 Jul 28 05:13:08 PM PDT 24 25333042156 ps
T584 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.3723470003 Jul 28 05:11:48 PM PDT 24 Jul 28 05:11:50 PM PDT 24 2482225898 ps
T585 /workspace/coverage/default/46.sysrst_ctrl_smoke.2934250650 Jul 28 05:13:18 PM PDT 24 Jul 28 05:13:25 PM PDT 24 2110716676 ps
T586 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2819558696 Jul 28 05:11:55 PM PDT 24 Jul 28 05:14:15 PM PDT 24 57444455674 ps
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