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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.96 99.37 96.71 100.00 96.79 98.85 99.52 94.50


Total test records in report: 915
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T587 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.596654014 Jul 28 05:12:28 PM PDT 24 Jul 28 05:14:08 PM PDT 24 77876292687 ps
T588 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.3889782735 Jul 28 05:12:38 PM PDT 24 Jul 28 05:12:41 PM PDT 24 2517593685 ps
T589 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.441495170 Jul 28 05:12:42 PM PDT 24 Jul 28 05:13:39 PM PDT 24 96571909412 ps
T590 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.900474374 Jul 28 05:12:35 PM PDT 24 Jul 28 05:12:42 PM PDT 24 2458147377 ps
T591 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.94951597 Jul 28 05:12:27 PM PDT 24 Jul 28 05:12:31 PM PDT 24 2420534526 ps
T592 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2108080920 Jul 28 05:12:33 PM PDT 24 Jul 28 05:12:42 PM PDT 24 2882919478 ps
T593 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.3673360155 Jul 28 05:12:45 PM PDT 24 Jul 28 05:12:46 PM PDT 24 2140622250 ps
T324 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.242295843 Jul 28 05:13:33 PM PDT 24 Jul 28 05:15:01 PM PDT 24 64349064635 ps
T594 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.1609207883 Jul 28 05:12:40 PM PDT 24 Jul 28 05:12:44 PM PDT 24 3252959176 ps
T595 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2630921959 Jul 28 05:12:07 PM PDT 24 Jul 28 05:12:10 PM PDT 24 4576984660 ps
T596 /workspace/coverage/default/45.sysrst_ctrl_stress_all.3147106558 Jul 28 05:13:06 PM PDT 24 Jul 28 05:13:40 PM PDT 24 14346527847 ps
T597 /workspace/coverage/default/47.sysrst_ctrl_alert_test.1371728689 Jul 28 05:13:45 PM PDT 24 Jul 28 05:13:48 PM PDT 24 2017809611 ps
T598 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.615518408 Jul 28 05:12:20 PM PDT 24 Jul 28 05:12:23 PM PDT 24 2553597135 ps
T599 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3392932026 Jul 28 05:12:08 PM PDT 24 Jul 28 05:12:15 PM PDT 24 2613581771 ps
T270 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1803688032 Jul 28 05:12:07 PM PDT 24 Jul 28 05:12:54 PM PDT 24 38312825919 ps
T600 /workspace/coverage/default/36.sysrst_ctrl_stress_all.1876016173 Jul 28 05:12:53 PM PDT 24 Jul 28 05:13:01 PM PDT 24 11529632318 ps
T601 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1515700954 Jul 28 05:12:30 PM PDT 24 Jul 28 05:12:37 PM PDT 24 2249314911 ps
T602 /workspace/coverage/default/26.sysrst_ctrl_alert_test.4143174196 Jul 28 05:12:31 PM PDT 24 Jul 28 05:12:37 PM PDT 24 2014201763 ps
T603 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.1393409751 Jul 28 05:12:33 PM PDT 24 Jul 28 05:12:35 PM PDT 24 2109004501 ps
T604 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1298487217 Jul 28 05:12:50 PM PDT 24 Jul 28 05:12:51 PM PDT 24 5672248888 ps
T605 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2898667853 Jul 28 05:13:24 PM PDT 24 Jul 28 05:14:07 PM PDT 24 66306350598 ps
T606 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.2933069281 Jul 28 05:13:25 PM PDT 24 Jul 28 05:13:33 PM PDT 24 2837664461 ps
T607 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.4236074807 Jul 28 05:12:56 PM PDT 24 Jul 28 05:13:00 PM PDT 24 2614603802 ps
T229 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.955727260 Jul 28 05:11:47 PM PDT 24 Jul 28 05:15:58 PM PDT 24 94786940207 ps
T95 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.2813901733 Jul 28 05:12:27 PM PDT 24 Jul 28 05:12:30 PM PDT 24 3482730107 ps
T608 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1545879171 Jul 28 05:13:10 PM PDT 24 Jul 28 05:13:14 PM PDT 24 2615654377 ps
T609 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.2819104905 Jul 28 05:13:19 PM PDT 24 Jul 28 05:13:56 PM PDT 24 83399630809 ps
T610 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3467496462 Jul 28 05:13:10 PM PDT 24 Jul 28 05:13:13 PM PDT 24 3196431829 ps
T154 /workspace/coverage/default/34.sysrst_ctrl_stress_all.245452118 Jul 28 05:12:57 PM PDT 24 Jul 28 05:13:05 PM PDT 24 12408512054 ps
T611 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.3969234857 Jul 28 05:11:50 PM PDT 24 Jul 28 05:11:55 PM PDT 24 3484078021 ps
T612 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3541274556 Jul 28 05:12:27 PM PDT 24 Jul 28 05:12:30 PM PDT 24 3603600791 ps
T613 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3217568998 Jul 28 05:12:42 PM PDT 24 Jul 28 05:12:49 PM PDT 24 2458470712 ps
T614 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.1962205948 Jul 28 05:12:22 PM PDT 24 Jul 28 05:12:27 PM PDT 24 2222026250 ps
T615 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.50106172 Jul 28 05:12:11 PM PDT 24 Jul 28 05:12:14 PM PDT 24 3210786449 ps
T616 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1970324540 Jul 28 05:12:13 PM PDT 24 Jul 28 05:14:09 PM PDT 24 348218874867 ps
T617 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.1124154395 Jul 28 05:13:10 PM PDT 24 Jul 28 05:13:14 PM PDT 24 2618254571 ps
T618 /workspace/coverage/default/6.sysrst_ctrl_smoke.94401768 Jul 28 05:12:14 PM PDT 24 Jul 28 05:12:20 PM PDT 24 2112263088 ps
T619 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.3983496956 Jul 28 05:13:00 PM PDT 24 Jul 28 05:13:06 PM PDT 24 2466538337 ps
T620 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.3196719852 Jul 28 05:12:11 PM PDT 24 Jul 28 05:17:24 PM PDT 24 117661669843 ps
T240 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.2818263806 Jul 28 05:11:58 PM PDT 24 Jul 28 05:12:09 PM PDT 24 22095367662 ps
T621 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2737022227 Jul 28 05:13:06 PM PDT 24 Jul 28 05:13:08 PM PDT 24 2506097467 ps
T257 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.97681281 Jul 28 05:13:13 PM PDT 24 Jul 28 05:13:52 PM PDT 24 62723442049 ps
T622 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.200630560 Jul 28 05:12:21 PM PDT 24 Jul 28 05:12:22 PM PDT 24 2573380091 ps
T623 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.2079028592 Jul 28 05:13:00 PM PDT 24 Jul 28 05:14:21 PM PDT 24 31324336550 ps
T624 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.4228905619 Jul 28 05:12:03 PM PDT 24 Jul 28 05:12:11 PM PDT 24 3096744481 ps
T625 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.3801040514 Jul 28 05:12:32 PM PDT 24 Jul 28 05:14:46 PM PDT 24 139006180927 ps
T626 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.3684950607 Jul 28 05:13:04 PM PDT 24 Jul 28 05:13:08 PM PDT 24 5954465876 ps
T627 /workspace/coverage/default/43.sysrst_ctrl_alert_test.2794375440 Jul 28 05:13:08 PM PDT 24 Jul 28 05:13:10 PM PDT 24 2039185478 ps
T628 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.103417903 Jul 28 05:12:21 PM PDT 24 Jul 28 05:12:22 PM PDT 24 2574633271 ps
T252 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.2703237920 Jul 28 05:11:56 PM PDT 24 Jul 28 05:12:53 PM PDT 24 22011647596 ps
T629 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.1735719655 Jul 28 05:12:17 PM PDT 24 Jul 28 05:12:20 PM PDT 24 2532976139 ps
T630 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.4064069074 Jul 28 05:12:58 PM PDT 24 Jul 28 05:13:05 PM PDT 24 2611094585 ps
T631 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2288483811 Jul 28 05:12:24 PM PDT 24 Jul 28 05:12:27 PM PDT 24 12487403853 ps
T632 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1253653146 Jul 28 05:12:22 PM PDT 24 Jul 28 05:12:28 PM PDT 24 2458475781 ps
T211 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.932978589 Jul 28 05:13:19 PM PDT 24 Jul 28 05:16:11 PM PDT 24 61830067334 ps
T633 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.1536068463 Jul 28 05:13:24 PM PDT 24 Jul 28 05:15:16 PM PDT 24 146688894613 ps
T634 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.705777108 Jul 28 05:13:00 PM PDT 24 Jul 28 05:15:49 PM PDT 24 137628667608 ps
T635 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1480442004 Jul 28 05:12:21 PM PDT 24 Jul 28 05:12:24 PM PDT 24 2122867061 ps
T636 /workspace/coverage/default/22.sysrst_ctrl_alert_test.2122098306 Jul 28 05:12:31 PM PDT 24 Jul 28 05:12:34 PM PDT 24 2018716790 ps
T637 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1487270564 Jul 28 05:12:15 PM PDT 24 Jul 28 05:12:22 PM PDT 24 2252622312 ps
T638 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.3601229707 Jul 28 05:12:06 PM PDT 24 Jul 28 05:12:45 PM PDT 24 58206485284 ps
T639 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.4105057472 Jul 28 05:12:16 PM PDT 24 Jul 28 05:12:20 PM PDT 24 3217496381 ps
T121 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2186455181 Jul 28 05:13:13 PM PDT 24 Jul 28 05:13:20 PM PDT 24 2920215498 ps
T640 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.1006298405 Jul 28 05:11:50 PM PDT 24 Jul 28 05:11:53 PM PDT 24 2636698343 ps
T641 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1036084771 Jul 28 05:12:06 PM PDT 24 Jul 28 05:12:15 PM PDT 24 4546148963 ps
T330 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.552999039 Jul 28 05:12:40 PM PDT 24 Jul 28 05:17:36 PM PDT 24 116309211529 ps
T642 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.4042357219 Jul 28 05:12:22 PM PDT 24 Jul 28 05:12:25 PM PDT 24 2630637263 ps
T643 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.353886293 Jul 28 05:12:18 PM PDT 24 Jul 28 05:12:21 PM PDT 24 2624263304 ps
T644 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.506764769 Jul 28 05:11:57 PM PDT 24 Jul 28 05:11:59 PM PDT 24 2526438594 ps
T310 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.4208239809 Jul 28 05:13:26 PM PDT 24 Jul 28 05:15:59 PM PDT 24 63690235363 ps
T645 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.4102613206 Jul 28 05:13:27 PM PDT 24 Jul 28 05:16:57 PM PDT 24 79115189758 ps
T331 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.824381487 Jul 28 05:13:33 PM PDT 24 Jul 28 05:14:30 PM PDT 24 92251894460 ps
T348 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2180683179 Jul 28 05:12:07 PM PDT 24 Jul 28 05:12:41 PM PDT 24 1133245379517 ps
T646 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.1345985393 Jul 28 05:11:58 PM PDT 24 Jul 28 05:12:00 PM PDT 24 2531350080 ps
T647 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3269589238 Jul 28 05:13:12 PM PDT 24 Jul 28 05:13:18 PM PDT 24 2612193444 ps
T648 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3539305512 Jul 28 05:12:11 PM PDT 24 Jul 28 05:12:16 PM PDT 24 2515341189 ps
T74 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1301158261 Jul 28 05:13:15 PM PDT 24 Jul 28 05:17:06 PM PDT 24 97363021063 ps
T649 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.778374247 Jul 28 05:12:16 PM PDT 24 Jul 28 05:12:23 PM PDT 24 2920432146 ps
T650 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.4160352997 Jul 28 05:13:20 PM PDT 24 Jul 28 05:18:01 PM PDT 24 106291672757 ps
T181 /workspace/coverage/default/27.sysrst_ctrl_stress_all.867452824 Jul 28 05:12:37 PM PDT 24 Jul 28 05:13:11 PM PDT 24 13131259687 ps
T651 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.2122266480 Jul 28 05:12:57 PM PDT 24 Jul 28 05:12:59 PM PDT 24 3263362749 ps
T309 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.1204207775 Jul 28 05:12:31 PM PDT 24 Jul 28 05:14:48 PM PDT 24 51483225021 ps
T652 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.130989668 Jul 28 05:12:32 PM PDT 24 Jul 28 05:12:34 PM PDT 24 2680894270 ps
T653 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.181985794 Jul 28 05:12:54 PM PDT 24 Jul 28 05:12:57 PM PDT 24 2628866388 ps
T654 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4241532478 Jul 28 05:11:39 PM PDT 24 Jul 28 05:11:46 PM PDT 24 2347347909 ps
T655 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.239608916 Jul 28 05:12:45 PM PDT 24 Jul 28 05:12:51 PM PDT 24 2515845922 ps
T656 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3941834741 Jul 28 05:13:18 PM PDT 24 Jul 28 05:13:25 PM PDT 24 2612339025 ps
T657 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.3930903368 Jul 28 05:13:03 PM PDT 24 Jul 28 05:16:22 PM PDT 24 89961285013 ps
T658 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.3661595443 Jul 28 05:12:43 PM PDT 24 Jul 28 05:12:52 PM PDT 24 3201657343 ps
T271 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2567659197 Jul 28 05:13:09 PM PDT 24 Jul 28 05:14:10 PM PDT 24 736603201872 ps
T659 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.3551733932 Jul 28 05:11:55 PM PDT 24 Jul 28 05:12:01 PM PDT 24 2249740905 ps
T660 /workspace/coverage/default/9.sysrst_ctrl_alert_test.3029279656 Jul 28 05:12:24 PM PDT 24 Jul 28 05:12:27 PM PDT 24 2015198886 ps
T661 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.1464796139 Jul 28 05:12:12 PM PDT 24 Jul 28 05:12:15 PM PDT 24 2047055965 ps
T662 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2331342486 Jul 28 05:12:43 PM PDT 24 Jul 28 05:12:46 PM PDT 24 2477055100 ps
T663 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.1146096812 Jul 28 05:12:15 PM PDT 24 Jul 28 05:12:19 PM PDT 24 3036145379 ps
T664 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1473152315 Jul 28 05:13:08 PM PDT 24 Jul 28 05:13:14 PM PDT 24 2509477050 ps
T665 /workspace/coverage/default/27.sysrst_ctrl_alert_test.2868157981 Jul 28 05:12:52 PM PDT 24 Jul 28 05:12:53 PM PDT 24 2122022913 ps
T666 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.1043282332 Jul 28 05:12:23 PM PDT 24 Jul 28 05:12:32 PM PDT 24 3616735709 ps
T667 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2979336211 Jul 28 05:12:10 PM PDT 24 Jul 28 05:12:11 PM PDT 24 2655324615 ps
T668 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2639805586 Jul 28 05:12:27 PM PDT 24 Jul 28 05:12:32 PM PDT 24 2463504374 ps
T214 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2217166225 Jul 28 05:13:05 PM PDT 24 Jul 28 05:13:42 PM PDT 24 54322993252 ps
T669 /workspace/coverage/default/20.sysrst_ctrl_stress_all.964432771 Jul 28 05:12:26 PM PDT 24 Jul 28 05:12:29 PM PDT 24 12208560618 ps
T670 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2936259675 Jul 28 05:12:14 PM PDT 24 Jul 28 05:13:22 PM PDT 24 91304110840 ps
T671 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2144141184 Jul 28 05:13:28 PM PDT 24 Jul 28 05:14:50 PM PDT 24 123882717520 ps
T672 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.425910029 Jul 28 05:12:29 PM PDT 24 Jul 28 05:12:34 PM PDT 24 2514210264 ps
T673 /workspace/coverage/default/0.sysrst_ctrl_alert_test.2479564617 Jul 28 05:11:54 PM PDT 24 Jul 28 05:12:00 PM PDT 24 2013105017 ps
T674 /workspace/coverage/default/42.sysrst_ctrl_smoke.2194648939 Jul 28 05:13:21 PM PDT 24 Jul 28 05:13:26 PM PDT 24 2117672326 ps
T675 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2097646876 Jul 28 05:12:50 PM PDT 24 Jul 28 05:12:56 PM PDT 24 3636050287 ps
T676 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.10568109 Jul 28 05:12:54 PM PDT 24 Jul 28 05:13:01 PM PDT 24 4278046116 ps
T677 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2350812143 Jul 28 05:12:57 PM PDT 24 Jul 28 05:13:03 PM PDT 24 2086277033 ps
T162 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.3931231855 Jul 28 05:12:32 PM PDT 24 Jul 28 05:12:41 PM PDT 24 2917656560 ps
T678 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2461939187 Jul 28 05:13:30 PM PDT 24 Jul 28 05:13:58 PM PDT 24 21837435955 ps
T335 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.138171410 Jul 28 05:12:32 PM PDT 24 Jul 28 05:18:06 PM PDT 24 133706944074 ps
T306 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.4047414809 Jul 28 05:12:58 PM PDT 24 Jul 28 05:15:34 PM PDT 24 120974485502 ps
T679 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.1246629821 Jul 28 05:12:16 PM PDT 24 Jul 28 05:21:12 PM PDT 24 897754219405 ps
T680 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1166688882 Jul 28 05:13:25 PM PDT 24 Jul 28 05:13:41 PM PDT 24 25610048915 ps
T681 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3049922982 Jul 28 05:13:14 PM PDT 24 Jul 28 05:13:16 PM PDT 24 2202968877 ps
T682 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1721595985 Jul 28 05:13:09 PM PDT 24 Jul 28 05:13:13 PM PDT 24 2472183009 ps
T683 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.233491439 Jul 28 05:12:12 PM PDT 24 Jul 28 05:12:14 PM PDT 24 2191181446 ps
T684 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.947518044 Jul 28 05:12:23 PM PDT 24 Jul 28 05:12:25 PM PDT 24 2638020532 ps
T155 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3024121775 Jul 28 05:12:39 PM PDT 24 Jul 28 05:13:59 PM PDT 24 31503846978 ps
T685 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.907725967 Jul 28 05:13:03 PM PDT 24 Jul 28 05:13:05 PM PDT 24 3157367323 ps
T686 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.99707598 Jul 28 05:12:44 PM PDT 24 Jul 28 05:12:45 PM PDT 24 2535363457 ps
T687 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2248031110 Jul 28 05:12:32 PM PDT 24 Jul 28 05:12:38 PM PDT 24 2215784131 ps
T688 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.523434569 Jul 28 05:12:01 PM PDT 24 Jul 28 05:12:03 PM PDT 24 2527112598 ps
T689 /workspace/coverage/default/41.sysrst_ctrl_alert_test.475258316 Jul 28 05:13:11 PM PDT 24 Jul 28 05:13:17 PM PDT 24 2008489637 ps
T690 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.1234929463 Jul 28 05:12:07 PM PDT 24 Jul 28 05:12:11 PM PDT 24 3931387462 ps
T691 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.3484071893 Jul 28 05:13:04 PM PDT 24 Jul 28 05:13:07 PM PDT 24 2685764963 ps
T692 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.4239887958 Jul 28 05:12:01 PM PDT 24 Jul 28 05:12:08 PM PDT 24 2466337935 ps
T191 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.412624486 Jul 28 05:13:04 PM PDT 24 Jul 28 05:13:11 PM PDT 24 4573467558 ps
T693 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1883263280 Jul 28 05:12:50 PM PDT 24 Jul 28 05:12:54 PM PDT 24 2518917604 ps
T694 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2069052730 Jul 28 05:13:13 PM PDT 24 Jul 28 05:13:20 PM PDT 24 2511970568 ps
T695 /workspace/coverage/default/2.sysrst_ctrl_smoke.3040851148 Jul 28 05:12:16 PM PDT 24 Jul 28 05:12:20 PM PDT 24 2114316444 ps
T696 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3713553576 Jul 28 05:13:19 PM PDT 24 Jul 28 05:13:21 PM PDT 24 2065755684 ps
T272 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1611591294 Jul 28 05:13:07 PM PDT 24 Jul 28 05:14:21 PM PDT 24 30423895452 ps
T697 /workspace/coverage/default/49.sysrst_ctrl_stress_all.2728156971 Jul 28 05:13:26 PM PDT 24 Jul 28 05:13:31 PM PDT 24 9265128519 ps
T698 /workspace/coverage/default/31.sysrst_ctrl_smoke.3754036853 Jul 28 05:12:45 PM PDT 24 Jul 28 05:12:46 PM PDT 24 2178238743 ps
T273 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.1080405136 Jul 28 05:12:30 PM PDT 24 Jul 28 05:14:40 PM PDT 24 58015539144 ps
T699 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2395696754 Jul 28 05:12:09 PM PDT 24 Jul 28 05:12:11 PM PDT 24 2075299223 ps
T700 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.704798863 Jul 28 05:13:06 PM PDT 24 Jul 28 05:13:16 PM PDT 24 4060140851 ps
T701 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.4060076495 Jul 28 05:13:04 PM PDT 24 Jul 28 05:13:12 PM PDT 24 2610144320 ps
T702 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.4253768926 Jul 28 05:13:06 PM PDT 24 Jul 28 05:13:18 PM PDT 24 4550263178 ps
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T713 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3241131102 Jul 28 05:12:58 PM PDT 24 Jul 28 05:13:00 PM PDT 24 2629246273 ps
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T719 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2636861036 Jul 28 05:12:13 PM PDT 24 Jul 28 05:12:18 PM PDT 24 2515544559 ps
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T726 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3751239812 Jul 28 05:13:24 PM PDT 24 Jul 28 05:13:27 PM PDT 24 3298439206 ps
T50 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.1651364878 Jul 28 05:12:00 PM PDT 24 Jul 28 05:12:23 PM PDT 24 40807620461 ps
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T738 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.4143123156 Jul 28 05:12:32 PM PDT 24 Jul 28 05:12:36 PM PDT 24 2615243091 ps
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T69 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.559575344 Jul 28 05:12:01 PM PDT 24 Jul 28 05:13:29 PM PDT 24 33781640042 ps
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T742 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.51608533 Jul 28 05:12:21 PM PDT 24 Jul 28 05:13:12 PM PDT 24 23001028642 ps
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T746 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.765973773 Jul 28 05:13:31 PM PDT 24 Jul 28 05:13:51 PM PDT 24 55341234107 ps
T747 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2762436604 Jul 28 05:13:08 PM PDT 24 Jul 28 05:13:10 PM PDT 24 2133191580 ps
T748 /workspace/coverage/default/30.sysrst_ctrl_stress_all.1798504488 Jul 28 05:12:33 PM PDT 24 Jul 28 05:12:41 PM PDT 24 54701927001 ps
T749 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.502562911 Jul 28 05:13:06 PM PDT 24 Jul 28 05:14:32 PM PDT 24 30329334705 ps
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T752 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.176839041 Jul 28 05:12:30 PM PDT 24 Jul 28 05:12:38 PM PDT 24 2610358405 ps
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T148 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.2258712089 Jul 28 05:12:47 PM PDT 24 Jul 28 05:13:35 PM PDT 24 74790729096 ps
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T758 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3211751455 Jul 28 05:12:07 PM PDT 24 Jul 28 05:12:17 PM PDT 24 3913966469 ps
T759 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2685011532 Jul 28 05:12:15 PM PDT 24 Jul 28 05:12:23 PM PDT 24 2512567528 ps
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T766 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.1119125318 Jul 28 05:12:43 PM PDT 24 Jul 28 05:12:47 PM PDT 24 2614234759 ps
T118 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1517270338 Jul 28 05:12:03 PM PDT 24 Jul 28 05:13:25 PM PDT 24 157108680238 ps
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T768 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3711211444 Jul 28 05:12:32 PM PDT 24 Jul 28 05:13:06 PM PDT 24 26840236790 ps
T769 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.2166395907 Jul 28 05:11:57 PM PDT 24 Jul 28 05:12:06 PM PDT 24 3375024882 ps
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T771 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2437822282 Jul 28 05:12:02 PM PDT 24 Jul 28 05:12:10 PM PDT 24 2466620313 ps
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T773 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3743660389 Jul 28 05:12:51 PM PDT 24 Jul 28 05:12:53 PM PDT 24 3582402868 ps
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T775 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2322765958 Jul 28 05:13:17 PM PDT 24 Jul 28 05:13:20 PM PDT 24 3044418669 ps
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T322 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2962488498 Jul 28 05:12:29 PM PDT 24 Jul 28 05:14:18 PM PDT 24 161813286588 ps
T321 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1315723039 Jul 28 05:13:29 PM PDT 24 Jul 28 05:18:40 PM PDT 24 114778273160 ps
T777 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.948220966 Jul 28 05:11:57 PM PDT 24 Jul 28 05:12:04 PM PDT 24 2455724158 ps
T778 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.1366665833 Jul 28 05:12:11 PM PDT 24 Jul 28 05:18:41 PM PDT 24 155166737790 ps
T779 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3640038729 Jul 28 05:12:15 PM PDT 24 Jul 28 05:12:21 PM PDT 24 3335191221 ps
T344 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.636869809 Jul 28 05:13:26 PM PDT 24 Jul 28 05:15:25 PM PDT 24 93369078034 ps
T780 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.3265402691 Jul 28 05:12:22 PM PDT 24 Jul 28 05:12:31 PM PDT 24 3109625503 ps
T781 /workspace/coverage/default/49.sysrst_ctrl_alert_test.3653016137 Jul 28 05:13:39 PM PDT 24 Jul 28 05:13:40 PM PDT 24 2145185608 ps
T782 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.1660637926 Jul 28 05:12:44 PM PDT 24 Jul 28 05:12:48 PM PDT 24 2513769100 ps
T783 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.1440203508 Jul 28 05:12:05 PM PDT 24 Jul 28 05:12:08 PM PDT 24 2472466006 ps
T784 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.3079807771 Jul 28 05:12:27 PM PDT 24 Jul 28 05:15:55 PM PDT 24 75818613244 ps
T785 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.4050077938 Jul 28 05:12:30 PM PDT 24 Jul 28 05:12:32 PM PDT 24 2566728242 ps
T786 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3039151864 Jul 28 05:12:32 PM PDT 24 Jul 28 05:12:35 PM PDT 24 3338764499 ps
T787 /workspace/coverage/default/8.sysrst_ctrl_alert_test.1042486491 Jul 28 05:12:17 PM PDT 24 Jul 28 05:12:19 PM PDT 24 2039696756 ps
T788 /workspace/coverage/default/16.sysrst_ctrl_stress_all.1240683164 Jul 28 05:12:36 PM PDT 24 Jul 28 05:12:38 PM PDT 24 7203009515 ps
T343 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2233442066 Jul 28 05:13:10 PM PDT 24 Jul 28 05:18:04 PM PDT 24 171945256061 ps
T789 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.818819042 Jul 28 05:13:07 PM PDT 24 Jul 28 06:06:13 PM PDT 24 1161169303827 ps
T790 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.2532349364 Jul 28 05:12:34 PM PDT 24 Jul 28 05:13:03 PM PDT 24 43536365943 ps
T791 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.41403253 Jul 28 05:13:02 PM PDT 24 Jul 28 05:13:09 PM PDT 24 7641035380 ps
T792 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.724726498 Jul 28 05:12:52 PM PDT 24 Jul 28 05:12:54 PM PDT 24 2529413176 ps
T793 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.2579332116 Jul 28 05:11:54 PM PDT 24 Jul 28 05:12:22 PM PDT 24 43544488914 ps
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