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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.38 99.51 96.46 100.00 99.36 99.00 99.90 94.43


Total test records in report: 916
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T488 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.4079060355 Jul 31 07:33:21 PM PDT 24 Jul 31 07:33:28 PM PDT 24 2608610781 ps
T489 /workspace/coverage/default/10.sysrst_ctrl_stress_all.3591854901 Jul 31 07:32:03 PM PDT 24 Jul 31 07:32:09 PM PDT 24 7740259163 ps
T490 /workspace/coverage/default/30.sysrst_ctrl_smoke.12935696 Jul 31 07:32:52 PM PDT 24 Jul 31 07:32:58 PM PDT 24 2114486690 ps
T71 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3875358756 Jul 31 07:32:34 PM PDT 24 Jul 31 07:33:28 PM PDT 24 96535449292 ps
T491 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.2614436569 Jul 31 07:33:22 PM PDT 24 Jul 31 07:33:29 PM PDT 24 2464860569 ps
T492 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.673106274 Jul 31 07:32:51 PM PDT 24 Jul 31 07:33:06 PM PDT 24 32742143909 ps
T493 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.687596358 Jul 31 07:32:52 PM PDT 24 Jul 31 07:32:59 PM PDT 24 2510960761 ps
T494 /workspace/coverage/default/38.sysrst_ctrl_alert_test.3709485461 Jul 31 07:33:20 PM PDT 24 Jul 31 07:33:23 PM PDT 24 2014100061 ps
T420 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.855227958 Jul 31 07:33:17 PM PDT 24 Jul 31 07:33:42 PM PDT 24 216882508392 ps
T495 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.972006504 Jul 31 07:32:59 PM PDT 24 Jul 31 07:33:02 PM PDT 24 2446178159 ps
T496 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3144335644 Jul 31 07:34:01 PM PDT 24 Jul 31 07:35:27 PM PDT 24 36550519716 ps
T497 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1971703318 Jul 31 07:32:56 PM PDT 24 Jul 31 07:33:05 PM PDT 24 3004925130 ps
T498 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.921491896 Jul 31 07:31:48 PM PDT 24 Jul 31 07:31:50 PM PDT 24 3557079993 ps
T499 /workspace/coverage/default/26.sysrst_ctrl_smoke.1366971748 Jul 31 07:32:37 PM PDT 24 Jul 31 07:32:39 PM PDT 24 2138805108 ps
T500 /workspace/coverage/default/6.sysrst_ctrl_alert_test.3657738100 Jul 31 07:31:55 PM PDT 24 Jul 31 07:31:57 PM PDT 24 2033101119 ps
T501 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.265382150 Jul 31 07:31:58 PM PDT 24 Jul 31 07:32:03 PM PDT 24 2026898253 ps
T502 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.3719693576 Jul 31 07:31:37 PM PDT 24 Jul 31 07:31:39 PM PDT 24 2561907989 ps
T503 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.4251510109 Jul 31 07:32:12 PM PDT 24 Jul 31 07:32:16 PM PDT 24 6463038620 ps
T504 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3888721377 Jul 31 07:32:34 PM PDT 24 Jul 31 07:32:42 PM PDT 24 2470780319 ps
T162 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.2022273588 Jul 31 07:32:10 PM PDT 24 Jul 31 07:32:14 PM PDT 24 6008465114 ps
T170 /workspace/coverage/default/29.sysrst_ctrl_stress_all.2833404407 Jul 31 07:32:50 PM PDT 24 Jul 31 07:33:10 PM PDT 24 14577729610 ps
T171 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.2780648005 Jul 31 07:31:10 PM PDT 24 Jul 31 07:32:07 PM PDT 24 22013304286 ps
T172 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.679943320 Jul 31 07:32:35 PM PDT 24 Jul 31 07:35:08 PM PDT 24 119583331841 ps
T173 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2513321048 Jul 31 07:31:40 PM PDT 24 Jul 31 07:31:48 PM PDT 24 2964996376 ps
T174 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.219025180 Jul 31 07:31:16 PM PDT 24 Jul 31 07:31:22 PM PDT 24 2247532108 ps
T175 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1778161895 Jul 31 07:32:03 PM PDT 24 Jul 31 07:32:06 PM PDT 24 2465745646 ps
T176 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.888012096 Jul 31 07:31:55 PM PDT 24 Jul 31 07:31:58 PM PDT 24 3551615221 ps
T177 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2792351077 Jul 31 07:33:20 PM PDT 24 Jul 31 07:33:45 PM PDT 24 9664122955 ps
T178 /workspace/coverage/default/12.sysrst_ctrl_stress_all.1097232337 Jul 31 07:32:05 PM PDT 24 Jul 31 07:32:31 PM PDT 24 164640014506 ps
T84 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4221234431 Jul 31 07:34:03 PM PDT 24 Jul 31 07:35:23 PM PDT 24 32104792879 ps
T179 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.2567807755 Jul 31 07:32:12 PM PDT 24 Jul 31 07:32:14 PM PDT 24 2843952513 ps
T505 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3422722473 Jul 31 07:32:47 PM PDT 24 Jul 31 07:32:49 PM PDT 24 2534299789 ps
T506 /workspace/coverage/default/9.sysrst_ctrl_smoke.4212639534 Jul 31 07:31:51 PM PDT 24 Jul 31 07:31:57 PM PDT 24 2111448915 ps
T507 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2356158569 Jul 31 07:33:06 PM PDT 24 Jul 31 07:33:11 PM PDT 24 2043774050 ps
T264 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.3063117511 Jul 31 07:32:51 PM PDT 24 Jul 31 07:32:56 PM PDT 24 3638434422 ps
T266 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.988076035 Jul 31 07:32:46 PM PDT 24 Jul 31 07:32:54 PM PDT 24 2610933796 ps
T267 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1083025109 Jul 31 07:32:20 PM PDT 24 Jul 31 07:32:23 PM PDT 24 10821315861 ps
T268 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3217633104 Jul 31 07:32:52 PM PDT 24 Jul 31 07:32:56 PM PDT 24 4189581995 ps
T269 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.3775013066 Jul 31 07:32:02 PM PDT 24 Jul 31 07:32:06 PM PDT 24 3236447425 ps
T270 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.1037296819 Jul 31 07:33:15 PM PDT 24 Jul 31 07:33:17 PM PDT 24 2466372502 ps
T85 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3575314385 Jul 31 07:33:59 PM PDT 24 Jul 31 07:35:00 PM PDT 24 24081548384 ps
T271 /workspace/coverage/default/10.sysrst_ctrl_smoke.3975227795 Jul 31 07:31:55 PM PDT 24 Jul 31 07:31:57 PM PDT 24 2124865313 ps
T272 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.977679312 Jul 31 07:34:11 PM PDT 24 Jul 31 07:34:51 PM PDT 24 78391292944 ps
T273 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2725368715 Jul 31 07:32:23 PM PDT 24 Jul 31 07:32:32 PM PDT 24 3484680056 ps
T508 /workspace/coverage/default/6.sysrst_ctrl_stress_all.2566481738 Jul 31 07:31:50 PM PDT 24 Jul 31 07:32:09 PM PDT 24 14251755862 ps
T509 /workspace/coverage/default/40.sysrst_ctrl_smoke.991992978 Jul 31 07:33:23 PM PDT 24 Jul 31 07:33:29 PM PDT 24 2110480965 ps
T413 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.1329001933 Jul 31 07:33:07 PM PDT 24 Jul 31 07:33:50 PM PDT 24 65713983856 ps
T510 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.4083724391 Jul 31 07:31:15 PM PDT 24 Jul 31 07:31:21 PM PDT 24 2020560845 ps
T381 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.1702728084 Jul 31 07:32:28 PM PDT 24 Jul 31 07:33:19 PM PDT 24 88537099276 ps
T511 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.4225725514 Jul 31 07:32:32 PM PDT 24 Jul 31 07:32:34 PM PDT 24 2640185214 ps
T410 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.1936784640 Jul 31 07:33:40 PM PDT 24 Jul 31 07:41:53 PM PDT 24 182314380168 ps
T218 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.3375446124 Jul 31 07:32:58 PM PDT 24 Jul 31 07:33:04 PM PDT 24 2472012276 ps
T512 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1524310317 Jul 31 07:32:10 PM PDT 24 Jul 31 07:32:12 PM PDT 24 2067343016 ps
T308 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.864776939 Jul 31 07:33:13 PM PDT 24 Jul 31 07:40:56 PM PDT 24 191916267313 ps
T513 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1610412107 Jul 31 07:31:47 PM PDT 24 Jul 31 07:31:49 PM PDT 24 2473278719 ps
T514 /workspace/coverage/default/15.sysrst_ctrl_smoke.2838669867 Jul 31 07:32:03 PM PDT 24 Jul 31 07:32:08 PM PDT 24 2112411685 ps
T515 /workspace/coverage/default/17.sysrst_ctrl_stress_all.1517948822 Jul 31 07:32:15 PM PDT 24 Jul 31 07:32:23 PM PDT 24 11342920911 ps
T516 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.89663862 Jul 31 07:33:29 PM PDT 24 Jul 31 07:33:32 PM PDT 24 2496084518 ps
T517 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.188073655 Jul 31 07:32:11 PM PDT 24 Jul 31 07:32:14 PM PDT 24 2530132393 ps
T518 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2713776104 Jul 31 07:33:38 PM PDT 24 Jul 31 07:33:40 PM PDT 24 2585248036 ps
T519 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.125504484 Jul 31 07:33:54 PM PDT 24 Jul 31 07:33:56 PM PDT 24 3112506148 ps
T520 /workspace/coverage/default/49.sysrst_ctrl_smoke.1518827726 Jul 31 07:33:57 PM PDT 24 Jul 31 07:34:00 PM PDT 24 2120813399 ps
T521 /workspace/coverage/default/5.sysrst_ctrl_smoke.2334558475 Jul 31 07:31:41 PM PDT 24 Jul 31 07:31:43 PM PDT 24 2133362668 ps
T522 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1077154637 Jul 31 07:32:28 PM PDT 24 Jul 31 07:32:32 PM PDT 24 2828598252 ps
T523 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2145040914 Jul 31 07:32:14 PM PDT 24 Jul 31 07:32:18 PM PDT 24 2473151096 ps
T524 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2328075463 Jul 31 07:32:43 PM PDT 24 Jul 31 07:32:51 PM PDT 24 2614695588 ps
T86 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3342856287 Jul 31 07:32:58 PM PDT 24 Jul 31 07:33:15 PM PDT 24 25102654313 ps
T409 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.3866987214 Jul 31 07:33:16 PM PDT 24 Jul 31 07:34:04 PM PDT 24 76779568858 ps
T525 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1203285822 Jul 31 07:31:57 PM PDT 24 Jul 31 07:32:05 PM PDT 24 2610450141 ps
T87 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2188654553 Jul 31 07:32:13 PM PDT 24 Jul 31 07:32:51 PM PDT 24 28335834530 ps
T163 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.3700124020 Jul 31 07:33:03 PM PDT 24 Jul 31 07:33:10 PM PDT 24 4431646541 ps
T526 /workspace/coverage/default/10.sysrst_ctrl_alert_test.4128939542 Jul 31 07:31:57 PM PDT 24 Jul 31 07:31:58 PM PDT 24 2119406138 ps
T164 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.3958787222 Jul 31 07:31:41 PM PDT 24 Jul 31 07:31:57 PM PDT 24 48354034932 ps
T527 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.3192884134 Jul 31 07:33:13 PM PDT 24 Jul 31 07:33:21 PM PDT 24 2611777300 ps
T528 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.486183566 Jul 31 07:32:37 PM PDT 24 Jul 31 07:32:46 PM PDT 24 3416297433 ps
T147 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.987357623 Jul 31 07:33:52 PM PDT 24 Jul 31 07:34:02 PM PDT 24 4541977330 ps
T88 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2829618727 Jul 31 07:31:41 PM PDT 24 Jul 31 07:31:46 PM PDT 24 3356952111 ps
T97 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.4225943439 Jul 31 07:32:19 PM PDT 24 Jul 31 07:32:21 PM PDT 24 2541896004 ps
T98 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1815885708 Jul 31 07:31:54 PM PDT 24 Jul 31 07:32:01 PM PDT 24 24383307631 ps
T99 /workspace/coverage/default/44.sysrst_ctrl_stress_all.3327913496 Jul 31 07:33:39 PM PDT 24 Jul 31 07:34:01 PM PDT 24 18476267891 ps
T100 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3233768077 Jul 31 07:32:29 PM PDT 24 Jul 31 07:36:55 PM PDT 24 100531157558 ps
T101 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2839010567 Jul 31 07:33:21 PM PDT 24 Jul 31 07:33:23 PM PDT 24 2802209761 ps
T102 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.1930544327 Jul 31 07:31:57 PM PDT 24 Jul 31 07:32:04 PM PDT 24 2614509553 ps
T103 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.346097143 Jul 31 07:33:34 PM PDT 24 Jul 31 07:33:41 PM PDT 24 2448903597 ps
T104 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2310865480 Jul 31 07:32:08 PM PDT 24 Jul 31 07:32:10 PM PDT 24 2667566894 ps
T105 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2191120187 Jul 31 07:32:07 PM PDT 24 Jul 31 07:32:09 PM PDT 24 2642268833 ps
T529 /workspace/coverage/default/2.sysrst_ctrl_alert_test.1660261758 Jul 31 07:31:25 PM PDT 24 Jul 31 07:31:27 PM PDT 24 2047513120 ps
T530 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.964091059 Jul 31 07:33:30 PM PDT 24 Jul 31 07:33:38 PM PDT 24 2947232777 ps
T531 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.1333480273 Jul 31 07:32:44 PM PDT 24 Jul 31 07:32:51 PM PDT 24 2513557494 ps
T397 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1190564619 Jul 31 07:33:59 PM PDT 24 Jul 31 07:38:21 PM PDT 24 103623932934 ps
T532 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2123980921 Jul 31 07:33:23 PM PDT 24 Jul 31 07:33:30 PM PDT 24 2610375633 ps
T533 /workspace/coverage/default/34.sysrst_ctrl_smoke.1055505166 Jul 31 07:33:07 PM PDT 24 Jul 31 07:33:09 PM PDT 24 2125324091 ps
T72 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2673805684 Jul 31 07:32:11 PM PDT 24 Jul 31 07:32:39 PM PDT 24 790079552579 ps
T534 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.2596397986 Jul 31 07:33:38 PM PDT 24 Jul 31 07:34:30 PM PDT 24 77746958370 ps
T535 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4133163101 Jul 31 07:33:52 PM PDT 24 Jul 31 07:34:01 PM PDT 24 13492201568 ps
T536 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.2962611816 Jul 31 07:32:20 PM PDT 24 Jul 31 07:32:22 PM PDT 24 2092317787 ps
T390 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.181453464 Jul 31 07:34:01 PM PDT 24 Jul 31 07:35:28 PM PDT 24 67601516745 ps
T537 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2973803016 Jul 31 07:33:49 PM PDT 24 Jul 31 07:33:51 PM PDT 24 3618767376 ps
T538 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2801648571 Jul 31 07:31:58 PM PDT 24 Jul 31 07:32:00 PM PDT 24 2492109041 ps
T148 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.199590987 Jul 31 07:32:14 PM PDT 24 Jul 31 07:32:17 PM PDT 24 4267487648 ps
T89 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2873365998 Jul 31 07:33:39 PM PDT 24 Jul 31 07:33:57 PM PDT 24 28104385055 ps
T539 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3820862196 Jul 31 07:31:56 PM PDT 24 Jul 31 07:32:04 PM PDT 24 2452861360 ps
T540 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3856596676 Jul 31 07:33:14 PM PDT 24 Jul 31 07:33:16 PM PDT 24 2530421812 ps
T541 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.36581093 Jul 31 07:33:46 PM PDT 24 Jul 31 07:33:48 PM PDT 24 3320009309 ps
T542 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.626103469 Jul 31 07:33:13 PM PDT 24 Jul 31 07:33:17 PM PDT 24 3580201891 ps
T543 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2586470445 Jul 31 07:31:49 PM PDT 24 Jul 31 07:31:52 PM PDT 24 2583690636 ps
T117 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1124210755 Jul 31 07:31:57 PM PDT 24 Jul 31 07:33:36 PM PDT 24 45022854686 ps
T544 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.3870065853 Jul 31 07:32:46 PM PDT 24 Jul 31 07:32:48 PM PDT 24 2643534831 ps
T545 /workspace/coverage/default/26.sysrst_ctrl_stress_all.1094559852 Jul 31 07:32:43 PM PDT 24 Jul 31 07:32:53 PM PDT 24 14092922962 ps
T382 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.3074327026 Jul 31 07:33:00 PM PDT 24 Jul 31 07:33:22 PM PDT 24 123943418710 ps
T546 /workspace/coverage/default/28.sysrst_ctrl_smoke.3591681820 Jul 31 07:32:44 PM PDT 24 Jul 31 07:32:50 PM PDT 24 2112017767 ps
T239 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.3190639257 Jul 31 07:31:26 PM PDT 24 Jul 31 07:34:12 PM PDT 24 69895056393 ps
T547 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.1973975157 Jul 31 07:31:28 PM PDT 24 Jul 31 07:31:35 PM PDT 24 2941542432 ps
T548 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3710151341 Jul 31 07:31:48 PM PDT 24 Jul 31 07:31:50 PM PDT 24 6175985272 ps
T549 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.4070832032 Jul 31 07:33:07 PM PDT 24 Jul 31 07:33:10 PM PDT 24 2656021352 ps
T550 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.128782926 Jul 31 07:31:40 PM PDT 24 Jul 31 07:31:42 PM PDT 24 3780396146 ps
T402 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.642130827 Jul 31 07:34:05 PM PDT 24 Jul 31 07:36:03 PM PDT 24 44959108681 ps
T551 /workspace/coverage/default/47.sysrst_ctrl_alert_test.2886117710 Jul 31 07:33:52 PM PDT 24 Jul 31 07:33:57 PM PDT 24 2016069413 ps
T380 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.3066708842 Jul 31 07:32:21 PM PDT 24 Jul 31 07:33:53 PM PDT 24 178751958766 ps
T552 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2866068378 Jul 31 07:32:35 PM PDT 24 Jul 31 07:32:42 PM PDT 24 2609441184 ps
T553 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3583160133 Jul 31 07:32:09 PM PDT 24 Jul 31 07:32:12 PM PDT 24 2525765844 ps
T391 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3265175118 Jul 31 07:31:24 PM PDT 24 Jul 31 07:31:45 PM PDT 24 34322481999 ps
T385 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.3806424618 Jul 31 07:31:48 PM PDT 24 Jul 31 07:34:10 PM PDT 24 111832528719 ps
T554 /workspace/coverage/default/24.sysrst_ctrl_smoke.1360472953 Jul 31 07:32:37 PM PDT 24 Jul 31 07:32:39 PM PDT 24 2131516554 ps
T217 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.2824275480 Jul 31 07:31:18 PM PDT 24 Jul 31 07:31:20 PM PDT 24 3720754284 ps
T555 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.1813300312 Jul 31 07:32:39 PM PDT 24 Jul 31 07:32:49 PM PDT 24 3392899360 ps
T240 /workspace/coverage/default/28.sysrst_ctrl_stress_all.4094571252 Jul 31 07:32:50 PM PDT 24 Jul 31 07:32:56 PM PDT 24 14259643014 ps
T556 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2474699980 Jul 31 07:32:50 PM PDT 24 Jul 31 07:32:52 PM PDT 24 2144298845 ps
T557 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.400342353 Jul 31 07:32:31 PM PDT 24 Jul 31 07:32:39 PM PDT 24 2613223230 ps
T558 /workspace/coverage/default/5.sysrst_ctrl_stress_all.687472551 Jul 31 07:31:40 PM PDT 24 Jul 31 07:31:52 PM PDT 24 12296882408 ps
T321 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.1779599373 Jul 31 07:32:11 PM PDT 24 Jul 31 07:35:34 PM PDT 24 152380191104 ps
T306 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2995689388 Jul 31 07:34:08 PM PDT 24 Jul 31 07:38:20 PM PDT 24 107330859350 ps
T559 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2892567845 Jul 31 07:32:47 PM PDT 24 Jul 31 07:32:51 PM PDT 24 3336981082 ps
T118 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1441133471 Jul 31 07:33:42 PM PDT 24 Jul 31 07:33:47 PM PDT 24 9561547438 ps
T242 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1447126718 Jul 31 07:31:26 PM PDT 24 Jul 31 07:31:32 PM PDT 24 2602168751 ps
T294 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.4216505426 Jul 31 07:34:01 PM PDT 24 Jul 31 07:34:36 PM PDT 24 27087877518 ps
T560 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.3728879987 Jul 31 07:32:09 PM PDT 24 Jul 31 07:32:20 PM PDT 24 3689869147 ps
T561 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.286435604 Jul 31 07:32:03 PM PDT 24 Jul 31 07:32:11 PM PDT 24 2609514435 ps
T208 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.425657497 Jul 31 07:31:41 PM PDT 24 Jul 31 07:32:20 PM PDT 24 29400168744 ps
T282 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1656540170 Jul 31 07:33:36 PM PDT 24 Jul 31 07:35:36 PM PDT 24 52847300048 ps
T562 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.2865894974 Jul 31 07:33:02 PM PDT 24 Jul 31 07:33:03 PM PDT 24 12150952965 ps
T563 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.572146205 Jul 31 07:33:51 PM PDT 24 Jul 31 07:33:58 PM PDT 24 3450521822 ps
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T241 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1340117439 Jul 31 07:32:52 PM PDT 24 Jul 31 07:33:42 PM PDT 24 89461847727 ps
T123 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1288489074 Jul 31 07:31:48 PM PDT 24 Jul 31 07:33:37 PM PDT 24 48520773652 ps
T565 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.575679901 Jul 31 07:33:37 PM PDT 24 Jul 31 07:39:45 PM PDT 24 144893081235 ps
T566 /workspace/coverage/default/48.sysrst_ctrl_alert_test.2502006096 Jul 31 07:33:57 PM PDT 24 Jul 31 07:34:00 PM PDT 24 2026874901 ps
T567 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1393598830 Jul 31 07:32:46 PM PDT 24 Jul 31 07:32:51 PM PDT 24 3319518926 ps
T421 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.4285547701 Jul 31 07:32:45 PM PDT 24 Jul 31 07:33:27 PM PDT 24 1435312964093 ps
T568 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3311313167 Jul 31 07:31:55 PM PDT 24 Jul 31 07:32:34 PM PDT 24 63885678717 ps
T569 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.2197532348 Jul 31 07:31:25 PM PDT 24 Jul 31 07:31:31 PM PDT 24 3216891322 ps
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T570 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3152743041 Jul 31 07:32:09 PM PDT 24 Jul 31 07:32:11 PM PDT 24 2025842814 ps
T342 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.386082538 Jul 31 07:31:24 PM PDT 24 Jul 31 07:33:10 PM PDT 24 42009758273 ps
T90 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.4149586389 Jul 31 07:33:49 PM PDT 24 Jul 31 07:35:55 PM PDT 24 58513447166 ps
T571 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3056579734 Jul 31 07:31:56 PM PDT 24 Jul 31 07:32:04 PM PDT 24 12743237882 ps
T415 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.490813818 Jul 31 07:31:16 PM PDT 24 Jul 31 07:34:16 PM PDT 24 138706538239 ps
T194 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.3693508956 Jul 31 07:32:59 PM PDT 24 Jul 31 07:34:52 PM PDT 24 85644038355 ps
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T573 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3986411234 Jul 31 07:31:16 PM PDT 24 Jul 31 07:31:22 PM PDT 24 2267963818 ps
T574 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1864146031 Jul 31 07:34:02 PM PDT 24 Jul 31 07:35:02 PM PDT 24 114449433788 ps
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T576 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.300419523 Jul 31 07:33:46 PM PDT 24 Jul 31 07:33:56 PM PDT 24 3636436958 ps
T577 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.1437704774 Jul 31 07:33:16 PM PDT 24 Jul 31 07:33:21 PM PDT 24 2513993064 ps
T295 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3893366567 Jul 31 07:31:55 PM PDT 24 Jul 31 07:32:05 PM PDT 24 27379433449 ps
T578 /workspace/coverage/default/40.sysrst_ctrl_alert_test.3815530470 Jul 31 07:33:32 PM PDT 24 Jul 31 07:33:34 PM PDT 24 2025939689 ps
T579 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.315795328 Jul 31 07:32:21 PM PDT 24 Jul 31 07:32:28 PM PDT 24 2451644381 ps
T406 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1984503379 Jul 31 07:34:00 PM PDT 24 Jul 31 07:34:45 PM PDT 24 130985142197 ps
T580 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.2438767196 Jul 31 07:33:36 PM PDT 24 Jul 31 07:33:54 PM PDT 24 27883422161 ps
T581 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1037475017 Jul 31 07:31:40 PM PDT 24 Jul 31 07:31:47 PM PDT 24 2509357613 ps
T283 /workspace/coverage/default/18.sysrst_ctrl_stress_all.477521131 Jul 31 07:32:20 PM PDT 24 Jul 31 07:32:36 PM PDT 24 8190588589 ps
T582 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.747684454 Jul 31 07:31:48 PM PDT 24 Jul 31 07:31:51 PM PDT 24 2946128347 ps
T583 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.200637629 Jul 31 07:31:29 PM PDT 24 Jul 31 07:31:31 PM PDT 24 5443794242 ps
T584 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1833907555 Jul 31 07:33:54 PM PDT 24 Jul 31 07:34:00 PM PDT 24 4940928394 ps
T585 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.1920014443 Jul 31 07:31:28 PM PDT 24 Jul 31 07:31:34 PM PDT 24 2181542123 ps
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T586 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1365169065 Jul 31 07:34:04 PM PDT 24 Jul 31 07:34:19 PM PDT 24 45111189177 ps
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T309 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.2345476887 Jul 31 07:32:43 PM PDT 24 Jul 31 07:34:00 PM PDT 24 135436207338 ps
T315 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.2834937423 Jul 31 07:32:01 PM PDT 24 Jul 31 07:32:31 PM PDT 24 43505721140 ps
T588 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.3144527330 Jul 31 07:33:07 PM PDT 24 Jul 31 07:33:09 PM PDT 24 2540155932 ps
T589 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.4232473192 Jul 31 07:31:53 PM PDT 24 Jul 31 07:31:57 PM PDT 24 2525341859 ps
T412 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.4108831868 Jul 31 07:33:30 PM PDT 24 Jul 31 07:35:13 PM PDT 24 148892435406 ps
T590 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.869085823 Jul 31 07:32:23 PM PDT 24 Jul 31 07:32:37 PM PDT 24 23709151215 ps
T119 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2759841102 Jul 31 07:31:40 PM PDT 24 Jul 31 07:31:42 PM PDT 24 7616052585 ps
T591 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.2983814139 Jul 31 07:33:14 PM PDT 24 Jul 31 07:33:17 PM PDT 24 4114724409 ps
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T593 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.627667299 Jul 31 07:33:46 PM PDT 24 Jul 31 07:33:49 PM PDT 24 5432730775 ps
T594 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1758779803 Jul 31 07:33:57 PM PDT 24 Jul 31 07:37:25 PM PDT 24 76712170803 ps
T595 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3907710932 Jul 31 07:33:33 PM PDT 24 Jul 31 07:33:37 PM PDT 24 2161588550 ps
T596 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.4261457454 Jul 31 07:31:54 PM PDT 24 Jul 31 07:31:57 PM PDT 24 3017572680 ps
T597 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.1305326944 Jul 31 07:32:43 PM PDT 24 Jul 31 07:32:53 PM PDT 24 3515979268 ps
T598 /workspace/coverage/default/26.sysrst_ctrl_alert_test.4171279235 Jul 31 07:32:42 PM PDT 24 Jul 31 07:32:48 PM PDT 24 2015358531 ps
T599 /workspace/coverage/default/42.sysrst_ctrl_alert_test.544812857 Jul 31 07:33:29 PM PDT 24 Jul 31 07:33:31 PM PDT 24 2025221082 ps
T600 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.246649940 Jul 31 07:32:27 PM PDT 24 Jul 31 07:32:34 PM PDT 24 2511465835 ps
T601 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.223837177 Jul 31 07:33:07 PM PDT 24 Jul 31 07:33:09 PM PDT 24 2481776177 ps
T602 /workspace/coverage/default/23.sysrst_ctrl_smoke.1221443546 Jul 31 07:32:29 PM PDT 24 Jul 31 07:32:32 PM PDT 24 2116612236 ps
T603 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2915474597 Jul 31 07:33:38 PM PDT 24 Jul 31 07:33:42 PM PDT 24 12870463173 ps
T604 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2544375258 Jul 31 07:33:31 PM PDT 24 Jul 31 07:33:38 PM PDT 24 2246871747 ps
T605 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.622595000 Jul 31 07:32:27 PM PDT 24 Jul 31 07:32:35 PM PDT 24 3130781309 ps
T606 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2449938713 Jul 31 07:34:00 PM PDT 24 Jul 31 07:35:13 PM PDT 24 54043192321 ps
T607 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3436557417 Jul 31 07:32:03 PM PDT 24 Jul 31 07:32:04 PM PDT 24 2549022644 ps
T261 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.87246270 Jul 31 07:33:54 PM PDT 24 Jul 31 07:33:58 PM PDT 24 5396914339 ps
T608 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1211973185 Jul 31 07:32:35 PM PDT 24 Jul 31 07:32:38 PM PDT 24 2476479546 ps
T416 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3875054768 Jul 31 07:31:48 PM PDT 24 Jul 31 07:36:29 PM PDT 24 109736441901 ps
T609 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.574009361 Jul 31 07:33:33 PM PDT 24 Jul 31 07:34:29 PM PDT 24 200795257405 ps
T610 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.1007529994 Jul 31 07:31:34 PM PDT 24 Jul 31 07:31:37 PM PDT 24 2438051091 ps
T611 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.3962282050 Jul 31 07:33:32 PM PDT 24 Jul 31 07:33:39 PM PDT 24 2128381972 ps
T612 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1070676492 Jul 31 07:33:52 PM PDT 24 Jul 31 07:33:57 PM PDT 24 2194650988 ps
T613 /workspace/coverage/default/14.sysrst_ctrl_stress_all.371581783 Jul 31 07:32:05 PM PDT 24 Jul 31 07:32:22 PM PDT 24 7626479469 ps
T614 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3391514547 Jul 31 07:33:20 PM PDT 24 Jul 31 07:33:21 PM PDT 24 6976099049 ps
T615 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1342277264 Jul 31 07:33:41 PM PDT 24 Jul 31 07:33:44 PM PDT 24 4388755404 ps
T417 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2453821356 Jul 31 07:33:39 PM PDT 24 Jul 31 07:34:38 PM PDT 24 62338866469 ps
T120 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3026047451 Jul 31 07:33:38 PM PDT 24 Jul 31 07:33:44 PM PDT 24 5488915557 ps
T616 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.4068367083 Jul 31 07:33:15 PM PDT 24 Jul 31 07:33:23 PM PDT 24 2608043725 ps
T617 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.412233623 Jul 31 07:33:06 PM PDT 24 Jul 31 07:33:16 PM PDT 24 3438556669 ps
T384 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.2823894721 Jul 31 07:32:23 PM PDT 24 Jul 31 07:33:50 PM PDT 24 62768020821 ps
T618 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1195305327 Jul 31 07:31:38 PM PDT 24 Jul 31 07:31:41 PM PDT 24 2205831349 ps
T181 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.3291851416 Jul 31 07:32:51 PM PDT 24 Jul 31 07:32:55 PM PDT 24 3358188816 ps
T229 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.1823896198 Jul 31 07:32:45 PM PDT 24 Jul 31 07:33:47 PM PDT 24 52750571146 ps
T230 /workspace/coverage/default/14.sysrst_ctrl_alert_test.4231150756 Jul 31 07:32:05 PM PDT 24 Jul 31 07:32:08 PM PDT 24 2033835666 ps
T231 /workspace/coverage/default/7.sysrst_ctrl_smoke.4216433456 Jul 31 07:31:48 PM PDT 24 Jul 31 07:31:54 PM PDT 24 2112473534 ps
T232 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.4260863786 Jul 31 07:32:30 PM PDT 24 Jul 31 07:33:32 PM PDT 24 26579064481 ps
T233 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2045673250 Jul 31 07:33:57 PM PDT 24 Jul 31 07:34:00 PM PDT 24 3395262884 ps
T234 /workspace/coverage/default/9.sysrst_ctrl_alert_test.1060090391 Jul 31 07:31:54 PM PDT 24 Jul 31 07:32:00 PM PDT 24 2009813827 ps
T235 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.3775398558 Jul 31 07:33:14 PM PDT 24 Jul 31 07:33:29 PM PDT 24 51755601249 ps
T236 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.1573451883 Jul 31 07:32:45 PM PDT 24 Jul 31 07:32:48 PM PDT 24 2533683036 ps
T237 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3133910006 Jul 31 07:31:49 PM PDT 24 Jul 31 07:31:55 PM PDT 24 2251744674 ps
T238 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.3159314006 Jul 31 07:32:20 PM PDT 24 Jul 31 07:32:26 PM PDT 24 2157173107 ps
T619 /workspace/coverage/default/35.sysrst_ctrl_alert_test.721701027 Jul 31 07:33:13 PM PDT 24 Jul 31 07:33:16 PM PDT 24 2022024450 ps
T620 /workspace/coverage/default/48.sysrst_ctrl_smoke.2593592831 Jul 31 07:33:45 PM PDT 24 Jul 31 07:33:47 PM PDT 24 2132854423 ps
T621 /workspace/coverage/default/27.sysrst_ctrl_stress_all.3694554214 Jul 31 07:32:42 PM PDT 24 Jul 31 07:33:06 PM PDT 24 9222331552 ps
T622 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1325494022 Jul 31 07:33:36 PM PDT 24 Jul 31 07:33:37 PM PDT 24 2624131162 ps
T623 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.3419903901 Jul 31 07:33:14 PM PDT 24 Jul 31 07:33:20 PM PDT 24 3396960231 ps
T624 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.764573975 Jul 31 07:31:49 PM PDT 24 Jul 31 07:32:18 PM PDT 24 23340047621 ps
T625 /workspace/coverage/default/1.sysrst_ctrl_alert_test.3489480760 Jul 31 07:31:26 PM PDT 24 Jul 31 07:31:27 PM PDT 24 2057005850 ps
T626 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.2842122152 Jul 31 07:31:57 PM PDT 24 Jul 31 07:31:58 PM PDT 24 2520389839 ps
T627 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.645278058 Jul 31 07:33:03 PM PDT 24 Jul 31 07:33:05 PM PDT 24 2592048176 ps
T628 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.3593521719 Jul 31 07:32:33 PM PDT 24 Jul 31 07:32:37 PM PDT 24 3295643920 ps
T121 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.563537765 Jul 31 07:31:22 PM PDT 24 Jul 31 07:31:24 PM PDT 24 6473763772 ps
T352 /workspace/coverage/default/42.sysrst_ctrl_stress_all.1383560699 Jul 31 07:33:28 PM PDT 24 Jul 31 07:33:35 PM PDT 24 14485863305 ps
T629 /workspace/coverage/default/18.sysrst_ctrl_smoke.2405858015 Jul 31 07:32:11 PM PDT 24 Jul 31 07:32:12 PM PDT 24 2165662513 ps
T630 /workspace/coverage/default/21.sysrst_ctrl_smoke.906020556 Jul 31 07:32:29 PM PDT 24 Jul 31 07:32:35 PM PDT 24 2113504042 ps
T631 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.4067913452 Jul 31 07:32:29 PM PDT 24 Jul 31 07:32:36 PM PDT 24 2466012616 ps
T632 /workspace/coverage/default/36.sysrst_ctrl_smoke.2528521544 Jul 31 07:33:16 PM PDT 24 Jul 31 07:33:19 PM PDT 24 2132231174 ps
T419 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2422683649 Jul 31 07:33:15 PM PDT 24 Jul 31 07:34:22 PM PDT 24 26081564240 ps
T633 /workspace/coverage/default/28.sysrst_ctrl_alert_test.785876587 Jul 31 07:32:51 PM PDT 24 Jul 31 07:32:53 PM PDT 24 2036500436 ps
T634 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3713764033 Jul 31 07:31:37 PM PDT 24 Jul 31 07:31:50 PM PDT 24 4564613448 ps
T635 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.749129970 Jul 31 07:31:27 PM PDT 24 Jul 31 07:31:34 PM PDT 24 2512176194 ps
T636 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3915410075 Jul 31 07:31:49 PM PDT 24 Jul 31 07:33:28 PM PDT 24 42316443387 ps
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