Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.17	99.42	96.73	100.00	98.08	98.89	99.71	94.38

Total tests in report: 918

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
56.82	56.82	75.69	75.69	64.66	64.66	90.98	90.98	11.54	11.54	76.75	76.75	64.45	64.45	13.64	13.64	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3070543096
71.66	14.85	85.69	10.00	76.04	11.38	92.81	1.83	51.28	39.74	85.36	8.61	82.08	17.63	28.39	14.74	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.644409860
77.51	5.85	91.32	5.64	85.11	9.07	95.32	2.51	53.85	2.56	91.94	6.58	84.97	2.89	40.07	11.69	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.663815264
81.95	4.43	94.79	3.47	88.60	3.49	96.23	0.91	63.46	9.62	94.79	2.85	90.56	5.59	45.19	5.12	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.651226056
85.31	3.36	95.67	0.88	89.36	0.76	96.23	0.00	71.15	7.69	95.60	0.81	92.58	2.02	56.57	11.38	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.93048020
87.72	2.41	96.87	1.19	90.95	1.59	96.23	0.00	83.97	12.82	96.86	1.26	92.58	0.00	56.57	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.1431954737
89.12	1.40	96.88	0.02	90.95	0.00	96.23	0.00	83.97	0.00	96.89	0.04	92.58	0.00	66.35	9.78	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3760672201
90.41	1.29	97.42	0.54	91.73	0.78	96.58	0.34	86.54	2.56	97.23	0.33	93.83	1.25	69.56	3.21	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3470825297
91.64	1.22	97.82	0.39	92.01	0.28	96.58	0.00	89.74	3.21	97.63	0.41	94.70	0.87	72.97	3.41	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.601429139
92.81	1.18	97.84	0.02	93.15	1.14	97.26	0.68	89.74	0.00	97.67	0.04	94.70	0.00	79.34	6.37	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.753798758
93.45	0.64	98.04	0.21	93.48	0.33	97.26	0.00	91.03	1.28	97.93	0.26	97.11	2.41	79.34	0.00	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.4195882576
93.96	0.51	98.10	0.06	93.60	0.13	97.26	0.00	91.03	0.00	97.93	0.00	97.11	0.00	82.70	3.36	/workspace/coverage/default/1.sysrst_ctrl_stress_all.1839912147
94.42	0.46	98.25	0.15	93.98	0.38	97.26	0.00	93.59	2.56	98.08	0.15	97.11	0.00	82.70	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3483464290
94.75	0.32	98.41	0.17	93.98	0.00	97.26	0.00	94.23	0.64	98.11	0.04	97.11	0.00	84.10	1.40	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2052532922
95.06	0.31	98.41	0.00	94.01	0.03	99.09	1.83	94.23	0.00	98.11	0.00	97.21	0.10	84.35	0.25	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.3463816247
95.32	0.26	98.49	0.07	94.08	0.08	99.09	0.00	95.51	1.28	98.19	0.07	97.50	0.29	84.35	0.00	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1417868077
95.57	0.25	98.75	0.26	94.29	0.20	99.77	0.68	95.51	0.00	98.23	0.04	97.69	0.19	84.75	0.40	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.4280700903
95.82	0.25	98.75	0.00	94.39	0.10	99.77	0.00	95.51	0.00	98.23	0.00	97.78	0.10	86.31	1.55	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.2191462927
96.07	0.25	98.84	0.09	94.44	0.05	99.77	0.00	96.79	1.28	98.34	0.11	97.98	0.19	86.31	0.00	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.1553241190
96.30	0.23	98.90	0.06	94.51	0.08	99.77	0.00	97.44	0.64	98.37	0.04	97.98	0.00	87.11	0.80	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.1616999179
96.48	0.19	98.97	0.07	94.59	0.08	99.77	0.00	97.44	0.00	98.37	0.00	97.98	0.00	88.26	1.15	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.412267289
96.66	0.18	99.01	0.04	94.62	0.03	99.77	0.00	98.08	0.64	98.41	0.04	98.17	0.19	88.57	0.30	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2702501371
96.83	0.17	99.01	0.00	94.64	0.03	99.77	0.00	98.08	0.00	98.41	0.00	98.17	0.00	89.72	1.15	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.3938067589
96.98	0.15	99.03	0.02	94.84	0.20	99.77	0.00	98.08	0.00	98.48	0.07	98.84	0.67	89.82	0.10	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_rw.2132453810
97.13	0.15	99.03	0.00	95.73	0.88	99.77	0.00	98.08	0.00	98.48	0.00	98.84	0.00	89.97	0.15	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.3282811905
97.24	0.11	99.07	0.04	95.80	0.08	99.77	0.00	98.08	0.00	98.48	0.00	98.84	0.00	90.62	0.65	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.873293042
97.31	0.07	99.07	0.00	95.83	0.03	99.77	0.00	98.08	0.00	98.48	0.00	98.94	0.10	91.02	0.40	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1640393348
97.38	0.07	99.10	0.04	95.90	0.08	99.77	0.00	98.08	0.00	98.56	0.07	99.13	0.19	91.12	0.10	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.3928011116
97.44	0.06	99.14	0.04	96.01	0.10	99.77	0.00	98.08	0.00	98.63	0.07	99.13	0.00	91.32	0.20	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2762755692
97.50	0.06	99.18	0.04	96.03	0.03	99.77	0.00	98.08	0.00	98.63	0.00	99.23	0.10	91.57	0.25	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1046083933
97.56	0.06	99.20	0.02	96.03	0.00	99.77	0.00	98.08	0.00	98.67	0.04	99.23	0.00	91.93	0.35	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.3552042938
97.61	0.05	99.25	0.06	96.11	0.08	100.00	0.23	98.08	0.00	98.67	0.00	99.23	0.00	91.93	0.00	/workspace/coverage/default/10.sysrst_ctrl_alert_test.2823924304
97.66	0.05	99.27	0.02	96.41	0.30	100.00	0.00	98.08	0.00	98.71	0.04	99.23	0.00	91.93	0.00	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.3521210456
97.71	0.05	99.27	0.00	96.41	0.00	100.00	0.00	98.08	0.00	98.71	0.00	99.23	0.00	92.28	0.35	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.3614283225
97.75	0.04	99.29	0.02	96.46	0.05	100.00	0.00	98.08	0.00	98.74	0.04	99.42	0.19	92.28	0.00	/workspace/coverage/default/6.sysrst_ctrl_stress_all.4131198753
97.79	0.04	99.29	0.00	96.46	0.00	100.00	0.00	98.08	0.00	98.74	0.00	99.42	0.00	92.53	0.25	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1106311111
97.82	0.03	99.29	0.00	96.49	0.03	100.00	0.00	98.08	0.00	98.74	0.00	99.52	0.10	92.63	0.10	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2981256290
97.84	0.02	99.29	0.00	96.49	0.00	100.00	0.00	98.08	0.00	98.74	0.00	99.52	0.00	92.78	0.15	/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.3566518606
97.86	0.02	99.29	0.00	96.49	0.00	100.00	0.00	98.08	0.00	98.74	0.00	99.52	0.00	92.93	0.15	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.1525215805
97.88	0.02	99.29	0.00	96.49	0.00	100.00	0.00	98.08	0.00	98.74	0.00	99.52	0.00	93.08	0.15	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.1807207053
97.91	0.02	99.29	0.00	96.49	0.00	100.00	0.00	98.08	0.00	98.74	0.00	99.52	0.00	93.23	0.15	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.4199720922
97.93	0.02	99.33	0.04	96.49	0.00	100.00	0.00	98.08	0.00	98.74	0.00	99.61	0.10	93.23	0.00	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.596039668
97.94	0.02	99.33	0.00	96.61	0.13	100.00	0.00	98.08	0.00	98.74	0.00	99.61	0.00	93.23	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.4053869255
97.96	0.02	99.33	0.00	96.64	0.03	100.00	0.00	98.08	0.00	98.74	0.00	99.71	0.10	93.23	0.00	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.1103571148
97.98	0.02	99.35	0.02	96.64	0.00	100.00	0.00	98.08	0.00	98.74	0.00	99.71	0.00	93.33	0.10	/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3063976589
97.99	0.02	99.38	0.04	96.64	0.00	100.00	0.00	98.08	0.00	98.82	0.07	99.71	0.00	93.33	0.00	/workspace/coverage/default/30.sysrst_ctrl_stress_all.2690786386
98.01	0.02	99.42	0.04	96.64	0.00	100.00	0.00	98.08	0.00	98.89	0.07	99.71	0.00	93.33	0.00	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.3835285236
98.02	0.01	99.42	0.00	96.64	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	93.43	0.10	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1230344366
98.04	0.01	99.42	0.00	96.64	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	93.53	0.10	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.4261343389
98.05	0.01	99.42	0.00	96.64	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	93.63	0.10	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.2885894865
98.07	0.01	99.42	0.00	96.64	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	93.73	0.10	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.825808542
98.08	0.01	99.42	0.00	96.64	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	93.83	0.10	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3686201629
98.09	0.01	99.42	0.00	96.69	0.05	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	93.83	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.4161305873
98.10	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	93.88	0.05	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2012510695
98.10	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	93.93	0.05	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2777940080
98.11	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	93.98	0.05	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1241163992
98.12	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	94.03	0.05	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.83402075
98.12	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	94.08	0.05	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.288689664
98.13	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	94.13	0.05	/workspace/coverage/default/45.sysrst_ctrl_stress_all.1880153715
98.14	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	94.18	0.05	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.585167239
98.15	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	94.23	0.05	/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.75485515
98.15	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	94.28	0.05	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.4085631542
98.16	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	94.33	0.05	/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1289339563
98.17	0.01	99.42	0.00	96.69	0.00	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	94.38	0.05	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3258052620
98.17	0.01	99.42	0.00	96.71	0.03	100.00	0.00	98.08	0.00	98.89	0.00	99.71	0.00	94.38	0.00	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1271923243

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.1361422770
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.4187982981
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1373611857
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3716657743
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.2611370817
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.849026643
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1810372771
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3431280909
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2015960049
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3105496630
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1877365736
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1556820346
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.363883001
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2070950388
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1691462348
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2415956370
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2243167396
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2215968787
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3334176255
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1092727985
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3428672671
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.4012112283
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3210496864
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1232590567
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.2561488160
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.7068711
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2435285299
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2807273300
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3186421724
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.1163294277
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1874710677
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.4000441423
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2499596153
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3910434068
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.929524996
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3699476984
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.714724309
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.3681770150
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.1981193454
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1671583446
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3720488197
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3667711355
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.4195387657
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.2704934780
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1028151035
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3276447817
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1229462770
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2794292667
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3425977858
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3575381589
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2447431269
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3021952091
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3292172532
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1379269236
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2700992294
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/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3469136804
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1176858180
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.3089997565
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1734906818
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.1480597639
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.4236669212
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3456828527
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3960418317
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1685365336
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.1480174430
/workspace/coverage/default/4.sysrst_ctrl_smoke.3132644061
/workspace/coverage/default/4.sysrst_ctrl_stress_all.326384614
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3058981575
/workspace/coverage/default/40.sysrst_ctrl_alert_test.1020012290
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3368583314
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.1425359942
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1894690268
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2614605974
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1181413633
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1238436328
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.571119537
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.67801272
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3723677045
/workspace/coverage/default/40.sysrst_ctrl_smoke.2076758349
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2549800791
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1054444470
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3489038421
/workspace/coverage/default/41.sysrst_ctrl_alert_test.3489632006
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3805200068
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3936161540
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.454236742
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1879898863
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2317002479
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3028440314
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.568552760
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2538940199
/workspace/coverage/default/41.sysrst_ctrl_smoke.3209740324
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3626626701
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2790320501
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.722651473
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2245162630
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1363053322
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1574524541
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1691331445
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1768142690
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1246572959
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.845065729
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2582290750
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.4069795968
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3455821584
/workspace/coverage/default/42.sysrst_ctrl_smoke.3363167799
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1076394078
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2368815986
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.4205493317
/workspace/coverage/default/43.sysrst_ctrl_alert_test.4225969469
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1096289951
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2962927420
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1642456237
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1577116687
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.263698609
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.566944546
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.601971886
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3968315090
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.819699316
/workspace/coverage/default/43.sysrst_ctrl_smoke.2241930344
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3727544305
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2231828152
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3689848898
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2141118915
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3674165994
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.977649757
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.4109786615
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.229067700
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1660554813
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1161023969
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.751891060
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3339871675
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2564330527
/workspace/coverage/default/44.sysrst_ctrl_smoke.827272795
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1554518551
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3788147198
/workspace/coverage/default/45.sysrst_ctrl_alert_test.971382324
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.536969564
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1535302607
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1522572100
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2272284578
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.755054817
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1328350403
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1529430494
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.521379166
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1469281364
/workspace/coverage/default/45.sysrst_ctrl_smoke.2622529075
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1505703934
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1763214385
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1079731346
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2927059407
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1766823087
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2524947755
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.232395997
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3334342072
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.615429102
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3450367866
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1986662770
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2142225850
/workspace/coverage/default/46.sysrst_ctrl_smoke.1660620840
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3097696059
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.720853321
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1278897477
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.407151860
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1271901357
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3213231486
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.168543815
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1562306919
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2246714579
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2327231201
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1606807150
/workspace/coverage/default/47.sysrst_ctrl_smoke.3826919068
/workspace/coverage/default/47.sysrst_ctrl_stress_all.442761656
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2263218993
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2482476147
/workspace/coverage/default/48.sysrst_ctrl_alert_test.4255572479
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.40663202
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.763496820
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3483396799
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2636334129
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1391157865
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2760758859
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1047903545
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.110405322
/workspace/coverage/default/48.sysrst_ctrl_smoke.2108975294
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3355713469
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.757063709
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2454685353
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1337132918
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1670842420
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1325599751
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2434386905
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1461520868
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2660502701
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.540553168
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1594221506
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1239992900
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2390472714
/workspace/coverage/default/49.sysrst_ctrl_smoke.4257364941
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1253584685
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3265949725
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1232433599
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2576927888
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3725293941
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.4091261573
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3357415318
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2659745182
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.9350030
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2551760055
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1123330334
/workspace/coverage/default/5.sysrst_ctrl_smoke.86643182
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2515032814
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.157785833
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.416188791
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2094335211
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.674833759
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.4269708162
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.890616101
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2362182988
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3906037436
/workspace/coverage/default/6.sysrst_ctrl_alert_test.438967947
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1584322433
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3843298380
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.354107462
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2449711544
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1566921804
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2683703084
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2224723209
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2174156519
/workspace/coverage/default/6.sysrst_ctrl_smoke.742347805
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1098023054
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3185679045
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2186606775
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.557166501
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3051995356
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3066946182
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1756286323
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1061707790
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1597763799
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3460304719
/workspace/coverage/default/7.sysrst_ctrl_alert_test.4183882065
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.867202339
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2909465619
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4010719221
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3257136661
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.113266709
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3330105360
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3169907340
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1675233701
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.333233567
/workspace/coverage/default/7.sysrst_ctrl_smoke.3458851871
/workspace/coverage/default/7.sysrst_ctrl_stress_all.3633115106
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3741033935
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.182330828
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3412096641
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3408644436
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.500371788
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2800718750
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2022349017
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.554778017
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.529474311
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2648132681
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3936280395
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2232142573
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2896890892
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.4199226322
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1601403345
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1395966163
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3798391738
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2335186961
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2261019889
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3790577225
/workspace/coverage/default/8.sysrst_ctrl_smoke.1402573903
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3042901554
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1499401626
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.318831769
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.98768860
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3312388610
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2837391573
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3516970513
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.58764455
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3317862164
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2840765367
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3187297309
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3170474086
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.7903041
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3635870751
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2833119756
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.52645487
/workspace/coverage/default/9.sysrst_ctrl_smoke.204550059
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3447533178
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1055229
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4229718046
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2459184531
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.664845758
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2355667013
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.991500585
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1627266202
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1193414265
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.631197174

Total test records in report: 918

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T5	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3070543096	Aug 01 05:25:21 PM PDT 24	Aug 01 05:26:13 PM PDT 24	41908349176 ps
T6	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3825488924	Aug 01 05:25:28 PM PDT 24	Aug 01 05:25:45 PM PDT 24	25848820687 ps
T7	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1469281364	Aug 01 05:26:32 PM PDT 24	Aug 01 05:26:38 PM PDT 24	2512947039 ps
T1	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3470825297	Aug 01 05:26:38 PM PDT 24	Aug 01 05:27:24 PM PDT 24	69230523438 ps
T2	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.4280700903	Aug 01 05:25:23 PM PDT 24	Aug 01 05:26:35 PM PDT 24	27621509762 ps
T3	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4229718046	Aug 01 05:26:48 PM PDT 24	Aug 01 05:27:01 PM PDT 24	53629281304 ps
T14	/workspace/coverage/default/37.sysrst_ctrl_alert_test.324779431	Aug 01 05:26:01 PM PDT 24	Aug 01 05:26:06 PM PDT 24	2016665000 ps
T4	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2052532922	Aug 01 05:26:45 PM PDT 24	Aug 01 05:30:24 PM PDT 24	160901885003 ps
T8	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.631197174	Aug 01 05:26:45 PM PDT 24	Aug 01 05:29:04 PM PDT 24	56660302339 ps
T9	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.17507962	Aug 01 05:26:07 PM PDT 24	Aug 01 05:26:13 PM PDT 24	2865970546 ps
T15	/workspace/coverage/default/26.sysrst_ctrl_smoke.484038101	Aug 01 05:25:21 PM PDT 24	Aug 01 05:25:23 PM PDT 24	2140639463 ps
T16	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3725293941	Aug 01 05:24:28 PM PDT 24	Aug 01 05:27:18 PM PDT 24	69627881659 ps
T10	/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3673241942	Aug 01 05:25:57 PM PDT 24	Aug 01 05:26:05 PM PDT 24	7199706428 ps
T59	/workspace/coverage/default/32.sysrst_ctrl_smoke.2264652151	Aug 01 05:25:46 PM PDT 24	Aug 01 05:25:50 PM PDT 24	2118574707 ps
T24	/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.3601673367	Aug 01 05:24:04 PM PDT 24	Aug 01 05:24:11 PM PDT 24	2509101689 ps
T11	/workspace/coverage/default/0.sysrst_ctrl_edge_detect.2052353288	Aug 01 05:23:54 PM PDT 24	Aug 01 05:24:01 PM PDT 24	2730558652 ps
T12	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.651226056	Aug 01 05:24:39 PM PDT 24	Aug 01 05:25:50 PM PDT 24	105147259330 ps
T68	/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.566944546	Aug 01 05:26:24 PM PDT 24	Aug 01 05:26:29 PM PDT 24	2621616713 ps
T13	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.3268103846	Aug 01 05:24:36 PM PDT 24	Aug 01 05:24:46 PM PDT 24	3965422575 ps
T69	/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.2887135651	Aug 01 05:24:54 PM PDT 24	Aug 01 05:24:57 PM PDT 24	2629885355 ps
T79	/workspace/coverage/default/2.sysrst_ctrl_sec_cm.2742225653	Aug 01 05:24:07 PM PDT 24	Aug 01 05:24:21 PM PDT 24	42439219230 ps
T33	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.2551338365	Aug 01 05:25:34 PM PDT 24	Aug 01 05:26:47 PM PDT 24	118721068108 ps
T43	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3185679045	Aug 01 05:26:45 PM PDT 24	Aug 01 05:27:23 PM PDT 24	59537854492 ps
T86	/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3654330617	Aug 01 05:24:03 PM PDT 24	Aug 01 05:24:06 PM PDT 24	2248766847 ps
T89	/workspace/coverage/default/8.sysrst_ctrl_alert_test.3936280395	Aug 01 05:24:35 PM PDT 24	Aug 01 05:24:36 PM PDT 24	2107783447 ps
T70	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1064216096	Aug 01 05:25:37 PM PDT 24	Aug 01 05:25:39 PM PDT 24	2529396563 ps
T72	/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2840765367	Aug 01 05:24:41 PM PDT 24	Aug 01 05:27:28 PM PDT 24	65741284882 ps
T31	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1790640340	Aug 01 05:24:03 PM PDT 24	Aug 01 05:24:07 PM PDT 24	2513828651 ps
T42	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3334342072	Aug 01 05:26:33 PM PDT 24	Aug 01 05:26:36 PM PDT 24	3538507865 ps
T55	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1271923243	Aug 01 05:26:49 PM PDT 24	Aug 01 05:29:04 PM PDT 24	48612281062 ps
T30	/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3265949725	Aug 01 05:26:40 PM PDT 24	Aug 01 05:26:42 PM PDT 24	2610412549 ps
T56	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.290533854	Aug 01 05:24:49 PM PDT 24	Aug 01 05:24:52 PM PDT 24	3890467098 ps
T25	/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.407151860	Aug 01 05:26:37 PM PDT 24	Aug 01 05:26:39 PM PDT 24	4135152235 ps
T49	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.409456297	Aug 01 05:24:06 PM PDT 24	Aug 01 05:24:09 PM PDT 24	2297646380 ps
T36	/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2449711544	Aug 01 05:24:27 PM PDT 24	Aug 01 05:24:30 PM PDT 24	3344642389 ps
T50	/workspace/coverage/default/25.sysrst_ctrl_smoke.4134200275	Aug 01 05:25:21 PM PDT 24	Aug 01 05:25:23 PM PDT 24	2130518014 ps
T21	/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3456828527	Aug 01 05:24:05 PM PDT 24	Aug 01 05:24:09 PM PDT 24	2448777747 ps
T26	/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1238679743	Aug 01 05:25:04 PM PDT 24	Aug 01 05:25:07 PM PDT 24	2992412467 ps
T51	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.3463816247	Aug 01 05:23:53 PM PDT 24	Aug 01 05:24:47 PM PDT 24	22010015103 ps
T52	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3258052620	Aug 01 05:26:50 PM PDT 24	Aug 01 05:27:36 PM PDT 24	53218031169 ps
T53	/workspace/coverage/default/26.sysrst_ctrl_stress_all.3503386711	Aug 01 05:25:25 PM PDT 24	Aug 01 05:59:49 PM PDT 24	816554283730 ps
T32	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2355667013	Aug 01 05:26:51 PM PDT 24	Aug 01 05:29:48 PM PDT 24	144217121439 ps
T65	/workspace/coverage/default/49.sysrst_ctrl_smoke.4257364941	Aug 01 05:26:38 PM PDT 24	Aug 01 05:26:44 PM PDT 24	2111074945 ps
T66	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.73434273	Aug 01 05:24:47 PM PDT 24	Aug 01 05:25:55 PM PDT 24	124414832825 ps
T67	/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1239992900	Aug 01 05:26:38 PM PDT 24	Aug 01 05:26:45 PM PDT 24	2172967222 ps
T22	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.663815264	Aug 01 05:26:32 PM PDT 24	Aug 01 05:27:19 PM PDT 24	99259198220 ps
T99	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1271901357	Aug 01 05:26:37 PM PDT 24	Aug 01 05:32:02 PM PDT 24	130578407129 ps
T108	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.3697476480	Aug 01 05:23:54 PM PDT 24	Aug 01 05:25:03 PM PDT 24	27080856293 ps
T23	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2582290750	Aug 01 05:26:23 PM PDT 24	Aug 01 05:26:25 PM PDT 24	2479680414 ps
T57	/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1061694562	Aug 01 05:25:37 PM PDT 24	Aug 01 05:25:43 PM PDT 24	9106607451 ps
T71	/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2142225850	Aug 01 05:26:36 PM PDT 24	Aug 01 05:26:40 PM PDT 24	2520681773 ps
T126	/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.838937544	Aug 01 05:24:58 PM PDT 24	Aug 01 05:25:05 PM PDT 24	2585885915 ps
T40	/workspace/coverage/default/32.sysrst_ctrl_stress_all.937413438	Aug 01 05:25:46 PM PDT 24	Aug 01 05:25:58 PM PDT 24	18916123439 ps
T127	/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.1325823702	Aug 01 05:24:35 PM PDT 24	Aug 01 05:24:43 PM PDT 24	2513534200 ps
T128	/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3750440721	Aug 01 05:25:56 PM PDT 24	Aug 01 05:26:02 PM PDT 24	2173202564 ps
T129	/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1735410519	Aug 01 05:24:35 PM PDT 24	Aug 01 05:24:41 PM PDT 24	2122208656 ps
T38	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3170474086	Aug 01 05:24:34 PM PDT 24	Aug 01 05:32:29 PM PDT 24	806959776248 ps
T179	/workspace/coverage/default/13.sysrst_ctrl_smoke.2620836407	Aug 01 05:24:40 PM PDT 24	Aug 01 05:24:46 PM PDT 24	2109183123 ps
T90	/workspace/coverage/default/38.sysrst_ctrl_alert_test.313131153	Aug 01 05:26:07 PM PDT 24	Aug 01 05:26:08 PM PDT 24	2080432841 ps
T180	/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1195632967	Aug 01 05:25:53 PM PDT 24	Aug 01 05:26:01 PM PDT 24	2609581000 ps
T44	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2957142549	Aug 01 05:25:22 PM PDT 24	Aug 01 05:25:32 PM PDT 24	3606129144 ps
T37	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.263698609	Aug 01 05:26:21 PM PDT 24	Aug 01 05:26:25 PM PDT 24	4998262300 ps
T196	/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1461520868	Aug 01 05:26:39 PM PDT 24	Aug 01 05:26:43 PM PDT 24	3223990900 ps
T197	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1899335896	Aug 01 05:24:42 PM PDT 24	Aug 01 05:24:44 PM PDT 24	2527141668 ps
T20	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2822053221	Aug 01 05:25:07 PM PDT 24	Aug 01 05:25:31 PM PDT 24	22926531097 ps
T198	/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.4247902882	Aug 01 05:25:03 PM PDT 24	Aug 01 05:25:05 PM PDT 24	2537124326 ps
T41	/workspace/coverage/default/41.sysrst_ctrl_stress_all.3626626701	Aug 01 05:26:27 PM PDT 24	Aug 01 05:26:58 PM PDT 24	15398818450 ps
T245	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.890616101	Aug 01 05:26:37 PM PDT 24	Aug 01 05:31:04 PM PDT 24	103509431018 ps
T246	/workspace/coverage/default/34.sysrst_ctrl_smoke.3032712935	Aug 01 05:25:48 PM PDT 24	Aug 01 05:25:50 PM PDT 24	2133261075 ps
T247	/workspace/coverage/default/42.sysrst_ctrl_alert_test.2245162630	Aug 01 05:26:22 PM PDT 24	Aug 01 05:26:24 PM PDT 24	2038120348 ps
T45	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.644409860	Aug 01 05:24:38 PM PDT 24	Aug 01 05:25:52 PM PDT 24	351428863636 ps
T58	/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3504748845	Aug 01 05:24:47 PM PDT 24	Aug 01 05:24:54 PM PDT 24	2627435057 ps
T46	/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.612362502	Aug 01 05:24:36 PM PDT 24	Aug 01 05:24:45 PM PDT 24	3284142403 ps
T169	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.1616999179	Aug 01 05:26:25 PM PDT 24	Aug 01 05:28:14 PM PDT 24	170298394963 ps
T100	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2360280105	Aug 01 05:26:05 PM PDT 24	Aug 01 05:26:47 PM PDT 24	59703960318 ps
T170	/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2322302321	Aug 01 05:24:36 PM PDT 24	Aug 01 05:24:40 PM PDT 24	2614982660 ps
T47	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.3938067589	Aug 01 05:26:04 PM PDT 24	Aug 01 05:27:32 PM PDT 24	39635820877 ps
T101	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.1495342989	Aug 01 05:25:09 PM PDT 24	Aug 01 05:25:16 PM PDT 24	23080410265 ps
T171	/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.187294257	Aug 01 05:25:33 PM PDT 24	Aug 01 05:25:35 PM PDT 24	2641594259 ps
T172	/workspace/coverage/default/1.sysrst_ctrl_stress_all.1839912147	Aug 01 05:23:54 PM PDT 24	Aug 01 05:26:28 PM PDT 24	125928407346 ps
T304	/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1986662770	Aug 01 05:26:34 PM PDT 24	Aug 01 05:26:36 PM PDT 24	2232784650 ps
T39	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.2729629233	Aug 01 05:25:40 PM PDT 24	Aug 01 05:25:44 PM PDT 24	2770349727 ps
T48	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1547582507	Aug 01 05:25:09 PM PDT 24	Aug 01 05:25:18 PM PDT 24	3287895081 ps
T305	/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.4036492406	Aug 01 05:24:54 PM PDT 24	Aug 01 05:24:56 PM PDT 24	2071562236 ps
T139	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.3406333622	Aug 01 05:24:50 PM PDT 24	Aug 01 05:24:55 PM PDT 24	3682799726 ps
T391	/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.58764455	Aug 01 05:24:39 PM PDT 24	Aug 01 05:27:59 PM PDT 24	321923690758 ps
T60	/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3284466660	Aug 01 05:25:20 PM PDT 24	Aug 01 05:25:24 PM PDT 24	2462870088 ps
T392	/workspace/coverage/default/15.sysrst_ctrl_alert_test.152542052	Aug 01 05:24:47 PM PDT 24	Aug 01 05:24:50 PM PDT 24	2040416034 ps
T275	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2349494967	Aug 01 05:25:45 PM PDT 24	Aug 01 05:26:09 PM PDT 24	34809753220 ps
T61	/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.9350030	Aug 01 05:24:26 PM PDT 24	Aug 01 05:24:29 PM PDT 24	2487117296 ps
T393	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1612776735	Aug 01 05:24:38 PM PDT 24	Aug 01 05:24:45 PM PDT 24	2509343358 ps
T62	/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.3926121066	Aug 01 05:25:10 PM PDT 24	Aug 01 05:25:12 PM PDT 24	2476766949 ps
T394	/workspace/coverage/default/11.sysrst_ctrl_alert_test.41470178	Aug 01 05:24:39 PM PDT 24	Aug 01 05:24:45 PM PDT 24	2012847549 ps
T395	/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2358449965	Aug 01 05:25:42 PM PDT 24	Aug 01 05:25:49 PM PDT 24	5416430468 ps
T280	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1046083933	Aug 01 05:26:45 PM PDT 24	Aug 01 05:27:17 PM PDT 24	49529261798 ps
T396	/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3064775781	Aug 01 05:25:43 PM PDT 24	Aug 01 05:25:45 PM PDT 24	2527312413 ps
T63	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3450367866	Aug 01 05:26:34 PM PDT 24	Aug 01 05:26:38 PM PDT 24	2467449525 ps
T282	/workspace/coverage/default/4.sysrst_ctrl_combo_detect.3970463634	Aug 01 05:24:07 PM PDT 24	Aug 01 05:24:28 PM PDT 24	30802928748 ps
T283	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2909465619	Aug 01 05:24:26 PM PDT 24	Aug 01 05:28:13 PM PDT 24	189225037148 ps
T289	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.1525215805	Aug 01 05:24:36 PM PDT 24	Aug 01 05:29:41 PM PDT 24	250594576870 ps
T290	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.2776510076	Aug 01 05:24:11 PM PDT 24	Aug 01 05:24:18 PM PDT 24	2435019199 ps
T291	/workspace/coverage/default/34.sysrst_ctrl_alert_test.913836611	Aug 01 05:25:45 PM PDT 24	Aug 01 05:25:47 PM PDT 24	2038019027 ps
T64	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.154241485	Aug 01 05:24:50 PM PDT 24	Aug 01 05:24:58 PM PDT 24	2458400247 ps
T292	/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.67801272	Aug 01 05:26:08 PM PDT 24	Aug 01 05:26:12 PM PDT 24	2188551073 ps
T109	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.3089997565	Aug 01 05:24:03 PM PDT 24	Aug 01 05:25:06 PM PDT 24	26584952226 ps
T293	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2174156519	Aug 01 05:24:30 PM PDT 24	Aug 01 05:24:37 PM PDT 24	2509640696 ps
T294	/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.1883386472	Aug 01 05:25:54 PM PDT 24	Aug 01 05:25:56 PM PDT 24	2275022273 ps
T73	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3058981575	Aug 01 05:24:03 PM PDT 24	Aug 01 05:24:07 PM PDT 24	7972768975 ps
T34	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.1103571148	Aug 01 05:25:55 PM PDT 24	Aug 01 05:26:03 PM PDT 24	3398921158 ps
T214	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.825808542	Aug 01 05:26:50 PM PDT 24	Aug 01 05:27:52 PM PDT 24	97370932200 ps
T215	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3741033935	Aug 01 05:24:29 PM PDT 24	Aug 01 05:26:39 PM PDT 24	221593070874 ps
T216	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2748014517	Aug 01 05:24:49 PM PDT 24	Aug 01 05:24:51 PM PDT 24	2477582992 ps
T217	/workspace/coverage/default/10.sysrst_ctrl_alert_test.2823924304	Aug 01 05:24:35 PM PDT 24	Aug 01 05:24:38 PM PDT 24	2029941233 ps
T140	/workspace/coverage/default/46.sysrst_ctrl_stress_all.3097696059	Aug 01 05:26:36 PM PDT 24	Aug 01 05:27:01 PM PDT 24	10517235416 ps
T218	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1935768008	Aug 01 05:24:07 PM PDT 24	Aug 01 05:27:14 PM PDT 24	275134436762 ps
T219	/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2588103648	Aug 01 05:25:57 PM PDT 24	Aug 01 05:26:06 PM PDT 24	3248551283 ps
T220	/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1163271306	Aug 01 05:25:57 PM PDT 24	Aug 01 05:26:04 PM PDT 24	2458589899 ps
T221	/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3045497078	Aug 01 05:24:04 PM PDT 24	Aug 01 05:24:10 PM PDT 24	2035636497 ps
T35	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.93048020	Aug 01 05:25:25 PM PDT 24	Aug 01 05:27:12 PM PDT 24	89874916973 ps
T323	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2028546718	Aug 01 05:24:46 PM PDT 24	Aug 01 05:24:52 PM PDT 24	3850278283 ps
T258	/workspace/coverage/default/44.sysrst_ctrl_stress_all.1554518551	Aug 01 05:26:33 PM PDT 24	Aug 01 05:29:22 PM PDT 24	129744702016 ps
T397	/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.375318701	Aug 01 05:25:22 PM PDT 24	Aug 01 05:25:26 PM PDT 24	2192473216 ps
T110	/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.542136447	Aug 01 05:25:27 PM PDT 24	Aug 01 05:25:45 PM PDT 24	26863758069 ps
T74	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.2501729850	Aug 01 05:25:57 PM PDT 24	Aug 01 05:26:00 PM PDT 24	5691688935 ps
T320	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.1592964693	Aug 01 05:25:22 PM PDT 24	Aug 01 05:25:29 PM PDT 24	2510668723 ps
T381	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.21722588	Aug 01 05:25:36 PM PDT 24	Aug 01 05:26:59 PM PDT 24	30577435818 ps
T398	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.999141688	Aug 01 05:24:58 PM PDT 24	Aug 01 05:25:01 PM PDT 24	3379009670 ps
T75	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.601429139	Aug 01 05:25:46 PM PDT 24	Aug 01 05:25:58 PM PDT 24	67789461454 ps
T147	/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1619417248	Aug 01 05:23:52 PM PDT 24	Aug 01 05:23:59 PM PDT 24	4524803132 ps
T148	/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.980208935	Aug 01 05:25:42 PM PDT 24	Aug 01 05:25:45 PM PDT 24	2479757482 ps
T149	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1601403345	Aug 01 05:24:31 PM PDT 24	Aug 01 05:24:32 PM PDT 24	3767842456 ps
T150	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.751891060	Aug 01 05:26:22 PM PDT 24	Aug 01 05:26:25 PM PDT 24	2483322712 ps
T151	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1238436328	Aug 01 05:26:07 PM PDT 24	Aug 01 05:26:14 PM PDT 24	2610190804 ps
T152	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3247813357	Aug 01 05:24:03 PM PDT 24	Aug 01 05:24:05 PM PDT 24	2434490124 ps
T153	/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.4069795968	Aug 01 05:26:20 PM PDT 24	Aug 01 05:26:26 PM PDT 24	2112442026 ps
T154	/workspace/coverage/default/43.sysrst_ctrl_alert_test.4225969469	Aug 01 05:26:22 PM PDT 24	Aug 01 05:26:25 PM PDT 24	2020587707 ps
T155	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.1399188296	Aug 01 05:25:47 PM PDT 24	Aug 01 05:25:48 PM PDT 24	2688501375 ps
T137	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.3230620708	Aug 01 05:25:30 PM PDT 24	Aug 01 05:25:33 PM PDT 24	8515047145 ps
T389	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.1580143575	Aug 01 05:25:41 PM PDT 24	Aug 01 05:26:02 PM PDT 24	528906767010 ps
T399	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2327231201	Aug 01 05:26:38 PM PDT 24	Aug 01 05:26:41 PM PDT 24	2158667852 ps
T347	/workspace/coverage/default/26.sysrst_ctrl_combo_detect.1148544411	Aug 01 05:25:26 PM PDT 24	Aug 01 05:26:15 PM PDT 24	36632798678 ps
T400	/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2927059407	Aug 01 05:26:34 PM PDT 24	Aug 01 05:26:39 PM PDT 24	3312727053 ps
T308	/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2231828152	Aug 01 05:26:25 PM PDT 24	Aug 01 05:28:07 PM PDT 24	42512062319 ps
T401	/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3217905022	Aug 01 05:25:48 PM PDT 24	Aug 01 05:25:51 PM PDT 24	3666474996 ps
T402	/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3483396799	Aug 01 05:26:41 PM PDT 24	Aug 01 05:26:43 PM PDT 24	3375185125 ps
T403	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.441333755	Aug 01 05:25:43 PM PDT 24	Aug 01 05:25:52 PM PDT 24	3328462645 ps
T404	/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.3981621569	Aug 01 05:25:34 PM PDT 24	Aug 01 05:25:43 PM PDT 24	3303676911 ps
T295	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.98768860	Aug 01 05:26:43 PM PDT 24	Aug 01 05:27:38 PM PDT 24	87973021437 ps
T183	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.4195882576	Aug 01 05:24:49 PM PDT 24	Aug 01 05:27:14 PM PDT 24	62859254239 ps
T296	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1098023054	Aug 01 05:26:48 PM PDT 24	Aug 01 05:29:12 PM PDT 24	110180555954 ps
T284	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.2191462927	Aug 01 05:24:52 PM PDT 24	Aug 01 05:26:30 PM PDT 24	41886102701 ps
T405	/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.594087850	Aug 01 05:23:55 PM PDT 24	Aug 01 05:23:59 PM PDT 24	4847141786 ps
T357	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.4210818425	Aug 01 05:24:39 PM PDT 24	Aug 01 05:25:02 PM PDT 24	33710302474 ps
T406	/workspace/coverage/default/6.sysrst_ctrl_smoke.742347805	Aug 01 05:24:29 PM PDT 24	Aug 01 05:24:35 PM PDT 24	2112892912 ps
T407	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.333233567	Aug 01 05:24:32 PM PDT 24	Aug 01 05:24:39 PM PDT 24	2513376760 ps
T408	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2564330527	Aug 01 05:26:22 PM PDT 24	Aug 01 05:26:29 PM PDT 24	2509924853 ps
T111	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.1425359942	Aug 01 05:26:04 PM PDT 24	Aug 01 05:26:43 PM PDT 24	32116461035 ps
T309	/workspace/coverage/default/7.sysrst_ctrl_stress_all.3633115106	Aug 01 05:24:31 PM PDT 24	Aug 01 05:24:53 PM PDT 24	16619015767 ps
T232	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2636334129	Aug 01 05:26:40 PM PDT 24	Aug 01 05:26:48 PM PDT 24	3975346594 ps
T409	/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2808373800	Aug 01 05:26:07 PM PDT 24	Aug 01 05:26:10 PM PDT 24	3209320186 ps
T410	/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3960418317	Aug 01 05:24:13 PM PDT 24	Aug 01 05:24:14 PM PDT 24	2111770432 ps
T321	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1191922143	Aug 01 05:25:27 PM PDT 24	Aug 01 05:25:34 PM PDT 24	2510799542 ps
T411	/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.218987287	Aug 01 05:25:38 PM PDT 24	Aug 01 05:25:46 PM PDT 24	2612886503 ps
T412	/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.200390517	Aug 01 05:25:31 PM PDT 24	Aug 01 05:25:33 PM PDT 24	2526033695 ps
T322	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.848709742	Aug 01 05:24:47 PM PDT 24	Aug 01 05:24:50 PM PDT 24	2522085466 ps
T138	/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.3837851856	Aug 01 05:25:25 PM PDT 24	Aug 01 05:25:29 PM PDT 24	3734212365 ps
T299	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.2556101901	Aug 01 05:25:43 PM PDT 24	Aug 01 05:27:29 PM PDT 24	40180472191 ps
T174	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1395966163	Aug 01 05:24:30 PM PDT 24	Aug 01 05:24:34 PM PDT 24	5296560234 ps
T300	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.1751052425	Aug 01 05:25:32 PM PDT 24	Aug 01 05:27:55 PM PDT 24	52479488203 ps
T413	/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.722651473	Aug 01 05:26:23 PM PDT 24	Aug 01 05:26:24 PM PDT 24	5952927026 ps
T104	/workspace/coverage/default/24.sysrst_ctrl_stress_all.2378989752	Aug 01 05:25:22 PM PDT 24	Aug 01 05:25:30 PM PDT 24	8180101627 ps
T414	/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.37700285	Aug 01 05:23:54 PM PDT 24	Aug 01 05:23:59 PM PDT 24	2031630081 ps
T307	/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3063976589	Aug 01 05:26:37 PM PDT 24	Aug 01 05:29:34 PM PDT 24	66065775346 ps
T415	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.202288785	Aug 01 05:25:43 PM PDT 24	Aug 01 05:25:45 PM PDT 24	2066890486 ps
T416	/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.3256184743	Aug 01 05:24:59 PM PDT 24	Aug 01 05:25:06 PM PDT 24	2756063931 ps
T417	/workspace/coverage/default/16.sysrst_ctrl_smoke.1163898338	Aug 01 05:24:53 PM PDT 24	Aug 01 05:24:55 PM PDT 24	2130644746 ps
T418	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.220529320	Aug 01 05:24:58 PM PDT 24	Aug 01 05:25:00 PM PDT 24	2561759968 ps
T419	/workspace/coverage/default/15.sysrst_ctrl_smoke.2587295220	Aug 01 05:24:47 PM PDT 24	Aug 01 05:24:53 PM PDT 24	2113746346 ps
T105	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.921506774	Aug 01 05:25:58 PM PDT 24	Aug 01 05:26:53 PM PDT 24	40690624101 ps
T420	/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2843876786	Aug 01 05:24:59 PM PDT 24	Aug 01 05:25:04 PM PDT 24	5957474023 ps
T373	/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.75485515	Aug 01 05:26:43 PM PDT 24	Aug 01 05:28:02 PM PDT 24	61040204601 ps
T112	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.557166501	Aug 01 05:26:43 PM PDT 24	Aug 01 05:27:01 PM PDT 24	26592293410 ps
T156	/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.3553927209	Aug 01 05:25:21 PM PDT 24	Aug 01 05:26:04 PM PDT 24	616868744617 ps
T421	/workspace/coverage/default/46.sysrst_ctrl_smoke.1660620840	Aug 01 05:26:32 PM PDT 24	Aug 01 05:26:37 PM PDT 24	2109386828 ps
T422	/workspace/coverage/default/18.sysrst_ctrl_smoke.1834587526	Aug 01 05:24:46 PM PDT 24	Aug 01 05:24:52 PM PDT 24	2111152761 ps
T113	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.375541028	Aug 01 05:25:00 PM PDT 24	Aug 01 05:26:42 PM PDT 24	159348645750 ps
T103	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.6554857	Aug 01 05:24:48 PM PDT 24	Aug 01 05:24:51 PM PDT 24	3045949306 ps
T186	/workspace/coverage/default/6.sysrst_ctrl_alert_test.438967947	Aug 01 05:24:29 PM PDT 24	Aug 01 05:24:32 PM PDT 24	2015483704 ps
T187	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.873293042	Aug 01 05:23:53 PM PDT 24	Aug 01 05:25:25 PM PDT 24	129796820290 ps
T188	/workspace/coverage/default/23.sysrst_ctrl_smoke.1608431986	Aug 01 05:25:09 PM PDT 24	Aug 01 05:25:12 PM PDT 24	2118543515 ps
T189	/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3950844894	Aug 01 05:25:34 PM PDT 24	Aug 01 05:26:00 PM PDT 24	40105987890 ps
T190	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3520942548	Aug 01 05:24:48 PM PDT 24	Aug 01 05:24:51 PM PDT 24	2525446464 ps
T191	/workspace/coverage/default/33.sysrst_ctrl_smoke.49447052	Aug 01 05:25:57 PM PDT 24	Aug 01 05:25:59 PM PDT 24	2130326842 ps
T192	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2786023902	Aug 01 05:24:36 PM PDT 24	Aug 01 05:24:42 PM PDT 24	2061497613 ps
T193	/workspace/coverage/default/48.sysrst_ctrl_stress_all.3355713469	Aug 01 05:26:38 PM PDT 24	Aug 01 05:26:50 PM PDT 24	16425554557 ps
T194	/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.673542578	Aug 01 05:24:58 PM PDT 24	Aug 01 05:25:05 PM PDT 24	2609706992 ps
T212	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.2664995599	Aug 01 05:24:37 PM PDT 24	Aug 01 05:24:46 PM PDT 24	3839222118 ps
T423	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.3521210456	Aug 01 05:25:46 PM PDT 24	Aug 01 05:25:48 PM PDT 24	6562252937 ps
T424	/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3497392574	Aug 01 05:26:10 PM PDT 24	Aug 01 05:26:16 PM PDT 24	3249545249 ps
T229	/workspace/coverage/default/38.sysrst_ctrl_edge_detect.1466694121	Aug 01 05:26:05 PM PDT 24	Aug 01 05:42:47 PM PDT 24	802844943548 ps
T425	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1321319542	Aug 01 05:25:10 PM PDT 24	Aug 01 05:25:33 PM PDT 24	32685156046 ps
T426	/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3688977307	Aug 01 05:25:11 PM PDT 24	Aug 01 05:25:13 PM PDT 24	2530708871 ps
T427	/workspace/coverage/default/45.sysrst_ctrl_smoke.2622529075	Aug 01 05:26:32 PM PDT 24	Aug 01 05:26:34 PM PDT 24	2131872457 ps
T310	/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1584322433	Aug 01 05:24:21 PM PDT 24	Aug 01 05:24:24 PM PDT 24	3396985573 ps
T428	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.3686586508	Aug 01 05:24:48 PM PDT 24	Aug 01 05:24:56 PM PDT 24	3118991662 ps
T429	/workspace/coverage/default/39.sysrst_ctrl_stress_all.3685826835	Aug 01 05:26:09 PM PDT 24	Aug 01 05:26:39 PM PDT 24	11749124913 ps
T285	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.1855670666	Aug 01 05:24:49 PM PDT 24	Aug 01 05:26:20 PM PDT 24	142523514735 ps
T318	/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.2219748217	Aug 01 05:24:39 PM PDT 24	Aug 01 05:24:46 PM PDT 24	2460661277 ps
T430	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2529693059	Aug 01 05:23:43 PM PDT 24	Aug 01 05:23:47 PM PDT 24	2475219232 ps
T431	/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.3332271102	Aug 01 05:25:35 PM PDT 24	Aug 01 05:25:39 PM PDT 24	2515478703 ps
T432	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.1607931112	Aug 01 05:24:53 PM PDT 24	Aug 01 05:25:01 PM PDT 24	2512242057 ps
T175	/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.971518726	Aug 01 05:25:06 PM PDT 24	Aug 01 05:26:10 PM PDT 24	24701750368 ps
T267	/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3241438256	Aug 01 05:24:39 PM PDT 24	Aug 01 05:24:42 PM PDT 24	3588842879 ps
T268	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.412267289	Aug 01 05:25:34 PM PDT 24	Aug 01 05:26:56 PM PDT 24	124109044289 ps
T269	/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2454685353	Aug 01 05:26:40 PM PDT 24	Aug 01 05:27:07 PM PDT 24	706134423699 ps
T270	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1340960249	Aug 01 05:23:43 PM PDT 24	Aug 01 05:23:45 PM PDT 24	2540449682 ps
T271	/workspace/coverage/default/28.sysrst_ctrl_smoke.836885916	Aug 01 05:25:33 PM PDT 24	Aug 01 05:25:39 PM PDT 24	2111977070 ps
T272	/workspace/coverage/default/27.sysrst_ctrl_stress_all.545970798	Aug 01 05:25:34 PM PDT 24	Aug 01 05:31:04 PM PDT 24	132735054130 ps
T273	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2261019889	Aug 01 05:24:27 PM PDT 24	Aug 01 05:24:29 PM PDT 24	2274236299 ps
T274	/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2576927888	Aug 01 05:24:18 PM PDT 24	Aug 01 05:24:27 PM PDT 24	3225832045 ps
T195	/workspace/coverage/default/0.sysrst_ctrl_stress_all.1900012411	Aug 01 05:23:56 PM PDT 24	Aug 01 05:24:28 PM PDT 24	12396913458 ps
T319	/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2945455064	Aug 01 05:25:32 PM PDT 24	Aug 01 05:25:39 PM PDT 24	2462751607 ps
T433	/workspace/coverage/default/2.sysrst_ctrl_alert_test.1237860765	Aug 01 05:24:03 PM PDT 24	Aug 01 05:24:08 PM PDT 24	2014123875 ps
T114	/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.529474311	Aug 01 05:26:49 PM PDT 24	Aug 01 05:27:21 PM PDT 24	47343553097 ps
T434	/workspace/coverage/default/41.sysrst_ctrl_alert_test.3489632006	Aug 01 05:26:22 PM PDT 24	Aug 01 05:26:25 PM PDT 24	2015852377 ps
T435	/workspace/coverage/default/22.sysrst_ctrl_alert_test.3916634219	Aug 01 05:25:10 PM PDT 24	Aug 01 05:25:16 PM PDT 24	2011731192 ps
T106	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2297021569	Aug 01 05:24:50 PM PDT 24	Aug 01 05:27:35 PM PDT 24	891832286383 ps
T328	/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.2537386592	Aug 01 05:25:34 PM PDT 24	Aug 01 05:25:41 PM PDT 24	3850553478 ps
T329	/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.831944995	Aug 01 05:25:45 PM PDT 24	Aug 01 05:25:52 PM PDT 24	2459909078 ps
T311	/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1541324230	Aug 01 05:24:40 PM PDT 24	Aug 01 05:27:03 PM PDT 24	54129629090 ps
T330	/workspace/coverage/default/35.sysrst_ctrl_alert_test.3756156275	Aug 01 05:25:53 PM PDT 24	Aug 01 05:25:57 PM PDT 24	2021860495 ps
T331	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1246820540	Aug 01 05:25:55 PM PDT 24	Aug 01 05:26:54 PM PDT 24	46308982307 ps
T157	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.4126819884	Aug 01 05:25:21 PM PDT 24	Aug 01 05:25:28 PM PDT 24	5849577768 ps
T332	/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3495299723	Aug 01 05:25:09 PM PDT 24	Aug 01 05:25:15 PM PDT 24	2045431572 ps
T286	/workspace/coverage/default/33.sysrst_ctrl_combo_detect.3517225401	Aug 01 05:25:45 PM PDT 24	Aug 01 05:27:07 PM PDT 24	90149586020 ps
T333	/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2659745182	Aug 01 05:24:27 PM PDT 24	Aug 01 05:24:29 PM PDT 24	2630192912 ps
T436	/workspace/coverage/default/26.sysrst_ctrl_alert_test.782004129	Aug 01 05:25:22 PM PDT 24	Aug 01 05:25:28 PM PDT 24	2014809190 ps
T437	/workspace/coverage/default/3.sysrst_ctrl_smoke.1138339227	Aug 01 05:24:13 PM PDT 24	Aug 01 05:24:19 PM PDT 24	2110234517 ps
T438	/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1566921804	Aug 01 05:24:26 PM PDT 24	Aug 01 05:24:33 PM PDT 24	2613539699 ps
T439	/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3877964947	Aug 01 05:24:52 PM PDT 24	Aug 01 05:24:56 PM PDT 24	2144665013 ps
T115	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2524947755	Aug 01 05:26:34 PM PDT 24	Aug 01 05:26:48 PM PDT 24	28118829240 ps
T440	/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1606807150	Aug 01 05:26:34 PM PDT 24	Aug 01 05:26:41 PM PDT 24	2511941911 ps
T281	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.916261733	Aug 01 05:24:47 PM PDT 24	Aug 01 05:25:34 PM PDT 24	73055997880 ps
T366	/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3460304719	Aug 01 05:26:43 PM PDT 24	Aug 01 05:31:14 PM PDT 24	113209471498 ps
T348	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2186606775	Aug 01 05:26:44 PM PDT 24	Aug 01 05:28:26 PM PDT 24	155155094891 ps
T374	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3168258713	Aug 01 05:24:36 PM PDT 24	Aug 01 05:25:55 PM PDT 24	122700449426 ps
T441	/workspace/coverage/default/24.sysrst_ctrl_alert_test.4025771784	Aug 01 05:25:19 PM PDT 24	Aug 01 05:25:22 PM PDT 24	2021022836 ps
T301	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.3103490719	Aug 01 05:24:39 PM PDT 24	Aug 01 05:26:09 PM PDT 24	139465027214 ps
T442	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3205727503	Aug 01 05:25:07 PM PDT 24	Aug 01 05:25:11 PM PDT 24	2519949798 ps
T182	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.1267951729	Aug 01 05:25:27 PM PDT 24	Aug 01 05:35:53 PM PDT 24	1691121426488 ps