Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.53 98.84 96.81 100.00 97.44 98.34 99.61 91.68


Total tests in report: 911
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
57.08 57.08 77.55 77.55 62.79 62.79 64.84 64.84 30.77 30.77 79.52 79.52 69.27 69.27 14.84 14.84 /workspace/coverage/default/15.sysrst_ctrl_stress_all.2004188332
74.85 17.76 87.98 10.43 79.45 16.66 87.90 23.06 48.72 17.95 88.98 9.46 80.44 11.18 50.45 35.62 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.3352246410
82.37 7.52 95.11 7.13 88.98 9.53 89.73 1.83 61.54 12.82 94.82 5.84 89.79 9.34 56.63 6.17 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1096609571
85.32 2.95 96.49 1.38 91.63 2.65 89.73 0.00 75.00 13.46 96.23 1.40 91.52 1.73 56.63 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.1545528134
87.18 1.86 97.00 0.50 92.11 0.48 89.95 0.23 78.21 3.21 96.67 0.44 92.39 0.87 63.93 7.30 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.2168919500
88.88 1.70 97.14 0.15 92.62 0.51 97.03 7.08 78.21 0.00 96.71 0.04 94.12 1.73 66.31 2.38 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.1614146851
90.23 1.35 97.22 0.07 93.86 1.24 97.72 0.68 78.21 0.00 96.82 0.11 94.22 0.10 73.56 7.25 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.3433085889
91.38 1.15 97.35 0.13 93.96 0.10 97.72 0.00 80.13 1.92 96.97 0.15 94.51 0.29 79.05 5.49 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1854296197
91.99 0.61 97.59 0.24 94.26 0.30 97.72 0.00 82.69 2.56 97.23 0.26 95.38 0.87 79.05 0.00 /workspace/coverage/default/30.sysrst_ctrl_stress_all.3761392521
92.50 0.52 97.87 0.28 94.36 0.10 97.95 0.23 85.26 2.56 97.38 0.15 95.66 0.29 79.05 0.00 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.205593467
92.87 0.37 97.91 0.04 94.51 0.15 97.95 0.00 85.90 0.64 97.41 0.04 95.95 0.29 80.46 1.42 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2604862735
93.22 0.35 97.98 0.07 94.54 0.03 97.95 0.00 87.82 1.92 97.52 0.11 96.24 0.29 80.46 0.00 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.571557526
93.51 0.30 97.98 0.00 94.57 0.03 97.95 0.00 87.82 0.00 97.52 0.00 97.78 1.54 80.97 0.51 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2565955499
93.76 0.24 98.04 0.06 94.64 0.08 99.32 1.37 87.82 0.00 97.56 0.04 97.78 0.00 81.14 0.17 /workspace/coverage/default/1.sysrst_ctrl_alert_test.3571646679
93.99 0.23 98.10 0.06 94.72 0.08 99.32 0.00 87.82 0.00 97.60 0.04 97.78 0.00 82.62 1.47 /workspace/coverage/default/31.sysrst_ctrl_stress_all.466505351
94.21 0.22 98.13 0.04 94.77 0.05 99.32 0.00 89.10 1.28 97.67 0.07 97.88 0.10 82.62 0.00 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.1723528286
94.43 0.22 98.19 0.06 94.79 0.03 99.32 0.00 90.38 1.28 97.74 0.07 97.98 0.10 82.62 0.00 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2367906391
94.65 0.22 98.25 0.06 94.82 0.03 99.32 0.00 91.67 1.28 97.82 0.07 98.07 0.10 82.62 0.00 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.1148258716
94.87 0.22 98.25 0.00 94.82 0.00 99.32 0.00 91.67 0.00 97.82 0.00 98.07 0.00 84.14 1.53 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2060408369
95.08 0.21 98.28 0.04 94.82 0.00 99.32 0.00 92.95 1.28 97.89 0.07 98.07 0.00 84.20 0.06 /workspace/coverage/default/42.sysrst_ctrl_stress_all.1788725090
95.26 0.18 98.30 0.02 94.87 0.05 99.32 0.00 92.95 0.00 97.89 0.00 98.07 0.00 85.39 1.19 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.631540931
95.42 0.16 98.34 0.04 95.07 0.20 99.32 0.00 92.95 0.00 97.97 0.07 98.65 0.58 85.62 0.23 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.2338115463
95.57 0.16 98.40 0.06 95.12 0.05 99.32 0.00 93.59 0.64 98.04 0.07 98.75 0.10 85.79 0.17 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.675309608
95.72 0.15 98.62 0.22 95.55 0.43 99.54 0.23 93.59 0.00 98.11 0.07 98.84 0.10 85.79 0.00 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3321062402
95.87 0.15 98.62 0.00 96.41 0.86 99.54 0.00 93.59 0.00 98.11 0.00 98.84 0.00 85.96 0.17 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.2288604861
96.01 0.14 98.62 0.00 96.44 0.03 99.54 0.00 93.59 0.00 98.11 0.00 98.94 0.10 86.81 0.85 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.377501568
96.13 0.13 98.66 0.04 96.46 0.03 99.54 0.00 94.23 0.64 98.15 0.04 99.04 0.10 86.86 0.06 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.4001922174
96.25 0.12 98.69 0.04 96.49 0.03 99.54 0.00 94.87 0.64 98.19 0.04 99.13 0.10 86.86 0.00 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.3490479926
96.37 0.12 98.73 0.04 96.51 0.03 99.54 0.00 95.51 0.64 98.23 0.04 99.23 0.10 86.86 0.00 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.229158288
96.49 0.11 98.73 0.00 96.51 0.00 99.54 0.00 95.51 0.00 98.23 0.00 99.23 0.00 87.66 0.79 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2501886852
96.59 0.11 98.75 0.02 96.51 0.00 99.54 0.00 96.15 0.64 98.26 0.04 99.23 0.00 87.71 0.06 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3679687188
96.70 0.11 98.77 0.02 96.51 0.00 99.54 0.00 96.79 0.64 98.30 0.04 99.23 0.00 87.77 0.06 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.4114856569
96.80 0.10 98.79 0.02 96.51 0.00 99.54 0.00 97.44 0.64 98.34 0.04 99.23 0.00 87.77 0.00 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.2518294660
96.90 0.10 98.79 0.00 96.54 0.03 100.00 0.46 97.44 0.00 98.34 0.00 99.33 0.10 87.88 0.11 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.4038828807
96.99 0.09 98.82 0.04 96.54 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.33 0.00 88.45 0.57 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2387335171
97.04 0.06 98.82 0.00 96.54 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.33 0.00 88.84 0.40 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1161676656
97.09 0.05 98.82 0.00 96.54 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.42 0.10 89.07 0.23 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.1101402232
97.13 0.04 98.82 0.00 96.54 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.42 0.00 89.35 0.28 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.694576363
97.17 0.04 98.82 0.00 96.56 0.03 100.00 0.00 97.44 0.00 98.34 0.00 99.42 0.00 89.58 0.23 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2911463882
97.20 0.03 98.82 0.00 96.56 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.42 0.00 89.81 0.23 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.4033618070
97.23 0.03 98.82 0.00 96.56 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.42 0.00 90.03 0.23 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.551660962
97.25 0.02 98.82 0.00 96.56 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.42 0.00 90.20 0.17 /workspace/coverage/default/45.sysrst_ctrl_stress_all.4248648290
97.28 0.02 98.82 0.00 96.61 0.05 100.00 0.00 97.44 0.00 98.34 0.00 99.52 0.10 90.20 0.00 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.4061731652
97.29 0.02 98.84 0.02 96.61 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.52 0.00 90.32 0.11 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2945715373
97.31 0.02 98.84 0.00 96.64 0.03 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.10 90.32 0.00 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.787742148
97.33 0.02 98.84 0.00 96.64 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 90.43 0.11 /workspace/coverage/default/16.sysrst_ctrl_stress_all.4044188137
97.34 0.02 98.84 0.00 96.64 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 90.54 0.11 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3705327586
97.36 0.02 98.84 0.00 96.64 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 90.66 0.11 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1387327285
97.38 0.02 98.84 0.00 96.64 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 90.77 0.11 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.583944927
97.39 0.02 98.84 0.00 96.64 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 90.88 0.11 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1634983778
97.40 0.01 98.84 0.00 96.71 0.08 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 90.88 0.00 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1606627042
97.41 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 90.94 0.06 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.4149903231
97.42 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.00 0.06 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.4226531016
97.43 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.05 0.06 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3462284584
97.44 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.11 0.06 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.1940338835
97.44 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.17 0.06 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.2633721889
97.45 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.22 0.06 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3417983862
97.46 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.28 0.06 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.925406306
97.47 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.34 0.06 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.2329549150
97.48 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.39 0.06 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1747881610
97.48 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.45 0.06 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2401856676
97.49 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.51 0.06 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2982557486
97.50 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.56 0.06 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2674898145
97.51 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.62 0.06 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.731766324
97.52 0.01 98.84 0.00 96.71 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.68 0.06 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3923324313
97.52 0.01 98.84 0.00 96.74 0.03 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.68 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2162641580
97.52 0.01 98.84 0.00 96.76 0.03 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.68 0.00 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1969656795
97.53 0.01 98.84 0.00 96.79 0.03 100.00 0.00 97.44 0.00 98.34 0.00 99.61 0.00 91.68 0.00 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1923463065


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.866519757
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.258295404
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2798463858
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3274643219
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.533450569
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2282819103
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.1209706159
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.38207840
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3549238125
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2151933428
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1268593777
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3066671932
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2529157603
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2072604001
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3677037590
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2537478846
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.879674201
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2427627645
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.4177491934
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2236196069
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2172577992
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3771674414
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2401291095
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.758576702
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3749282357
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.3950375348
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2327979414
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3250646273
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1118728983
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.558047310
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1657493836
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.949666074
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3893316354
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3747993698
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3321121159
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1647314992
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.1901009962
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.208104060
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1078540541
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.144653732
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.2670241486
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2889626383
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.610804034
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.871921819
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.4282927756
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1732729637
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.267354683
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1372456826
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3600740111
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3411505877
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3691083401
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2520685885
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.682813431
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.1083699051
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.1634694432
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2858598601
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.4012832553
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.110642378
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2835980478
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.3321531345
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.82064501
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1744718310
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3851437091
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2707680559
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.1612053226
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3353088658
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.2060780269
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2040813178
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.296187329
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.1308037260
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.593101897
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.1745464768
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.1035525426
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.445311698
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2343371358
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.212518084
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.1626288582
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.3991962303
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.984656692
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.1193147910
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.1112413189
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/workspace/coverage/default/41.sysrst_ctrl_stress_all.1508339540
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.103309218
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1790665863
/workspace/coverage/default/42.sysrst_ctrl_alert_test.1650813445
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2091584498
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3753112957
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2878716751
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1327893211
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1663002225
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.262293388
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1410400084
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2499681063
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3740042666
/workspace/coverage/default/42.sysrst_ctrl_smoke.3398632555
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1238808162
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2125062925
/workspace/coverage/default/43.sysrst_ctrl_alert_test.609318343
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.190280143
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3310538220
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1033716678
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.856359500
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3026076259
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2163605747
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.4288436917
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.592509486
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1464327414
/workspace/coverage/default/43.sysrst_ctrl_smoke.1265374867
/workspace/coverage/default/43.sysrst_ctrl_stress_all.351308789
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.4282234849
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2803455643
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2772429069
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2569254339
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3246979800
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3072306432
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2678590447
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2793461501
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1451323946
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3075707655
/workspace/coverage/default/44.sysrst_ctrl_smoke.4084107177
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2470346546
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.4083549386
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.4160556130
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2807477395
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2500439245
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1379755530
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.249788531
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2658993081
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.555418926
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3306568847
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1811458684
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1184584770
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.911251639
/workspace/coverage/default/45.sysrst_ctrl_smoke.3729086618
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2727336574
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3375146836
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1696779103
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3185307113
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1620387129
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3228464724
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3432002767
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1083222955
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3673293993
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3051265101
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1489618937
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2999293064
/workspace/coverage/default/46.sysrst_ctrl_smoke.307470240
/workspace/coverage/default/46.sysrst_ctrl_stress_all.600656502
/workspace/coverage/default/47.sysrst_ctrl_alert_test.716372856
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2773190824
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3237933789
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3353560503
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3875610236
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3326576766
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3177108048
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2392000501
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2836142160
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2490715238
/workspace/coverage/default/47.sysrst_ctrl_smoke.2748823850
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2688219575
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3558094433
/workspace/coverage/default/48.sysrst_ctrl_alert_test.194847650
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3680455714
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3135367752
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2894871362
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.791594543
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1900361543
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.911838413
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3580260338
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3120997605
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.829949146
/workspace/coverage/default/48.sysrst_ctrl_smoke.722544201
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1281847060
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.1929557009
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.993461140
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2819648931
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.643404387
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1399024909
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2412756968
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.639311416
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2182828476
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.306688562
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2997335808
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.868713488
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1657468379
/workspace/coverage/default/49.sysrst_ctrl_smoke.2952185970
/workspace/coverage/default/49.sysrst_ctrl_stress_all.527542342
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.4140698238
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.500265618
/workspace/coverage/default/5.sysrst_ctrl_alert_test.659733481
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4285152150
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3565959741
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3822311539
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.4082719107
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3410240963
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1432399260
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.4002976894
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3206314955
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1174854284
/workspace/coverage/default/5.sysrst_ctrl_smoke.3255380164
/workspace/coverage/default/5.sysrst_ctrl_stress_all.1776863534
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3432243068
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.710764996
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.354845093
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1883888135
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.629020100
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.4293671096
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2083654047
/workspace/coverage/default/6.sysrst_ctrl_alert_test.695520729
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3632706047
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.4080960372
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.4005219345
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3899004469
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2081241896
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.611562831
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2646333914
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1656542645
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.920652336
/workspace/coverage/default/6.sysrst_ctrl_smoke.674054011
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3011794123
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1646347275
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1054621608
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.336737166
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.4069767370
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.921117978
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.842851237
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1784369076
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2840111214
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3218796880
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2329136032
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.811998020
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3162476168
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2148055091
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1017101819
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.981110447
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2618944601
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.302545192
/workspace/coverage/default/7.sysrst_ctrl_smoke.3844147367
/workspace/coverage/default/7.sysrst_ctrl_stress_all.4245001257
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3860663494
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2753771047
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1411948251
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.340751616
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3023539614
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2294248099
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3802960601
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.480224833
/workspace/coverage/default/8.sysrst_ctrl_alert_test.4053047638
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2410485852
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2228736048
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3142262479
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.846483707
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2326590992
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2011169488
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1416308384
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2280042207
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.4021319287
/workspace/coverage/default/8.sysrst_ctrl_smoke.1162933057
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3351604704
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1586256102
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2566383637
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1004391031
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3836434827
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.910123821
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.111825670
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1704685917
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2670933878
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3369466717
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.664779783
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3624667635
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.751738576
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.456538755
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.435510692
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.107250115
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.4142317710
/workspace/coverage/default/9.sysrst_ctrl_smoke.4150722036
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4154408277
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3168681592
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2819158495
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1772901185
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2413459957
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.270555870
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.189804358
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.975285203
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2602191169
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3645290144




Total test records in report: 911
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/15.sysrst_ctrl_stress_all.2004188332 Aug 04 04:40:16 PM PDT 24 Aug 04 04:40:47 PM PDT 24 40858577776 ps
T2 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.3086884608 Aug 04 04:40:37 PM PDT 24 Aug 04 04:41:06 PM PDT 24 67157245223 ps
T4 /workspace/coverage/default/46.sysrst_ctrl_stress_all.600656502 Aug 04 04:41:01 PM PDT 24 Aug 04 04:41:31 PM PDT 24 10585048089 ps
T12 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.262293388 Aug 04 04:40:51 PM PDT 24 Aug 04 04:40:55 PM PDT 24 2623312689 ps
T13 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.4273668478 Aug 04 04:39:35 PM PDT 24 Aug 04 04:39:40 PM PDT 24 3070449625 ps
T3 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3321062402 Aug 04 04:40:56 PM PDT 24 Aug 04 04:41:04 PM PDT 24 5900550677 ps
T5 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3920599517 Aug 04 04:41:03 PM PDT 24 Aug 04 04:42:22 PM PDT 24 118019882174 ps
T6 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3720436852 Aug 04 04:40:24 PM PDT 24 Aug 04 04:41:37 PM PDT 24 60157145137 ps
T14 /workspace/coverage/default/31.sysrst_ctrl_smoke.1501794394 Aug 04 04:40:18 PM PDT 24 Aug 04 04:40:21 PM PDT 24 2120807897 ps
T7 /workspace/coverage/default/33.sysrst_ctrl_stress_all.3892477091 Aug 04 04:40:23 PM PDT 24 Aug 04 05:08:42 PM PDT 24 683760762890 ps
T22 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1222947385 Aug 04 04:40:12 PM PDT 24 Aug 04 04:40:16 PM PDT 24 3577569617 ps
T8 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.4005219345 Aug 04 04:39:37 PM PDT 24 Aug 04 04:39:51 PM PDT 24 36379547971 ps
T45 /workspace/coverage/default/16.sysrst_ctrl_alert_test.1995319785 Aug 04 04:39:56 PM PDT 24 Aug 04 04:40:01 PM PDT 24 2013045667 ps
T46 /workspace/coverage/default/32.sysrst_ctrl_smoke.2374622776 Aug 04 04:40:23 PM PDT 24 Aug 04 04:40:27 PM PDT 24 2115940432 ps
T47 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.774336812 Aug 04 04:39:33 PM PDT 24 Aug 04 04:39:35 PM PDT 24 2710272226 ps
T9 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1096609571 Aug 04 04:41:05 PM PDT 24 Aug 04 04:43:46 PM PDT 24 230431820220 ps
T88 /workspace/coverage/default/35.sysrst_ctrl_alert_test.956243381 Aug 04 04:40:25 PM PDT 24 Aug 04 04:40:28 PM PDT 24 2024171826 ps
T21 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1970194570 Aug 04 04:40:52 PM PDT 24 Aug 04 04:40:53 PM PDT 24 2546830281 ps
T89 /workspace/coverage/default/1.sysrst_ctrl_alert_test.3571646679 Aug 04 04:39:40 PM PDT 24 Aug 04 04:39:44 PM PDT 24 2015034967 ps
T51 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1327893211 Aug 04 04:40:34 PM PDT 24 Aug 04 04:40:41 PM PDT 24 4282632680 ps
T113 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1801099099 Aug 04 04:40:53 PM PDT 24 Aug 04 04:40:56 PM PDT 24 2097189149 ps
T10 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2678443801 Aug 04 04:39:46 PM PDT 24 Aug 04 04:40:09 PM PDT 24 42696425252 ps
T38 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2819158495 Aug 04 04:41:13 PM PDT 24 Aug 04 04:42:21 PM PDT 24 50682038505 ps
T11 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.1725964679 Aug 04 04:39:36 PM PDT 24 Aug 04 04:39:39 PM PDT 24 3565961508 ps
T114 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.314385874 Aug 04 04:39:24 PM PDT 24 Aug 04 04:39:30 PM PDT 24 2065662672 ps
T27 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.1399024909 Aug 04 04:41:08 PM PDT 24 Aug 04 04:42:39 PM PDT 24 143911991561 ps
T298 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3227360105 Aug 04 04:40:13 PM PDT 24 Aug 04 04:40:17 PM PDT 24 2584412358 ps
T299 /workspace/coverage/default/18.sysrst_ctrl_alert_test.3945694183 Aug 04 04:40:03 PM PDT 24 Aug 04 04:40:05 PM PDT 24 2045598828 ps
T52 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1049206198 Aug 04 04:39:28 PM PDT 24 Aug 04 04:39:31 PM PDT 24 2700720562 ps
T39 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.631540931 Aug 04 04:39:27 PM PDT 24 Aug 04 04:40:50 PM PDT 24 81875379445 ps
T69 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3208353055 Aug 04 04:39:26 PM PDT 24 Aug 04 04:39:28 PM PDT 24 2357366475 ps
T65 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3805542106 Aug 04 04:40:25 PM PDT 24 Aug 04 04:40:29 PM PDT 24 2519329832 ps
T70 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2387335171 Aug 04 04:41:03 PM PDT 24 Aug 04 04:48:54 PM PDT 24 174347474495 ps
T395 /workspace/coverage/default/27.sysrst_ctrl_smoke.52031934 Aug 04 04:40:16 PM PDT 24 Aug 04 04:40:23 PM PDT 24 2111010178 ps
T325 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.791594543 Aug 04 04:41:01 PM PDT 24 Aug 04 04:41:04 PM PDT 24 2857418615 ps
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