T458 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1505891765 |
|
|
Aug 05 06:05:39 PM PDT 24 |
Aug 05 06:05:45 PM PDT 24 |
2011447064 ps |
T371 |
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.188820638 |
|
|
Aug 05 06:05:59 PM PDT 24 |
Aug 05 06:06:19 PM PDT 24 |
76228276815 ps |
T459 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3137889072 |
|
|
Aug 05 06:05:05 PM PDT 24 |
Aug 05 06:05:08 PM PDT 24 |
2027790319 ps |
T460 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.499386245 |
|
|
Aug 05 06:05:13 PM PDT 24 |
Aug 05 06:05:20 PM PDT 24 |
2468322225 ps |
T461 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.1759146158 |
|
|
Aug 05 06:05:28 PM PDT 24 |
Aug 05 06:05:34 PM PDT 24 |
2111933998 ps |
T462 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2474415844 |
|
|
Aug 05 06:04:08 PM PDT 24 |
Aug 05 06:04:15 PM PDT 24 |
4259300837 ps |
T463 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2116786192 |
|
|
Aug 05 06:05:09 PM PDT 24 |
Aug 05 06:05:11 PM PDT 24 |
2521922694 ps |
T464 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.3880069613 |
|
|
Aug 05 06:04:40 PM PDT 24 |
Aug 05 06:04:42 PM PDT 24 |
3536683333 ps |
T465 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2991869657 |
|
|
Aug 05 06:04:52 PM PDT 24 |
Aug 05 06:05:25 PM PDT 24 |
49572696800 ps |
T348 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1369121097 |
|
|
Aug 05 06:05:45 PM PDT 24 |
Aug 05 06:09:37 PM PDT 24 |
91974023485 ps |
T95 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.789355466 |
|
|
Aug 05 06:03:57 PM PDT 24 |
Aug 05 06:04:35 PM PDT 24 |
56834421297 ps |
T381 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2064430026 |
|
|
Aug 05 06:05:32 PM PDT 24 |
Aug 05 06:08:38 PM PDT 24 |
188635930135 ps |
T466 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.2906974254 |
|
|
Aug 05 06:04:27 PM PDT 24 |
Aug 05 06:07:30 PM PDT 24 |
158727995015 ps |
T467 |
/workspace/coverage/default/36.sysrst_ctrl_alert_test.3969175073 |
|
|
Aug 05 06:05:18 PM PDT 24 |
Aug 05 06:05:20 PM PDT 24 |
2036920023 ps |
T347 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2630411905 |
|
|
Aug 05 06:04:12 PM PDT 24 |
Aug 05 06:04:55 PM PDT 24 |
139016879588 ps |
T468 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.554410489 |
|
|
Aug 05 06:03:55 PM PDT 24 |
Aug 05 06:04:02 PM PDT 24 |
3959656064 ps |
T301 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3652646624 |
|
|
Aug 05 06:04:09 PM PDT 24 |
Aug 05 06:06:30 PM PDT 24 |
517283551007 ps |
T469 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.3851195594 |
|
|
Aug 05 06:04:51 PM PDT 24 |
Aug 05 06:04:53 PM PDT 24 |
3064294689 ps |
T470 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.149350259 |
|
|
Aug 05 06:04:09 PM PDT 24 |
Aug 05 06:05:21 PM PDT 24 |
27333302522 ps |
T471 |
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3654449846 |
|
|
Aug 05 06:05:27 PM PDT 24 |
Aug 05 06:05:31 PM PDT 24 |
4780126785 ps |
T212 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.2662293780 |
|
|
Aug 05 06:04:15 PM PDT 24 |
Aug 05 06:04:28 PM PDT 24 |
5104144002 ps |
T472 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.379284878 |
|
|
Aug 05 06:04:38 PM PDT 24 |
Aug 05 06:04:45 PM PDT 24 |
2610847913 ps |
T234 |
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.748031638 |
|
|
Aug 05 06:05:15 PM PDT 24 |
Aug 05 06:05:27 PM PDT 24 |
4521813316 ps |
T311 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2001240252 |
|
|
Aug 05 06:05:31 PM PDT 24 |
Aug 05 06:05:32 PM PDT 24 |
2999733096 ps |
T368 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.1715943124 |
|
|
Aug 05 06:04:46 PM PDT 24 |
Aug 05 06:07:36 PM PDT 24 |
267132318815 ps |
T473 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.639411707 |
|
|
Aug 05 06:04:10 PM PDT 24 |
Aug 05 06:04:16 PM PDT 24 |
2611717245 ps |
T474 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1929439161 |
|
|
Aug 05 06:04:29 PM PDT 24 |
Aug 05 06:04:34 PM PDT 24 |
2458825055 ps |
T475 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2100457519 |
|
|
Aug 05 06:05:50 PM PDT 24 |
Aug 05 06:05:55 PM PDT 24 |
2010739468 ps |
T476 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.4165901491 |
|
|
Aug 05 06:05:16 PM PDT 24 |
Aug 05 06:05:24 PM PDT 24 |
3134308016 ps |
T146 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.612433055 |
|
|
Aug 05 06:04:57 PM PDT 24 |
Aug 05 06:06:47 PM PDT 24 |
48919384356 ps |
T477 |
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2050416927 |
|
|
Aug 05 06:05:40 PM PDT 24 |
Aug 05 06:05:43 PM PDT 24 |
2630646268 ps |
T478 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1384761540 |
|
|
Aug 05 06:05:12 PM PDT 24 |
Aug 05 06:05:16 PM PDT 24 |
2454338367 ps |
T479 |
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3808639476 |
|
|
Aug 05 06:04:25 PM PDT 24 |
Aug 05 06:04:32 PM PDT 24 |
2508989847 ps |
T480 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3915154792 |
|
|
Aug 05 06:04:06 PM PDT 24 |
Aug 05 06:04:08 PM PDT 24 |
2329106109 ps |
T481 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3163190532 |
|
|
Aug 05 06:04:06 PM PDT 24 |
Aug 05 06:05:11 PM PDT 24 |
24833221534 ps |
T170 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.3319546299 |
|
|
Aug 05 06:05:11 PM PDT 24 |
Aug 05 06:05:15 PM PDT 24 |
3115178732 ps |
T482 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.3966412187 |
|
|
Aug 05 06:05:06 PM PDT 24 |
Aug 05 06:05:09 PM PDT 24 |
2165796756 ps |
T182 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2681505602 |
|
|
Aug 05 06:05:52 PM PDT 24 |
Aug 05 06:05:55 PM PDT 24 |
4316464811 ps |
T483 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3854644332 |
|
|
Aug 05 06:05:48 PM PDT 24 |
Aug 05 06:07:33 PM PDT 24 |
169141097801 ps |
T484 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.451743270 |
|
|
Aug 05 06:05:11 PM PDT 24 |
Aug 05 06:05:17 PM PDT 24 |
3742473373 ps |
T485 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.675640785 |
|
|
Aug 05 06:05:35 PM PDT 24 |
Aug 05 06:05:39 PM PDT 24 |
2613581813 ps |
T247 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.3076173459 |
|
|
Aug 05 06:04:04 PM PDT 24 |
Aug 05 06:04:05 PM PDT 24 |
2784887705 ps |
T486 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.4285328561 |
|
|
Aug 05 06:05:28 PM PDT 24 |
Aug 05 06:05:34 PM PDT 24 |
2009502801 ps |
T487 |
/workspace/coverage/default/43.sysrst_ctrl_alert_test.174796103 |
|
|
Aug 05 06:05:35 PM PDT 24 |
Aug 05 06:05:39 PM PDT 24 |
2017080362 ps |
T488 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3569861902 |
|
|
Aug 05 06:05:50 PM PDT 24 |
Aug 05 06:05:56 PM PDT 24 |
2513464604 ps |
T133 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1694115164 |
|
|
Aug 05 06:05:55 PM PDT 24 |
Aug 05 06:05:58 PM PDT 24 |
4722772960 ps |
T489 |
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.724034009 |
|
|
Aug 05 06:05:28 PM PDT 24 |
Aug 05 06:05:36 PM PDT 24 |
2609181038 ps |
T490 |
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3298082299 |
|
|
Aug 05 06:05:57 PM PDT 24 |
Aug 05 06:06:04 PM PDT 24 |
2610875784 ps |
T491 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.813550175 |
|
|
Aug 05 06:05:08 PM PDT 24 |
Aug 05 06:05:10 PM PDT 24 |
2283918026 ps |
T270 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all.3583559288 |
|
|
Aug 05 06:04:22 PM PDT 24 |
Aug 05 06:09:36 PM PDT 24 |
123915411750 ps |
T492 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.2191808569 |
|
|
Aug 05 06:05:50 PM PDT 24 |
Aug 05 06:05:51 PM PDT 24 |
2183459936 ps |
T493 |
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3255302622 |
|
|
Aug 05 06:05:13 PM PDT 24 |
Aug 05 06:05:20 PM PDT 24 |
2514808594 ps |
T494 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.1079894329 |
|
|
Aug 05 06:04:52 PM PDT 24 |
Aug 05 06:05:00 PM PDT 24 |
2444718455 ps |
T495 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.3728461153 |
|
|
Aug 05 06:04:26 PM PDT 24 |
Aug 05 06:04:28 PM PDT 24 |
2619845184 ps |
T496 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2867842576 |
|
|
Aug 05 06:05:25 PM PDT 24 |
Aug 05 06:05:44 PM PDT 24 |
6783814113 ps |
T96 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.951096632 |
|
|
Aug 05 06:05:31 PM PDT 24 |
Aug 05 06:06:47 PM PDT 24 |
63373449895 ps |
T497 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.3949252083 |
|
|
Aug 05 06:04:32 PM PDT 24 |
Aug 05 06:04:34 PM PDT 24 |
2029545610 ps |
T498 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.246648078 |
|
|
Aug 05 06:05:27 PM PDT 24 |
Aug 05 06:05:44 PM PDT 24 |
26345617968 ps |
T499 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.3227144438 |
|
|
Aug 05 06:04:54 PM PDT 24 |
Aug 05 06:04:55 PM PDT 24 |
2164270178 ps |
T500 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.1848173944 |
|
|
Aug 05 06:04:33 PM PDT 24 |
Aug 05 06:04:35 PM PDT 24 |
2036515886 ps |
T501 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.1611130062 |
|
|
Aug 05 06:05:16 PM PDT 24 |
Aug 05 06:06:08 PM PDT 24 |
79495660530 ps |
T78 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.104113926 |
|
|
Aug 05 06:05:09 PM PDT 24 |
Aug 05 06:09:09 PM PDT 24 |
131960193354 ps |
T108 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.660933519 |
|
|
Aug 05 06:04:45 PM PDT 24 |
Aug 05 06:04:55 PM PDT 24 |
3473684136 ps |
T109 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.3619988117 |
|
|
Aug 05 06:05:12 PM PDT 24 |
Aug 05 06:05:14 PM PDT 24 |
2533609444 ps |
T110 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3782877546 |
|
|
Aug 05 06:04:45 PM PDT 24 |
Aug 05 06:07:03 PM PDT 24 |
50833112688 ps |
T83 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.531230116 |
|
|
Aug 05 06:04:23 PM PDT 24 |
Aug 05 06:05:43 PM PDT 24 |
53968742535 ps |
T111 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1905678802 |
|
|
Aug 05 06:05:39 PM PDT 24 |
Aug 05 06:08:43 PM PDT 24 |
138276135958 ps |
T112 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.796686396 |
|
|
Aug 05 06:04:47 PM PDT 24 |
Aug 05 06:12:55 PM PDT 24 |
176834393025 ps |
T113 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.832750599 |
|
|
Aug 05 06:03:50 PM PDT 24 |
Aug 05 06:03:52 PM PDT 24 |
2208049801 ps |
T114 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.1774482886 |
|
|
Aug 05 06:05:26 PM PDT 24 |
Aug 05 06:05:35 PM PDT 24 |
3085088541 ps |
T115 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1044765204 |
|
|
Aug 05 06:04:34 PM PDT 24 |
Aug 05 06:04:35 PM PDT 24 |
3290617830 ps |
T147 |
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.3484754262 |
|
|
Aug 05 06:03:54 PM PDT 24 |
Aug 05 06:03:55 PM PDT 24 |
3945383183 ps |
T179 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1280835906 |
|
|
Aug 05 06:05:32 PM PDT 24 |
Aug 05 06:06:14 PM PDT 24 |
70224346319 ps |
T180 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect.4267469272 |
|
|
Aug 05 06:04:37 PM PDT 24 |
Aug 05 06:05:16 PM PDT 24 |
26133519800 ps |
T181 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.1834737355 |
|
|
Aug 05 06:05:21 PM PDT 24 |
Aug 05 06:05:27 PM PDT 24 |
2112596071 ps |
T502 |
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2837295261 |
|
|
Aug 05 06:04:02 PM PDT 24 |
Aug 05 06:04:06 PM PDT 24 |
2473014192 ps |
T503 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1152576535 |
|
|
Aug 05 06:05:49 PM PDT 24 |
Aug 05 06:08:22 PM PDT 24 |
55100615401 ps |
T504 |
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.1025980254 |
|
|
Aug 05 06:04:21 PM PDT 24 |
Aug 05 06:04:23 PM PDT 24 |
2471939796 ps |
T505 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.2218472369 |
|
|
Aug 05 06:05:09 PM PDT 24 |
Aug 05 06:05:15 PM PDT 24 |
2062371311 ps |
T506 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3297102312 |
|
|
Aug 05 06:04:02 PM PDT 24 |
Aug 05 06:04:07 PM PDT 24 |
2929518812 ps |
T278 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.761775540 |
|
|
Aug 05 06:04:45 PM PDT 24 |
Aug 05 06:06:00 PM PDT 24 |
112628370452 ps |
T375 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.4026363425 |
|
|
Aug 05 06:05:57 PM PDT 24 |
Aug 05 06:07:13 PM PDT 24 |
89191952069 ps |
T507 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.307205621 |
|
|
Aug 05 06:04:28 PM PDT 24 |
Aug 05 06:04:34 PM PDT 24 |
2111072679 ps |
T395 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2756325178 |
|
|
Aug 05 06:05:35 PM PDT 24 |
Aug 05 06:05:42 PM PDT 24 |
264810707475 ps |
T363 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1650242675 |
|
|
Aug 05 06:06:05 PM PDT 24 |
Aug 05 06:08:55 PM PDT 24 |
87169654442 ps |
T508 |
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2983588251 |
|
|
Aug 05 06:05:31 PM PDT 24 |
Aug 05 06:05:39 PM PDT 24 |
2439184869 ps |
T509 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3002250937 |
|
|
Aug 05 06:05:27 PM PDT 24 |
Aug 05 06:05:34 PM PDT 24 |
2512361637 ps |
T510 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.659268427 |
|
|
Aug 05 06:04:03 PM PDT 24 |
Aug 05 06:04:05 PM PDT 24 |
2138067320 ps |
T81 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.3462125058 |
|
|
Aug 05 06:04:54 PM PDT 24 |
Aug 05 06:05:01 PM PDT 24 |
3778945783 ps |
T511 |
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.176740504 |
|
|
Aug 05 06:05:23 PM PDT 24 |
Aug 05 06:05:25 PM PDT 24 |
3321133276 ps |
T512 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.508618907 |
|
|
Aug 05 06:05:23 PM PDT 24 |
Aug 05 06:05:25 PM PDT 24 |
2030341727 ps |
T513 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2292177499 |
|
|
Aug 05 06:04:05 PM PDT 24 |
Aug 05 06:04:07 PM PDT 24 |
5352061629 ps |
T514 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.4249066611 |
|
|
Aug 05 06:05:22 PM PDT 24 |
Aug 05 06:05:24 PM PDT 24 |
2827724595 ps |
T515 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.726133859 |
|
|
Aug 05 06:04:54 PM PDT 24 |
Aug 05 06:05:00 PM PDT 24 |
2010128031 ps |
T516 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.992669246 |
|
|
Aug 05 06:04:09 PM PDT 24 |
Aug 05 06:04:16 PM PDT 24 |
2448844427 ps |
T517 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.990835496 |
|
|
Aug 05 06:04:10 PM PDT 24 |
Aug 05 06:04:13 PM PDT 24 |
3625464275 ps |
T148 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.60675069 |
|
|
Aug 05 06:04:24 PM PDT 24 |
Aug 05 06:04:30 PM PDT 24 |
4035895255 ps |
T82 |
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.500795559 |
|
|
Aug 05 06:04:01 PM PDT 24 |
Aug 05 06:04:20 PM PDT 24 |
179094570009 ps |
T518 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.1545238422 |
|
|
Aug 05 06:04:44 PM PDT 24 |
Aug 05 06:04:45 PM PDT 24 |
2076137947 ps |
T519 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2142260853 |
|
|
Aug 05 06:05:13 PM PDT 24 |
Aug 05 06:05:14 PM PDT 24 |
6610429574 ps |
T520 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1906314040 |
|
|
Aug 05 06:05:32 PM PDT 24 |
Aug 05 06:05:36 PM PDT 24 |
2473005250 ps |
T521 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3510207831 |
|
|
Aug 05 06:04:10 PM PDT 24 |
Aug 05 06:04:12 PM PDT 24 |
2651183236 ps |
T312 |
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1573252467 |
|
|
Aug 05 06:04:15 PM PDT 24 |
Aug 05 06:04:17 PM PDT 24 |
5790969882 ps |
T522 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3999623623 |
|
|
Aug 05 06:04:10 PM PDT 24 |
Aug 05 06:04:18 PM PDT 24 |
2512993359 ps |
T523 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3404457308 |
|
|
Aug 05 06:05:59 PM PDT 24 |
Aug 05 06:07:53 PM PDT 24 |
90786462386 ps |
T524 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.3290490099 |
|
|
Aug 05 06:03:56 PM PDT 24 |
Aug 05 06:04:00 PM PDT 24 |
2620434342 ps |
T369 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.92479111 |
|
|
Aug 05 06:05:09 PM PDT 24 |
Aug 05 06:05:58 PM PDT 24 |
85239311819 ps |
T525 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3459586647 |
|
|
Aug 05 06:04:22 PM PDT 24 |
Aug 05 06:04:26 PM PDT 24 |
2512111230 ps |
T134 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.35416283 |
|
|
Aug 05 06:04:48 PM PDT 24 |
Aug 05 06:04:52 PM PDT 24 |
6648775619 ps |
T97 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.2233055157 |
|
|
Aug 05 06:04:24 PM PDT 24 |
Aug 05 06:11:47 PM PDT 24 |
182283987475 ps |
T393 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3847381128 |
|
|
Aug 05 06:06:01 PM PDT 24 |
Aug 05 06:08:22 PM PDT 24 |
55399063784 ps |
T526 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.4165551236 |
|
|
Aug 05 06:04:07 PM PDT 24 |
Aug 05 06:04:15 PM PDT 24 |
2477082389 ps |
T527 |
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.464718445 |
|
|
Aug 05 06:05:35 PM PDT 24 |
Aug 05 06:05:45 PM PDT 24 |
3504990271 ps |
T528 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3266372931 |
|
|
Aug 05 06:03:54 PM PDT 24 |
Aug 05 06:04:01 PM PDT 24 |
2476186266 ps |
T529 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2721097774 |
|
|
Aug 05 06:04:06 PM PDT 24 |
Aug 05 06:04:09 PM PDT 24 |
2789665132 ps |
T530 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.1081567332 |
|
|
Aug 05 06:04:39 PM PDT 24 |
Aug 05 06:04:41 PM PDT 24 |
2034495374 ps |
T531 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.937748817 |
|
|
Aug 05 06:05:36 PM PDT 24 |
Aug 05 06:05:39 PM PDT 24 |
2539248662 ps |
T532 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.1679266076 |
|
|
Aug 05 06:04:16 PM PDT 24 |
Aug 05 06:04:18 PM PDT 24 |
2626274030 ps |
T533 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.3677290850 |
|
|
Aug 05 06:04:23 PM PDT 24 |
Aug 05 06:04:25 PM PDT 24 |
2036231190 ps |
T534 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.529581358 |
|
|
Aug 05 06:05:30 PM PDT 24 |
Aug 05 06:05:32 PM PDT 24 |
2497622353 ps |
T160 |
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1426416614 |
|
|
Aug 05 06:05:51 PM PDT 24 |
Aug 05 06:05:59 PM PDT 24 |
3260436121 ps |
T372 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2626731125 |
|
|
Aug 05 06:05:49 PM PDT 24 |
Aug 05 06:06:18 PM PDT 24 |
102381008580 ps |
T535 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3016198473 |
|
|
Aug 05 06:04:03 PM PDT 24 |
Aug 05 06:04:07 PM PDT 24 |
2018319292 ps |
T536 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.4286241305 |
|
|
Aug 05 06:04:08 PM PDT 24 |
Aug 05 06:04:11 PM PDT 24 |
3429351567 ps |
T537 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.1187316763 |
|
|
Aug 05 06:04:23 PM PDT 24 |
Aug 05 06:04:27 PM PDT 24 |
2619252560 ps |
T538 |
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.1066719646 |
|
|
Aug 05 06:04:55 PM PDT 24 |
Aug 05 06:05:02 PM PDT 24 |
2509102047 ps |
T539 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2595566509 |
|
|
Aug 05 06:04:09 PM PDT 24 |
Aug 05 06:04:11 PM PDT 24 |
2384999904 ps |
T540 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3079403307 |
|
|
Aug 05 06:04:09 PM PDT 24 |
Aug 05 06:04:10 PM PDT 24 |
2117336666 ps |
T541 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1968206107 |
|
|
Aug 05 06:04:10 PM PDT 24 |
Aug 05 06:04:12 PM PDT 24 |
2209773871 ps |
T542 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3785292164 |
|
|
Aug 05 06:03:50 PM PDT 24 |
Aug 05 06:03:56 PM PDT 24 |
3423048066 ps |
T543 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.3386478401 |
|
|
Aug 05 06:04:58 PM PDT 24 |
Aug 05 06:05:03 PM PDT 24 |
2113329524 ps |
T544 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.593988846 |
|
|
Aug 05 06:04:45 PM PDT 24 |
Aug 05 06:04:49 PM PDT 24 |
2120799451 ps |
T161 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all.5455943 |
|
|
Aug 05 06:04:21 PM PDT 24 |
Aug 05 06:05:03 PM PDT 24 |
18327471469 ps |
T265 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.3109810609 |
|
|
Aug 05 06:04:25 PM PDT 24 |
Aug 05 06:05:36 PM PDT 24 |
110623296200 ps |
T545 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.620448047 |
|
|
Aug 05 06:05:45 PM PDT 24 |
Aug 05 06:05:52 PM PDT 24 |
2610830793 ps |
T546 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.2825139816 |
|
|
Aug 05 06:04:12 PM PDT 24 |
Aug 05 06:04:14 PM PDT 24 |
7473353437 ps |
T547 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1852416508 |
|
|
Aug 05 06:06:00 PM PDT 24 |
Aug 05 06:10:59 PM PDT 24 |
119727755060 ps |
T548 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2361415995 |
|
|
Aug 05 06:04:21 PM PDT 24 |
Aug 05 06:04:28 PM PDT 24 |
2611436307 ps |
T549 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.3691393623 |
|
|
Aug 05 06:04:02 PM PDT 24 |
Aug 05 06:04:10 PM PDT 24 |
2511715485 ps |
T194 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.2218527403 |
|
|
Aug 05 06:04:14 PM PDT 24 |
Aug 05 06:04:21 PM PDT 24 |
4653072310 ps |
T550 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2140350429 |
|
|
Aug 05 06:04:31 PM PDT 24 |
Aug 05 06:04:33 PM PDT 24 |
3521221219 ps |
T195 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.987520729 |
|
|
Aug 05 06:05:36 PM PDT 24 |
Aug 05 06:05:39 PM PDT 24 |
5283057821 ps |
T551 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1891958115 |
|
|
Aug 05 06:05:11 PM PDT 24 |
Aug 05 06:05:15 PM PDT 24 |
2260795097 ps |
T552 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.24770792 |
|
|
Aug 05 06:04:45 PM PDT 24 |
Aug 05 06:04:49 PM PDT 24 |
2119701529 ps |
T553 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.2910256613 |
|
|
Aug 05 06:04:24 PM PDT 24 |
Aug 05 06:04:30 PM PDT 24 |
2110587500 ps |
T554 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1048372210 |
|
|
Aug 05 06:04:01 PM PDT 24 |
Aug 05 06:04:05 PM PDT 24 |
2218661606 ps |
T378 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3009941836 |
|
|
Aug 05 06:04:45 PM PDT 24 |
Aug 05 06:08:42 PM PDT 24 |
89148231810 ps |
T555 |
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.335095398 |
|
|
Aug 05 06:04:39 PM PDT 24 |
Aug 05 06:04:45 PM PDT 24 |
2510642742 ps |
T556 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.1854262538 |
|
|
Aug 05 06:05:09 PM PDT 24 |
Aug 05 06:05:16 PM PDT 24 |
2972445266 ps |
T557 |
/workspace/coverage/default/15.sysrst_ctrl_alert_test.2015318851 |
|
|
Aug 05 06:04:23 PM PDT 24 |
Aug 05 06:04:25 PM PDT 24 |
2029646044 ps |
T135 |
/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2803492956 |
|
|
Aug 05 06:04:21 PM PDT 24 |
Aug 05 06:04:29 PM PDT 24 |
8639965157 ps |
T558 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1639908136 |
|
|
Aug 05 06:04:27 PM PDT 24 |
Aug 05 06:04:29 PM PDT 24 |
2052546897 ps |
T224 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3581822495 |
|
|
Aug 05 06:04:09 PM PDT 24 |
Aug 05 06:04:16 PM PDT 24 |
3665008342 ps |
T266 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.1427901168 |
|
|
Aug 05 06:04:48 PM PDT 24 |
Aug 05 06:06:17 PM PDT 24 |
158287433448 ps |
T559 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.4197087342 |
|
|
Aug 05 06:05:55 PM PDT 24 |
Aug 05 06:05:56 PM PDT 24 |
2563224454 ps |
T560 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.812143083 |
|
|
Aug 05 06:03:55 PM PDT 24 |
Aug 05 06:03:57 PM PDT 24 |
2039457081 ps |
T561 |
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.294068978 |
|
|
Aug 05 06:04:34 PM PDT 24 |
Aug 05 06:04:37 PM PDT 24 |
2251800469 ps |
T562 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.302382384 |
|
|
Aug 05 06:04:55 PM PDT 24 |
Aug 05 06:05:01 PM PDT 24 |
2616860460 ps |
T563 |
/workspace/coverage/default/10.sysrst_ctrl_smoke.3303433741 |
|
|
Aug 05 06:04:09 PM PDT 24 |
Aug 05 06:04:13 PM PDT 24 |
2114822743 ps |
T564 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.939904740 |
|
|
Aug 05 06:03:58 PM PDT 24 |
Aug 05 06:04:25 PM PDT 24 |
74546725878 ps |
T281 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.2039152752 |
|
|
Aug 05 06:04:05 PM PDT 24 |
Aug 05 06:04:20 PM PDT 24 |
22051590146 ps |
T565 |
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.532988656 |
|
|
Aug 05 06:04:22 PM PDT 24 |
Aug 05 06:04:24 PM PDT 24 |
2662945702 ps |
T566 |
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3346352257 |
|
|
Aug 05 06:05:38 PM PDT 24 |
Aug 05 06:05:42 PM PDT 24 |
2517845315 ps |
T313 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.1954694527 |
|
|
Aug 05 06:04:47 PM PDT 24 |
Aug 05 06:04:49 PM PDT 24 |
9296334146 ps |
T567 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1471043219 |
|
|
Aug 05 06:04:08 PM PDT 24 |
Aug 05 06:04:10 PM PDT 24 |
4202673527 ps |
T568 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2604932073 |
|
|
Aug 05 06:05:56 PM PDT 24 |
Aug 05 06:06:29 PM PDT 24 |
24836761612 ps |
T569 |
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.2789287650 |
|
|
Aug 05 06:04:48 PM PDT 24 |
Aug 05 06:04:55 PM PDT 24 |
2612855646 ps |
T570 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3622902894 |
|
|
Aug 05 06:04:39 PM PDT 24 |
Aug 05 06:04:42 PM PDT 24 |
2525908027 ps |
T302 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1194831676 |
|
|
Aug 05 06:05:04 PM PDT 24 |
Aug 05 06:07:03 PM PDT 24 |
50334972847 ps |
T571 |
/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3821257949 |
|
|
Aug 05 06:05:16 PM PDT 24 |
Aug 05 06:05:18 PM PDT 24 |
2651386784 ps |
T572 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3932137917 |
|
|
Aug 05 06:05:44 PM PDT 24 |
Aug 05 06:05:53 PM PDT 24 |
2476388937 ps |
T573 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1532018693 |
|
|
Aug 05 06:04:09 PM PDT 24 |
Aug 05 06:04:28 PM PDT 24 |
26606903991 ps |
T574 |
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3622975650 |
|
|
Aug 05 06:05:22 PM PDT 24 |
Aug 05 06:05:26 PM PDT 24 |
3391047924 ps |
T267 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.2120147454 |
|
|
Aug 05 06:04:04 PM PDT 24 |
Aug 05 06:04:39 PM PDT 24 |
183454224445 ps |
T575 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2054468429 |
|
|
Aug 05 06:05:47 PM PDT 24 |
Aug 05 06:05:50 PM PDT 24 |
2625058879 ps |
T576 |
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.2994950059 |
|
|
Aug 05 06:05:10 PM PDT 24 |
Aug 05 06:05:13 PM PDT 24 |
2631918845 ps |
T171 |
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3424870719 |
|
|
Aug 05 06:04:37 PM PDT 24 |
Aug 05 06:04:41 PM PDT 24 |
5459851751 ps |
T577 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.3916043739 |
|
|
Aug 05 06:03:51 PM PDT 24 |
Aug 05 06:03:53 PM PDT 24 |
2493524855 ps |
T578 |
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.3332091496 |
|
|
Aug 05 06:05:03 PM PDT 24 |
Aug 05 06:05:14 PM PDT 24 |
3730349555 ps |
T579 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2771691940 |
|
|
Aug 05 06:06:06 PM PDT 24 |
Aug 05 06:07:11 PM PDT 24 |
25833281157 ps |
T98 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.504858630 |
|
|
Aug 05 06:04:54 PM PDT 24 |
Aug 05 06:10:05 PM PDT 24 |
129962825599 ps |
T225 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.381715469 |
|
|
Aug 05 06:04:48 PM PDT 24 |
Aug 05 06:04:51 PM PDT 24 |
3791395046 ps |
T370 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.838246484 |
|
|
Aug 05 06:05:32 PM PDT 24 |
Aug 05 06:05:51 PM PDT 24 |
112153305219 ps |
T580 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1705081100 |
|
|
Aug 05 06:05:22 PM PDT 24 |
Aug 05 06:05:26 PM PDT 24 |
2522226950 ps |
T581 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.745939680 |
|
|
Aug 05 06:05:59 PM PDT 24 |
Aug 05 06:07:15 PM PDT 24 |
56154475367 ps |
T582 |
/workspace/coverage/default/48.sysrst_ctrl_smoke.3206646917 |
|
|
Aug 05 06:05:50 PM PDT 24 |
Aug 05 06:05:51 PM PDT 24 |
2165109978 ps |
T583 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3909770231 |
|
|
Aug 05 06:05:40 PM PDT 24 |
Aug 05 06:05:43 PM PDT 24 |
3154117356 ps |
T584 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1091823988 |
|
|
Aug 05 06:05:48 PM PDT 24 |
Aug 05 06:05:58 PM PDT 24 |
4003755518 ps |
T585 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3828578379 |
|
|
Aug 05 06:05:13 PM PDT 24 |
Aug 05 06:05:18 PM PDT 24 |
3303470821 ps |
T586 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.190862367 |
|
|
Aug 05 06:05:36 PM PDT 24 |
Aug 05 06:05:38 PM PDT 24 |
3460175831 ps |
T587 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.485961787 |
|
|
Aug 05 06:04:12 PM PDT 24 |
Aug 05 06:04:22 PM PDT 24 |
3635066821 ps |
T358 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.980638272 |
|
|
Aug 05 06:05:56 PM PDT 24 |
Aug 05 06:06:31 PM PDT 24 |
49685208386 ps |
T588 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2918849168 |
|
|
Aug 05 06:05:45 PM PDT 24 |
Aug 05 06:05:46 PM PDT 24 |
2601940962 ps |
T589 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.4192886533 |
|
|
Aug 05 06:04:52 PM PDT 24 |
Aug 05 06:05:26 PM PDT 24 |
13963063245 ps |
T590 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1510441862 |
|
|
Aug 05 06:05:10 PM PDT 24 |
Aug 05 06:05:26 PM PDT 24 |
29347948569 ps |
T355 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1064610525 |
|
|
Aug 05 06:05:57 PM PDT 24 |
Aug 05 06:07:47 PM PDT 24 |
172305318590 ps |
T591 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1083915373 |
|
|
Aug 05 06:05:48 PM PDT 24 |
Aug 05 06:05:55 PM PDT 24 |
2512435881 ps |
T592 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.365277934 |
|
|
Aug 05 06:03:57 PM PDT 24 |
Aug 05 06:04:37 PM PDT 24 |
42687578893 ps |
T593 |
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.288036734 |
|
|
Aug 05 06:05:50 PM PDT 24 |
Aug 05 06:05:51 PM PDT 24 |
2943702171 ps |
T594 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1741818014 |
|
|
Aug 05 06:05:11 PM PDT 24 |
Aug 05 06:05:14 PM PDT 24 |
2984176496 ps |
T136 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2116982174 |
|
|
Aug 05 06:04:15 PM PDT 24 |
Aug 05 06:06:18 PM PDT 24 |
98372884333 ps |
T595 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.191892203 |
|
|
Aug 05 06:03:58 PM PDT 24 |
Aug 05 06:04:00 PM PDT 24 |
2432733688 ps |
T596 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.847062664 |
|
|
Aug 05 06:04:58 PM PDT 24 |
Aug 05 06:07:18 PM PDT 24 |
53021939849 ps |
T364 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.4127630779 |
|
|
Aug 05 06:05:26 PM PDT 24 |
Aug 05 06:06:52 PM PDT 24 |
72743940133 ps |
T597 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.959818609 |
|
|
Aug 05 06:05:14 PM PDT 24 |
Aug 05 06:06:09 PM PDT 24 |
23082017379 ps |
T598 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2288240135 |
|
|
Aug 05 06:04:15 PM PDT 24 |
Aug 05 06:04:22 PM PDT 24 |
2473320970 ps |
T84 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.3764768730 |
|
|
Aug 05 06:05:26 PM PDT 24 |
Aug 05 06:06:17 PM PDT 24 |
230594277189 ps |
T251 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.1726196529 |
|
|
Aug 05 06:04:26 PM PDT 24 |
Aug 05 06:04:30 PM PDT 24 |
2514364801 ps |
T252 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.435595907 |
|
|
Aug 05 06:04:29 PM PDT 24 |
Aug 05 06:04:32 PM PDT 24 |
2687401662 ps |
T253 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.732901042 |
|
|
Aug 05 06:04:39 PM PDT 24 |
Aug 05 06:09:58 PM PDT 24 |
175259494100 ps |
T254 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3175651837 |
|
|
Aug 05 06:04:07 PM PDT 24 |
Aug 05 06:04:08 PM PDT 24 |
2252659277 ps |
T255 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.1988438911 |
|
|
Aug 05 06:03:50 PM PDT 24 |
Aug 05 06:04:02 PM PDT 24 |
3778408188 ps |
T256 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.342199040 |
|
|
Aug 05 06:05:41 PM PDT 24 |
Aug 05 06:05:43 PM PDT 24 |
2158085471 ps |
T149 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all.3209883957 |
|
|
Aug 05 06:05:28 PM PDT 24 |
Aug 05 06:06:04 PM PDT 24 |
16490803516 ps |
T215 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.184578077 |
|
|
Aug 05 06:04:25 PM PDT 24 |
Aug 05 06:05:45 PM PDT 24 |
58144909426 ps |
T216 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all.2080422310 |
|
|
Aug 05 06:05:13 PM PDT 24 |
Aug 05 06:05:18 PM PDT 24 |
6770039011 ps |
T217 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1035119440 |
|
|
Aug 05 06:06:05 PM PDT 24 |
Aug 05 06:06:56 PM PDT 24 |
70663760600 ps |
T218 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.1251839782 |
|
|
Aug 05 06:04:54 PM PDT 24 |
Aug 05 06:04:55 PM PDT 24 |
3705625057 ps |
T219 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.151971882 |
|
|
Aug 05 06:06:00 PM PDT 24 |
Aug 05 06:06:58 PM PDT 24 |
83970497198 ps |
T220 |
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3024561190 |
|
|
Aug 05 06:05:11 PM PDT 24 |
Aug 05 06:05:16 PM PDT 24 |
2516226382 ps |
T221 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3345001957 |
|
|
Aug 05 06:05:33 PM PDT 24 |
Aug 05 06:05:37 PM PDT 24 |
3853425328 ps |
T222 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.2045067202 |
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|
Aug 05 06:04:06 PM PDT 24 |
Aug 05 06:07:59 PM PDT 24 |
182783729909 ps |
T223 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.720089291 |
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|
Aug 05 06:04:48 PM PDT 24 |
Aug 05 06:04:50 PM PDT 24 |
3486673868 ps |
T599 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.3913974170 |
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|
Aug 05 06:03:55 PM PDT 24 |
Aug 05 06:04:06 PM PDT 24 |
14167111419 ps |
T600 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.3624514477 |
|
|
Aug 05 06:04:40 PM PDT 24 |
Aug 05 06:04:48 PM PDT 24 |
2461198631 ps |
T214 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1399529398 |
|
|
Aug 05 06:04:07 PM PDT 24 |
Aug 05 06:04:12 PM PDT 24 |
2477142465 ps |
T601 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2069583724 |
|
|
Aug 05 06:05:51 PM PDT 24 |
Aug 05 06:05:53 PM PDT 24 |
2488354259 ps |
T602 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3184510660 |
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|
Aug 05 06:05:46 PM PDT 24 |
Aug 05 06:05:51 PM PDT 24 |
2011065992 ps |
T603 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2647732567 |
|
|
Aug 05 06:03:53 PM PDT 24 |
Aug 05 06:16:58 PM PDT 24 |
304358689907 ps |
T604 |
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.620006391 |
|
|
Aug 05 06:04:28 PM PDT 24 |
Aug 05 06:04:31 PM PDT 24 |
2453317019 ps |
T605 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.295981545 |
|
|
Aug 05 06:04:25 PM PDT 24 |
Aug 05 06:04:26 PM PDT 24 |
2141148416 ps |
T606 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3477863061 |
|
|
Aug 05 06:04:00 PM PDT 24 |
Aug 05 06:04:10 PM PDT 24 |
3495855225 ps |
T295 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.3868573624 |
|
|
Aug 05 06:03:57 PM PDT 24 |
Aug 05 06:04:49 PM PDT 24 |
42023256880 ps |
T607 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.4281464432 |
|
|
Aug 05 06:04:02 PM PDT 24 |
Aug 05 06:04:06 PM PDT 24 |
4791257011 ps |
T608 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1141552691 |
|
|
Aug 05 06:05:52 PM PDT 24 |
Aug 05 06:05:56 PM PDT 24 |
2617333913 ps |
T609 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2341559077 |
|
|
Aug 05 06:05:57 PM PDT 24 |
Aug 05 06:08:28 PM PDT 24 |
55605792419 ps |
T610 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2546698745 |
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|
Aug 05 06:05:57 PM PDT 24 |
Aug 05 06:06:32 PM PDT 24 |
48531992900 ps |
T611 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2739134758 |
|
|
Aug 05 06:05:40 PM PDT 24 |
Aug 05 06:05:43 PM PDT 24 |
4130315318 ps |
T612 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3171278000 |
|
|
Aug 05 06:05:41 PM PDT 24 |
Aug 05 06:06:11 PM PDT 24 |
34686798179 ps |
T613 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.789034339 |
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|
Aug 05 06:04:44 PM PDT 24 |
Aug 05 06:04:46 PM PDT 24 |
2042811146 ps |
T614 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2620191566 |
|
|
Aug 05 06:04:39 PM PDT 24 |
Aug 05 06:04:44 PM PDT 24 |
2976090335 ps |
T86 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.3956033180 |
|
|
Aug 05 06:05:12 PM PDT 24 |
Aug 05 06:05:14 PM PDT 24 |
185205076764 ps |
T303 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2396801148 |
|
|
Aug 05 06:05:22 PM PDT 24 |
Aug 05 06:06:08 PM PDT 24 |
119295716683 ps |
T615 |
/workspace/coverage/default/17.sysrst_ctrl_smoke.3848899748 |
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|
Aug 05 06:04:40 PM PDT 24 |
Aug 05 06:04:42 PM PDT 24 |
2163425517 ps |
T616 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.1453184505 |
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|
Aug 05 06:05:11 PM PDT 24 |
Aug 05 06:11:57 PM PDT 24 |
159516092729 ps |
T617 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2622018075 |
|
|
Aug 05 06:05:21 PM PDT 24 |
Aug 05 06:05:25 PM PDT 24 |
2614811399 ps |
T618 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.4012601353 |
|
|
Aug 05 06:04:23 PM PDT 24 |
Aug 05 06:04:28 PM PDT 24 |
3172716806 ps |
T175 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.1876741309 |
|
|
Aug 05 06:03:55 PM PDT 24 |
Aug 05 06:04:03 PM PDT 24 |
3131861543 ps |
T619 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.2329066204 |
|
|
Aug 05 06:05:09 PM PDT 24 |
Aug 05 06:05:42 PM PDT 24 |
12909735150 ps |
T620 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.971034663 |
|
|
Aug 05 06:05:50 PM PDT 24 |
Aug 05 06:05:56 PM PDT 24 |
2079794941 ps |