Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.70 98.86 96.76 100.00 96.79 98.34 99.61 93.57


Total tests in report: 911
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
54.71 54.71 77.85 77.85 64.41 64.41 65.07 65.07 14.10 14.10 78.63 78.63 66.47 66.47 16.47 16.47 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3837208015
72.64 17.93 90.73 12.88 79.58 15.17 69.41 4.34 71.79 57.69 90.68 12.05 87.19 20.71 19.14 2.67 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.632455394
80.83 8.18 94.72 3.99 87.87 8.29 95.89 26.48 73.72 1.92 94.64 3.96 89.31 2.12 29.66 10.52 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.407612268
86.09 5.26 97.07 2.35 91.86 3.99 96.12 0.23 78.85 5.13 96.75 2.11 91.91 2.60 50.05 20.39 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.3686641698
88.90 2.82 97.56 0.49 92.62 0.76 96.58 0.46 82.69 3.85 97.08 0.33 93.55 1.64 62.27 12.21 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2478876681
90.15 1.24 97.63 0.07 93.86 1.24 97.26 0.68 82.69 0.00 97.19 0.11 93.74 0.19 68.65 6.38 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2322984034
91.19 1.04 97.70 0.07 93.88 0.03 97.26 0.00 84.62 1.92 97.30 0.11 93.83 0.10 73.72 5.07 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.548967972
92.03 0.84 97.89 0.19 94.11 0.23 97.49 0.23 84.62 0.00 97.30 0.00 95.57 1.73 77.21 3.49 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.261381550
92.48 0.45 97.98 0.09 94.31 0.20 97.49 0.00 84.62 0.00 97.38 0.07 95.57 0.00 79.99 2.78 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.3403696670
92.88 0.41 98.04 0.06 94.36 0.05 97.49 0.00 85.26 0.64 97.45 0.07 97.50 1.93 80.10 0.11 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1028200869
93.27 0.38 98.13 0.09 94.49 0.13 97.72 0.23 85.90 0.64 97.52 0.07 97.59 0.10 81.52 1.42 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2049691274
93.61 0.34 98.23 0.09 94.54 0.05 97.72 0.00 87.82 1.92 97.63 0.11 97.78 0.19 81.52 0.00 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.4056230910
93.92 0.32 98.23 0.00 94.57 0.03 99.54 1.83 87.82 0.00 97.63 0.00 97.88 0.10 81.79 0.27 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.2411274743
94.22 0.29 98.30 0.07 94.62 0.05 99.54 0.00 89.10 1.28 97.71 0.07 98.07 0.19 82.17 0.38 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1651640333
94.49 0.28 98.36 0.06 94.64 0.03 99.77 0.23 89.10 0.00 97.71 0.00 98.07 0.00 83.81 1.64 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.718403241
94.76 0.27 98.40 0.04 94.64 0.00 99.77 0.00 90.38 1.28 97.78 0.07 98.07 0.00 84.30 0.49 /workspace/coverage/default/29.sysrst_ctrl_stress_all.3662580845
95.00 0.24 98.47 0.07 94.69 0.05 99.77 0.00 91.67 1.28 97.86 0.07 98.27 0.19 84.30 0.00 /workspace/coverage/default/2.sysrst_ctrl_stress_all.2425328097
95.23 0.22 98.47 0.00 94.84 0.15 99.77 0.00 91.67 0.00 97.86 0.00 98.27 0.00 85.71 1.42 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1049020408
95.42 0.19 98.49 0.02 94.84 0.00 99.77 0.00 91.67 0.00 97.86 0.00 98.27 0.00 87.02 1.31 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3947621653
95.59 0.18 98.51 0.02 94.92 0.08 99.77 0.00 92.31 0.64 97.93 0.07 98.36 0.10 87.35 0.33 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.1949211484
95.76 0.16 98.54 0.04 95.25 0.33 99.77 0.00 92.95 0.64 97.97 0.04 98.46 0.10 87.35 0.00 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.142108679
95.90 0.14 98.54 0.00 95.27 0.03 99.77 0.00 92.95 0.00 97.97 0.00 98.55 0.10 88.22 0.87 /workspace/coverage/default/23.sysrst_ctrl_stress_all.1018495743
96.04 0.14 98.54 0.00 95.98 0.71 99.77 0.00 92.95 0.00 97.97 0.00 98.55 0.00 88.50 0.27 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.1364122821
96.16 0.13 98.58 0.04 96.01 0.03 99.77 0.00 93.59 0.64 98.00 0.04 98.65 0.10 88.55 0.05 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.8706351
96.28 0.12 98.62 0.04 96.03 0.03 99.77 0.00 94.23 0.64 98.04 0.04 98.75 0.10 88.55 0.00 /workspace/coverage/default/1.sysrst_ctrl_stress_all.2167898348
96.40 0.12 98.66 0.04 96.06 0.03 99.77 0.00 94.87 0.64 98.08 0.04 98.84 0.10 88.55 0.00 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.2955970884
96.52 0.12 98.66 0.00 96.06 0.00 99.77 0.00 94.87 0.00 98.08 0.00 98.84 0.00 89.37 0.82 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1369121097
96.63 0.11 98.66 0.00 96.06 0.00 99.77 0.00 94.87 0.00 98.08 0.00 99.52 0.67 89.48 0.11 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1905294761
96.74 0.11 98.68 0.02 96.06 0.00 99.77 0.00 95.51 0.64 98.11 0.04 99.52 0.00 89.53 0.05 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.492908751
96.84 0.10 98.68 0.00 96.06 0.00 99.77 0.00 95.51 0.00 98.11 0.00 99.52 0.00 90.24 0.71 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1968638444
96.94 0.10 98.69 0.02 96.06 0.00 99.77 0.00 96.15 0.64 98.15 0.04 99.52 0.00 90.24 0.00 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.1876741309
97.04 0.10 98.71 0.02 96.06 0.00 99.77 0.00 96.79 0.64 98.19 0.04 99.52 0.00 90.24 0.00 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.987520729
97.11 0.07 98.75 0.04 96.31 0.25 99.77 0.00 96.79 0.00 98.26 0.07 99.61 0.10 90.24 0.00 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2054293032
97.17 0.06 98.81 0.06 96.39 0.08 100.00 0.23 96.79 0.00 98.26 0.00 99.61 0.00 90.29 0.05 /workspace/coverage/default/47.sysrst_ctrl_alert_test.4281580397
97.22 0.05 98.81 0.00 96.39 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 90.68 0.38 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1852416508
97.27 0.05 98.81 0.00 96.39 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 91.00 0.33 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.829063648
97.31 0.05 98.81 0.00 96.39 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 91.33 0.33 /workspace/coverage/default/49.sysrst_ctrl_stress_all.645721251
97.36 0.04 98.81 0.00 96.41 0.03 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 91.60 0.27 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2187585903
97.40 0.04 98.82 0.02 96.41 0.00 100.00 0.00 96.79 0.00 98.30 0.04 99.61 0.00 91.82 0.22 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.4090026306
97.43 0.03 98.82 0.00 96.44 0.03 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 92.04 0.22 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1386174858
97.46 0.03 98.82 0.00 96.44 0.00 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 92.26 0.22 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1194831676
97.49 0.03 98.82 0.00 96.64 0.20 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 92.26 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2751597547
97.51 0.02 98.82 0.00 96.64 0.00 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 92.42 0.16 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.1646827972
97.54 0.02 98.82 0.00 96.64 0.00 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 92.58 0.16 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.82765193
97.55 0.02 98.82 0.00 96.64 0.00 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 92.69 0.11 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1699124624
97.57 0.02 98.82 0.00 96.64 0.00 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 92.80 0.11 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.204970072
97.58 0.02 98.82 0.00 96.64 0.00 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 92.91 0.11 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3174100626
97.60 0.02 98.82 0.00 96.64 0.00 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 93.02 0.11 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.504858630
97.61 0.02 98.82 0.00 96.64 0.00 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 93.13 0.11 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.772716656
97.63 0.02 98.82 0.00 96.64 0.00 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 93.24 0.11 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2396801148
97.65 0.02 98.82 0.00 96.64 0.00 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 93.35 0.11 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3847381128
97.66 0.01 98.84 0.02 96.69 0.05 100.00 0.00 96.79 0.00 98.30 0.00 99.61 0.00 93.35 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.730816463
97.66 0.01 98.86 0.02 96.69 0.00 100.00 0.00 96.79 0.00 98.34 0.04 99.61 0.00 93.35 0.00 /workspace/coverage/default/28.sysrst_ctrl_stress_all.4206750597
97.67 0.01 98.86 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.34 0.00 99.61 0.00 93.40 0.05 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1240196760
97.68 0.01 98.86 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.34 0.00 99.61 0.00 93.46 0.05 /workspace/coverage/default/3.sysrst_ctrl_stress_all.251956033
97.69 0.01 98.86 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.34 0.00 99.61 0.00 93.51 0.05 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.783003832
97.69 0.01 98.86 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.34 0.00 99.61 0.00 93.57 0.05 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1650242675
97.70 0.01 98.86 0.00 96.71 0.03 100.00 0.00 96.79 0.00 98.34 0.00 99.61 0.00 93.57 0.00 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2655099326
97.70 0.01 98.86 0.00 96.74 0.03 100.00 0.00 96.79 0.00 98.34 0.00 99.61 0.00 93.57 0.00 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2870673663


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.1690481856
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1714008458
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2990429489
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.724129898
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1470195836
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3658478555
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.199134488
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2876510068
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3388507032
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3067804298
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.660956096
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1130085047
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.4194883464
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.20654996
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.717411943
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.4045072797
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1376255209
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2903649884
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.973431325
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2801855606
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.382796110
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1501168520
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2962102064
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2659507048
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3708142213
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2547678226
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.3492293087
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1971787826
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3087355980
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2403897974
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2220294752
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.713661713
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3271853204
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1176049063
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.494182365
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2212872046
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.3285130988
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.4018087014
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2398765479
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.7957742
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1242618535
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1130879987
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2013842824
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1714737807
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2241849992
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1711567904
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3201798115
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2105419405
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.4203423014
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.94288606
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3942073305
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.846915925
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.4040063328
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.1182441181
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.2656030027
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.1654135359
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1500211901
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2902674386
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2385787754
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3303295525
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.2212673903
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.1414337434
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.105126767
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.53515305
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.3330419127
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.1611751641
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.198223419
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.1761063177
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.278043194
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.305215631
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.1241688414
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2888567018
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.1927820081
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.749154710
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2376170725
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.2060123857
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2028532036
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.837407867
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.3760964640
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.933481161
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.3650915613
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.777247454
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.413527260
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.1546770782
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.3905924112
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.1890762686
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.1882903098
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.823464750
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.19407918
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.2522019558
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.1155819269
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.120654591
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.1027373945
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.4116541612
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.2406357244
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.2525003284
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.965445680
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.386698964
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.1243837230
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.2696751389
/workspace/coverage/cover_reg_top/30.sysrst_ctrl_intr_test.3252950851
/workspace/coverage/cover_reg_top/31.sysrst_ctrl_intr_test.3638030016
/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.1827413487
/workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.3769919366
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/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2439295141
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2596448417
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.675640785
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3679836683
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1083914021
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1554148665
/workspace/coverage/default/43.sysrst_ctrl_smoke.551344554
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2756325178
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1280835906
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.4155431435
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1505891765
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1091823988
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3854644332
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3106454654
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2739134758
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3395142274
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.930775785
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1906314040
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1791791765
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1745257850
/workspace/coverage/default/44.sysrst_ctrl_smoke.3409498632
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3211529538
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3050961739
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3909770231
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1302461033
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1696359580
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1905678802
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3171278000
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.801547829
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.4241602087
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2050416927
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.538228089
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.342199040
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3346352257
/workspace/coverage/default/45.sysrst_ctrl_smoke.3847351501
/workspace/coverage/default/45.sysrst_ctrl_stress_all.366728128
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.201606963
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3184510660
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.910886733
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3697532972
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2744181321
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.97871376
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.620448047
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3932137917
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.943461600
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.349161640
/workspace/coverage/default/46.sysrst_ctrl_smoke.1005059255
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3625224276
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.4019533073
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1328818996
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1524239944
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1152576535
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2626731125
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1470723757
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1426416614
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1141552691
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.4048085919
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.301546325
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2918849168
/workspace/coverage/default/47.sysrst_ctrl_smoke.2519854817
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3267556110
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2636340935
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2100457519
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1864051375
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3345861843
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1530115265
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2681505602
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2054468429
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.70269828
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2987271077
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1083915373
/workspace/coverage/default/48.sysrst_ctrl_smoke.3206646917
/workspace/coverage/default/48.sysrst_ctrl_stress_all.4073353287
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.777786560
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.288036734
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3112870624
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.968273026
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1154459983
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2926628686
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.4197087342
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1114996328
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3298082299
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2069583724
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.971034663
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3569861902
/workspace/coverage/default/49.sysrst_ctrl_smoke.2191808569
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1694115164
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3016198473
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3297102312
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2907034789
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3163190532
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2721097774
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3999075354
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2940251595
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.4165551236
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3728206098
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3814491816
/workspace/coverage/default/5.sysrst_ctrl_smoke.313930534
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2406180126
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1474793579
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.500795559
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.4026363425
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.538537194
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3933037511
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2341559077
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1430472309
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.4017378092
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.4235014131
/workspace/coverage/default/6.sysrst_ctrl_alert_test.4289050311
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2198041489
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2665021482
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.264841493
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3849859177
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.1724271838
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3092442258
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.757652471
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1934334580
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2524891773
/workspace/coverage/default/6.sysrst_ctrl_smoke.659268427
/workspace/coverage/default/6.sysrst_ctrl_stress_all.7044248
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.4281464432
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.980638272
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1789565242
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1064610525
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.151971882
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3415294733
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2868505845
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1759027352
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.188820638
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2577153204
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2837112406
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.157333139
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.254783228
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3843249035
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1471043219
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1399529398
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2852164102
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1898231654
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1048372210
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2812690102
/workspace/coverage/default/7.sysrst_ctrl_smoke.2117621887
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2791331278
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1330896205
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2474415844
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1272249426
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2456059288
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1488538724
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2604932073
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3501818579
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3266301814
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2898973379
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2238742080
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.485961787
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1426778973
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2462837023
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.4286241305
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3581822495
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1832654889
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4028421356
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3079403307
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.481665278
/workspace/coverage/default/8.sysrst_ctrl_smoke.2494297640
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3111755970
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3652646624
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1403027964
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.263019547
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3358800962
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3404457308
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2546698745
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.745939680
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3891594163
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.958883528
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1797886360
/workspace/coverage/default/9.sysrst_ctrl_alert_test.4011679089
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3634784025
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2630411905
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1532018693
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.990835496
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.4226210103
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.639411707
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.992669246
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1567996416
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.790666304
/workspace/coverage/default/9.sysrst_ctrl_smoke.3517855543
/workspace/coverage/default/9.sysrst_ctrl_stress_all.459339696
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2986038884
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1660259460
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1035119440
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2581165446
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2771691940




Total test records in report: 911
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.407612268 Aug 05 06:04:04 PM PDT 24 Aug 05 06:04:50 PM PDT 24 37010499481 ps
T5 /workspace/coverage/default/27.sysrst_ctrl_stress_all.1602217278 Aug 05 06:04:49 PM PDT 24 Aug 05 06:05:11 PM PDT 24 8228056889 ps
T6 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1022810114 Aug 05 06:04:22 PM PDT 24 Aug 05 06:04:25 PM PDT 24 2528626725 ps
T20 /workspace/coverage/default/45.sysrst_ctrl_smoke.3847351501 Aug 05 06:05:39 PM PDT 24 Aug 05 06:05:42 PM PDT 24 2125105106 ps
T21 /workspace/coverage/default/46.sysrst_ctrl_smoke.1005059255 Aug 05 06:05:39 PM PDT 24 Aug 05 06:05:44 PM PDT 24 2114180776 ps
T22 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.4014280997 Aug 05 06:05:16 PM PDT 24 Aug 05 06:05:19 PM PDT 24 2049475882 ps
T23 /workspace/coverage/default/40.sysrst_ctrl_alert_test.4105612430 Aug 05 06:05:31 PM PDT 24 Aug 05 06:05:33 PM PDT 24 2022672126 ps
T1 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3837208015 Aug 05 06:05:59 PM PDT 24 Aug 05 06:06:35 PM PDT 24 64274415886 ps
T14 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.623469426 Aug 05 06:04:03 PM PDT 24 Aug 05 06:04:06 PM PDT 24 2470612790 ps
T2 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.4172638188 Aug 05 06:05:29 PM PDT 24 Aug 05 06:05:37 PM PDT 24 3691633673 ps
T15 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.2411274743 Aug 05 06:03:56 PM PDT 24 Aug 05 06:04:53 PM PDT 24 22012607130 ps
T16 /workspace/coverage/default/42.sysrst_ctrl_alert_test.1771617135 Aug 05 06:05:34 PM PDT 24 Aug 05 06:05:37 PM PDT 24 2020577266 ps
T17 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1096490219 Aug 05 06:04:40 PM PDT 24 Aug 05 06:04:47 PM PDT 24 2475951130 ps
T18 /workspace/coverage/default/4.sysrst_ctrl_alert_test.1492644419 Aug 05 06:04:02 PM PDT 24 Aug 05 06:04:05 PM PDT 24 2039286217 ps
T3 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.4188116816 Aug 05 06:05:13 PM PDT 24 Aug 05 06:05:16 PM PDT 24 12480566765 ps
T7 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3667489012 Aug 05 06:03:56 PM PDT 24 Aug 05 06:05:48 PM PDT 24 41619157237 ps
T19 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1719666666 Aug 05 06:05:12 PM PDT 24 Aug 05 06:05:16 PM PDT 24 2469923483 ps
T8 /workspace/coverage/default/37.sysrst_ctrl_stress_all.843453552 Aug 05 06:05:22 PM PDT 24 Aug 05 06:05:25 PM PDT 24 9210508228 ps
T58 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2744181321 Aug 05 06:05:45 PM PDT 24 Aug 05 06:05:55 PM PDT 24 4076602545 ps
T9 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.1853902905 Aug 05 06:05:21 PM PDT 24 Aug 05 06:05:30 PM PDT 24 3917198093 ps
T10 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.2907034789 Aug 05 06:04:02 PM PDT 24 Aug 05 06:04:42 PM PDT 24 71539313791 ps
T11 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.931587136 Aug 05 06:04:28 PM PDT 24 Aug 05 06:06:28 PM PDT 24 47862253674 ps
T12 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1968638444 Aug 05 06:04:52 PM PDT 24 Aug 05 06:05:32 PM PDT 24 62094964347 ps
T63 /workspace/coverage/default/12.sysrst_ctrl_smoke.3130821361 Aug 05 06:04:15 PM PDT 24 Aug 05 06:04:17 PM PDT 24 2195250583 ps
T13 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.2596972182 Aug 05 06:04:59 PM PDT 24 Aug 05 06:05:03 PM PDT 24 3235923383 ps
T29 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1953168336 Aug 05 06:05:19 PM PDT 24 Aug 05 06:05:26 PM PDT 24 2611224175 ps
T47 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1386174858 Aug 05 06:04:38 PM PDT 24 Aug 05 06:05:35 PM PDT 24 21362702912 ps
T67 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.2821912085 Aug 05 06:05:29 PM PDT 24 Aug 05 06:05:32 PM PDT 24 2621309975 ps
T145 /workspace/coverage/default/4.sysrst_ctrl_smoke.3657026882 Aug 05 06:04:05 PM PDT 24 Aug 05 06:04:07 PM PDT 24 2124990132 ps
T35 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1409393204 Aug 05 06:03:57 PM PDT 24 Aug 05 06:04:01 PM PDT 24 2548957695 ps
T36 /workspace/coverage/default/28.sysrst_ctrl_stress_all.4206750597 Aug 05 06:05:01 PM PDT 24 Aug 05 06:05:51 PM PDT 24 82646369123 ps
T30 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1696359580 Aug 05 06:05:38 PM PDT 24 Aug 05 06:05:41 PM PDT 24 3495540794 ps
T51 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.1525732426 Aug 05 06:04:28 PM PDT 24 Aug 05 06:07:21 PM PDT 24 69552972517 ps
T68 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.1478447888 Aug 05 06:05:19 PM PDT 24 Aug 05 06:05:26 PM PDT 24 2513085669 ps
T172 /workspace/coverage/default/0.sysrst_ctrl_smoke.895958080 Aug 05 06:03:51 PM PDT 24 Aug 05 06:03:58 PM PDT 24 2114158735 ps
T173 /workspace/coverage/default/33.sysrst_ctrl_smoke.113126687 Aug 05 06:05:11 PM PDT 24 Aug 05 06:05:17 PM PDT 24 2111711427 ps
T69 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3163198390 Aug 05 06:05:07 PM PDT 24 Aug 05 06:05:10 PM PDT 24 2534846336 ps
T70 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2769984422 Aug 05 06:04:34 PM PDT 24 Aug 05 06:04:38 PM PDT 24 2621955021 ps
T28 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.130035872 Aug 05 06:04:57 PM PDT 24 Aug 05 06:04:59 PM PDT 24 2485721906 ps
T71 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.428096188 Aug 05 06:05:35 PM PDT 24 Aug 05 06:05:39 PM PDT 24 2618240791 ps
T52 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3611779383 Aug 05 06:05:17 PM PDT 24 Aug 05 06:05:24 PM PDT 24 23998085693 ps
T31 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3959711979 Aug 05 06:04:16 PM PDT 24 Aug 05 06:04:18 PM PDT 24 3588471015 ps
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T37 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2462837023 Aug 05 06:04:14 PM PDT 24 Aug 05 06:08:09 PM PDT 24 85871237417 ps
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T73 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.4235014131 Aug 05 06:05:56 PM PDT 24 Aug 05 06:07:24 PM PDT 24 33403827607 ps
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T74 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.261381550 Aug 05 06:04:16 PM PDT 24 Aug 05 06:06:53 PM PDT 24 116278954603 ps
T75 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.718403241 Aug 05 06:06:03 PM PDT 24 Aug 05 06:07:15 PM PDT 24 75306022962 ps
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T306 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.4065589723 Aug 05 06:04:52 PM PDT 24 Aug 05 06:04:57 PM PDT 24 2516979560 ps
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T401 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.801547829 Aug 05 06:05:48 PM PDT 24 Aug 05 06:05:51 PM PDT 24 3571478407 ps
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T48 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.4226210103 Aug 05 06:04:09 PM PDT 24 Aug 05 06:04:16 PM PDT 24 5339829083 ps
T39 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.254783228 Aug 05 06:04:13 PM PDT 24 Aug 05 06:06:15 PM PDT 24 45071033116 ps
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T196 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1035467616 Aug 05 06:04:22 PM PDT 24 Aug 05 06:04:29 PM PDT 24 2613204808 ps
T197 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1451847436 Aug 05 06:05:20 PM PDT 24 Aug 05 06:05:21 PM PDT 24 2092805215 ps
T198 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3310426182 Aug 05 06:04:28 PM PDT 24 Aug 05 06:04:32 PM PDT 24 4827403120 ps
T199 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.1871866776 Aug 05 06:04:51 PM PDT 24 Aug 05 06:04:58 PM PDT 24 2512208304 ps
T59 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1301439436 Aug 05 06:04:22 PM PDT 24 Aug 05 06:04:24 PM PDT 24 4873064951 ps
T91 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.538537194 Aug 05 06:06:02 PM PDT 24 Aug 05 06:12:23 PM PDT 24 144718464447 ps
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T119 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1488538724 Aug 05 06:05:58 PM PDT 24 Aug 05 06:07:05 PM PDT 24 103986805927 ps
T200 /workspace/coverage/default/21.sysrst_ctrl_smoke.4031223373 Aug 05 06:04:41 PM PDT 24 Aug 05 06:04:42 PM PDT 24 2218218450 ps
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T403 /workspace/coverage/default/14.sysrst_ctrl_smoke.2593985098 Aug 05 06:04:23 PM PDT 24 Aug 05 06:04:25 PM PDT 24 2132835449 ps
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T404 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.930775785 Aug 05 06:05:39 PM PDT 24 Aug 05 06:05:41 PM PDT 24 2628625560 ps
T287 /workspace/coverage/default/45.sysrst_ctrl_stress_all.366728128 Aug 05 06:05:38 PM PDT 24 Aug 05 06:05:50 PM PDT 24 8753823263 ps
T46 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.1260252201 Aug 05 06:04:51 PM PDT 24 Aug 05 06:04:54 PM PDT 24 3650523453 ps
T55 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1028166647 Aug 05 06:04:44 PM PDT 24 Aug 05 06:04:47 PM PDT 24 3309867388 ps
T405 /workspace/coverage/default/41.sysrst_ctrl_smoke.4252902958 Aug 05 06:05:26 PM PDT 24 Aug 05 06:05:28 PM PDT 24 2133375237 ps
T56 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.157333139 Aug 05 06:04:09 PM PDT 24 Aug 05 06:04:12 PM PDT 24 3327561786 ps
T60 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.142108679 Aug 05 06:04:10 PM PDT 24 Aug 05 06:04:12 PM PDT 24 7719160137 ps
T126 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2852164102 Aug 05 06:04:07 PM PDT 24 Aug 05 06:04:11 PM PDT 24 2614161442 ps
T127 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1745257850 Aug 05 06:05:40 PM PDT 24 Aug 05 06:05:44 PM PDT 24 2519159454 ps
T128 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1024869667 Aug 05 06:04:53 PM PDT 24 Aug 05 06:04:55 PM PDT 24 2140995227 ps
T42 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.730816463 Aug 05 06:03:57 PM PDT 24 Aug 05 06:05:21 PM PDT 24 31908347243 ps
T61 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1328818996 Aug 05 06:05:45 PM PDT 24 Aug 05 06:05:51 PM PDT 24 40575297307 ps
T129 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3266301814 Aug 05 06:05:58 PM PDT 24 Aug 05 06:07:01 PM PDT 24 24579960485 ps
T130 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1083914021 Aug 05 06:05:35 PM PDT 24 Aug 05 06:05:37 PM PDT 24 2270738653 ps
T131 /workspace/coverage/default/9.sysrst_ctrl_smoke.3517855543 Aug 05 06:04:08 PM PDT 24 Aug 05 06:04:12 PM PDT 24 2111382180 ps
T132 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1860168552 Aug 05 06:05:32 PM PDT 24 Aug 05 06:05:34 PM PDT 24 2527677549 ps
T184 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.3876120980 Aug 05 06:04:57 PM PDT 24 Aug 05 06:05:07 PM PDT 24 3716829280 ps
T261 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3358800962 Aug 05 06:05:59 PM PDT 24 Aug 05 06:07:06 PM PDT 24 25829770687 ps
T92 /workspace/coverage/default/23.sysrst_ctrl_stress_all.1018495743 Aug 05 06:04:43 PM PDT 24 Aug 05 06:05:31 PM PDT 24 78294694050 ps
T65 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.1673789241 Aug 05 06:04:22 PM PDT 24 Aug 05 06:04:30 PM PDT 24 2461337673 ps
T105 /workspace/coverage/default/47.sysrst_ctrl_smoke.2519854817 Aug 05 06:05:45 PM PDT 24 Aug 05 06:05:51 PM PDT 24 2113260101 ps
T62 /workspace/coverage/default/33.sysrst_ctrl_stress_all.1761644940 Aug 05 06:05:10 PM PDT 24 Aug 05 06:05:20 PM PDT 24 15195892332 ps
T93 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.3697532972 Aug 05 06:05:48 PM PDT 24 Aug 05 06:07:25 PM PDT 24 39431738533 ps
T49 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2049691274 Aug 05 06:04:13 PM PDT 24 Aug 05 06:06:58 PM PDT 24 64882381481 ps
T57 /workspace/coverage/default/17.sysrst_ctrl_stress_all.4196130867 Aug 05 06:04:40 PM PDT 24 Aug 05 06:05:24 PM PDT 24 16212896246 ps
T106 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.1246001747 Aug 05 06:05:22 PM PDT 24 Aug 05 06:09:54 PM PDT 24 126634535279 ps
T66 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.2951280162 Aug 05 06:05:14 PM PDT 24 Aug 05 06:05:38 PM PDT 24 37918489582 ps
T107 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.3514198396 Aug 05 06:05:14 PM PDT 24 Aug 05 06:06:48 PM PDT 24 45702842847 ps
T262 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.263019547 Aug 05 06:05:58 PM PDT 24 Aug 05 06:06:56 PM PDT 24 26831464056 ps
T89 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2332248003 Aug 05 06:05:20 PM PDT 24 Aug 05 06:05:23 PM PDT 24 3231387972 ps
T43 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.3686641698 Aug 05 06:05:14 PM PDT 24 Aug 05 06:06:12 PM PDT 24 571699193116 ps
T152 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3092442258 Aug 05 06:04:10 PM PDT 24 Aug 05 06:04:12 PM PDT 24 2649515884 ps
T153 /workspace/coverage/default/21.sysrst_ctrl_alert_test.2198735846 Aug 05 06:04:52 PM PDT 24 Aug 05 06:04:55 PM PDT 24 2019986551 ps
T154 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1660230462 Aug 05 06:04:23 PM PDT 24 Aug 05 06:04:25 PM PDT 24 2487751054 ps
T94 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.343941029 Aug 05 06:04:23 PM PDT 24 Aug 05 06:07:52 PM PDT 24 186440600605 ps
T155 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.3787424981 Aug 05 06:05:29 PM PDT 24 Aug 05 06:05:36 PM PDT 24 2475174146 ps
T44 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2478876681 Aug 05 06:05:56 PM PDT 24 Aug 05 06:06:42 PM PDT 24 75518267165 ps
T156 /workspace/coverage/default/35.sysrst_ctrl_alert_test.458425668 Aug 05 06:05:16 PM PDT 24 Aug 05 06:05:21 PM PDT 24 2010892562 ps
T157 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.481665278 Aug 05 06:04:07 PM PDT 24 Aug 05 06:04:09 PM PDT 24 2521282856 ps
T158 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3000965440 Aug 05 06:04:14 PM PDT 24 Aug 05 06:07:17 PM PDT 24 73740770109 ps
T116 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3082656564 Aug 05 06:05:40 PM PDT 24 Aug 05 06:05:43 PM PDT 24 3881307182 ps
T243 /workspace/coverage/default/36.sysrst_ctrl_smoke.972445597 Aug 05 06:05:16 PM PDT 24 Aug 05 06:05:19 PM PDT 24 2120526027 ps
T244 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.3312900297 Aug 05 06:04:25 PM PDT 24 Aug 05 06:04:36 PM PDT 24 3971961965 ps
T245 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3947621653 Aug 05 06:06:03 PM PDT 24 Aug 05 06:11:03 PM PDT 24 120152942770 ps
T246 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.1135535644 Aug 05 06:03:50 PM PDT 24 Aug 05 06:03:52 PM PDT 24 2572267836 ps
T142 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.3711663524 Aug 05 06:04:17 PM PDT 24 Aug 05 06:04:21 PM PDT 24 4029141763 ps
T120 /workspace/coverage/default/21.sysrst_ctrl_stress_all.11788379 Aug 05 06:04:38 PM PDT 24 Aug 05 06:08:17 PM PDT 24 90907107855 ps
T272 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3843249035 Aug 05 06:04:08 PM PDT 24 Aug 05 06:04:33 PM PDT 24 39182861479 ps
T121 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.434670869 Aug 05 06:04:47 PM PDT 24 Aug 05 06:04:54 PM PDT 24 5498241729 ps
T314 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1791791765 Aug 05 06:05:35 PM PDT 24 Aug 05 06:05:36 PM PDT 24 2234084183 ps
T315 /workspace/coverage/default/41.sysrst_ctrl_alert_test.3939454368 Aug 05 06:05:32 PM PDT 24 Aug 05 06:05:38 PM PDT 24 2009341710 ps
T316 /workspace/coverage/default/29.sysrst_ctrl_alert_test.446608154 Aug 05 06:05:01 PM PDT 24 Aug 05 06:05:03 PM PDT 24 2041284110 ps
T317 /workspace/coverage/default/5.sysrst_ctrl_smoke.313930534 Aug 05 06:04:03 PM PDT 24 Aug 05 06:04:06 PM PDT 24 2133910738 ps
T318 /workspace/coverage/default/9.sysrst_ctrl_alert_test.4011679089 Aug 05 06:04:09 PM PDT 24 Aug 05 06:04:12 PM PDT 24 2021067865 ps
T308 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.1915953278 Aug 05 06:04:45 PM PDT 24 Aug 05 06:04:52 PM PDT 24 2508854678 ps
T319 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.1856934979 Aug 05 06:05:15 PM PDT 24 Aug 05 06:05:28 PM PDT 24 5307325979 ps
T406 /workspace/coverage/default/13.sysrst_ctrl_alert_test.1835927703 Aug 05 06:04:25 PM PDT 24 Aug 05 06:04:31 PM PDT 24 2014674432 ps
T269 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.4090026306 Aug 05 06:04:25 PM PDT 24 Aug 05 06:05:34 PM PDT 24 121329629857 ps
T407 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.2348281561 Aug 05 06:04:27 PM PDT 24 Aug 05 06:04:29 PM PDT 24 4401823883 ps
T408 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2198041489 Aug 05 06:04:04 PM PDT 24 Aug 05 06:04:07 PM PDT 24 3739737968 ps
T409 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2129432144 Aug 05 06:04:31 PM PDT 24 Aug 05 06:04:33 PM PDT 24 6820414539 ps
T410 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.470616855 Aug 05 06:04:03 PM PDT 24 Aug 05 06:04:05 PM PDT 24 2168398450 ps
T411 /workspace/coverage/default/26.sysrst_ctrl_alert_test.4185153877 Aug 05 06:04:55 PM PDT 24 Aug 05 06:04:57 PM PDT 24 2042737944 ps
T213 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.4019533073 Aug 05 06:05:45 PM PDT 24 Aug 05 06:06:44 PM PDT 24 22657527393 ps
T412 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.4289885592 Aug 05 06:04:17 PM PDT 24 Aug 05 06:04:22 PM PDT 24 4013324909 ps
T117 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2462697796 Aug 05 06:04:51 PM PDT 24 Aug 05 06:04:56 PM PDT 24 3470858827 ps
T413 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.868824033 Aug 05 06:05:17 PM PDT 24 Aug 05 06:05:21 PM PDT 24 2453651373 ps
T414 /workspace/coverage/default/42.sysrst_ctrl_smoke.1985171062 Aug 05 06:05:34 PM PDT 24 Aug 05 06:05:36 PM PDT 24 2156243599 ps
T415 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2149882948 Aug 05 06:04:48 PM PDT 24 Aug 05 06:05:00 PM PDT 24 4883122617 ps
T310 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2636340935 Aug 05 06:05:52 PM PDT 24 Aug 05 06:05:53 PM PDT 24 3088270554 ps
T118 /workspace/coverage/default/9.sysrst_ctrl_stress_all.459339696 Aug 05 06:04:12 PM PDT 24 Aug 05 06:04:32 PM PDT 24 17051326512 ps
T416 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2812690102 Aug 05 06:04:04 PM PDT 24 Aug 05 06:04:11 PM PDT 24 2511352647 ps
T417 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.70269828 Aug 05 06:05:59 PM PDT 24 Aug 05 06:06:01 PM PDT 24 2550927389 ps
T418 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2315793065 Aug 05 06:05:13 PM PDT 24 Aug 05 06:05:20 PM PDT 24 2609844650 ps
T419 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3806416969 Aug 05 06:04:51 PM PDT 24 Aug 05 06:04:57 PM PDT 24 2157189193 ps
T420 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3666752520 Aug 05 06:05:28 PM PDT 24 Aug 05 06:05:31 PM PDT 24 3334659821 ps
T297 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3978832907 Aug 05 06:03:57 PM PDT 24 Aug 05 06:04:27 PM PDT 24 12138863510 ps
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T298 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.2199589937 Aug 05 06:04:07 PM PDT 24 Aug 05 06:06:27 PM PDT 24 57060317402 ps
T322 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3184756150 Aug 05 06:05:35 PM PDT 24 Aug 05 06:05:37 PM PDT 24 2185544582 ps
T323 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2868505845 Aug 05 06:05:56 PM PDT 24 Aug 05 06:08:12 PM PDT 24 53186519723 ps
T299 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1050835339 Aug 05 06:05:17 PM PDT 24 Aug 05 06:10:59 PM PDT 24 526848243050 ps
T324 /workspace/coverage/default/31.sysrst_ctrl_smoke.2155664196 Aug 05 06:05:14 PM PDT 24 Aug 05 06:05:16 PM PDT 24 2130652056 ps
T325 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.2760597961 Aug 05 06:03:56 PM PDT 24 Aug 05 06:04:00 PM PDT 24 2518967427 ps
T268 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.446531904 Aug 05 06:05:16 PM PDT 24 Aug 05 06:06:34 PM PDT 24 60500729036 ps
T326 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.1913171831 Aug 05 06:05:19 PM PDT 24 Aug 05 06:05:21 PM PDT 24 2989279138 ps
T421 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.1820344977 Aug 05 06:04:44 PM PDT 24 Aug 05 06:04:58 PM PDT 24 4988915412 ps
T379 /workspace/coverage/default/46.sysrst_ctrl_stress_all.3625224276 Aug 05 06:05:45 PM PDT 24 Aug 05 06:06:43 PM PDT 24 146571682365 ps
T422 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1473160128 Aug 05 06:04:14 PM PDT 24 Aug 05 06:04:23 PM PDT 24 3129738774 ps
T423 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.1911071420 Aug 05 06:05:23 PM PDT 24 Aug 05 06:05:30 PM PDT 24 2508554339 ps
T349 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.168892418 Aug 05 06:05:28 PM PDT 24 Aug 05 06:07:42 PM PDT 24 109000832196 ps
T424 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2987271077 Aug 05 06:05:51 PM PDT 24 Aug 05 06:05:54 PM PDT 24 2130745017 ps
T425 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2453663602 Aug 05 06:03:55 PM PDT 24 Aug 05 06:03:59 PM PDT 24 2471578684 ps
T85 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.1949211484 Aug 05 06:04:54 PM PDT 24 Aug 05 06:10:28 PM PDT 24 1854053517242 ps
T426 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1999663893 Aug 05 06:05:23 PM PDT 24 Aug 05 06:05:29 PM PDT 24 2151895623 ps
T427 /workspace/coverage/default/48.sysrst_ctrl_stress_all.4073353287 Aug 05 06:05:59 PM PDT 24 Aug 05 06:06:13 PM PDT 24 9894970416 ps
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T186 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1864051375 Aug 05 06:05:59 PM PDT 24 Aug 05 06:06:10 PM PDT 24 3708314274 ps
T187 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.1432539899 Aug 05 06:04:48 PM PDT 24 Aug 05 06:04:52 PM PDT 24 2516501819 ps
T188 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.344445590 Aug 05 06:04:26 PM PDT 24 Aug 05 06:05:07 PM PDT 24 61223985493 ps
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T192 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3566007835 Aug 05 06:04:51 PM PDT 24 Aug 05 06:04:53 PM PDT 24 6667429942 ps
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T374 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2577153204 Aug 05 06:05:56 PM PDT 24 Aug 05 06:07:07 PM PDT 24 105831263945 ps
T454 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.1022153977 Aug 05 06:04:39 PM PDT 24 Aug 05 06:04:43 PM PDT 24 2945479471 ps
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T455 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2107127646 Aug 05 06:03:56 PM PDT 24 Aug 05 06:03:58 PM PDT 24 2124334119 ps
T456 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2860161070 Aug 05 06:04:01 PM PDT 24 Aug 05 06:04:08 PM PDT 24 2607735199 ps
T457 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.2803749050 Aug 05 06:04:04 PM PDT 24 Aug 05 06:04:07 PM PDT 24 2820203709 ps
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