Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.88 99.18 96.86 100.00 96.79 98.60 99.33 87.43


Total tests in report: 920
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
59.42 59.42 78.71 78.71 67.80 67.80 90.98 90.98 17.31 17.31 79.15 79.15 67.82 67.82 14.20 14.20 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2674120307
70.67 11.25 84.90 6.20 73.89 6.09 90.98 0.00 64.74 47.44 84.66 5.51 80.44 12.62 15.08 0.87 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.3183655517
77.09 6.42 90.13 5.22 81.70 7.81 92.81 1.83 67.95 3.21 89.83 5.18 87.19 6.74 30.03 14.96 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.901201190
80.76 3.67 92.78 2.65 84.81 3.11 94.18 1.37 76.28 8.33 91.98 2.14 92.49 5.30 32.83 2.79 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.252550005
84.25 3.49 96.32 3.55 90.80 5.99 94.86 0.68 76.92 0.64 96.30 4.33 94.22 1.73 40.34 7.51 /workspace/coverage/default/2.sysrst_ctrl_stress_all.3121475956
86.40 2.15 97.11 0.78 91.63 0.83 94.86 0.00 80.77 3.85 96.82 0.52 95.76 1.54 47.85 7.51 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1070047359
87.86 1.46 97.18 0.07 92.90 1.26 95.55 0.68 80.77 0.00 96.93 0.11 95.95 0.19 55.76 7.92 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.3078014921
89.32 1.46 97.70 0.52 93.10 0.20 95.55 0.00 89.74 8.97 97.45 0.52 95.95 0.00 55.76 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.703365228
90.16 0.84 97.78 0.07 93.35 0.25 95.55 0.00 89.74 0.00 97.49 0.04 96.24 0.29 61.00 5.24 /workspace/coverage/default/25.sysrst_ctrl_stress_all.3995878319
90.98 0.82 97.78 0.00 93.38 0.03 95.55 0.00 89.74 0.00 97.49 0.00 96.24 0.00 66.71 5.70 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.3957775641
91.74 0.76 98.10 0.32 93.76 0.38 97.49 1.94 89.74 0.00 97.63 0.15 96.53 0.29 68.92 2.21 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1586725260
92.23 0.49 98.21 0.11 93.91 0.15 97.72 0.23 89.74 0.00 97.67 0.04 96.53 0.00 71.83 2.91 /workspace/coverage/default/5.sysrst_ctrl_stress_all.2482585725
92.63 0.40 98.34 0.13 94.19 0.28 97.72 0.00 89.74 0.00 97.67 0.00 96.63 0.10 74.10 2.27 /workspace/coverage/default/21.sysrst_ctrl_stress_all.655461099
93.01 0.38 98.41 0.07 94.57 0.38 97.72 0.00 90.38 0.64 97.82 0.15 97.21 0.58 74.97 0.87 /workspace/coverage/default/38.sysrst_ctrl_stress_all.3203813991
93.30 0.29 98.41 0.00 94.59 0.03 99.32 1.60 90.38 0.00 97.82 0.00 97.30 0.10 75.26 0.29 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.4048227817
93.53 0.23 98.47 0.06 94.64 0.05 99.32 0.00 91.67 1.28 97.89 0.07 97.40 0.10 75.32 0.06 /workspace/coverage/default/46.sysrst_ctrl_stress_all.127120386
93.74 0.21 98.58 0.11 94.67 0.03 99.32 0.00 91.67 0.00 97.93 0.04 97.40 0.00 76.60 1.28 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.2459146384
93.94 0.21 98.58 0.00 95.48 0.81 99.32 0.00 91.67 0.00 97.93 0.00 97.40 0.00 77.24 0.64 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2524832315
94.13 0.19 98.64 0.06 95.88 0.40 99.32 0.00 92.31 0.64 98.00 0.07 97.50 0.10 77.30 0.06 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2968257593
94.32 0.19 98.68 0.04 95.88 0.00 99.32 0.00 92.31 0.00 98.00 0.00 97.50 0.00 78.58 1.28 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.311095603
94.51 0.18 98.68 0.00 95.90 0.03 99.32 0.00 92.31 0.00 98.00 0.00 97.59 0.10 79.74 1.16 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.4013088330
94.67 0.16 98.73 0.06 96.06 0.15 99.32 0.00 92.95 0.64 98.08 0.07 97.78 0.19 79.74 0.00 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.3258511098
94.81 0.14 98.75 0.02 96.06 0.00 99.32 0.00 92.95 0.00 98.08 0.00 97.78 0.00 80.73 0.99 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.443095956
94.95 0.14 98.75 0.00 96.06 0.00 99.32 0.00 92.95 0.00 98.11 0.04 97.88 0.10 81.61 0.87 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1081954013
95.09 0.14 98.82 0.07 96.08 0.03 99.32 0.00 93.59 0.64 98.23 0.11 97.98 0.10 81.61 0.00 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3131838448
95.22 0.13 98.82 0.00 96.18 0.10 99.32 0.00 93.59 0.00 98.23 0.00 98.65 0.67 81.72 0.12 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_rw.3079718806
95.34 0.12 98.86 0.04 96.21 0.03 99.32 0.00 94.23 0.64 98.26 0.04 98.75 0.10 81.72 0.00 /workspace/coverage/default/10.sysrst_ctrl_stress_all.409427989
95.46 0.12 98.90 0.04 96.23 0.03 99.32 0.00 94.87 0.64 98.30 0.04 98.84 0.10 81.72 0.00 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.50072704
95.57 0.12 98.94 0.04 96.26 0.03 99.32 0.00 95.51 0.64 98.34 0.04 98.94 0.10 81.72 0.00 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.1022984207
95.69 0.12 98.97 0.04 96.28 0.03 99.32 0.00 96.15 0.64 98.37 0.04 99.04 0.10 81.72 0.00 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.1292278315
95.81 0.12 98.97 0.00 96.28 0.00 99.32 0.00 96.15 0.00 98.37 0.00 99.04 0.00 82.54 0.81 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3900970178
95.91 0.10 98.99 0.02 96.28 0.00 99.32 0.00 96.79 0.64 98.41 0.04 99.04 0.00 82.54 0.00 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.621794514
96.00 0.09 98.99 0.00 96.28 0.00 99.32 0.00 96.79 0.00 98.41 0.00 99.04 0.00 83.18 0.64 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2661813933
96.07 0.07 98.99 0.00 96.28 0.00 99.77 0.46 96.79 0.00 98.41 0.00 99.04 0.00 83.18 0.00 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1438041743
96.12 0.05 99.01 0.02 96.28 0.00 99.77 0.00 96.79 0.00 98.41 0.00 99.04 0.00 83.53 0.35 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1478431335
96.17 0.05 99.07 0.06 96.36 0.08 100.00 0.23 96.79 0.00 98.41 0.00 99.04 0.00 83.53 0.00 /workspace/coverage/default/18.sysrst_ctrl_alert_test.1203794829
96.22 0.05 99.10 0.04 96.51 0.15 100.00 0.00 96.79 0.00 98.48 0.07 99.13 0.10 83.53 0.00 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3509946920
96.27 0.05 99.10 0.00 96.51 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.13 0.00 83.88 0.35 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1851224329
96.32 0.05 99.10 0.00 96.54 0.03 100.00 0.00 96.79 0.00 98.48 0.00 99.13 0.00 84.17 0.29 /workspace/coverage/default/7.sysrst_ctrl_stress_all.2160026121
96.36 0.04 99.10 0.00 96.54 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.13 0.00 84.46 0.29 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3772529626
96.40 0.04 99.10 0.00 96.54 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.13 0.00 84.75 0.29 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.2121887746
96.43 0.03 99.10 0.00 96.54 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.13 0.00 84.98 0.23 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1399648460
96.47 0.03 99.10 0.00 96.76 0.23 100.00 0.00 96.79 0.00 98.48 0.00 99.13 0.00 84.98 0.00 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.907750624
96.50 0.03 99.12 0.02 96.81 0.05 100.00 0.00 96.79 0.00 98.52 0.04 99.23 0.10 84.98 0.00 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.3761770901
96.52 0.03 99.14 0.02 96.81 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.23 0.00 85.16 0.17 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.813717216
96.55 0.02 99.14 0.00 96.81 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.23 0.00 85.33 0.17 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1610846468
96.57 0.02 99.14 0.00 96.81 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.23 0.00 85.51 0.17 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.3596946374
96.60 0.02 99.14 0.00 96.81 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.23 0.00 85.68 0.17 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.419471192
96.62 0.02 99.14 0.00 96.81 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.23 0.00 85.86 0.17 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2165142811
96.65 0.02 99.14 0.00 96.81 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.23 0.00 86.03 0.17 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.974197720
96.67 0.02 99.14 0.00 96.81 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.23 0.00 86.20 0.17 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1711776680
96.69 0.02 99.14 0.00 96.84 0.03 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.10 86.20 0.00 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.3669458784
96.71 0.02 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 86.32 0.12 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3013041227
96.72 0.02 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 86.44 0.12 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1265355041
96.74 0.02 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 86.55 0.12 /workspace/coverage/default/0.sysrst_ctrl_stress_all.2459744936
96.76 0.02 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 86.67 0.12 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3387753742
96.77 0.02 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 86.79 0.12 /workspace/coverage/default/24.sysrst_ctrl_stress_all.2394823305
96.79 0.02 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 86.90 0.12 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.614439003
96.80 0.01 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 86.96 0.06 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.310775188
96.81 0.01 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 87.02 0.06 /workspace/coverage/default/15.sysrst_ctrl_stress_all.1607783220
96.81 0.01 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 87.08 0.06 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2742397892
96.82 0.01 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 87.14 0.06 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.4277371692
96.83 0.01 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 87.19 0.06 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2713207667
96.84 0.01 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 87.25 0.06 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2847585458
96.85 0.01 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 87.31 0.06 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1268793929
96.86 0.01 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 87.37 0.06 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.292953726
96.86 0.01 99.14 0.00 96.84 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.33 0.00 87.43 0.06 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3183746178
96.87 0.01 99.16 0.02 96.84 0.00 100.00 0.00 96.79 0.00 98.56 0.04 99.33 0.00 87.43 0.00 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.368032125
96.88 0.01 99.18 0.02 96.84 0.00 100.00 0.00 96.79 0.00 98.60 0.04 99.33 0.00 87.43 0.00 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.1633858295


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.1067887427
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.250417089
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.331941623
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1517743227
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3035149955
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.833623799
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3203059802
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.543343146
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2487026693
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3325870789
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3832765561
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.4259659266
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3653386749
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.4079408472
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1664407579
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3952606537
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3300168580
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2014435472
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3966263374
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3472975149
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.829534418
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.4106789427
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2003513142
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2568388496
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3808297867
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1948788035
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1137370726
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2950645541
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2824355584
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1983815213
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1019899842
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1421458298
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3758322071
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2445602539
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.454174529
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2657984866
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.758497111
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.4282006135
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.560348954
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.526083166
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2757073049
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1822512005
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2609894447
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1525612945
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2577277868
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.4108420790
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2764140662
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3927041099
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3478085267
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.406963554
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3153266687
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3530522740
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2701014195
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.4169309581
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.804965324
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1866464396
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3013447301
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.2567767911
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.1331376302
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.3961029857
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.10457068
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.1631525004
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1326974943
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.1880114186
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.745500624
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.247303868
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.1694344716
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.756748489
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.3176256346
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.4149508102
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.1918096938
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3112394482
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.3046143003
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.3247872361
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.85172669
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.2922780701
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.861430740
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.1005305393
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.227514340
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.419728041
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/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1268465041
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2357495252
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1018768303
/workspace/coverage/default/41.sysrst_ctrl_smoke.3770215656
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1668621211
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1903980489
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1569850285
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2367582282
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1370169808
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.313803241
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.890555886
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2388865302
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1767762504
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3770519850
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1199766839
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3389393073
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1145812914
/workspace/coverage/default/42.sysrst_ctrl_smoke.1291212508
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1429626404
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1568692672
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3983619676
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2454631493
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.870523726
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1995321551
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3014208991
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2963664875
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3819752461
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.347864522
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1112230087
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3273519381
/workspace/coverage/default/43.sysrst_ctrl_smoke.488554049
/workspace/coverage/default/43.sysrst_ctrl_stress_all.261117945
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1838839022
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.63715029
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3269316461
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3302514746
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1625778599
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2031497827
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3508277747
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.4068091976
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1036208055
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3629686944
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2650462933
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3132367019
/workspace/coverage/default/44.sysrst_ctrl_smoke.4255396557
/workspace/coverage/default/44.sysrst_ctrl_stress_all.4017956478
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.972016620
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.829398264
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3872740028
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1772410378
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2656393407
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2066953592
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1570667632
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2834869574
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2711669877
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3466343030
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3539628
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1524029981
/workspace/coverage/default/45.sysrst_ctrl_smoke.2518071621
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3466277464
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3551042975
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1100028812
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2956121364
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2528460153
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.88911316
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2440198106
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2628259593
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3393631304
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.199416060
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.148006454
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1756303089
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1039255925
/workspace/coverage/default/46.sysrst_ctrl_smoke.3180376952
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2485262157
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3788357667
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3670587923
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.147868052
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1446125244
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2231945527
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3773798224
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3506426247
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3585513592
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2444413115
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3641774650
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4238478588
/workspace/coverage/default/47.sysrst_ctrl_smoke.3151634306
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2345410539
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1268777458
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2183112388
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2375399821
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1510423350
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.848999110
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3048677335
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.692458743
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3253816285
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1892243846
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3143174366
/workspace/coverage/default/48.sysrst_ctrl_smoke.103317612
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1727221515
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2719665196
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4091391696
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3190631436
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2928726798
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.335040471
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2583107085
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1299074770
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1236597984
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.12894438
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.295332084
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1825999953
/workspace/coverage/default/49.sysrst_ctrl_smoke.916175399
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1664097662
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1426955907
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.136784141
/workspace/coverage/default/5.sysrst_ctrl_alert_test.4175470970
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2462805530
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2495700038
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2799250841
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2197440409
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3913176256
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3782469956
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2452455824
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1470996363
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1076957050
/workspace/coverage/default/5.sysrst_ctrl_smoke.3315645825
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2592885285
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.4263474508
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2931094348
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2966226928
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2850014031
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3165480941
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2836298372
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.4256678908
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3180615220
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.408900344
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1867126163
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2683680882
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.50940816
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2587667902
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.914568511
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1108912804
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1164275879
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3817797040
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3081842044
/workspace/coverage/default/6.sysrst_ctrl_smoke.104317914
/workspace/coverage/default/6.sysrst_ctrl_stress_all.545006682
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3241789776
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1091644705
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2714754823
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2879003986
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3654425645
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1336116450
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1525870717
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2610237786
/workspace/coverage/default/7.sysrst_ctrl_alert_test.682493360
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.27104144
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3334208190
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1682906190
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4289018790
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3287751818
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.381494906
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3294208242
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2837734122
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3680347290
/workspace/coverage/default/7.sysrst_ctrl_smoke.4289729780
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2712558952
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1512984681
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.4180242488
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3484424268
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2072861884
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3238548708
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3141395485
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1557956224
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2607421916
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1321007977
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3486811959
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3432819201
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2184826932
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2163291255
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2315333307
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3263286416
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3804680162
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1303985316
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3809179607
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.232811783
/workspace/coverage/default/8.sysrst_ctrl_smoke.930026435
/workspace/coverage/default/8.sysrst_ctrl_stress_all.744604175
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1231341163
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3918541921
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3238879461
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.450761452
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1130702797
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3186282012
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2926059550
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.720324593
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2335275551
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2167602460
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.902700813
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2683765871
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1961503998
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.915717678
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3601833910
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3378257106
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.184948751
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1429166725
/workspace/coverage/default/9.sysrst_ctrl_smoke.3271345584
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3205430099
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2599530591
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.222932817
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1221510555
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.46233002
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3410227283
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2309355304
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1398424361
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3094731685
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1289776174




Total test records in report: 920
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2315333307 Aug 12 04:37:17 PM PDT 24 Aug 12 04:37:21 PM PDT 24 2795790030 ps
T5 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2599530591 Aug 12 04:37:24 PM PDT 24 Aug 12 04:37:36 PM PDT 24 4316888954 ps
T6 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1586725260 Aug 12 04:38:32 PM PDT 24 Aug 12 04:38:39 PM PDT 24 2512868593 ps
T21 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3601833910 Aug 12 04:37:24 PM PDT 24 Aug 12 04:37:27 PM PDT 24 2634446845 ps
T1 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2674120307 Aug 12 04:37:47 PM PDT 24 Aug 12 04:48:02 PM PDT 24 231959167573 ps
T14 /workspace/coverage/default/16.sysrst_ctrl_smoke.500662013 Aug 12 04:37:47 PM PDT 24 Aug 12 04:37:51 PM PDT 24 2119617827 ps
T15 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3468292431 Aug 12 04:38:12 PM PDT 24 Aug 12 04:38:19 PM PDT 24 2507557139 ps
T2 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.3287751818 Aug 12 04:37:16 PM PDT 24 Aug 12 04:37:19 PM PDT 24 3368555357 ps
T16 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2197440409 Aug 12 04:37:07 PM PDT 24 Aug 12 04:37:15 PM PDT 24 5316792937 ps
T3 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.1665677088 Aug 12 04:38:50 PM PDT 24 Aug 12 04:38:53 PM PDT 24 4959285792 ps
T17 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3014208991 Aug 12 04:39:09 PM PDT 24 Aug 12 04:39:12 PM PDT 24 3338548698 ps
T18 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3186282012 Aug 12 04:39:37 PM PDT 24 Aug 12 04:40:08 PM PDT 24 21835810013 ps
T19 /workspace/coverage/default/47.sysrst_ctrl_smoke.3151634306 Aug 12 04:39:12 PM PDT 24 Aug 12 04:39:16 PM PDT 24 2117423721 ps
T20 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.718944160 Aug 12 04:37:59 PM PDT 24 Aug 12 04:38:03 PM PDT 24 2519001682 ps
T85 /workspace/coverage/default/49.sysrst_ctrl_smoke.916175399 Aug 12 04:39:22 PM PDT 24 Aug 12 04:39:23 PM PDT 24 2187810486 ps
T86 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3387670909 Aug 12 04:38:48 PM PDT 24 Aug 12 04:39:00 PM PDT 24 4551359574 ps
T87 /workspace/coverage/default/39.sysrst_ctrl_alert_test.2385792371 Aug 12 04:38:57 PM PDT 24 Aug 12 04:38:59 PM PDT 24 2029187676 ps
T175 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3736603415 Aug 12 04:38:56 PM PDT 24 Aug 12 04:38:58 PM PDT 24 2046332547 ps
T83 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1081954013 Aug 12 04:38:23 PM PDT 24 Aug 12 04:38:36 PM PDT 24 17778951974 ps
T28 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.4287270006 Aug 12 04:38:49 PM PDT 24 Aug 12 04:38:51 PM PDT 24 2488936582 ps
T79 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1825999953 Aug 12 04:39:23 PM PDT 24 Aug 12 04:39:24 PM PDT 24 2545451561 ps
T7 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.2762528814 Aug 12 04:36:59 PM PDT 24 Aug 12 04:39:01 PM PDT 24 195079187011 ps
T61 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3508277747 Aug 12 04:39:15 PM PDT 24 Aug 12 04:39:21 PM PDT 24 3033918766 ps
T80 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2206934820 Aug 12 04:36:59 PM PDT 24 Aug 12 04:37:03 PM PDT 24 2521971459 ps
T81 /workspace/coverage/default/18.sysrst_ctrl_smoke.1360476959 Aug 12 04:38:04 PM PDT 24 Aug 12 04:38:06 PM PDT 24 2136756361 ps
T82 /workspace/coverage/default/6.sysrst_ctrl_smoke.104317914 Aug 12 04:37:10 PM PDT 24 Aug 12 04:37:16 PM PDT 24 2112265409 ps
T45 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.1446125244 Aug 12 04:39:19 PM PDT 24 Aug 12 04:40:30 PM PDT 24 110962703730 ps
T8 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1070047359 Aug 12 04:38:46 PM PDT 24 Aug 12 04:40:08 PM PDT 24 137308484750 ps
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T276 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1772410378 Aug 12 04:39:14 PM PDT 24 Aug 12 04:39:19 PM PDT 24 3007995230 ps
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T191 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1992613783 Aug 12 04:38:14 PM PDT 24 Aug 12 04:38:17 PM PDT 24 3889096005 ps
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T319 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3692559324 Aug 12 04:37:47 PM PDT 24 Aug 12 04:37:55 PM PDT 24 2611324372 ps
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T334 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4091391696 Aug 12 04:39:21 PM PDT 24 Aug 12 04:39:27 PM PDT 24 5805099767 ps
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T459 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3081842044 Aug 12 04:37:10 PM PDT 24 Aug 12 04:37:17 PM PDT 24 2511783364 ps
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T148 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.146096583 Aug 12 04:36:52 PM PDT 24 Aug 12 04:36:54 PM PDT 24 3720733721 ps
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T304 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1525870717 Aug 12 04:39:36 PM PDT 24 Aug 12 04:40:02 PM PDT 24 41586943519 ps
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T462 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3228159839 Aug 12 04:38:07 PM PDT 24 Aug 12 04:38:15 PM PDT 24 2468170359 ps
T463 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1911840820 Aug 12 04:36:58 PM PDT 24 Aug 12 04:37:05 PM PDT 24 3445991850 ps
T183 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2661813933 Aug 12 04:38:55 PM PDT 24 Aug 12 04:43:23 PM PDT 24 628305539254 ps
T327 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3312847901 Aug 12 04:38:25 PM PDT 24 Aug 12 04:38:45 PM PDT 24 14075245806 ps
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