Total Coverage Summary 

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
96.88	99.18	96.86	100.00	96.79	98.60	99.33	87.43

Total tests in report: 920

---

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
59.42	59.42	78.71	78.71	67.80	67.80	90.98	90.98	17.31	17.31	79.15	79.15	67.82	67.82	14.20	14.20	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2674120307
70.67	11.25	84.90	6.20	73.89	6.09	90.98	0.00	64.74	47.44	84.66	5.51	80.44	12.62	15.08	0.87	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3183655517
77.09	6.42	90.13	5.22	81.70	7.81	92.81	1.83	67.95	3.21	89.83	5.18	87.19	6.74	30.03	14.96	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.901201190
80.76	3.67	92.78	2.65	84.81	3.11	94.18	1.37	76.28	8.33	91.98	2.14	92.49	5.30	32.83	2.79	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.252550005
84.25	3.49	96.32	3.55	90.80	5.99	94.86	0.68	76.92	0.64	96.30	4.33	94.22	1.73	40.34	7.51	/workspace/coverage/default/2.sysrst_ctrl_stress_all.3121475956
86.40	2.15	97.11	0.78	91.63	0.83	94.86	0.00	80.77	3.85	96.82	0.52	95.76	1.54	47.85	7.51	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1070047359
87.86	1.46	97.18	0.07	92.90	1.26	95.55	0.68	80.77	0.00	96.93	0.11	95.95	0.19	55.76	7.92	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.3078014921
89.32	1.46	97.70	0.52	93.10	0.20	95.55	0.00	89.74	8.97	97.45	0.52	95.95	0.00	55.76	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.703365228
90.16	0.84	97.78	0.07	93.35	0.25	95.55	0.00	89.74	0.00	97.49	0.04	96.24	0.29	61.00	5.24	/workspace/coverage/default/25.sysrst_ctrl_stress_all.3995878319
90.98	0.82	97.78	0.00	93.38	0.03	95.55	0.00	89.74	0.00	97.49	0.00	96.24	0.00	66.71	5.70	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.3957775641
91.74	0.76	98.10	0.32	93.76	0.38	97.49	1.94	89.74	0.00	97.63	0.15	96.53	0.29	68.92	2.21	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1586725260
92.23	0.49	98.21	0.11	93.91	0.15	97.72	0.23	89.74	0.00	97.67	0.04	96.53	0.00	71.83	2.91	/workspace/coverage/default/5.sysrst_ctrl_stress_all.2482585725
92.63	0.40	98.34	0.13	94.19	0.28	97.72	0.00	89.74	0.00	97.67	0.00	96.63	0.10	74.10	2.27	/workspace/coverage/default/21.sysrst_ctrl_stress_all.655461099
93.01	0.38	98.41	0.07	94.57	0.38	97.72	0.00	90.38	0.64	97.82	0.15	97.21	0.58	74.97	0.87	/workspace/coverage/default/38.sysrst_ctrl_stress_all.3203813991
93.30	0.29	98.41	0.00	94.59	0.03	99.32	1.60	90.38	0.00	97.82	0.00	97.30	0.10	75.26	0.29	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.4048227817
93.53	0.23	98.47	0.06	94.64	0.05	99.32	0.00	91.67	1.28	97.89	0.07	97.40	0.10	75.32	0.06	/workspace/coverage/default/46.sysrst_ctrl_stress_all.127120386
93.74	0.21	98.58	0.11	94.67	0.03	99.32	0.00	91.67	0.00	97.93	0.04	97.40	0.00	76.60	1.28	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.2459146384
93.94	0.21	98.58	0.00	95.48	0.81	99.32	0.00	91.67	0.00	97.93	0.00	97.40	0.00	77.24	0.64	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2524832315
94.13	0.19	98.64	0.06	95.88	0.40	99.32	0.00	92.31	0.64	98.00	0.07	97.50	0.10	77.30	0.06	/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2968257593
94.32	0.19	98.68	0.04	95.88	0.00	99.32	0.00	92.31	0.00	98.00	0.00	97.50	0.00	78.58	1.28	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.311095603
94.51	0.18	98.68	0.00	95.90	0.03	99.32	0.00	92.31	0.00	98.00	0.00	97.59	0.10	79.74	1.16	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.4013088330
94.67	0.16	98.73	0.06	96.06	0.15	99.32	0.00	92.95	0.64	98.08	0.07	97.78	0.19	79.74	0.00	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3258511098
94.81	0.14	98.75	0.02	96.06	0.00	99.32	0.00	92.95	0.00	98.08	0.00	97.78	0.00	80.73	0.99	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.443095956
94.95	0.14	98.75	0.00	96.06	0.00	99.32	0.00	92.95	0.00	98.11	0.04	97.88	0.10	81.61	0.87	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1081954013
95.09	0.14	98.82	0.07	96.08	0.03	99.32	0.00	93.59	0.64	98.23	0.11	97.98	0.10	81.61	0.00	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3131838448
95.22	0.13	98.82	0.00	96.18	0.10	99.32	0.00	93.59	0.00	98.23	0.00	98.65	0.67	81.72	0.12	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_rw.3079718806
95.34	0.12	98.86	0.04	96.21	0.03	99.32	0.00	94.23	0.64	98.26	0.04	98.75	0.10	81.72	0.00	/workspace/coverage/default/10.sysrst_ctrl_stress_all.409427989
95.46	0.12	98.90	0.04	96.23	0.03	99.32	0.00	94.87	0.64	98.30	0.04	98.84	0.10	81.72	0.00	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.50072704
95.57	0.12	98.94	0.04	96.26	0.03	99.32	0.00	95.51	0.64	98.34	0.04	98.94	0.10	81.72	0.00	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.1022984207
95.69	0.12	98.97	0.04	96.28	0.03	99.32	0.00	96.15	0.64	98.37	0.04	99.04	0.10	81.72	0.00	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1292278315
95.81	0.12	98.97	0.00	96.28	0.00	99.32	0.00	96.15	0.00	98.37	0.00	99.04	0.00	82.54	0.81	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3900970178
95.91	0.10	98.99	0.02	96.28	0.00	99.32	0.00	96.79	0.64	98.41	0.04	99.04	0.00	82.54	0.00	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.621794514
96.00	0.09	98.99	0.00	96.28	0.00	99.32	0.00	96.79	0.00	98.41	0.00	99.04	0.00	83.18	0.64	/workspace/coverage/default/39.sysrst_ctrl_stress_all.2661813933
96.07	0.07	98.99	0.00	96.28	0.00	99.77	0.46	96.79	0.00	98.41	0.00	99.04	0.00	83.18	0.00	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1438041743
96.12	0.05	99.01	0.02	96.28	0.00	99.77	0.00	96.79	0.00	98.41	0.00	99.04	0.00	83.53	0.35	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1478431335
96.17	0.05	99.07	0.06	96.36	0.08	100.00	0.23	96.79	0.00	98.41	0.00	99.04	0.00	83.53	0.00	/workspace/coverage/default/18.sysrst_ctrl_alert_test.1203794829
96.22	0.05	99.10	0.04	96.51	0.15	100.00	0.00	96.79	0.00	98.48	0.07	99.13	0.10	83.53	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3509946920
96.27	0.05	99.10	0.00	96.51	0.00	100.00	0.00	96.79	0.00	98.48	0.00	99.13	0.00	83.88	0.35	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1851224329
96.32	0.05	99.10	0.00	96.54	0.03	100.00	0.00	96.79	0.00	98.48	0.00	99.13	0.00	84.17	0.29	/workspace/coverage/default/7.sysrst_ctrl_stress_all.2160026121
96.36	0.04	99.10	0.00	96.54	0.00	100.00	0.00	96.79	0.00	98.48	0.00	99.13	0.00	84.46	0.29	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3772529626
96.40	0.04	99.10	0.00	96.54	0.00	100.00	0.00	96.79	0.00	98.48	0.00	99.13	0.00	84.75	0.29	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.2121887746
96.43	0.03	99.10	0.00	96.54	0.00	100.00	0.00	96.79	0.00	98.48	0.00	99.13	0.00	84.98	0.23	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1399648460
96.47	0.03	99.10	0.00	96.76	0.23	100.00	0.00	96.79	0.00	98.48	0.00	99.13	0.00	84.98	0.00	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.907750624
96.50	0.03	99.12	0.02	96.81	0.05	100.00	0.00	96.79	0.00	98.52	0.04	99.23	0.10	84.98	0.00	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.3761770901
96.52	0.03	99.14	0.02	96.81	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.23	0.00	85.16	0.17	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.813717216
96.55	0.02	99.14	0.00	96.81	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.23	0.00	85.33	0.17	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1610846468
96.57	0.02	99.14	0.00	96.81	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.23	0.00	85.51	0.17	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.3596946374
96.60	0.02	99.14	0.00	96.81	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.23	0.00	85.68	0.17	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.419471192
96.62	0.02	99.14	0.00	96.81	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.23	0.00	85.86	0.17	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2165142811
96.65	0.02	99.14	0.00	96.81	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.23	0.00	86.03	0.17	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.974197720
96.67	0.02	99.14	0.00	96.81	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.23	0.00	86.20	0.17	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1711776680
96.69	0.02	99.14	0.00	96.84	0.03	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.10	86.20	0.00	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.3669458784
96.71	0.02	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	86.32	0.12	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3013041227
96.72	0.02	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	86.44	0.12	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1265355041
96.74	0.02	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	86.55	0.12	/workspace/coverage/default/0.sysrst_ctrl_stress_all.2459744936
96.76	0.02	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	86.67	0.12	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3387753742
96.77	0.02	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	86.79	0.12	/workspace/coverage/default/24.sysrst_ctrl_stress_all.2394823305
96.79	0.02	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	86.90	0.12	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.614439003
96.80	0.01	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	86.96	0.06	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.310775188
96.81	0.01	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	87.02	0.06	/workspace/coverage/default/15.sysrst_ctrl_stress_all.1607783220
96.81	0.01	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	87.08	0.06	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2742397892
96.82	0.01	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	87.14	0.06	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.4277371692
96.83	0.01	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	87.19	0.06	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2713207667
96.84	0.01	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	87.25	0.06	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2847585458
96.85	0.01	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	87.31	0.06	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1268793929
96.86	0.01	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	87.37	0.06	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.292953726
96.86	0.01	99.14	0.00	96.84	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.33	0.00	87.43	0.06	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3183746178
96.87	0.01	99.16	0.02	96.84	0.00	100.00	0.00	96.79	0.00	98.56	0.04	99.33	0.00	87.43	0.00	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.368032125
96.88	0.01	99.18	0.02	96.84	0.00	100.00	0.00	96.79	0.00	98.60	0.04	99.33	0.00	87.43	0.00	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.1633858295

---

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.1067887427
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.250417089
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.331941623
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1517743227
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3035149955
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.833623799
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3203059802
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.543343146
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2487026693
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3325870789
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3832765561
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.4259659266
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3653386749
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.4079408472
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1664407579
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3952606537
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3300168580
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2014435472
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3966263374
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3472975149
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.829534418
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.4106789427
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2003513142
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2568388496
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3808297867
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1948788035
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1137370726
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2950645541
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2824355584
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1983815213
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1019899842
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1421458298
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3758322071
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2445602539
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.454174529
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2657984866
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.758497111
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.4282006135
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.560348954
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.526083166
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2757073049
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1822512005
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2609894447
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1525612945
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2577277868
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/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.109228511
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3736603415
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1189581500
/workspace/coverage/default/39.sysrst_ctrl_smoke.107465947
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2631514107
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3476096873
/workspace/coverage/default/4.sysrst_ctrl_alert_test.2579987416
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1304932523
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.4164070275
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1137722672
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3833174069
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.3493624714
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2795733304
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1135239376
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3030393994
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.930130163
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2307323220
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.1606724621
/workspace/coverage/default/4.sysrst_ctrl_smoke.1175762189
/workspace/coverage/default/4.sysrst_ctrl_stress_all.227206190
/workspace/coverage/default/40.sysrst_ctrl_alert_test.2422423116
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3009563758
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2662909098
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2121860242
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.2558395999
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2069384935
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.750785677
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2527121589
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.2480386189
/workspace/coverage/default/40.sysrst_ctrl_smoke.861396462
/workspace/coverage/default/40.sysrst_ctrl_stress_all.321394250
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.303041057
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.1691686323
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1654474431
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.4217639243
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3437946683
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3015122654
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.4052148325
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2615584510
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2283349631
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1268465041
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2357495252
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1018768303
/workspace/coverage/default/41.sysrst_ctrl_smoke.3770215656
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1668621211
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1903980489
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1569850285
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2367582282
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1370169808
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.313803241
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.890555886
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2388865302
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1767762504
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3770519850
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1199766839
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3389393073
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1145812914
/workspace/coverage/default/42.sysrst_ctrl_smoke.1291212508
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1429626404
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1568692672
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3983619676
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2454631493
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.870523726
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1995321551
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3014208991
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2963664875
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3819752461
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.347864522
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1112230087
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3273519381
/workspace/coverage/default/43.sysrst_ctrl_smoke.488554049
/workspace/coverage/default/43.sysrst_ctrl_stress_all.261117945
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1838839022
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.63715029
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3269316461
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3302514746
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1625778599
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2031497827
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3508277747
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.4068091976
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1036208055
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3629686944
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2650462933
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3132367019
/workspace/coverage/default/44.sysrst_ctrl_smoke.4255396557
/workspace/coverage/default/44.sysrst_ctrl_stress_all.4017956478
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.972016620
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.829398264
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3872740028
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1772410378
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2656393407
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2066953592
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1570667632
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2834869574
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2711669877
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3466343030
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3539628
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1524029981
/workspace/coverage/default/45.sysrst_ctrl_smoke.2518071621
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3466277464
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3551042975
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1100028812
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2956121364
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2528460153
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.88911316
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2440198106
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2628259593
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3393631304
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.199416060
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.148006454
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1756303089
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1039255925
/workspace/coverage/default/46.sysrst_ctrl_smoke.3180376952
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2485262157
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3788357667
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3670587923
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.147868052
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1446125244
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2231945527
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3773798224
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3506426247
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3585513592
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2444413115
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3641774650
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4238478588
/workspace/coverage/default/47.sysrst_ctrl_smoke.3151634306
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2345410539
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1268777458
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2183112388
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2375399821
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1510423350
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.848999110
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3048677335
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.692458743
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3253816285
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1892243846
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3143174366
/workspace/coverage/default/48.sysrst_ctrl_smoke.103317612
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1727221515
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2719665196
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4091391696
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3190631436
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2928726798
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.335040471
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2583107085
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1299074770
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1236597984
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.12894438
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.295332084
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1825999953
/workspace/coverage/default/49.sysrst_ctrl_smoke.916175399
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1664097662
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1426955907
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.136784141
/workspace/coverage/default/5.sysrst_ctrl_alert_test.4175470970
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2462805530
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2495700038
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2799250841
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2197440409
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3913176256
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3782469956
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2452455824
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1470996363
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1076957050
/workspace/coverage/default/5.sysrst_ctrl_smoke.3315645825
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2592885285
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.4263474508
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2931094348
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2966226928
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2850014031
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3165480941
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2836298372
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.4256678908
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3180615220
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.408900344
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1867126163
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2683680882
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.50940816
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2587667902
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.914568511
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1108912804
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1164275879
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3817797040
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3081842044
/workspace/coverage/default/6.sysrst_ctrl_smoke.104317914
/workspace/coverage/default/6.sysrst_ctrl_stress_all.545006682
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3241789776
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1091644705
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2714754823
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2879003986
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3654425645
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1336116450
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1525870717
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2610237786
/workspace/coverage/default/7.sysrst_ctrl_alert_test.682493360
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.27104144
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3334208190
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1682906190
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4289018790
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3287751818
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.381494906
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3294208242
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2837734122
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3680347290
/workspace/coverage/default/7.sysrst_ctrl_smoke.4289729780
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2712558952
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1512984681
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.4180242488
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3484424268
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2072861884
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3238548708
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3141395485
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1557956224
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2607421916
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1321007977
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3486811959
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3432819201
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2184826932
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2163291255
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2315333307
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3263286416
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3804680162
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1303985316
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3809179607
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.232811783
/workspace/coverage/default/8.sysrst_ctrl_smoke.930026435
/workspace/coverage/default/8.sysrst_ctrl_stress_all.744604175
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1231341163
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3918541921
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3238879461
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.450761452
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1130702797
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3186282012
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2926059550
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.720324593
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2335275551
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2167602460
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.902700813
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2683765871
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1961503998
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.915717678
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3601833910
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3378257106
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.184948751
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1429166725
/workspace/coverage/default/9.sysrst_ctrl_smoke.3271345584
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3205430099
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2599530591
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.222932817
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1221510555
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.46233002
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3410227283
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2309355304
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1398424361
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3094731685
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1289776174

---

Total test records in report: 920

---

tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

---

TEST NO	TEST LOCATION	TEST NAME	STATUS	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2315333307			Aug 12 04:37:17 PM PDT 24	Aug 12 04:37:21 PM PDT 24	2795790030 ps
T5	/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2599530591			Aug 12 04:37:24 PM PDT 24	Aug 12 04:37:36 PM PDT 24	4316888954 ps
T6	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1586725260			Aug 12 04:38:32 PM PDT 24	Aug 12 04:38:39 PM PDT 24	2512868593 ps
T21	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3601833910			Aug 12 04:37:24 PM PDT 24	Aug 12 04:37:27 PM PDT 24	2634446845 ps
T1	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2674120307			Aug 12 04:37:47 PM PDT 24	Aug 12 04:48:02 PM PDT 24	231959167573 ps
T14	/workspace/coverage/default/16.sysrst_ctrl_smoke.500662013			Aug 12 04:37:47 PM PDT 24	Aug 12 04:37:51 PM PDT 24	2119617827 ps
T15	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3468292431			Aug 12 04:38:12 PM PDT 24	Aug 12 04:38:19 PM PDT 24	2507557139 ps
T2	/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3287751818			Aug 12 04:37:16 PM PDT 24	Aug 12 04:37:19 PM PDT 24	3368555357 ps
T16	/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2197440409			Aug 12 04:37:07 PM PDT 24	Aug 12 04:37:15 PM PDT 24	5316792937 ps
T3	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.1665677088			Aug 12 04:38:50 PM PDT 24	Aug 12 04:38:53 PM PDT 24	4959285792 ps
T17	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3014208991			Aug 12 04:39:09 PM PDT 24	Aug 12 04:39:12 PM PDT 24	3338548698 ps
T18	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3186282012			Aug 12 04:39:37 PM PDT 24	Aug 12 04:40:08 PM PDT 24	21835810013 ps
T19	/workspace/coverage/default/47.sysrst_ctrl_smoke.3151634306			Aug 12 04:39:12 PM PDT 24	Aug 12 04:39:16 PM PDT 24	2117423721 ps
T20	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.718944160			Aug 12 04:37:59 PM PDT 24	Aug 12 04:38:03 PM PDT 24	2519001682 ps
T85	/workspace/coverage/default/49.sysrst_ctrl_smoke.916175399			Aug 12 04:39:22 PM PDT 24	Aug 12 04:39:23 PM PDT 24	2187810486 ps
T86	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3387670909			Aug 12 04:38:48 PM PDT 24	Aug 12 04:39:00 PM PDT 24	4551359574 ps
T87	/workspace/coverage/default/39.sysrst_ctrl_alert_test.2385792371			Aug 12 04:38:57 PM PDT 24	Aug 12 04:38:59 PM PDT 24	2029187676 ps
T175	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3736603415			Aug 12 04:38:56 PM PDT 24	Aug 12 04:38:58 PM PDT 24	2046332547 ps
T83	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1081954013			Aug 12 04:38:23 PM PDT 24	Aug 12 04:38:36 PM PDT 24	17778951974 ps
T28	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.4287270006			Aug 12 04:38:49 PM PDT 24	Aug 12 04:38:51 PM PDT 24	2488936582 ps
T79	/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1825999953			Aug 12 04:39:23 PM PDT 24	Aug 12 04:39:24 PM PDT 24	2545451561 ps
T7	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.2762528814			Aug 12 04:36:59 PM PDT 24	Aug 12 04:39:01 PM PDT 24	195079187011 ps
T61	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3508277747			Aug 12 04:39:15 PM PDT 24	Aug 12 04:39:21 PM PDT 24	3033918766 ps
T80	/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2206934820			Aug 12 04:36:59 PM PDT 24	Aug 12 04:37:03 PM PDT 24	2521971459 ps
T81	/workspace/coverage/default/18.sysrst_ctrl_smoke.1360476959			Aug 12 04:38:04 PM PDT 24	Aug 12 04:38:06 PM PDT 24	2136756361 ps
T82	/workspace/coverage/default/6.sysrst_ctrl_smoke.104317914			Aug 12 04:37:10 PM PDT 24	Aug 12 04:37:16 PM PDT 24	2112265409 ps
T45	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1446125244			Aug 12 04:39:19 PM PDT 24	Aug 12 04:40:30 PM PDT 24	110962703730 ps
T8	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1070047359			Aug 12 04:38:46 PM PDT 24	Aug 12 04:40:08 PM PDT 24	137308484750 ps
T32	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.2458181603			Aug 12 04:37:44 PM PDT 24	Aug 12 04:37:46 PM PDT 24	3522531822 ps
T47	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.4182393401			Aug 12 04:38:13 PM PDT 24	Aug 12 04:46:34 PM PDT 24	192228581626 ps
T33	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.901201190			Aug 12 04:37:06 PM PDT 24	Aug 12 04:37:21 PM PDT 24	20969952296 ps
T54	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1388688729			Aug 12 04:38:08 PM PDT 24	Aug 12 04:38:18 PM PDT 24	4114036664 ps
T55	/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.1381330812			Aug 12 04:37:32 PM PDT 24	Aug 12 04:37:37 PM PDT 24	2037844912 ps
T9	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.443095956			Aug 12 04:39:39 PM PDT 24	Aug 12 04:43:38 PM PDT 24	90210206019 ps
T56	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.4028761015			Aug 12 04:38:49 PM PDT 24	Aug 12 04:38:59 PM PDT 24	3818056925 ps
T10	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.252550005			Aug 12 04:38:16 PM PDT 24	Aug 12 04:39:52 PM PDT 24	1648851388433 ps
T57	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1570667632			Aug 12 04:39:14 PM PDT 24	Aug 12 04:39:15 PM PDT 24	2584757186 ps
T58	/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3143174366			Aug 12 04:39:20 PM PDT 24	Aug 12 04:39:28 PM PDT 24	2512726120 ps
T69	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2388865302			Aug 12 04:39:04 PM PDT 24	Aug 12 04:39:14 PM PDT 24	3568066952 ps
T70	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2248835230			Aug 12 04:38:02 PM PDT 24	Aug 12 04:38:10 PM PDT 24	2512150933 ps
T11	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2713207667			Aug 12 04:38:54 PM PDT 24	Aug 12 04:40:14 PM PDT 24	63683331603 ps
T12	/workspace/coverage/default/21.sysrst_ctrl_stress_all.655461099			Aug 12 04:37:58 PM PDT 24	Aug 12 04:38:37 PM PDT 24	92838369708 ps
T46	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3165480941			Aug 12 04:39:28 PM PDT 24	Aug 12 04:39:47 PM PDT 24	42850284025 ps
T71	/workspace/coverage/default/46.sysrst_ctrl_alert_test.2956121364			Aug 12 04:39:11 PM PDT 24	Aug 12 04:39:13 PM PDT 24	2037190887 ps
T13	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.2584084455			Aug 12 04:37:07 PM PDT 24	Aug 12 04:37:29 PM PDT 24	107615539423 ps
T48	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.1609540500			Aug 12 04:37:37 PM PDT 24	Aug 12 04:38:13 PM PDT 24	57721535557 ps
T29	/workspace/coverage/default/2.sysrst_ctrl_stress_all.3121475956			Aug 12 04:37:07 PM PDT 24	Aug 12 04:37:27 PM PDT 24	14652040428 ps
T142	/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3760286584			Aug 12 04:38:22 PM PDT 24	Aug 12 04:38:25 PM PDT 24	2708310797 ps
T38	/workspace/coverage/default/20.sysrst_ctrl_stress_all.3240165588			Aug 12 04:38:00 PM PDT 24	Aug 12 04:38:20 PM PDT 24	8187361919 ps
T37	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.2459146384			Aug 12 04:37:59 PM PDT 24	Aug 12 04:38:42 PM PDT 24	67052541027 ps
T39	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2615584510			Aug 12 04:39:02 PM PDT 24	Aug 12 04:39:15 PM PDT 24	5630843264 ps
T44	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2719665196			Aug 12 04:39:22 PM PDT 24	Aug 12 04:39:35 PM PDT 24	9841394333 ps
T49	/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2928726798			Aug 12 04:39:20 PM PDT 24	Aug 12 04:39:23 PM PDT 24	3461691805 ps
T50	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.4217639243			Aug 12 04:38:57 PM PDT 24	Aug 12 04:39:00 PM PDT 24	3695857010 ps
T51	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1304932523			Aug 12 04:37:07 PM PDT 24	Aug 12 04:37:12 PM PDT 24	3137213582 ps
T60	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.813717216			Aug 12 04:38:24 PM PDT 24	Aug 12 04:42:24 PM PDT 24	181786482519 ps
T106	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.312027693			Aug 12 04:37:57 PM PDT 24	Aug 12 04:38:10 PM PDT 24	15993568470 ps
T220	/workspace/coverage/default/42.sysrst_ctrl_smoke.1291212508			Aug 12 04:39:05 PM PDT 24	Aug 12 04:39:12 PM PDT 24	2110081082 ps
T323	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1231341163			Aug 12 04:37:27 PM PDT 24	Aug 12 04:37:33 PM PDT 24	4069390640 ps
T419	/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.4052148325			Aug 12 04:38:55 PM PDT 24	Aug 12 04:39:02 PM PDT 24	4659711273 ps
T40	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3551042975			Aug 12 04:39:14 PM PDT 24	Aug 12 04:39:22 PM PDT 24	11955449432 ps
T195	/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.1853289662			Aug 12 04:36:51 PM PDT 24	Aug 12 04:36:54 PM PDT 24	3467102904 ps
T52	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.1670846695			Aug 12 04:38:17 PM PDT 24	Aug 12 04:38:24 PM PDT 24	3877082690 ps
T196	/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3400877712			Aug 12 04:38:46 PM PDT 24	Aug 12 04:38:48 PM PDT 24	2534264677 ps
T197	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.689175800			Aug 12 04:36:57 PM PDT 24	Aug 12 04:37:00 PM PDT 24	2218538343 ps
T110	/workspace/coverage/default/19.sysrst_ctrl_alert_test.1298990702			Aug 12 04:38:03 PM PDT 24	Aug 12 04:38:05 PM PDT 24	2032330394 ps
T198	/workspace/coverage/default/4.sysrst_ctrl_alert_test.2579987416			Aug 12 04:37:05 PM PDT 24	Aug 12 04:37:09 PM PDT 24	2018121718 ps
T26	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1512984681			Aug 12 04:37:13 PM PDT 24	Aug 12 04:37:20 PM PDT 24	4115793917 ps
T199	/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.1993060800			Aug 12 04:38:22 PM PDT 24	Aug 12 04:38:29 PM PDT 24	2611119995 ps
T107	/workspace/coverage/default/27.sysrst_ctrl_stress_all.985947341			Aug 12 04:38:23 PM PDT 24	Aug 12 04:38:41 PM PDT 24	6449245578 ps
T420	/workspace/coverage/default/46.sysrst_ctrl_smoke.3180376952			Aug 12 04:39:11 PM PDT 24	Aug 12 04:39:17 PM PDT 24	2109511566 ps
T421	/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.163936951			Aug 12 04:37:46 PM PDT 24	Aug 12 04:37:48 PM PDT 24	2241902574 ps
T422	/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.405705759			Aug 12 04:38:04 PM PDT 24	Aug 12 04:38:07 PM PDT 24	2106938669 ps
T423	/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2957674683			Aug 12 04:36:57 PM PDT 24	Aug 12 04:37:05 PM PDT 24	2612619711 ps
T27	/workspace/coverage/default/43.sysrst_ctrl_stress_all.261117945			Aug 12 04:39:03 PM PDT 24	Aug 12 04:39:35 PM PDT 24	13633500617 ps
T424	/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1549464900			Aug 12 04:38:12 PM PDT 24	Aug 12 04:38:19 PM PDT 24	2612197153 ps
T62	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.550056544			Aug 12 04:38:27 PM PDT 24	Aug 12 04:38:30 PM PDT 24	7851229044 ps
T84	/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3192422946			Aug 12 04:38:30 PM PDT 24	Aug 12 04:38:39 PM PDT 24	16164769387 ps
T41	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.915717678			Aug 12 04:37:26 PM PDT 24	Aug 12 04:37:34 PM PDT 24	3179375988 ps
T203	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.850424734			Aug 12 04:36:59 PM PDT 24	Aug 12 04:37:05 PM PDT 24	3894925937 ps
T204	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.3536703733			Aug 12 04:37:28 PM PDT 24	Aug 12 04:37:29 PM PDT 24	2288734673 ps
T31	/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4238478588			Aug 12 04:39:15 PM PDT 24	Aug 12 04:39:22 PM PDT 24	2512791067 ps
T205	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2635653488			Aug 12 04:38:48 PM PDT 24	Aug 12 04:38:49 PM PDT 24	2268514574 ps
T206	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.2345977648			Aug 12 04:38:01 PM PDT 24	Aug 12 04:44:03 PM PDT 24	140018537581 ps
T53	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2712558952			Aug 12 04:37:14 PM PDT 24	Aug 12 04:37:26 PM PDT 24	17639768483 ps
T63	/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2968257593			Aug 12 04:38:24 PM PDT 24	Aug 12 04:38:26 PM PDT 24	5463181252 ps
T30	/workspace/coverage/default/7.sysrst_ctrl_stress_all.2160026121			Aug 12 04:37:15 PM PDT 24	Aug 12 04:37:43 PM PDT 24	43330949228 ps
T157	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2283349631			Aug 12 04:38:57 PM PDT 24	Aug 12 04:39:05 PM PDT 24	2611875525 ps
T158	/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3389393073			Aug 12 04:39:03 PM PDT 24	Aug 12 04:39:09 PM PDT 24	2152107218 ps
T159	/workspace/coverage/default/23.sysrst_ctrl_smoke.3334549811			Aug 12 04:38:03 PM PDT 24	Aug 12 04:38:05 PM PDT 24	2122712191 ps
T160	/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1684295244			Aug 12 04:37:45 PM PDT 24	Aug 12 04:37:46 PM PDT 24	2197953478 ps
T126	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.938063230			Aug 12 04:37:24 PM PDT 24	Aug 12 04:37:34 PM PDT 24	3134916134 ps
T161	/workspace/coverage/default/9.sysrst_ctrl_alert_test.2335275551			Aug 12 04:37:23 PM PDT 24	Aug 12 04:37:24 PM PDT 24	2056745735 ps
T162	/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1574586442			Aug 12 04:38:09 PM PDT 24	Aug 12 04:38:17 PM PDT 24	2612577677 ps
T72	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.750785677			Aug 12 04:38:57 PM PDT 24	Aug 12 04:39:00 PM PDT 24	2489737111 ps
T88	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1321007977			Aug 12 04:39:35 PM PDT 24	Aug 12 04:40:53 PM PDT 24	45047972534 ps
T73	/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2444413115			Aug 12 04:39:11 PM PDT 24	Aug 12 04:39:14 PM PDT 24	2489946399 ps
T74	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1610846468			Aug 12 04:37:41 PM PDT 24	Aug 12 04:37:48 PM PDT 24	13656073594 ps
T75	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.3957775641			Aug 12 04:37:37 PM PDT 24	Aug 12 04:37:49 PM PDT 24	16218922873 ps
T351	/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.1249553811			Aug 12 04:38:35 PM PDT 24	Aug 12 04:38:37 PM PDT 24	3854973056 ps
T89	/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2683765871			Aug 12 04:37:26 PM PDT 24	Aug 12 04:38:06 PM PDT 24	30834898543 ps
T352	/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.3124996082			Aug 12 04:38:23 PM PDT 24	Aug 12 04:38:25 PM PDT 24	2619538295 ps
T42	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.979242228			Aug 12 04:36:53 PM PDT 24	Aug 12 04:37:00 PM PDT 24	2722429032 ps
T76	/workspace/coverage/default/40.sysrst_ctrl_stress_all.321394250			Aug 12 04:38:55 PM PDT 24	Aug 12 04:39:15 PM PDT 24	13919998527 ps
T77	/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.3868030938			Aug 12 04:38:14 PM PDT 24	Aug 12 04:38:18 PM PDT 24	2457212576 ps
T116	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1688921307			Aug 12 04:38:04 PM PDT 24	Aug 12 04:38:33 PM PDT 24	78410019617 ps
T64	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3131838448			Aug 12 04:37:01 PM PDT 24	Aug 12 04:37:03 PM PDT 24	5135468617 ps
T143	/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.1702924707			Aug 12 04:38:02 PM PDT 24	Aug 12 04:38:04 PM PDT 24	3723647736 ps
T144	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.171225911			Aug 12 04:38:40 PM PDT 24	Aug 12 04:39:03 PM PDT 24	35496622526 ps
T127	/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2125820175			Aug 12 04:38:16 PM PDT 24	Aug 12 04:38:27 PM PDT 24	3459681595 ps
T145	/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2552550485			Aug 12 04:36:53 PM PDT 24	Aug 12 04:36:54 PM PDT 24	2672529757 ps
T128	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.4170988991			Aug 12 04:38:07 PM PDT 24	Aug 12 04:41:58 PM PDT 24	93139806203 ps
T146	/workspace/coverage/default/27.sysrst_ctrl_smoke.2313153708			Aug 12 04:38:14 PM PDT 24	Aug 12 04:38:20 PM PDT 24	2109247468 ps
T78	/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3378257106			Aug 12 04:37:23 PM PDT 24	Aug 12 04:37:27 PM PDT 24	2449985528 ps
T147	/workspace/coverage/default/35.sysrst_ctrl_alert_test.983604707			Aug 12 04:38:48 PM PDT 24	Aug 12 04:38:52 PM PDT 24	2019684170 ps
T154	/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1299074770			Aug 12 04:39:24 PM PDT 24	Aug 12 04:39:33 PM PDT 24	3178249191 ps
T324	/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1370169808			Aug 12 04:39:07 PM PDT 24	Aug 12 04:39:17 PM PDT 24	3269918728 ps
T425	/workspace/coverage/default/14.sysrst_ctrl_smoke.2569360213			Aug 12 04:37:36 PM PDT 24	Aug 12 04:37:39 PM PDT 24	2116139021 ps
T426	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.3782769153			Aug 12 04:38:10 PM PDT 24	Aug 12 04:38:13 PM PDT 24	3364147023 ps
T427	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1137722672			Aug 12 04:37:02 PM PDT 24	Aug 12 04:37:04 PM PDT 24	2440871256 ps
T428	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.692458743			Aug 12 04:39:22 PM PDT 24	Aug 12 04:39:29 PM PDT 24	2612114655 ps
T429	/workspace/coverage/default/45.sysrst_ctrl_alert_test.3872740028			Aug 12 04:39:12 PM PDT 24	Aug 12 04:39:16 PM PDT 24	2016772279 ps
T65	/workspace/coverage/default/34.sysrst_ctrl_stress_all.3047130464			Aug 12 04:38:47 PM PDT 24	Aug 12 04:38:55 PM PDT 24	14038632334 ps
T344	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1186481993			Aug 12 04:38:49 PM PDT 24	Aug 12 04:38:58 PM PDT 24	11776526144 ps
T345	/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3276181354			Aug 12 04:38:41 PM PDT 24	Aug 12 04:38:47 PM PDT 24	2471625341 ps
T346	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.55773047			Aug 12 04:38:02 PM PDT 24	Aug 12 04:38:07 PM PDT 24	2619610803 ps
T118	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2931094348			Aug 12 04:39:28 PM PDT 24	Aug 12 04:39:53 PM PDT 24	33989220574 ps
T129	/workspace/coverage/default/49.sysrst_ctrl_combo_detect.335040471			Aug 12 04:39:22 PM PDT 24	Aug 12 04:42:52 PM PDT 24	123589828019 ps
T347	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.3457467005			Aug 12 04:38:01 PM PDT 24	Aug 12 04:38:08 PM PDT 24	2450913241 ps
T348	/workspace/coverage/default/29.sysrst_ctrl_smoke.2791322872			Aug 12 04:38:21 PM PDT 24	Aug 12 04:38:27 PM PDT 24	2108933797 ps
T285	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2322487905			Aug 12 04:38:40 PM PDT 24	Aug 12 04:40:06 PM PDT 24	33380744877 ps
T349	/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2157589858			Aug 12 04:38:10 PM PDT 24	Aug 12 04:38:12 PM PDT 24	2102849521 ps
T350	/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.892692318			Aug 12 04:37:27 PM PDT 24	Aug 12 04:37:37 PM PDT 24	3463539381 ps
T43	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.1811558119			Aug 12 04:38:15 PM PDT 24	Aug 12 04:38:17 PM PDT 24	3418802116 ps
T271	/workspace/coverage/default/3.sysrst_ctrl_smoke.1063506539			Aug 12 04:36:59 PM PDT 24	Aug 12 04:37:03 PM PDT 24	2117502193 ps
T256	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.3815348139			Aug 12 04:38:23 PM PDT 24	Aug 12 04:38:27 PM PDT 24	4879503121 ps
T272	/workspace/coverage/default/40.sysrst_ctrl_smoke.861396462			Aug 12 04:38:56 PM PDT 24	Aug 12 04:39:02 PM PDT 24	2108355907 ps
T273	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.506711554			Aug 12 04:37:46 PM PDT 24	Aug 12 04:37:55 PM PDT 24	2966097046 ps
T274	/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.109228511			Aug 12 04:38:56 PM PDT 24	Aug 12 04:39:04 PM PDT 24	2467114492 ps
T275	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3334208190			Aug 12 04:37:16 PM PDT 24	Aug 12 04:38:16 PM PDT 24	96089975314 ps
T276	/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1772410378			Aug 12 04:39:14 PM PDT 24	Aug 12 04:39:19 PM PDT 24	3007995230 ps
T277	/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.2480386189			Aug 12 04:38:55 PM PDT 24	Aug 12 04:38:58 PM PDT 24	2533466795 ps
T278	/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.887129902			Aug 12 04:38:49 PM PDT 24	Aug 12 04:38:55 PM PDT 24	2258074874 ps
T430	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.148006454			Aug 12 04:39:12 PM PDT 24	Aug 12 04:39:20 PM PDT 24	2456062660 ps
T66	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1100028812			Aug 12 04:39:12 PM PDT 24	Aug 12 04:39:14 PM PDT 24	2946869599 ps
T431	/workspace/coverage/default/48.sysrst_ctrl_alert_test.2375399821			Aug 12 04:39:24 PM PDT 24	Aug 12 04:39:30 PM PDT 24	2012590921 ps
T432	/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.3400742499			Aug 12 04:38:32 PM PDT 24	Aug 12 04:38:36 PM PDT 24	2461302118 ps
T173	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.3016247757			Aug 12 04:38:47 PM PDT 24	Aug 12 04:38:54 PM PDT 24	2596403403 ps
T286	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.993938536			Aug 12 04:37:05 PM PDT 24	Aug 12 04:37:07 PM PDT 24	2347321599 ps
T67	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3788357667			Aug 12 04:39:15 PM PDT 24	Aug 12 04:39:17 PM PDT 24	5225721084 ps
T287	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4260497672			Aug 12 04:36:50 PM PDT 24	Aug 12 04:36:54 PM PDT 24	2504177814 ps
T293	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2989622749			Aug 12 04:37:25 PM PDT 24	Aug 12 04:38:26 PM PDT 24	74581243684 ps
T294	/workspace/coverage/default/45.sysrst_ctrl_stress_all.3466277464			Aug 12 04:39:15 PM PDT 24	Aug 12 04:43:00 PM PDT 24	83154247989 ps
T168	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.76307517			Aug 12 04:37:00 PM PDT 24	Aug 12 04:37:05 PM PDT 24	5167867753 ps
T130	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3238548708			Aug 12 04:39:27 PM PDT 24	Aug 12 04:40:37 PM PDT 24	28582523561 ps
T68	/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.1740588106			Aug 12 04:37:57 PM PDT 24	Aug 12 04:38:03 PM PDT 24	2825113814 ps
T131	/workspace/coverage/default/47.sysrst_ctrl_stress_all.2345410539			Aug 12 04:39:19 PM PDT 24	Aug 12 04:45:36 PM PDT 24	149181604695 ps
T189	/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.1243976464			Aug 12 04:37:23 PM PDT 24	Aug 12 04:37:26 PM PDT 24	2490221664 ps
T132	/workspace/coverage/default/25.sysrst_ctrl_stress_all.3995878319			Aug 12 04:38:13 PM PDT 24	Aug 12 04:41:47 PM PDT 24	321035741621 ps
T169	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.923768989			Aug 12 04:37:34 PM PDT 24	Aug 12 04:37:37 PM PDT 24	4930946058 ps
T190	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1675551604			Aug 12 04:37:01 PM PDT 24	Aug 12 04:37:04 PM PDT 24	2266644658 ps
T191	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1992613783			Aug 12 04:38:14 PM PDT 24	Aug 12 04:38:17 PM PDT 24	3889096005 ps
T192	/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2587667902			Aug 12 04:37:08 PM PDT 24	Aug 12 04:37:12 PM PDT 24	3232889256 ps
T90	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1582278040			Aug 12 04:37:47 PM PDT 24	Aug 12 04:37:50 PM PDT 24	8518658397 ps
T330	/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1268465041			Aug 12 04:38:58 PM PDT 24	Aug 12 04:39:00 PM PDT 24	2523907878 ps
T433	/workspace/coverage/default/25.sysrst_ctrl_smoke.1836508206			Aug 12 04:38:10 PM PDT 24	Aug 12 04:38:12 PM PDT 24	2119685211 ps
T295	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.313803241			Aug 12 04:39:06 PM PDT 24	Aug 12 04:41:56 PM PDT 24	142855409392 ps
T125	/workspace/coverage/default/1.sysrst_ctrl_stress_all.1791234616			Aug 12 04:36:59 PM PDT 24	Aug 12 04:37:03 PM PDT 24	10145140897 ps
T325	/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2636408027			Aug 12 04:38:39 PM PDT 24	Aug 12 04:38:50 PM PDT 24	3597555280 ps
T333	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2085919696			Aug 12 04:38:48 PM PDT 24	Aug 12 04:38:52 PM PDT 24	4805045425 ps
T434	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.625640371			Aug 12 04:37:45 PM PDT 24	Aug 12 04:37:53 PM PDT 24	2466150345 ps
T133	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2836298372			Aug 12 04:39:27 PM PDT 24	Aug 12 04:39:35 PM PDT 24	29125081976 ps
T435	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.3312705472			Aug 12 04:37:43 PM PDT 24	Aug 12 04:37:50 PM PDT 24	2464630952 ps
T91	/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1659456536			Aug 12 04:38:01 PM PDT 24	Aug 12 04:38:06 PM PDT 24	8485956393 ps
T436	/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2452455824			Aug 12 04:37:07 PM PDT 24	Aug 12 04:37:09 PM PDT 24	2459308477 ps
T437	/workspace/coverage/default/48.sysrst_ctrl_smoke.103317612			Aug 12 04:39:21 PM PDT 24	Aug 12 04:39:27 PM PDT 24	2108129509 ps
T438	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.178117364			Aug 12 04:37:57 PM PDT 24	Aug 12 04:39:57 PM PDT 24	92775285363 ps
T288	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1117550728			Aug 12 04:38:05 PM PDT 24	Aug 12 04:39:02 PM PDT 24	97402748221 ps
T170	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3258511098			Aug 12 04:39:25 PM PDT 24	Aug 12 04:39:31 PM PDT 24	4849200143 ps
T368	/workspace/coverage/default/26.sysrst_ctrl_combo_detect.3599108452			Aug 12 04:38:13 PM PDT 24	Aug 12 04:39:11 PM PDT 24	110480387422 ps
T134	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2440198106			Aug 12 04:39:16 PM PDT 24	Aug 12 04:40:09 PM PDT 24	40853697532 ps
T326	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.303041057			Aug 12 04:38:56 PM PDT 24	Aug 12 04:39:07 PM PDT 24	15056220732 ps
T331	/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1975728603			Aug 12 04:38:33 PM PDT 24	Aug 12 04:38:37 PM PDT 24	2470791145 ps
T289	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1478431335			Aug 12 04:38:03 PM PDT 24	Aug 12 04:41:28 PM PDT 24	79282448579 ps
T122	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.3808259790			Aug 12 04:38:46 PM PDT 24	Aug 12 04:38:54 PM PDT 24	6851001421 ps
T439	/workspace/coverage/default/43.sysrst_ctrl_smoke.488554049			Aug 12 04:39:04 PM PDT 24	Aug 12 04:39:10 PM PDT 24	2110855265 ps
T310	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3886320081			Aug 12 04:38:40 PM PDT 24	Aug 12 04:39:07 PM PDT 24	45700570674 ps
T440	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.1012348556			Aug 12 04:38:47 PM PDT 24	Aug 12 04:38:49 PM PDT 24	3482526200 ps
T441	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2367223508			Aug 12 04:37:45 PM PDT 24	Aug 12 04:37:46 PM PDT 24	2170901726 ps
T412	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2742397892			Aug 12 04:38:07 PM PDT 24	Aug 12 04:38:13 PM PDT 24	7016881705 ps
T442	/workspace/coverage/default/41.sysrst_ctrl_smoke.3770215656			Aug 12 04:38:57 PM PDT 24	Aug 12 04:38:58 PM PDT 24	2195993300 ps
T443	/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.409376579			Aug 12 04:37:41 PM PDT 24	Aug 12 04:37:56 PM PDT 24	5165841934 ps
T135	/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3437946683			Aug 12 04:39:02 PM PDT 24	Aug 12 04:41:18 PM PDT 24	111734796215 ps
T444	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.3186461973			Aug 12 04:38:03 PM PDT 24	Aug 12 04:38:11 PM PDT 24	5637178320 ps
T402	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3034816043			Aug 12 04:37:26 PM PDT 24	Aug 12 04:39:52 PM PDT 24	62232040486 ps
T367	/workspace/coverage/default/30.sysrst_ctrl_combo_detect.518904766			Aug 12 04:38:32 PM PDT 24	Aug 12 04:39:09 PM PDT 24	63157302702 ps
T445	/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.1634844497			Aug 12 04:36:49 PM PDT 24	Aug 12 04:36:53 PM PDT 24	4745205597 ps
T446	/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.62682234			Aug 12 04:37:44 PM PDT 24	Aug 12 04:37:52 PM PDT 24	2608179519 ps
T447	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3637093278			Aug 12 04:36:57 PM PDT 24	Aug 12 04:36:59 PM PDT 24	2251648238 ps
T194	/workspace/coverage/default/15.sysrst_ctrl_edge_detect.3417779417			Aug 12 04:37:44 PM PDT 24	Aug 12 04:37:47 PM PDT 24	2423591227 ps
T448	/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2527121589			Aug 12 04:38:55 PM PDT 24	Aug 12 04:38:56 PM PDT 24	2135521628 ps
T449	/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1150580456			Aug 12 04:38:09 PM PDT 24	Aug 12 04:38:15 PM PDT 24	2646958918 ps
T290	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.890555886			Aug 12 04:39:06 PM PDT 24	Aug 12 04:40:27 PM PDT 24	71400198365 ps
T59	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3183655517			Aug 12 04:36:52 PM PDT 24	Aug 12 04:37:08 PM PDT 24	42017400499 ps
T369	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.974197720			Aug 12 04:39:22 PM PDT 24	Aug 12 04:39:37 PM PDT 24	47496395185 ps
T200	/workspace/coverage/default/6.sysrst_ctrl_edge_detect.914568511			Aug 12 04:37:08 PM PDT 24	Aug 12 04:37:12 PM PDT 24	5070099578 ps
T450	/workspace/coverage/default/17.sysrst_ctrl_smoke.4237285102			Aug 12 04:37:44 PM PDT 24	Aug 12 04:37:46 PM PDT 24	2132997643 ps
T380	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2272059860			Aug 12 04:38:09 PM PDT 24	Aug 12 04:39:01 PM PDT 24	74870006449 ps
T451	/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.35716912			Aug 12 04:38:10 PM PDT 24	Aug 12 04:38:16 PM PDT 24	5480732617 ps
T136	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.3820746396			Aug 12 04:38:49 PM PDT 24	Aug 12 04:39:28 PM PDT 24	28088712329 ps
T300	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2714754823			Aug 12 04:39:31 PM PDT 24	Aug 12 04:43:41 PM PDT 24	92961244200 ps
T332	/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.3782463053			Aug 12 04:36:58 PM PDT 24	Aug 12 04:37:01 PM PDT 24	2530975347 ps
T403	/workspace/coverage/default/33.sysrst_ctrl_combo_detect.511262420			Aug 12 04:38:36 PM PDT 24	Aug 12 04:38:51 PM PDT 24	57997695173 ps
T137	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2495700038			Aug 12 04:37:07 PM PDT 24	Aug 12 04:39:02 PM PDT 24	43011078871 ps
T174	/workspace/coverage/default/26.sysrst_ctrl_stress_all.2960606763			Aug 12 04:38:16 PM PDT 24	Aug 12 04:38:58 PM PDT 24	141612632860 ps
T374	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1995321551			Aug 12 04:39:04 PM PDT 24	Aug 12 04:43:38 PM PDT 24	118445763325 ps
T452	/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1900888826			Aug 12 04:38:11 PM PDT 24	Aug 12 04:38:12 PM PDT 24	2489395048 ps
T453	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.905605758			Aug 12 04:38:29 PM PDT 24	Aug 12 04:38:36 PM PDT 24	2447734515 ps
T281	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2834869574			Aug 12 04:39:14 PM PDT 24	Aug 12 04:39:23 PM PDT 24	3146430588 ps
T301	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.292953726			Aug 12 04:39:39 PM PDT 24	Aug 12 04:40:21 PM PDT 24	146746415269 ps
T302	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.311095603			Aug 12 04:39:35 PM PDT 24	Aug 12 04:41:34 PM PDT 24	195288646842 ps
T303	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.469878652			Aug 12 04:38:54 PM PDT 24	Aug 12 04:40:15 PM PDT 24	47088335059 ps
T454	/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.63715029			Aug 12 04:39:05 PM PDT 24	Aug 12 04:39:06 PM PDT 24	4196502149 ps
T455	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.381494906			Aug 12 04:37:15 PM PDT 24	Aug 12 04:37:19 PM PDT 24	2613325981 ps
T456	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1236597984			Aug 12 04:39:21 PM PDT 24	Aug 12 04:39:24 PM PDT 24	2630961569 ps
T305	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.3176306657			Aug 12 04:38:56 PM PDT 24	Aug 12 04:39:13 PM PDT 24	37431857792 ps
T457	/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.12894438			Aug 12 04:39:21 PM PDT 24	Aug 12 04:39:23 PM PDT 24	2491069765 ps
T283	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2850014031			Aug 12 04:39:27 PM PDT 24	Aug 12 04:40:17 PM PDT 24	35754227117 ps
T95	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.4048227817			Aug 12 04:36:58 PM PDT 24	Aug 12 04:37:49 PM PDT 24	22058698779 ps
T315	/workspace/coverage/default/44.sysrst_ctrl_smoke.4255396557			Aug 12 04:39:06 PM PDT 24	Aug 12 04:39:12 PM PDT 24	2112517326 ps
T316	/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.913191575			Aug 12 04:36:48 PM PDT 24	Aug 12 04:36:52 PM PDT 24	2469538879 ps
T317	/workspace/coverage/default/34.sysrst_ctrl_alert_test.3637997685			Aug 12 04:38:47 PM PDT 24	Aug 12 04:38:53 PM PDT 24	2011649617 ps
T318	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1222920824			Aug 12 04:38:05 PM PDT 24	Aug 12 04:43:18 PM PDT 24	211731076031 ps
T171	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.3350170651			Aug 12 04:37:40 PM PDT 24	Aug 12 04:37:44 PM PDT 24	5631258644 ps
T319	/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3692559324			Aug 12 04:37:47 PM PDT 24	Aug 12 04:37:55 PM PDT 24	2611324372 ps
T320	/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3253816285			Aug 12 04:39:19 PM PDT 24	Aug 12 04:39:22 PM PDT 24	2479496587 ps
T321	/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1135239376			Aug 12 04:37:07 PM PDT 24	Aug 12 04:37:09 PM PDT 24	2634275352 ps
T322	/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.3467400532			Aug 12 04:38:47 PM PDT 24	Aug 12 04:38:54 PM PDT 24	2208503677 ps
T334	/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4091391696			Aug 12 04:39:21 PM PDT 24	Aug 12 04:39:27 PM PDT 24	5805099767 ps
T458	/workspace/coverage/default/18.sysrst_ctrl_alert_test.1203794829			Aug 12 04:38:02 PM PDT 24	Aug 12 04:38:08 PM PDT 24	2012839329 ps
T459	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3081842044			Aug 12 04:37:10 PM PDT 24	Aug 12 04:37:17 PM PDT 24	2511783364 ps
T460	/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3470533091			Aug 12 04:38:31 PM PDT 24	Aug 12 04:38:33 PM PDT 24	2534458226 ps
T148	/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.146096583			Aug 12 04:36:52 PM PDT 24	Aug 12 04:36:54 PM PDT 24	3720733721 ps
T418	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3772529626			Aug 12 04:38:17 PM PDT 24	Aug 12 04:38:20 PM PDT 24	2530146617 ps
T304	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1525870717			Aug 12 04:39:36 PM PDT 24	Aug 12 04:40:02 PM PDT 24	41586943519 ps
T461	/workspace/coverage/default/7.sysrst_ctrl_smoke.4289729780			Aug 12 04:37:17 PM PDT 24	Aug 12 04:37:19 PM PDT 24	2134346482 ps
T462	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3228159839			Aug 12 04:38:07 PM PDT 24	Aug 12 04:38:15 PM PDT 24	2468170359 ps
T463	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1911840820			Aug 12 04:36:58 PM PDT 24	Aug 12 04:37:05 PM PDT 24	3445991850 ps
T183	/workspace/coverage/default/39.sysrst_ctrl_stress_all.2661813933			Aug 12 04:38:55 PM PDT 24	Aug 12 04:43:23 PM PDT 24	628305539254 ps
T327	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3312847901			Aug 12 04:38:25 PM PDT 24	Aug 12 04:38:45 PM PDT 24	14075245806 ps