Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.78 99.35 96.73 100.00 96.79 98.82 99.52 86.28


Total test records in report: 918
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T198 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1732126172 Aug 15 05:22:07 PM PDT 24 Aug 15 05:22:14 PM PDT 24 2191189554 ps
T199 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.1196943773 Aug 15 05:22:50 PM PDT 24 Aug 15 05:22:56 PM PDT 24 2852145359 ps
T200 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.3284581486 Aug 15 05:23:00 PM PDT 24 Aug 15 05:23:10 PM PDT 24 3356493388 ps
T201 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.686725446 Aug 15 05:22:04 PM PDT 24 Aug 15 05:22:11 PM PDT 24 2389425753 ps
T128 /workspace/coverage/default/4.sysrst_ctrl_stress_all.843587351 Aug 15 05:22:07 PM PDT 24 Aug 15 05:23:06 PM PDT 24 92327355818 ps
T401 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2977471451 Aug 15 05:23:56 PM PDT 24 Aug 15 05:24:51 PM PDT 24 43516270244 ps
T470 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1110139928 Aug 15 05:23:28 PM PDT 24 Aug 15 05:23:29 PM PDT 24 4677535472 ps
T471 /workspace/coverage/default/13.sysrst_ctrl_alert_test.4029526385 Aug 15 05:22:39 PM PDT 24 Aug 15 05:22:43 PM PDT 24 2020627595 ps
T472 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.1627769693 Aug 15 05:22:28 PM PDT 24 Aug 15 05:22:30 PM PDT 24 2231725153 ps
T276 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1469594669 Aug 15 05:22:26 PM PDT 24 Aug 15 05:23:01 PM PDT 24 55254382340 ps
T473 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.660733691 Aug 15 05:22:56 PM PDT 24 Aug 15 05:23:02 PM PDT 24 2082150119 ps
T474 /workspace/coverage/default/15.sysrst_ctrl_smoke.2374062487 Aug 15 05:22:51 PM PDT 24 Aug 15 05:22:58 PM PDT 24 2111024512 ps
T237 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.589982207 Aug 15 05:23:27 PM PDT 24 Aug 15 05:23:31 PM PDT 24 2411347300 ps
T475 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2104397627 Aug 15 05:23:15 PM PDT 24 Aug 15 05:23:23 PM PDT 24 3987287996 ps
T295 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.946403121 Aug 15 05:22:08 PM PDT 24 Aug 15 05:22:29 PM PDT 24 43121149143 ps
T476 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1832211205 Aug 15 05:22:09 PM PDT 24 Aug 15 05:22:14 PM PDT 24 3350045220 ps
T477 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.580739860 Aug 15 05:22:48 PM PDT 24 Aug 15 05:22:57 PM PDT 24 3092623754 ps
T478 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2693416792 Aug 15 05:23:53 PM PDT 24 Aug 15 05:25:12 PM PDT 24 30081733993 ps
T322 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3044002831 Aug 15 05:22:29 PM PDT 24 Aug 15 05:22:44 PM PDT 24 5496091488 ps
T297 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2280007702 Aug 15 05:23:35 PM PDT 24 Aug 15 05:23:41 PM PDT 24 6489350813 ps
T479 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3400181380 Aug 15 05:23:15 PM PDT 24 Aug 15 05:23:18 PM PDT 24 2535763109 ps
T480 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.3752847047 Aug 15 05:23:33 PM PDT 24 Aug 15 05:24:19 PM PDT 24 67837846740 ps
T380 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.720001513 Aug 15 05:23:55 PM PDT 24 Aug 15 05:25:43 PM PDT 24 84960394313 ps
T173 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.3017518766 Aug 15 05:23:18 PM PDT 24 Aug 15 05:23:22 PM PDT 24 4995446368 ps
T108 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.3946097933 Aug 15 05:22:07 PM PDT 24 Aug 15 05:22:15 PM PDT 24 3373084923 ps
T217 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.1487965019 Aug 15 05:23:11 PM PDT 24 Aug 15 05:29:08 PM PDT 24 138899673246 ps
T102 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3590309640 Aug 15 05:22:46 PM PDT 24 Aug 15 05:22:48 PM PDT 24 6041862460 ps
T103 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2195829941 Aug 15 05:23:48 PM PDT 24 Aug 15 05:23:55 PM PDT 24 6419879719 ps
T218 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2278418182 Aug 15 05:23:18 PM PDT 24 Aug 15 05:23:23 PM PDT 24 3219129511 ps
T219 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.644017965 Aug 15 05:23:35 PM PDT 24 Aug 15 05:23:37 PM PDT 24 2533354455 ps
T220 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.4161251814 Aug 15 05:22:57 PM PDT 24 Aug 15 05:23:11 PM PDT 24 3005607986 ps
T202 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.877058493 Aug 15 05:22:19 PM PDT 24 Aug 15 05:22:26 PM PDT 24 2301243328 ps
T221 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.2629314747 Aug 15 05:22:59 PM PDT 24 Aug 15 05:23:07 PM PDT 24 2508935951 ps
T222 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1028449206 Aug 15 05:23:16 PM PDT 24 Aug 15 05:23:20 PM PDT 24 2462846612 ps
T387 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3394010592 Aug 15 05:23:53 PM PDT 24 Aug 15 05:26:07 PM PDT 24 79263034095 ps
T104 /workspace/coverage/default/46.sysrst_ctrl_stress_all.2981848314 Aug 15 05:23:51 PM PDT 24 Aug 15 05:24:10 PM PDT 24 7422510560 ps
T481 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.2678728910 Aug 15 05:23:16 PM PDT 24 Aug 15 05:23:19 PM PDT 24 2479133454 ps
T482 /workspace/coverage/default/21.sysrst_ctrl_stress_all.701638396 Aug 15 05:22:44 PM PDT 24 Aug 15 05:22:51 PM PDT 24 12262738271 ps
T483 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3677209100 Aug 15 05:23:17 PM PDT 24 Aug 15 05:23:54 PM PDT 24 78782073164 ps
T399 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1139749780 Aug 15 05:25:15 PM PDT 24 Aug 15 05:27:55 PM PDT 24 116613339900 ps
T484 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3411646535 Aug 15 05:23:51 PM PDT 24 Aug 15 05:23:58 PM PDT 24 2455193240 ps
T485 /workspace/coverage/default/13.sysrst_ctrl_smoke.2937239729 Aug 15 05:22:29 PM PDT 24 Aug 15 05:22:31 PM PDT 24 2136330876 ps
T486 /workspace/coverage/default/44.sysrst_ctrl_smoke.1725259918 Aug 15 05:23:32 PM PDT 24 Aug 15 05:23:35 PM PDT 24 2122460683 ps
T487 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.2879584451 Aug 15 05:23:18 PM PDT 24 Aug 15 05:23:21 PM PDT 24 3289793534 ps
T488 /workspace/coverage/default/45.sysrst_ctrl_alert_test.502660750 Aug 15 05:23:46 PM PDT 24 Aug 15 05:23:52 PM PDT 24 2013437854 ps
T419 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.342359310 Aug 15 05:22:02 PM PDT 24 Aug 15 05:23:25 PM PDT 24 610779118480 ps
T116 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.2228010798 Aug 15 05:22:51 PM PDT 24 Aug 15 05:22:53 PM PDT 24 9556872067 ps
T489 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.4287935241 Aug 15 05:23:11 PM PDT 24 Aug 15 05:23:12 PM PDT 24 2734397544 ps
T283 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.3993681108 Aug 15 05:23:07 PM PDT 24 Aug 15 05:26:31 PM PDT 24 82896235933 ps
T406 /workspace/coverage/default/24.sysrst_ctrl_stress_all.1505861564 Aug 15 05:22:49 PM PDT 24 Aug 15 05:22:55 PM PDT 24 13293128838 ps
T490 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.2608746926 Aug 15 05:23:17 PM PDT 24 Aug 15 05:23:21 PM PDT 24 2467976672 ps
T491 /workspace/coverage/default/49.sysrst_ctrl_alert_test.2826822494 Aug 15 05:23:56 PM PDT 24 Aug 15 05:24:02 PM PDT 24 2016685850 ps
T492 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3453426607 Aug 15 05:22:38 PM PDT 24 Aug 15 05:22:45 PM PDT 24 2511920390 ps
T415 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.4284291771 Aug 15 05:22:47 PM PDT 24 Aug 15 06:16:21 PM PDT 24 1266153439137 ps
T493 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1822201355 Aug 15 05:23:22 PM PDT 24 Aug 15 05:23:25 PM PDT 24 2636412305 ps
T494 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.4217789567 Aug 15 05:23:03 PM PDT 24 Aug 15 05:23:11 PM PDT 24 2614678782 ps
T129 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.3595867848 Aug 15 05:23:01 PM PDT 24 Aug 15 05:29:10 PM PDT 24 152272225102 ps
T284 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.4025384793 Aug 15 05:23:28 PM PDT 24 Aug 15 05:24:07 PM PDT 24 57971133875 ps
T495 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3609773682 Aug 15 05:23:50 PM PDT 24 Aug 15 05:25:46 PM PDT 24 48988654549 ps
T496 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.1511241548 Aug 15 05:22:03 PM PDT 24 Aug 15 05:22:09 PM PDT 24 3530775993 ps
T497 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.4194280224 Aug 15 05:22:53 PM PDT 24 Aug 15 05:22:57 PM PDT 24 2996420268 ps
T498 /workspace/coverage/default/38.sysrst_ctrl_smoke.2190281215 Aug 15 05:23:18 PM PDT 24 Aug 15 05:23:20 PM PDT 24 2130490949 ps
T130 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.1481392258 Aug 15 05:23:13 PM PDT 24 Aug 15 05:26:47 PM PDT 24 79456023585 ps
T499 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2956852573 Aug 15 05:23:54 PM PDT 24 Aug 15 05:23:57 PM PDT 24 2536046509 ps
T500 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.4175899512 Aug 15 05:22:24 PM PDT 24 Aug 15 05:22:28 PM PDT 24 2469876247 ps
T501 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1558486539 Aug 15 05:23:51 PM PDT 24 Aug 15 05:24:01 PM PDT 24 3187701632 ps
T145 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.879969083 Aug 15 05:23:39 PM PDT 24 Aug 15 05:23:41 PM PDT 24 2864863354 ps
T323 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1884449736 Aug 15 05:23:42 PM PDT 24 Aug 15 05:23:57 PM PDT 24 5643350692 ps
T502 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.1183992535 Aug 15 05:22:37 PM PDT 24 Aug 15 05:22:43 PM PDT 24 2065173569 ps
T503 /workspace/coverage/default/35.sysrst_ctrl_stress_all.1658437752 Aug 15 05:23:18 PM PDT 24 Aug 15 05:23:22 PM PDT 24 7309767680 ps
T314 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.2029685218 Aug 15 05:22:04 PM PDT 24 Aug 15 05:23:03 PM PDT 24 22011705487 ps
T404 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1173318302 Aug 15 05:22:48 PM PDT 24 Aug 15 05:27:10 PM PDT 24 106027305650 ps
T114 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3745985966 Aug 15 05:23:52 PM PDT 24 Aug 15 05:24:00 PM PDT 24 2918241660 ps
T504 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.864770015 Aug 15 05:23:40 PM PDT 24 Aug 15 05:24:07 PM PDT 24 38431530503 ps
T332 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3620311324 Aug 15 05:22:40 PM PDT 24 Aug 15 05:22:48 PM PDT 24 8762942701 ps
T345 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1299909712 Aug 15 05:23:20 PM PDT 24 Aug 15 05:23:28 PM PDT 24 8552851242 ps
T324 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.4280202249 Aug 15 05:22:41 PM PDT 24 Aug 15 05:22:43 PM PDT 24 3661729355 ps
T346 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.107073360 Aug 15 05:22:34 PM PDT 24 Aug 15 05:22:40 PM PDT 24 3076871179 ps
T347 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.649840963 Aug 15 05:23:05 PM PDT 24 Aug 15 05:23:11 PM PDT 24 2086153162 ps
T348 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.616869510 Aug 15 05:23:17 PM PDT 24 Aug 15 05:23:31 PM PDT 24 3245683411 ps
T174 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.2750029917 Aug 15 05:22:14 PM PDT 24 Aug 15 05:22:21 PM PDT 24 5279488754 ps
T349 /workspace/coverage/default/26.sysrst_ctrl_stress_all.1545121113 Aug 15 05:23:01 PM PDT 24 Aug 15 05:23:08 PM PDT 24 8688573760 ps
T350 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1595444189 Aug 15 05:23:59 PM PDT 24 Aug 15 05:27:29 PM PDT 24 91064643141 ps
T351 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1029884161 Aug 15 05:23:08 PM PDT 24 Aug 15 05:23:10 PM PDT 24 2465323846 ps
T505 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.498442115 Aug 15 05:23:17 PM PDT 24 Aug 15 05:25:14 PM PDT 24 43140605899 ps
T506 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3042544347 Aug 15 05:22:30 PM PDT 24 Aug 15 05:23:00 PM PDT 24 43913844684 ps
T507 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.687572950 Aug 15 05:23:53 PM PDT 24 Aug 15 05:25:40 PM PDT 24 43928305203 ps
T203 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.3683530615 Aug 15 05:22:48 PM PDT 24 Aug 15 05:22:50 PM PDT 24 3693524466 ps
T508 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.2087194449 Aug 15 05:22:29 PM PDT 24 Aug 15 05:22:36 PM PDT 24 2513403486 ps
T414 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.4137544780 Aug 15 05:23:51 PM PDT 24 Aug 15 05:27:08 PM PDT 24 82566246417 ps
T509 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.223011980 Aug 15 05:23:53 PM PDT 24 Aug 15 05:25:18 PM PDT 24 158926653336 ps
T510 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3471657953 Aug 15 05:23:35 PM PDT 24 Aug 15 05:23:38 PM PDT 24 3718106580 ps
T204 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.2489926672 Aug 15 05:23:17 PM PDT 24 Aug 15 05:23:35 PM PDT 24 694317498759 ps
T296 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.26849932 Aug 15 05:22:57 PM PDT 24 Aug 15 05:23:08 PM PDT 24 3974241776 ps
T511 /workspace/coverage/default/3.sysrst_ctrl_stress_all.934395983 Aug 15 05:22:07 PM PDT 24 Aug 15 05:22:25 PM PDT 24 6907713508 ps
T285 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.365257678 Aug 15 05:22:56 PM PDT 24 Aug 15 05:26:27 PM PDT 24 89012852202 ps
T512 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.4201026353 Aug 15 05:23:18 PM PDT 24 Aug 15 05:23:20 PM PDT 24 2730725926 ps
T513 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.408962775 Aug 15 05:22:05 PM PDT 24 Aug 15 05:22:08 PM PDT 24 3079057652 ps
T333 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2708070455 Aug 15 05:23:42 PM PDT 24 Aug 15 05:23:50 PM PDT 24 2954540085 ps
T514 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.244505716 Aug 15 05:22:31 PM PDT 24 Aug 15 05:22:32 PM PDT 24 2617026381 ps
T256 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.835229371 Aug 15 05:23:16 PM PDT 24 Aug 15 05:23:25 PM PDT 24 3582595261 ps
T515 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2288899350 Aug 15 05:22:40 PM PDT 24 Aug 15 05:22:47 PM PDT 24 2507809036 ps
T516 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2973297575 Aug 15 05:22:05 PM PDT 24 Aug 15 05:22:08 PM PDT 24 2626642307 ps
T517 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.24152984 Aug 15 05:22:43 PM PDT 24 Aug 15 05:22:45 PM PDT 24 2639190520 ps
T518 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2960273153 Aug 15 05:22:31 PM PDT 24 Aug 15 05:22:39 PM PDT 24 3015615922 ps
T519 /workspace/coverage/default/18.sysrst_ctrl_alert_test.24884386 Aug 15 05:22:52 PM PDT 24 Aug 15 05:22:54 PM PDT 24 2030931085 ps
T105 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.4180009400 Aug 15 05:22:02 PM PDT 24 Aug 15 05:22:13 PM PDT 24 35841082833 ps
T520 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.1757719740 Aug 15 05:22:28 PM PDT 24 Aug 15 05:22:30 PM PDT 24 2231705624 ps
T207 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.3367265745 Aug 15 05:23:02 PM PDT 24 Aug 15 05:23:06 PM PDT 24 3305963126 ps
T376 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.3731457219 Aug 15 05:23:37 PM PDT 24 Aug 15 05:29:36 PM PDT 24 139047702860 ps
T521 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.334374240 Aug 15 05:22:30 PM PDT 24 Aug 15 05:22:39 PM PDT 24 3608410369 ps
T522 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.4211041076 Aug 15 05:23:15 PM PDT 24 Aug 15 05:23:18 PM PDT 24 3810102810 ps
T257 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.182052655 Aug 15 05:23:21 PM PDT 24 Aug 15 05:23:29 PM PDT 24 3780380611 ps
T523 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.790991985 Aug 15 05:22:03 PM PDT 24 Aug 15 05:22:06 PM PDT 24 2531458029 ps
T208 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.886364304 Aug 15 05:23:50 PM PDT 24 Aug 15 05:23:52 PM PDT 24 3339673603 ps
T524 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.1529163152 Aug 15 05:22:57 PM PDT 24 Aug 15 05:23:00 PM PDT 24 2535585297 ps
T525 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.357707279 Aug 15 05:22:55 PM PDT 24 Aug 15 05:23:02 PM PDT 24 2610719749 ps
T526 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2483701156 Aug 15 05:22:15 PM PDT 24 Aug 15 05:22:23 PM PDT 24 5154806099 ps
T527 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2742574053 Aug 15 05:23:36 PM PDT 24 Aug 15 05:23:38 PM PDT 24 2581326517 ps
T528 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1610904591 Aug 15 05:23:41 PM PDT 24 Aug 15 05:23:46 PM PDT 24 2901596875 ps
T184 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.2574563937 Aug 15 05:21:58 PM PDT 24 Aug 15 05:22:03 PM PDT 24 4575414797 ps
T529 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2808948638 Aug 15 05:23:56 PM PDT 24 Aug 15 05:23:58 PM PDT 24 2183953942 ps
T530 /workspace/coverage/default/22.sysrst_ctrl_stress_all.944017790 Aug 15 05:23:07 PM PDT 24 Aug 15 05:23:09 PM PDT 24 7570033053 ps
T531 /workspace/coverage/default/27.sysrst_ctrl_stress_all.2213145511 Aug 15 05:22:55 PM PDT 24 Aug 15 05:23:28 PM PDT 24 14659178112 ps
T268 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.1907102402 Aug 15 05:22:30 PM PDT 24 Aug 15 05:23:01 PM PDT 24 20338455748 ps
T532 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.455781900 Aug 15 05:23:17 PM PDT 24 Aug 15 05:23:22 PM PDT 24 2975694014 ps
T533 /workspace/coverage/default/11.sysrst_ctrl_alert_test.2111312660 Aug 15 05:22:34 PM PDT 24 Aug 15 05:22:37 PM PDT 24 2024408708 ps
T388 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2579542847 Aug 15 05:22:40 PM PDT 24 Aug 15 05:23:17 PM PDT 24 56954952068 ps
T534 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1128105239 Aug 15 05:22:32 PM PDT 24 Aug 15 05:22:34 PM PDT 24 2639113921 ps
T289 /workspace/coverage/default/17.sysrst_ctrl_stress_all.3883740495 Aug 15 05:22:39 PM PDT 24 Aug 15 05:33:48 PM PDT 24 260137950318 ps
T409 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3860894625 Aug 15 05:23:57 PM PDT 24 Aug 15 05:28:37 PM PDT 24 109180909920 ps
T535 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2823822969 Aug 15 05:22:14 PM PDT 24 Aug 15 05:22:16 PM PDT 24 3678259181 ps
T131 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.417886185 Aug 15 05:23:14 PM PDT 24 Aug 15 05:23:30 PM PDT 24 28228186050 ps
T536 /workspace/coverage/default/16.sysrst_ctrl_alert_test.894771877 Aug 15 05:22:40 PM PDT 24 Aug 15 05:22:46 PM PDT 24 2012852766 ps
T537 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3379024685 Aug 15 05:23:17 PM PDT 24 Aug 15 05:23:23 PM PDT 24 2121983109 ps
T538 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.1667253895 Aug 15 05:22:50 PM PDT 24 Aug 15 05:22:58 PM PDT 24 6923646456 ps
T539 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2856863056 Aug 15 05:23:15 PM PDT 24 Aug 15 05:23:24 PM PDT 24 3158563789 ps
T540 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3761684703 Aug 15 05:23:23 PM PDT 24 Aug 15 05:23:29 PM PDT 24 2193098788 ps
T149 /workspace/coverage/default/43.sysrst_ctrl_stress_all.2102000324 Aug 15 05:23:28 PM PDT 24 Aug 15 05:23:35 PM PDT 24 14481623961 ps
T298 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.3564415714 Aug 15 05:22:11 PM PDT 24 Aug 15 05:22:14 PM PDT 24 8040061811 ps
T541 /workspace/coverage/default/9.sysrst_ctrl_smoke.1163564188 Aug 15 05:22:27 PM PDT 24 Aug 15 05:22:29 PM PDT 24 2126858454 ps
T542 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.2492186022 Aug 15 05:22:56 PM PDT 24 Aug 15 05:23:06 PM PDT 24 3116543425 ps
T543 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.2027099922 Aug 15 05:22:39 PM PDT 24 Aug 15 05:22:41 PM PDT 24 2039508909 ps
T544 /workspace/coverage/default/21.sysrst_ctrl_smoke.1387922740 Aug 15 05:22:48 PM PDT 24 Aug 15 05:22:50 PM PDT 24 2129784597 ps
T545 /workspace/coverage/default/47.sysrst_ctrl_stress_all.764746305 Aug 15 05:23:51 PM PDT 24 Aug 15 05:24:20 PM PDT 24 12904505039 ps
T546 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.128370202 Aug 15 05:22:35 PM PDT 24 Aug 15 05:22:41 PM PDT 24 2102608912 ps
T168 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.274929686 Aug 15 05:22:05 PM PDT 24 Aug 15 05:22:14 PM PDT 24 3226000617 ps
T132 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.3476969471 Aug 15 05:22:52 PM PDT 24 Aug 15 05:23:04 PM PDT 24 63460211154 ps
T547 /workspace/coverage/default/48.sysrst_ctrl_smoke.2905244640 Aug 15 05:23:56 PM PDT 24 Aug 15 05:23:58 PM PDT 24 2127342880 ps
T548 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2274798724 Aug 15 05:22:36 PM PDT 24 Aug 15 05:22:57 PM PDT 24 33541045946 ps
T400 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2268663907 Aug 15 05:23:12 PM PDT 24 Aug 15 05:23:50 PM PDT 24 56425943938 ps
T379 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1020770487 Aug 15 05:23:54 PM PDT 24 Aug 15 05:25:14 PM PDT 24 29027125561 ps
T383 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2331353044 Aug 15 05:23:54 PM PDT 24 Aug 15 05:25:59 PM PDT 24 98204698896 ps
T549 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.159296353 Aug 15 05:23:15 PM PDT 24 Aug 15 05:23:18 PM PDT 24 2524085921 ps
T550 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1858877361 Aug 15 05:23:53 PM PDT 24 Aug 15 05:24:11 PM PDT 24 25601798654 ps
T109 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.4121418183 Aug 15 05:22:57 PM PDT 24 Aug 15 05:24:23 PM PDT 24 77686364476 ps
T551 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.128414669 Aug 15 05:22:12 PM PDT 24 Aug 15 05:22:15 PM PDT 24 2628035325 ps
T552 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1163979439 Aug 15 05:22:50 PM PDT 24 Aug 15 05:22:53 PM PDT 24 6805137350 ps
T553 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.4080118166 Aug 15 05:22:07 PM PDT 24 Aug 15 05:22:09 PM PDT 24 2413224154 ps
T277 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.1060333764 Aug 15 05:22:28 PM PDT 24 Aug 15 05:23:50 PM PDT 24 83190795640 ps
T229 /workspace/coverage/default/49.sysrst_ctrl_stress_all.415155337 Aug 15 05:23:54 PM PDT 24 Aug 15 05:24:27 PM PDT 24 12784262978 ps
T554 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3428528591 Aug 15 05:22:55 PM PDT 24 Aug 15 05:23:05 PM PDT 24 3742777575 ps
T115 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.748843335 Aug 15 05:22:30 PM PDT 24 Aug 15 05:22:35 PM PDT 24 6301237063 ps
T169 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.2339414729 Aug 15 05:22:32 PM PDT 24 Aug 15 05:22:34 PM PDT 24 3875527680 ps
T187 /workspace/coverage/default/5.sysrst_ctrl_stress_all.1950467184 Aug 15 05:22:19 PM PDT 24 Aug 15 05:24:41 PM PDT 24 91356927920 ps
T112 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.3592456050 Aug 15 05:23:04 PM PDT 24 Aug 15 05:23:08 PM PDT 24 5798586637 ps
T555 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3741793074 Aug 15 05:23:48 PM PDT 24 Aug 15 05:24:58 PM PDT 24 27078131608 ps
T247 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2071714740 Aug 15 05:22:13 PM PDT 24 Aug 15 05:22:24 PM PDT 24 13744370131 ps
T556 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1742445420 Aug 15 05:22:51 PM PDT 24 Aug 15 05:22:53 PM PDT 24 2513754280 ps
T557 /workspace/coverage/default/34.sysrst_ctrl_alert_test.3142069279 Aug 15 05:23:15 PM PDT 24 Aug 15 05:23:20 PM PDT 24 2018890879 ps
T558 /workspace/coverage/default/43.sysrst_ctrl_alert_test.926133715 Aug 15 05:23:27 PM PDT 24 Aug 15 05:23:29 PM PDT 24 2035910019 ps
T559 /workspace/coverage/default/31.sysrst_ctrl_alert_test.4237341507 Aug 15 05:23:02 PM PDT 24 Aug 15 05:23:08 PM PDT 24 2015379833 ps
T560 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.947647927 Aug 15 05:22:08 PM PDT 24 Aug 15 05:22:18 PM PDT 24 3575987294 ps
T561 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1814637308 Aug 15 05:23:21 PM PDT 24 Aug 15 05:23:24 PM PDT 24 3185409597 ps
T562 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.2517347369 Aug 15 05:22:05 PM PDT 24 Aug 15 05:22:11 PM PDT 24 2090221673 ps
T563 /workspace/coverage/default/3.sysrst_ctrl_smoke.1978635274 Aug 15 05:22:07 PM PDT 24 Aug 15 05:22:11 PM PDT 24 2116975915 ps
T185 /workspace/coverage/default/20.sysrst_ctrl_stress_all.1126325077 Aug 15 05:22:55 PM PDT 24 Aug 15 05:23:32 PM PDT 24 17371649915 ps
T564 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3214722335 Aug 15 05:23:29 PM PDT 24 Aug 15 05:23:31 PM PDT 24 2555825023 ps
T565 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.4275856939 Aug 15 05:22:37 PM PDT 24 Aug 15 05:22:43 PM PDT 24 2190214835 ps
T397 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.730511068 Aug 15 05:23:56 PM PDT 24 Aug 15 05:24:34 PM PDT 24 84533300114 ps
T566 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3633189157 Aug 15 05:22:48 PM PDT 24 Aug 15 05:22:52 PM PDT 24 2517394775 ps
T188 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.1302705447 Aug 15 05:22:48 PM PDT 24 Aug 15 05:22:50 PM PDT 24 3165168537 ps
T567 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2692531903 Aug 15 05:22:04 PM PDT 24 Aug 15 05:23:05 PM PDT 24 25081387772 ps
T568 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.524712485 Aug 15 05:23:05 PM PDT 24 Aug 15 05:23:13 PM PDT 24 3196196350 ps
T248 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.1592963265 Aug 15 05:23:34 PM PDT 24 Aug 15 05:23:43 PM PDT 24 3551233840 ps
T374 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.634569365 Aug 15 05:22:52 PM PDT 24 Aug 15 05:23:09 PM PDT 24 98108744624 ps
T569 /workspace/coverage/default/41.sysrst_ctrl_alert_test.2160457168 Aug 15 05:23:27 PM PDT 24 Aug 15 05:23:29 PM PDT 24 2038231358 ps
T570 /workspace/coverage/default/36.sysrst_ctrl_smoke.1047291234 Aug 15 05:23:22 PM PDT 24 Aug 15 05:23:25 PM PDT 24 2112570735 ps
T571 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.914707416 Aug 15 05:22:26 PM PDT 24 Aug 15 05:22:32 PM PDT 24 2035246604 ps
T572 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3986843491 Aug 15 05:22:39 PM PDT 24 Aug 15 05:22:46 PM PDT 24 2228075290 ps
T573 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1040460267 Aug 15 05:23:53 PM PDT 24 Aug 15 05:24:34 PM PDT 24 66363146759 ps
T574 /workspace/coverage/default/17.sysrst_ctrl_alert_test.3136761019 Aug 15 05:22:49 PM PDT 24 Aug 15 05:22:50 PM PDT 24 2135313517 ps
T575 /workspace/coverage/default/1.sysrst_ctrl_stress_all.1016221893 Aug 15 05:22:06 PM PDT 24 Aug 15 05:22:08 PM PDT 24 11238458961 ps
T576 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.586892577 Aug 15 05:22:25 PM PDT 24 Aug 15 05:22:27 PM PDT 24 2535154210 ps
T336 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.249674339 Aug 15 05:22:52 PM PDT 24 Aug 15 05:23:08 PM PDT 24 5520714056 ps
T577 /workspace/coverage/default/14.sysrst_ctrl_smoke.2642848451 Aug 15 05:22:38 PM PDT 24 Aug 15 05:22:41 PM PDT 24 2113416596 ps
T578 /workspace/coverage/default/10.sysrst_ctrl_smoke.4283599626 Aug 15 05:22:31 PM PDT 24 Aug 15 05:22:37 PM PDT 24 2108565954 ps
T579 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.2661482809 Aug 15 05:23:04 PM PDT 24 Aug 15 05:23:07 PM PDT 24 3380304698 ps
T580 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2409337709 Aug 15 05:22:49 PM PDT 24 Aug 15 05:22:52 PM PDT 24 4281709167 ps
T67 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2185770727 Aug 15 05:21:59 PM PDT 24 Aug 15 05:22:54 PM PDT 24 41242863855 ps
T581 /workspace/coverage/default/6.sysrst_ctrl_alert_test.1643625287 Aug 15 05:22:18 PM PDT 24 Aug 15 05:22:20 PM PDT 24 2039622576 ps
T230 /workspace/coverage/default/34.sysrst_ctrl_stress_all.1425057402 Aug 15 05:23:03 PM PDT 24 Aug 15 05:25:27 PM PDT 24 345076451821 ps
T377 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1894952441 Aug 15 05:21:59 PM PDT 24 Aug 15 05:23:28 PM PDT 24 73859893659 ps
T582 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.981298027 Aug 15 05:21:58 PM PDT 24 Aug 15 05:22:01 PM PDT 24 2595897120 ps
T583 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.4216023401 Aug 15 05:23:11 PM PDT 24 Aug 15 05:23:17 PM PDT 24 4457384472 ps
T170 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.3640193063 Aug 15 05:23:04 PM PDT 24 Aug 15 05:23:12 PM PDT 24 4503991556 ps
T584 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.3221678998 Aug 15 05:22:06 PM PDT 24 Aug 15 05:22:14 PM PDT 24 6271996120 ps
T585 /workspace/coverage/default/48.sysrst_ctrl_alert_test.2027341458 Aug 15 05:23:54 PM PDT 24 Aug 15 05:23:56 PM PDT 24 2031810833 ps
T586 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2523652382 Aug 15 05:23:11 PM PDT 24 Aug 15 05:23:25 PM PDT 24 21348536211 ps
T587 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2125759074 Aug 15 05:23:07 PM PDT 24 Aug 15 05:23:08 PM PDT 24 8712846529 ps
T588 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.3041609168 Aug 15 05:23:01 PM PDT 24 Aug 15 05:24:23 PM PDT 24 63698914464 ps
T589 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.89812053 Aug 15 05:23:09 PM PDT 24 Aug 15 05:23:17 PM PDT 24 2511594596 ps
T590 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.228722733 Aug 15 05:22:43 PM PDT 24 Aug 15 05:22:50 PM PDT 24 2607755262 ps
T591 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1007453291 Aug 15 05:22:38 PM PDT 24 Aug 15 05:22:39 PM PDT 24 2347724401 ps
T227 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2270095924 Aug 15 05:23:18 PM PDT 24 Aug 15 05:23:25 PM PDT 24 24390554240 ps
T410 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.517609951 Aug 15 05:22:09 PM PDT 24 Aug 15 05:24:46 PM PDT 24 58183494703 ps
T592 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2933228624 Aug 15 05:23:19 PM PDT 24 Aug 15 05:24:29 PM PDT 24 38403311087 ps
T150 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.3706868303 Aug 15 05:22:29 PM PDT 24 Aug 15 05:22:47 PM PDT 24 3389565948647 ps
T325 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1102019256 Aug 15 05:25:09 PM PDT 24 Aug 15 05:25:15 PM PDT 24 4104189416 ps
T593 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.348714980 Aug 15 05:23:16 PM PDT 24 Aug 15 05:23:18 PM PDT 24 2154368389 ps
T594 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3068303287 Aug 15 05:22:49 PM PDT 24 Aug 15 05:22:55 PM PDT 24 2183759902 ps
T595 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1106818911 Aug 15 05:22:43 PM PDT 24 Aug 15 05:22:50 PM PDT 24 2513731095 ps
T413 /workspace/coverage/default/29.sysrst_ctrl_stress_all.3948336035 Aug 15 05:23:11 PM PDT 24 Aug 15 05:23:50 PM PDT 24 116428501306 ps
T596 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.381240568 Aug 15 05:22:52 PM PDT 24 Aug 15 05:22:59 PM PDT 24 2611707859 ps
T307 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3615701777 Aug 15 05:22:18 PM PDT 24 Aug 15 05:22:27 PM PDT 24 12985066370 ps
T597 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1287686091 Aug 15 05:22:53 PM PDT 24 Aug 15 05:23:00 PM PDT 24 2727102920 ps
T598 /workspace/coverage/default/25.sysrst_ctrl_stress_all.3369417266 Aug 15 05:23:12 PM PDT 24 Aug 15 05:23:27 PM PDT 24 12225797114 ps
T599 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2618513168 Aug 15 05:23:39 PM PDT 24 Aug 15 05:23:53 PM PDT 24 32302743530 ps
T382 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.3946878919 Aug 15 05:22:30 PM PDT 24 Aug 15 05:25:24 PM PDT 24 132137294922 ps
T600 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.219481532 Aug 15 05:23:25 PM PDT 24 Aug 15 05:24:49 PM PDT 24 121945269016 ps
T601 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.2362979125 Aug 15 05:23:16 PM PDT 24 Aug 15 05:23:19 PM PDT 24 2623717888 ps
T602 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3509486589 Aug 15 05:22:54 PM PDT 24 Aug 15 05:22:58 PM PDT 24 4132712125 ps
T603 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.602635502 Aug 15 05:22:32 PM PDT 24 Aug 15 05:24:14 PM PDT 24 84031774582 ps
T604 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2769140146 Aug 15 05:22:07 PM PDT 24 Aug 15 05:22:11 PM PDT 24 2453598494 ps
T605 /workspace/coverage/default/49.sysrst_ctrl_smoke.1584268144 Aug 15 05:23:50 PM PDT 24 Aug 15 05:23:54 PM PDT 24 2113446504 ps
T606 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.2684317252 Aug 15 05:22:30 PM PDT 24 Aug 15 05:27:49 PM PDT 24 121510204930 ps
T607 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2349089469 Aug 15 05:23:56 PM PDT 24 Aug 15 05:24:33 PM PDT 24 27847515341 ps
T608 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3649718855 Aug 15 05:23:09 PM PDT 24 Aug 15 05:23:12 PM PDT 24 2525252045 ps
T609 /workspace/coverage/default/37.sysrst_ctrl_smoke.644542934 Aug 15 05:23:20 PM PDT 24 Aug 15 05:23:27 PM PDT 24 2113948812 ps
T610 /workspace/coverage/default/28.sysrst_ctrl_alert_test.4050638919 Aug 15 05:23:05 PM PDT 24 Aug 15 05:23:07 PM PDT 24 2038638148 ps
T378 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.1658808227 Aug 15 05:23:02 PM PDT 24 Aug 15 05:27:46 PM PDT 24 131517465113 ps
T611 /workspace/coverage/default/46.sysrst_ctrl_smoke.1336682697 Aug 15 05:23:35 PM PDT 24 Aug 15 05:23:39 PM PDT 24 2116734262 ps
T612 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2524210842 Aug 15 05:22:49 PM PDT 24 Aug 15 05:22:52 PM PDT 24 2637053989 ps
T156 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.2600218435 Aug 15 05:23:51 PM PDT 24 Aug 15 05:23:54 PM PDT 24 7722994238 ps
T613 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1108373434 Aug 15 05:22:00 PM PDT 24 Aug 15 05:22:16 PM PDT 24 3607305871 ps
T381 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.360778488 Aug 15 05:22:51 PM PDT 24 Aug 15 05:24:43 PM PDT 24 94214144286 ps
T614 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.124798270 Aug 15 05:22:10 PM PDT 24 Aug 15 05:22:17 PM PDT 24 5634912804 ps
T326 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3917239155 Aug 15 05:22:29 PM PDT 24 Aug 15 05:22:40 PM PDT 24 4815760145 ps
T615 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.489497876 Aug 15 05:21:55 PM PDT 24 Aug 15 05:22:00 PM PDT 24 6696537499 ps
T616 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.160076016 Aug 15 05:22:17 PM PDT 24 Aug 15 05:22:21 PM PDT 24 2187087284 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%