SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
tb.me.obj.debounce_timer_cg[ec_rst_ctl].debounce_timer_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
tb.me.obj.debounce_timer_cg[key_intr_debounce_ctl].debounce_timer_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
tb.me.obj.debounce_timer_cg[ulp_ac_debounce_ctl].debounce_timer_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
tb.me.obj.debounce_timer_cg[ulp_lid_debounce_ctl].debounce_timer_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
tb.me.obj.debounce_timer_cg[ulp_pwrb_debounce_ctl].debounce_timer_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 0 | 3 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_debounce_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 0 | 3 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_debounce_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 0 | 3 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_debounce_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 0 | 3 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_debounce_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 0 | 3 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_debounce_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 0 | 3 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
max_range | 69 | 1 | T150 | 1 | T100 | 1 | T121 | 11 | ||||
mid_range | 473 | 1 | T83 | 1 | T34 | 1 | T262 | 1 | ||||
min_range | 406 | 1 | T4 | 1 | T25 | 1 | T1 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 0 | 3 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
max_range | 29 | 1 | T61 | 1 | T209 | 1 | T407 | 12 | ||||
mid_range | 329 | 1 | T7 | 1 | T8 | 1 | T11 | 1 | ||||
min_range | 595 | 1 | T4 | 1 | T1 | 1 | T16 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 0 | 3 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
max_range | 4 | 1 | T444 | 1 | T445 | 2 | T446 | 1 | ||||
mid_range | 60 | 1 | T2 | 2 | T32 | 1 | T35 | 2 | ||||
min_range | 32 | 1 | T33 | 1 | T34 | 1 | T30 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 0 | 3 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
max_range | 2 | 1 | T113 | 1 | T112 | 1 | - | - | ||||
mid_range | 49 | 1 | T2 | 2 | T32 | 1 | T33 | 1 | ||||
min_range | 45 | 1 | T34 | 1 | T35 | 2 | T84 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 0 | 3 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
max_range | 7 | 1 | T351 | 1 | T278 | 1 | T173 | 1 | ||||
mid_range | 45 | 1 | T2 | 2 | T33 | 1 | T35 | 2 | ||||
min_range | 44 | 1 | T32 | 1 | T34 | 1 | T30 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |