Module Definition
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Module : sysrst_ctrl_csr_assert_fpv
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_31/sysrst_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_sysrst_ctrl_csr_assert_0/sysrst_ctrl_csr_assert_fpv.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.sysrst_ctrl_csr_assert 100.00 100.00


Module Instance : tb.dut.sysrst_ctrl_csr_assert

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
99.02 100.00 96.08 100.00 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children

Since this is the module's only instance, the coverage report is the same as for the module.
Assert Coverage for Module : sysrst_ctrl_csr_assert_fpv
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 36 36 100.00 36 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 36 36 100.00 36 100.00



Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
TlulOOBAddrErr_A 1026056372 10003 0 0
auto_block_debounce_ctl_rd_A 1026056372 2631 0 0
auto_block_out_ctl_rd_A 1026056372 3657 0 0
com_det_ctl_0_rd_A 1026056372 4935 0 0
com_det_ctl_1_rd_A 1026056372 5062 0 0
com_det_ctl_2_rd_A 1026056372 5089 0 0
com_det_ctl_3_rd_A 1026056372 5253 0 0
com_out_ctl_0_rd_A 1026056372 5741 0 0
com_out_ctl_1_rd_A 1026056372 5656 0 0
com_out_ctl_2_rd_A 1026056372 5627 0 0
com_out_ctl_3_rd_A 1026056372 5739 0 0
com_pre_det_ctl_0_rd_A 1026056372 2169 0 0
com_pre_det_ctl_1_rd_A 1026056372 2150 0 0
com_pre_det_ctl_2_rd_A 1026056372 2066 0 0
com_pre_det_ctl_3_rd_A 1026056372 2119 0 0
com_pre_sel_ctl_0_rd_A 1026056372 6422 0 0
com_pre_sel_ctl_1_rd_A 1026056372 6398 0 0
com_pre_sel_ctl_2_rd_A 1026056372 6233 0 0
com_pre_sel_ctl_3_rd_A 1026056372 6151 0 0
com_sel_ctl_0_rd_A 1026056372 5779 0 0
com_sel_ctl_1_rd_A 1026056372 6124 0 0
com_sel_ctl_2_rd_A 1026056372 5983 0 0
com_sel_ctl_3_rd_A 1026056372 6151 0 0
ec_rst_ctl_rd_A 1026056372 3209 0 0
intr_enable_rd_A 1026056372 2754 0 0
key_intr_ctl_rd_A 1026056372 5897 0 0
key_intr_debounce_ctl_rd_A 1026056372 2190 0 0
key_invert_ctl_rd_A 1026056372 5950 0 0
pin_allowed_ctl_rd_A 1026056372 8217 0 0
pin_out_ctl_rd_A 1026056372 5271 0 0
pin_out_value_rd_A 1026056372 5134 0 0
regwen_rd_A 1026056372 2556 0 0
ulp_ac_debounce_ctl_rd_A 1026056372 2275 0 0
ulp_ctl_rd_A 1026056372 2235 0 0
ulp_lid_debounce_ctl_rd_A 1026056372 2119 0 0
ulp_pwrb_debounce_ctl_rd_A 1026056372 2096 0 0


TlulOOBAddrErr_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 10003 0 0
T1 249622 0 0 0
T2 160572 0 0 0
T3 117341 0 0 0
T14 53100 0 0 0
T15 217292 0 0 0
T16 251188 0 0 0
T17 54679 0 0 0
T18 219434 0 0 0
T19 259324 0 0 0
T23 90850 15 0 0
T49 0 20 0 0
T82 0 4 0 0
T83 0 22 0 0
T86 0 13 0 0
T117 0 6 0 0
T136 0 2 0 0
T138 0 22 0 0
T292 0 7 0 0
T293 0 21 0 0

auto_block_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2631 0 0
T10 197580 0 0 0
T11 47466 0 0 0
T12 242367 0 0 0
T32 287208 9 0 0
T33 0 1 0 0
T64 0 2 0 0
T67 0 20 0 0
T76 0 1 0 0
T78 210972 0 0 0
T79 92821 0 0 0
T80 54383 0 0 0
T81 74344 0 0 0
T85 331438 0 0 0
T91 174897 0 0 0
T117 0 5 0 0
T136 0 22 0 0
T139 0 5 0 0
T243 0 12 0 0
T294 0 7 0 0

auto_block_out_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 3657 0 0
T10 197580 0 0 0
T11 47466 0 0 0
T12 242367 0 0 0
T32 287208 13 0 0
T64 0 4 0 0
T67 0 2 0 0
T76 0 15 0 0
T78 210972 0 0 0
T79 92821 0 0 0
T80 54383 0 0 0
T81 74344 0 0 0
T85 331438 0 0 0
T91 174897 0 0 0
T117 0 12 0 0
T136 0 21 0 0
T139 0 4 0 0
T243 0 9 0 0
T294 0 17 0 0
T295 0 6 0 0

com_det_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 4935 0 0
T35 618686 100 0 0
T36 809098 0 0 0
T43 0 68 0 0
T47 0 76 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 30 0 0
T118 0 49 0 0
T119 0 76 0 0
T136 0 15 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 7 0 0
T296 0 10 0 0
T297 0 27 0 0

com_det_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5062 0 0
T35 618686 77 0 0
T36 809098 0 0 0
T43 0 79 0 0
T47 0 82 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 36 0 0
T118 0 57 0 0
T119 0 83 0 0
T136 0 10 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 13 0 0
T296 0 13 0 0
T297 0 29 0 0

com_det_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5089 0 0
T35 618686 46 0 0
T36 809098 0 0 0
T43 0 44 0 0
T47 0 58 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 24 0 0
T118 0 38 0 0
T119 0 84 0 0
T136 0 21 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 13 0 0
T296 0 11 0 0
T297 0 8 0 0

com_det_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5253 0 0
T35 618686 81 0 0
T36 809098 0 0 0
T43 0 72 0 0
T47 0 79 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 13 0 0
T118 0 36 0 0
T119 0 56 0 0
T136 0 15 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 12 0 0
T296 0 9 0 0
T297 0 27 0 0

com_out_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5741 0 0
T35 618686 63 0 0
T36 809098 0 0 0
T43 0 50 0 0
T47 0 75 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 16 0 0
T118 0 51 0 0
T119 0 77 0 0
T136 0 23 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 11 0 0
T296 0 14 0 0
T297 0 28 0 0

com_out_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5656 0 0
T35 618686 74 0 0
T36 809098 0 0 0
T43 0 34 0 0
T47 0 75 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 2 0 0
T118 0 72 0 0
T119 0 51 0 0
T136 0 26 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 12 0 0
T296 0 21 0 0
T297 0 10 0 0

com_out_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5627 0 0
T35 618686 78 0 0
T36 809098 0 0 0
T43 0 43 0 0
T47 0 63 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 6 0 0
T118 0 49 0 0
T119 0 76 0 0
T136 0 19 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 12 0 0
T296 0 14 0 0
T297 0 17 0 0

com_out_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5739 0 0
T35 618686 78 0 0
T36 809098 0 0 0
T43 0 59 0 0
T47 0 78 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 23 0 0
T118 0 35 0 0
T119 0 47 0 0
T136 0 16 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 22 0 0
T296 0 25 0 0
T297 0 8 0 0

com_pre_det_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2169 0 0
T53 240331 0 0 0
T54 73959 0 0 0
T75 601928 0 0 0
T76 531865 0 0 0
T117 290498 30 0 0
T136 332469 10 0 0
T137 167236 0 0 0
T139 81785 0 0 0
T243 0 19 0 0
T296 0 11 0 0
T297 0 16 0 0
T298 0 18 0 0
T299 0 15 0 0
T300 0 24 0 0
T301 0 8 0 0
T302 0 51 0 0
T303 115884 0 0 0
T304 251015 0 0 0

com_pre_det_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2150 0 0
T53 240331 0 0 0
T54 73959 0 0 0
T75 601928 0 0 0
T76 531865 0 0 0
T117 290498 5 0 0
T136 332469 20 0 0
T137 167236 0 0 0
T139 81785 0 0 0
T243 0 14 0 0
T296 0 15 0 0
T297 0 13 0 0
T298 0 10 0 0
T299 0 21 0 0
T300 0 26 0 0
T301 0 8 0 0
T302 0 52 0 0
T303 115884 0 0 0
T304 251015 0 0 0

com_pre_det_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2066 0 0
T53 240331 0 0 0
T54 73959 0 0 0
T75 601928 0 0 0
T76 531865 0 0 0
T117 290498 9 0 0
T136 332469 25 0 0
T137 167236 0 0 0
T139 81785 0 0 0
T243 0 13 0 0
T296 0 13 0 0
T297 0 9 0 0
T298 0 20 0 0
T299 0 5 0 0
T300 0 25 0 0
T301 0 2 0 0
T302 0 43 0 0
T303 115884 0 0 0
T304 251015 0 0 0

com_pre_det_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2119 0 0
T53 240331 0 0 0
T54 73959 0 0 0
T75 601928 0 0 0
T76 531865 0 0 0
T117 290498 25 0 0
T136 332469 9 0 0
T137 167236 0 0 0
T139 81785 0 0 0
T243 0 15 0 0
T296 0 27 0 0
T297 0 20 0 0
T298 0 13 0 0
T299 0 30 0 0
T300 0 12 0 0
T301 0 10 0 0
T302 0 39 0 0
T303 115884 0 0 0
T304 251015 0 0 0

com_pre_sel_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 6422 0 0
T35 618686 87 0 0
T36 809098 0 0 0
T43 0 52 0 0
T47 0 58 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 13 0 0
T118 0 51 0 0
T119 0 61 0 0
T136 0 19 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 13 0 0
T296 0 4 0 0
T297 0 15 0 0

com_pre_sel_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 6398 0 0
T35 618686 76 0 0
T36 809098 0 0 0
T43 0 42 0 0
T47 0 57 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 11 0 0
T118 0 54 0 0
T119 0 62 0 0
T136 0 13 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 1 0 0
T296 0 18 0 0
T297 0 22 0 0

com_pre_sel_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 6233 0 0
T35 618686 57 0 0
T36 809098 0 0 0
T43 0 55 0 0
T47 0 72 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 8 0 0
T118 0 46 0 0
T119 0 77 0 0
T136 0 41 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 9 0 0
T296 0 18 0 0
T297 0 23 0 0

com_pre_sel_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 6151 0 0
T35 618686 61 0 0
T36 809098 0 0 0
T43 0 64 0 0
T47 0 76 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 26 0 0
T118 0 62 0 0
T119 0 45 0 0
T136 0 23 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 10 0 0
T296 0 20 0 0
T297 0 14 0 0

com_sel_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5779 0 0
T35 618686 78 0 0
T36 809098 0 0 0
T43 0 50 0 0
T47 0 59 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 2 0 0
T118 0 52 0 0
T119 0 68 0 0
T136 0 18 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 27 0 0
T296 0 20 0 0
T297 0 19 0 0

com_sel_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 6124 0 0
T35 618686 77 0 0
T36 809098 0 0 0
T43 0 54 0 0
T47 0 62 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 29 0 0
T118 0 43 0 0
T119 0 48 0 0
T136 0 5 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 11 0 0
T296 0 7 0 0
T297 0 24 0 0

com_sel_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5983 0 0
T35 618686 71 0 0
T36 809098 0 0 0
T43 0 59 0 0
T47 0 69 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 28 0 0
T118 0 37 0 0
T119 0 104 0 0
T136 0 26 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 9 0 0
T296 0 8 0 0
T297 0 12 0 0

com_sel_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 6151 0 0
T35 618686 81 0 0
T36 809098 0 0 0
T43 0 56 0 0
T47 0 69 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 29 0 0
T118 0 23 0 0
T119 0 79 0 0
T136 0 15 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 3 0 0
T296 0 11 0 0
T297 0 18 0 0

ec_rst_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 3209 0 0
T35 618686 22 0 0
T36 809098 0 0 0
T47 0 1 0 0
T50 38608 0 0 0
T88 61424 0 0 0
T96 0 2 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T117 0 26 0 0
T118 0 19 0 0
T136 0 13 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 9 0 0
T296 0 16 0 0
T305 0 3 0 0
T306 0 1 0 0

intr_enable_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2754 0 0
T53 240331 0 0 0
T54 73959 0 0 0
T75 601928 0 0 0
T76 531865 0 0 0
T117 290498 17 0 0
T136 332469 28 0 0
T137 167236 0 0 0
T139 81785 0 0 0
T243 0 12 0 0
T262 0 3 0 0
T296 0 26 0 0
T297 0 16 0 0
T298 0 15 0 0
T299 0 27 0 0
T300 0 22 0 0
T303 115884 0 0 0
T304 251015 0 0 0
T307 0 18 0 0

key_intr_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5897 0 0
T7 88902 6 0 0
T8 13681 1 0 0
T9 61164 0 0 0
T30 20213 0 0 0
T32 287208 0 0 0
T50 0 1 0 0
T68 199243 0 0 0
T69 248990 0 0 0
T70 101088 0 0 0
T84 73356 0 0 0
T116 0 6 0 0
T117 0 1 0 0
T136 0 19 0 0
T177 76386 0 0 0
T198 0 1 0 0
T243 0 8 0 0
T296 0 13 0 0
T297 0 19 0 0

key_intr_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2190 0 0
T53 240331 0 0 0
T54 73959 0 0 0
T75 601928 0 0 0
T76 531865 0 0 0
T117 290498 20 0 0
T136 332469 25 0 0
T137 167236 0 0 0
T139 81785 0 0 0
T243 0 7 0 0
T296 0 6 0 0
T297 0 15 0 0
T298 0 25 0 0
T299 0 42 0 0
T300 0 16 0 0
T301 0 16 0 0
T302 0 37 0 0
T303 115884 0 0 0
T304 251015 0 0 0

key_invert_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5950 0 0
T1 249622 0 0 0
T2 160572 0 0 0
T4 124346 36 0 0
T5 66507 0 0 0
T6 101582 0 0 0
T14 53100 0 0 0
T15 217292 0 0 0
T16 251188 0 0 0
T17 54679 0 0 0
T23 90850 0 0 0
T29 0 53 0 0
T87 0 62 0 0
T117 0 84 0 0
T136 0 27 0 0
T157 0 69 0 0
T239 0 53 0 0
T243 0 7 0 0
T308 0 68 0 0
T309 0 60 0 0

pin_allowed_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 8217 0 0
T67 176933 0 0 0
T75 601928 0 0 0
T76 531865 0 0 0
T117 290498 35 0 0
T133 130858 46 0 0
T134 202286 0 0 0
T135 97087 0 0 0
T136 332469 26 0 0
T137 167236 0 0 0
T156 0 50 0 0
T243 0 5 0 0
T261 0 62 0 0
T262 0 54 0 0
T296 0 16 0 0
T303 115884 0 0 0
T310 0 80 0 0
T311 0 79 0 0

pin_out_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5271 0 0
T67 176933 0 0 0
T75 601928 0 0 0
T76 531865 0 0 0
T117 290498 17 0 0
T133 130858 28 0 0
T134 202286 0 0 0
T135 97087 0 0 0
T136 332469 18 0 0
T137 167236 0 0 0
T156 0 46 0 0
T243 0 9 0 0
T261 0 75 0 0
T262 0 57 0 0
T296 0 6 0 0
T303 115884 0 0 0
T310 0 65 0 0
T311 0 56 0 0

pin_out_value_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 5134 0 0
T67 176933 0 0 0
T75 601928 0 0 0
T76 531865 0 0 0
T117 290498 19 0 0
T133 130858 17 0 0
T134 202286 0 0 0
T135 97087 0 0 0
T136 332469 19 0 0
T137 167236 0 0 0
T156 0 75 0 0
T243 0 1 0 0
T261 0 55 0 0
T262 0 91 0 0
T296 0 13 0 0
T303 115884 0 0 0
T310 0 81 0 0
T311 0 62 0 0

regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2556 0 0
T53 240331 0 0 0
T54 73959 0 0 0
T75 601928 0 0 0
T76 531865 0 0 0
T117 290498 11 0 0
T136 332469 22 0 0
T137 167236 0 0 0
T139 81785 0 0 0
T243 0 4 0 0
T296 0 11 0 0
T297 0 14 0 0
T298 0 11 0 0
T299 0 22 0 0
T300 0 20 0 0
T301 0 20 0 0
T302 0 40 0 0
T303 115884 0 0 0
T304 251015 0 0 0

ulp_ac_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2275 0 0
T22 56541 11 0 0
T35 618686 0 0 0
T36 809098 0 0 0
T75 0 2 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T104 0 6 0 0
T107 0 2 0 0
T117 0 22 0 0
T136 0 32 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 13 0 0
T296 0 9 0 0
T312 0 6 0 0
T313 0 5 0 0

ulp_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2235 0 0
T22 56541 7 0 0
T35 618686 0 0 0
T36 809098 0 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T104 0 20 0 0
T107 0 7 0 0
T117 0 19 0 0
T136 0 20 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 14 0 0
T296 0 8 0 0
T297 0 24 0 0
T312 0 15 0 0
T313 0 7 0 0

ulp_lid_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2119 0 0
T22 56541 12 0 0
T35 618686 0 0 0
T36 809098 0 0 0
T75 0 7 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T104 0 8 0 0
T107 0 6 0 0
T117 0 14 0 0
T136 0 4 0 0
T144 0 2 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 1 0 0
T312 0 5 0 0
T313 0 2 0 0

ulp_pwrb_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1026056372 2096 0 0
T22 56541 8 0 0
T35 618686 0 0 0
T36 809098 0 0 0
T76 0 2 0 0
T88 61424 0 0 0
T100 120764 0 0 0
T101 33018 0 0 0
T102 103850 0 0 0
T104 0 5 0 0
T107 0 1 0 0
T117 0 14 0 0
T136 0 19 0 0
T144 0 7 0 0
T145 238610 0 0 0
T146 204578 0 0 0
T147 54475 0 0 0
T243 0 12 0 0
T312 0 16 0 0
T313 0 9 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%