Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts

Module : sysrst_ctrl_csr_assert_fpv
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_03/sysrst_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_sysrst_ctrl_csr_assert_0/sysrst_ctrl_csr_assert_fpv.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.sysrst_ctrl_csr_assert 100.00 100.00


Module Instance : tb.dut.sysrst_ctrl_csr_assert

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
99.02 100.00 96.08 100.00 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children

Since this is the module's only instance, the coverage report is the same as for the module.
Assert Coverage for Module : sysrst_ctrl_csr_assert_fpv
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 36 36 100.00 36 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 36 36 100.00 36 100.00



Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
TlulOOBAddrErr_A 1194890855 10471 0 0
auto_block_debounce_ctl_rd_A 1194890855 1691 0 0
auto_block_out_ctl_rd_A 1194890855 2313 0 0
com_det_ctl_0_rd_A 1194890855 3617 0 0
com_det_ctl_1_rd_A 1194890855 3575 0 0
com_det_ctl_2_rd_A 1194890855 3601 0 0
com_det_ctl_3_rd_A 1194890855 3741 0 0
com_out_ctl_0_rd_A 1194890855 4090 0 0
com_out_ctl_1_rd_A 1194890855 4106 0 0
com_out_ctl_2_rd_A 1194890855 3800 0 0
com_out_ctl_3_rd_A 1194890855 4149 0 0
com_pre_det_ctl_0_rd_A 1194890855 1451 0 0
com_pre_det_ctl_1_rd_A 1194890855 1411 0 0
com_pre_det_ctl_2_rd_A 1194890855 1437 0 0
com_pre_det_ctl_3_rd_A 1194890855 1523 0 0
com_pre_sel_ctl_0_rd_A 1194890855 4151 0 0
com_pre_sel_ctl_1_rd_A 1194890855 4182 0 0
com_pre_sel_ctl_2_rd_A 1194890855 4430 0 0
com_pre_sel_ctl_3_rd_A 1194890855 4060 0 0
com_sel_ctl_0_rd_A 1194890855 4183 0 0
com_sel_ctl_1_rd_A 1194890855 4262 0 0
com_sel_ctl_2_rd_A 1194890855 4364 0 0
com_sel_ctl_3_rd_A 1194890855 4228 0 0
ec_rst_ctl_rd_A 1194890855 2266 0 0
intr_enable_rd_A 1194890855 2069 0 0
key_intr_ctl_rd_A 1194890855 3468 0 0
key_intr_debounce_ctl_rd_A 1194890855 1516 0 0
key_invert_ctl_rd_A 1194890855 4334 0 0
pin_allowed_ctl_rd_A 1194890855 4339 0 0
pin_out_ctl_rd_A 1194890855 3311 0 0
pin_out_value_rd_A 1194890855 3220 0 0
regwen_rd_A 1194890855 1658 0 0
ulp_ac_debounce_ctl_rd_A 1194890855 1595 0 0
ulp_ctl_rd_A 1194890855 1470 0 0
ulp_lid_debounce_ctl_rd_A 1194890855 1411 0 0
ulp_pwrb_debounce_ctl_rd_A 1194890855 1525 0 0


TlulOOBAddrErr_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 10471 0 0
T6 201173 0 0 0
T9 347532 9 0 0
T17 0 5 0 0
T23 37487 0 0 0
T57 208232 0 0 0
T62 0 20 0 0
T75 0 3 0 0
T79 42471 0 0 0
T89 250769 0 0 0
T90 63263 0 0 0
T91 0 5 0 0
T121 40980 0 0 0
T161 0 13 0 0
T181 105933 0 0 0
T182 201588 0 0 0
T196 0 5 0 0
T226 0 4 0 0
T236 0 8 0 0
T311 0 2 0 0

auto_block_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1691 0 0
T8 58170 0 0 0
T9 347532 0 0 0
T22 49668 0 0 0
T25 238551 0 0 0
T26 188203 15 0 0
T27 145056 0 0 0
T66 42666 0 0 0
T67 105010 0 0 0
T68 91312 0 0 0
T75 0 16 0 0
T78 242961 0 0 0
T91 0 46 0 0
T119 0 8 0 0
T196 0 20 0 0
T233 0 28 0 0
T286 0 2 0 0
T311 0 9 0 0
T333 0 6 0 0
T334 0 13 0 0

auto_block_out_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 2313 0 0
T8 58170 0 0 0
T9 347532 0 0 0
T22 49668 0 0 0
T25 238551 0 0 0
T26 188203 12 0 0
T27 145056 0 0 0
T66 42666 0 0 0
T67 105010 0 0 0
T68 91312 0 0 0
T75 0 17 0 0
T78 242961 0 0 0
T91 0 55 0 0
T119 0 7 0 0
T196 0 21 0 0
T233 0 25 0 0
T286 0 5 0 0
T311 0 11 0 0
T333 0 14 0 0
T334 0 2 0 0

com_det_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 3617 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 73 0 0
T33 0 29 0 0
T58 216471 0 0 0
T75 0 17 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 50 0 0
T92 250949 0 0 0
T96 0 40 0 0
T147 48404 0 0 0
T196 0 14 0 0
T233 0 12 0 0
T268 0 60 0 0
T289 0 68 0 0
T311 0 17 0 0
T335 40488 0 0 0

com_det_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 3575 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 86 0 0
T33 0 30 0 0
T58 216471 0 0 0
T75 0 18 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 38 0 0
T92 250949 0 0 0
T96 0 54 0 0
T147 48404 0 0 0
T196 0 22 0 0
T233 0 21 0 0
T268 0 49 0 0
T289 0 37 0 0
T311 0 18 0 0
T335 40488 0 0 0

com_det_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 3601 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 65 0 0
T33 0 72 0 0
T58 216471 0 0 0
T75 0 11 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 35 0 0
T92 250949 0 0 0
T96 0 44 0 0
T147 48404 0 0 0
T196 0 28 0 0
T233 0 11 0 0
T268 0 65 0 0
T289 0 45 0 0
T311 0 5 0 0
T335 40488 0 0 0

com_det_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 3741 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 61 0 0
T33 0 49 0 0
T58 216471 0 0 0
T75 0 17 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 37 0 0
T92 250949 0 0 0
T96 0 33 0 0
T147 48404 0 0 0
T196 0 19 0 0
T233 0 24 0 0
T268 0 73 0 0
T289 0 38 0 0
T311 0 10 0 0
T335 40488 0 0 0

com_out_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4090 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 75 0 0
T33 0 34 0 0
T58 216471 0 0 0
T75 0 15 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 46 0 0
T92 250949 0 0 0
T96 0 41 0 0
T147 48404 0 0 0
T196 0 5 0 0
T233 0 28 0 0
T268 0 57 0 0
T289 0 52 0 0
T311 0 10 0 0
T335 40488 0 0 0

com_out_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4106 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 56 0 0
T33 0 49 0 0
T58 216471 0 0 0
T75 0 20 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 31 0 0
T92 250949 0 0 0
T96 0 36 0 0
T147 48404 0 0 0
T196 0 17 0 0
T233 0 21 0 0
T268 0 83 0 0
T289 0 52 0 0
T311 0 7 0 0
T335 40488 0 0 0

com_out_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 3800 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 73 0 0
T33 0 24 0 0
T58 216471 0 0 0
T75 0 15 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 42 0 0
T92 250949 0 0 0
T96 0 36 0 0
T147 48404 0 0 0
T196 0 12 0 0
T233 0 26 0 0
T268 0 76 0 0
T289 0 31 0 0
T334 0 15 0 0
T335 40488 0 0 0

com_out_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4149 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 89 0 0
T33 0 54 0 0
T58 216471 0 0 0
T75 0 20 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 38 0 0
T92 250949 0 0 0
T96 0 42 0 0
T147 48404 0 0 0
T196 0 20 0 0
T233 0 27 0 0
T268 0 76 0 0
T289 0 39 0 0
T311 0 4 0 0
T335 40488 0 0 0

com_pre_det_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1451 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 10 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 53 0 0
T92 250949 0 0 0
T147 48404 0 0 0
T196 0 11 0 0
T233 0 10 0 0
T255 0 14 0 0
T260 0 35 0 0
T311 0 9 0 0
T334 0 4 0 0
T335 40488 0 0 0
T336 0 28 0 0
T337 0 24 0 0

com_pre_det_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1411 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 19 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 23 0 0
T92 250949 0 0 0
T147 48404 0 0 0
T196 0 32 0 0
T233 0 15 0 0
T255 0 21 0 0
T260 0 35 0 0
T311 0 11 0 0
T334 0 13 0 0
T335 40488 0 0 0
T336 0 19 0 0
T337 0 31 0 0

com_pre_det_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1437 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 4 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 42 0 0
T92 250949 0 0 0
T147 48404 0 0 0
T196 0 18 0 0
T233 0 18 0 0
T255 0 16 0 0
T260 0 24 0 0
T311 0 6 0 0
T334 0 11 0 0
T335 40488 0 0 0
T336 0 24 0 0
T337 0 39 0 0

com_pre_det_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1523 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 13 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 55 0 0
T92 250949 0 0 0
T147 48404 0 0 0
T196 0 23 0 0
T233 0 16 0 0
T255 0 36 0 0
T260 0 22 0 0
T311 0 13 0 0
T334 0 5 0 0
T335 40488 0 0 0
T336 0 26 0 0
T337 0 41 0 0

com_pre_sel_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4151 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 73 0 0
T33 0 33 0 0
T58 216471 0 0 0
T75 0 14 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 49 0 0
T92 250949 0 0 0
T96 0 25 0 0
T147 48404 0 0 0
T196 0 15 0 0
T233 0 10 0 0
T268 0 88 0 0
T289 0 29 0 0
T311 0 7 0 0
T335 40488 0 0 0

com_pre_sel_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4182 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 57 0 0
T33 0 26 0 0
T58 216471 0 0 0
T75 0 18 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 32 0 0
T92 250949 0 0 0
T96 0 42 0 0
T147 48404 0 0 0
T196 0 13 0 0
T233 0 24 0 0
T268 0 71 0 0
T289 0 50 0 0
T335 40488 0 0 0
T336 0 12 0 0

com_pre_sel_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4430 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 80 0 0
T33 0 31 0 0
T58 216471 0 0 0
T75 0 25 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 38 0 0
T92 250949 0 0 0
T96 0 52 0 0
T147 48404 0 0 0
T196 0 18 0 0
T233 0 27 0 0
T268 0 82 0 0
T289 0 53 0 0
T311 0 18 0 0
T335 40488 0 0 0

com_pre_sel_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4060 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 77 0 0
T33 0 56 0 0
T58 216471 0 0 0
T75 0 16 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 44 0 0
T92 250949 0 0 0
T96 0 30 0 0
T147 48404 0 0 0
T196 0 18 0 0
T233 0 20 0 0
T268 0 54 0 0
T289 0 54 0 0
T311 0 8 0 0
T335 40488 0 0 0

com_sel_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4183 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 91 0 0
T33 0 51 0 0
T58 216471 0 0 0
T75 0 30 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 37 0 0
T92 250949 0 0 0
T96 0 45 0 0
T147 48404 0 0 0
T196 0 13 0 0
T233 0 3 0 0
T268 0 80 0 0
T289 0 26 0 0
T334 0 2 0 0
T335 40488 0 0 0

com_sel_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4262 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 63 0 0
T33 0 60 0 0
T58 216471 0 0 0
T75 0 13 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 46 0 0
T92 250949 0 0 0
T96 0 47 0 0
T147 48404 0 0 0
T196 0 20 0 0
T233 0 7 0 0
T268 0 74 0 0
T289 0 34 0 0
T311 0 17 0 0
T335 40488 0 0 0

com_sel_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4364 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 67 0 0
T33 0 33 0 0
T58 216471 0 0 0
T75 0 16 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 31 0 0
T92 250949 0 0 0
T96 0 38 0 0
T147 48404 0 0 0
T196 0 23 0 0
T233 0 15 0 0
T268 0 47 0 0
T289 0 44 0 0
T311 0 12 0 0
T335 40488 0 0 0

com_sel_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4228 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T32 0 69 0 0
T33 0 54 0 0
T58 216471 0 0 0
T75 0 24 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 42 0 0
T92 250949 0 0 0
T96 0 39 0 0
T147 48404 0 0 0
T196 0 18 0 0
T233 0 13 0 0
T268 0 61 0 0
T289 0 44 0 0
T311 0 8 0 0
T335 40488 0 0 0

ec_rst_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 2266 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T29 0 9 0 0
T32 0 2 0 0
T33 0 14 0 0
T58 216471 0 0 0
T75 0 24 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 27 0 0
T92 250949 0 0 0
T147 48404 0 0 0
T196 0 10 0 0
T235 0 3 0 0
T297 0 6 0 0
T311 0 2 0 0
T335 40488 0 0 0
T338 0 1 0 0

intr_enable_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 2069 0 0
T8 58170 0 0 0
T9 347532 0 0 0
T22 49668 0 0 0
T25 238551 0 0 0
T26 188203 27 0 0
T27 145056 0 0 0
T66 42666 0 0 0
T67 105010 0 0 0
T68 91312 0 0 0
T75 0 17 0 0
T78 242961 0 0 0
T91 0 26 0 0
T196 0 12 0 0
T233 0 53 0 0
T251 0 7 0 0
T311 0 7 0 0
T334 0 1 0 0
T336 0 16 0 0
T339 0 21 0 0

key_intr_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 3468 0 0
T10 242071 0 0 0
T11 255851 5 0 0
T28 223228 0 0 0
T43 0 2 0 0
T44 0 1 0 0
T48 0 7 0 0
T58 216471 0 0 0
T75 0 18 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 25 0 0
T92 250949 0 0 0
T147 48404 0 0 0
T196 0 21 0 0
T204 0 1 0 0
T233 0 22 0 0
T311 0 14 0 0
T335 40488 0 0 0

key_intr_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1516 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 24 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 38 0 0
T92 250949 0 0 0
T147 48404 0 0 0
T196 0 10 0 0
T233 0 35 0 0
T255 0 20 0 0
T260 0 40 0 0
T311 0 6 0 0
T334 0 18 0 0
T335 40488 0 0 0
T336 0 13 0 0
T337 0 32 0 0

key_invert_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4334 0 0
T3 81967 0 0 0
T7 20487 0 0 0
T8 58170 0 0 0
T14 173858 52 0 0
T15 120419 0 0 0
T16 120237 0 0 0
T22 0 35 0 0
T24 50845 0 0 0
T25 238551 0 0 0
T26 188203 0 0 0
T66 42666 0 0 0
T75 0 19 0 0
T85 0 27 0 0
T87 0 93 0 0
T91 0 58 0 0
T196 0 100 0 0
T200 0 59 0 0
T237 0 52 0 0
T243 0 36 0 0

pin_allowed_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 4339 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 18 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 106 0 0
T92 250949 0 0 0
T98 0 58 0 0
T105 0 73 0 0
T147 48404 0 0 0
T195 0 41 0 0
T196 0 14 0 0
T233 0 11 0 0
T313 0 69 0 0
T334 0 3 0 0
T335 40488 0 0 0
T339 0 78 0 0

pin_out_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 3311 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 23 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 106 0 0
T92 250949 0 0 0
T98 0 44 0 0
T105 0 42 0 0
T147 48404 0 0 0
T195 0 52 0 0
T196 0 23 0 0
T233 0 22 0 0
T311 0 15 0 0
T313 0 41 0 0
T335 40488 0 0 0
T339 0 60 0 0

pin_out_value_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 3220 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 15 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 135 0 0
T92 250949 0 0 0
T98 0 26 0 0
T105 0 75 0 0
T147 48404 0 0 0
T195 0 30 0 0
T196 0 26 0 0
T233 0 30 0 0
T311 0 8 0 0
T313 0 33 0 0
T335 40488 0 0 0
T339 0 69 0 0

regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1658 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 23 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 49 0 0
T92 250949 0 0 0
T147 48404 0 0 0
T196 0 29 0 0
T233 0 22 0 0
T255 0 13 0 0
T260 0 34 0 0
T311 0 2 0 0
T334 0 4 0 0
T335 40488 0 0 0
T336 0 27 0 0
T337 0 41 0 0

ulp_ac_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1595 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 19 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 37 0 0
T92 250949 0 0 0
T109 0 6 0 0
T116 0 8 0 0
T146 0 2 0 0
T147 48404 0 0 0
T196 0 11 0 0
T233 0 32 0 0
T311 0 12 0 0
T334 0 9 0 0
T335 40488 0 0 0
T340 0 5 0 0

ulp_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1470 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T75 0 23 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 44 0 0
T92 250949 0 0 0
T109 0 2 0 0
T146 0 4 0 0
T147 48404 0 0 0
T196 0 14 0 0
T233 0 31 0 0
T311 0 12 0 0
T334 0 7 0 0
T335 40488 0 0 0
T336 0 26 0 0
T340 0 4 0 0

ulp_lid_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1411 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T72 0 3 0 0
T75 0 29 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 35 0 0
T92 250949 0 0 0
T109 0 8 0 0
T146 0 7 0 0
T147 48404 0 0 0
T196 0 22 0 0
T228 0 6 0 0
T233 0 14 0 0
T311 0 4 0 0
T334 0 5 0 0
T335 40488 0 0 0

ulp_pwrb_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1194890855 1525 0 0
T10 242071 0 0 0
T11 255851 0 0 0
T28 223228 0 0 0
T58 216471 0 0 0
T72 0 2 0 0
T75 0 14 0 0
T80 456636 0 0 0
T82 59709 0 0 0
T91 305752 39 0 0
T92 250949 0 0 0
T116 0 5 0 0
T146 0 6 0 0
T147 48404 0 0 0
T196 0 16 0 0
T228 0 8 0 0
T233 0 7 0 0
T311 0 12 0 0
T334 0 13 0 0
T335 40488 0 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%