Module Definition
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Module : sysrst_ctrl_csr_assert_fpv
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_08/sysrst_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_sysrst_ctrl_csr_assert_0/sysrst_ctrl_csr_assert_fpv.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.sysrst_ctrl_csr_assert 100.00 100.00


Module Instance : tb.dut.sysrst_ctrl_csr_assert

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
99.02 100.00 96.08 100.00 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children

Since this is the module's only instance, the coverage report is the same as for the module.
Assert Coverage for Module : sysrst_ctrl_csr_assert_fpv
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 36 36 100.00 36 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 36 36 100.00 36 100.00



Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
TlulOOBAddrErr_A 1214223444 11046 0 0
auto_block_debounce_ctl_rd_A 1214223444 1800 0 0
auto_block_out_ctl_rd_A 1214223444 2677 0 0
com_det_ctl_0_rd_A 1214223444 4677 0 0
com_det_ctl_1_rd_A 1214223444 4565 0 0
com_det_ctl_2_rd_A 1214223444 4548 0 0
com_det_ctl_3_rd_A 1214223444 4647 0 0
com_out_ctl_0_rd_A 1214223444 5293 0 0
com_out_ctl_1_rd_A 1214223444 5143 0 0
com_out_ctl_2_rd_A 1214223444 5015 0 0
com_out_ctl_3_rd_A 1214223444 5017 0 0
com_pre_det_ctl_0_rd_A 1214223444 1782 0 0
com_pre_det_ctl_1_rd_A 1214223444 1679 0 0
com_pre_det_ctl_2_rd_A 1214223444 1732 0 0
com_pre_det_ctl_3_rd_A 1214223444 1713 0 0
com_pre_sel_ctl_0_rd_A 1214223444 5342 0 0
com_pre_sel_ctl_1_rd_A 1214223444 5420 0 0
com_pre_sel_ctl_2_rd_A 1214223444 5257 0 0
com_pre_sel_ctl_3_rd_A 1214223444 5582 0 0
com_sel_ctl_0_rd_A 1214223444 5446 0 0
com_sel_ctl_1_rd_A 1214223444 5197 0 0
com_sel_ctl_2_rd_A 1214223444 5330 0 0
com_sel_ctl_3_rd_A 1214223444 5477 0 0
ec_rst_ctl_rd_A 1214223444 3096 0 0
intr_enable_rd_A 1214223444 2344 0 0
key_intr_ctl_rd_A 1214223444 4332 0 0
key_intr_debounce_ctl_rd_A 1214223444 1670 0 0
key_invert_ctl_rd_A 1214223444 5701 0 0
pin_allowed_ctl_rd_A 1214223444 6032 0 0
pin_out_ctl_rd_A 1214223444 4400 0 0
pin_out_value_rd_A 1214223444 4114 0 0
regwen_rd_A 1214223444 1814 0 0
ulp_ac_debounce_ctl_rd_A 1214223444 1774 0 0
ulp_ctl_rd_A 1214223444 1861 0 0
ulp_lid_debounce_ctl_rd_A 1214223444 1781 0 0
ulp_pwrb_debounce_ctl_rd_A 1214223444 1835 0 0


TlulOOBAddrErr_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 11046 0 0
T7 18204 0 0 0
T9 215113 0 0 0
T10 53711 0 0 0
T27 166213 12 0 0
T69 201128 0 0 0
T70 247878 0 0 0
T71 200634 0 0 0
T72 36325 0 0 0
T73 211157 0 0 0
T81 255838 0 0 0
T97 0 10 0 0
T106 0 12 0 0
T156 0 10 0 0
T192 0 13 0 0
T352 0 20 0 0
T353 0 3 0 0
T354 0 12 0 0
T355 0 14 0 0
T356 0 1 0 0

auto_block_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1800 0 0
T6 55170 0 0 0
T9 215113 0 0 0
T17 166273 17 0 0
T26 228945 0 0 0
T27 166213 0 0 0
T29 0 6 0 0
T62 0 15 0 0
T69 201128 0 0 0
T70 247878 0 0 0
T71 200634 0 0 0
T72 36325 0 0 0
T73 211157 0 0 0
T97 0 41 0 0
T106 0 30 0 0
T203 0 26 0 0
T293 0 18 0 0
T294 0 3 0 0
T298 0 6 0 0
T357 0 9 0 0

auto_block_out_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 2677 0 0
T6 55170 0 0 0
T9 215113 0 0 0
T17 166273 19 0 0
T26 228945 0 0 0
T27 166213 0 0 0
T29 0 9 0 0
T62 0 6 0 0
T69 201128 0 0 0
T70 247878 0 0 0
T71 200634 0 0 0
T72 36325 0 0 0
T73 211157 0 0 0
T97 0 40 0 0
T106 0 38 0 0
T203 0 26 0 0
T293 0 8 0 0
T294 0 14 0 0
T298 0 6 0 0
T357 0 8 0 0

com_det_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 4677 0 0
T20 970160 0 0 0
T33 0 66 0 0
T40 0 39 0 0
T41 0 59 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 41 0 0
T106 608367 30 0 0
T122 50869 0 0 0
T142 0 57 0 0
T188 0 23 0 0
T203 0 24 0 0
T221 101022 0 0 0
T357 0 8 0 0
T358 0 11 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_det_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 4565 0 0
T20 970160 0 0 0
T33 0 73 0 0
T40 0 45 0 0
T41 0 106 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 28 0 0
T106 608367 45 0 0
T122 50869 0 0 0
T142 0 35 0 0
T188 0 20 0 0
T203 0 35 0 0
T221 101022 0 0 0
T357 0 11 0 0
T358 0 21 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_det_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 4548 0 0
T20 970160 0 0 0
T33 0 59 0 0
T40 0 31 0 0
T41 0 62 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 28 0 0
T106 608367 10 0 0
T122 50869 0 0 0
T142 0 31 0 0
T188 0 16 0 0
T203 0 40 0 0
T221 101022 0 0 0
T357 0 13 0 0
T358 0 7 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_det_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 4647 0 0
T20 970160 0 0 0
T33 0 63 0 0
T40 0 50 0 0
T41 0 78 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 36 0 0
T106 608367 53 0 0
T122 50869 0 0 0
T142 0 24 0 0
T188 0 13 0 0
T203 0 33 0 0
T221 101022 0 0 0
T357 0 8 0 0
T358 0 3 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_out_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5293 0 0
T20 970160 0 0 0
T33 0 65 0 0
T40 0 56 0 0
T41 0 92 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 38 0 0
T106 608367 30 0 0
T122 50869 0 0 0
T142 0 55 0 0
T188 0 9 0 0
T203 0 33 0 0
T221 101022 0 0 0
T357 0 9 0 0
T358 0 4 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_out_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5143 0 0
T20 970160 0 0 0
T33 0 77 0 0
T40 0 44 0 0
T41 0 83 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 45 0 0
T106 608367 42 0 0
T122 50869 0 0 0
T142 0 49 0 0
T188 0 28 0 0
T203 0 44 0 0
T221 101022 0 0 0
T357 0 4 0 0
T358 0 7 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_out_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5015 0 0
T20 970160 0 0 0
T33 0 58 0 0
T40 0 33 0 0
T41 0 80 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 33 0 0
T106 608367 33 0 0
T122 50869 0 0 0
T142 0 33 0 0
T188 0 19 0 0
T203 0 42 0 0
T221 101022 0 0 0
T357 0 28 0 0
T358 0 9 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_out_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5017 0 0
T20 970160 0 0 0
T33 0 60 0 0
T40 0 40 0 0
T41 0 94 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 43 0 0
T106 608367 24 0 0
T122 50869 0 0 0
T142 0 43 0 0
T188 0 17 0 0
T203 0 18 0 0
T221 101022 0 0 0
T357 0 8 0 0
T358 0 16 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_pre_det_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1782 0 0
T20 970160 0 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 34 0 0
T106 608367 39 0 0
T122 50869 0 0 0
T145 0 18 0 0
T184 0 43 0 0
T188 0 10 0 0
T203 0 23 0 0
T221 101022 0 0 0
T253 0 36 0 0
T357 0 8 0 0
T358 0 18 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0
T362 0 66 0 0

com_pre_det_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1679 0 0
T20 970160 0 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 42 0 0
T106 608367 46 0 0
T122 50869 0 0 0
T145 0 62 0 0
T184 0 42 0 0
T188 0 10 0 0
T203 0 31 0 0
T221 101022 0 0 0
T253 0 37 0 0
T357 0 7 0 0
T358 0 12 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0
T362 0 35 0 0

com_pre_det_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1732 0 0
T20 970160 0 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 42 0 0
T106 608367 53 0 0
T122 50869 0 0 0
T145 0 39 0 0
T184 0 41 0 0
T188 0 22 0 0
T203 0 35 0 0
T221 101022 0 0 0
T253 0 35 0 0
T357 0 9 0 0
T358 0 2 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0
T362 0 36 0 0

com_pre_det_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1713 0 0
T20 970160 0 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 51 0 0
T106 608367 38 0 0
T122 50869 0 0 0
T145 0 46 0 0
T184 0 40 0 0
T188 0 20 0 0
T203 0 30 0 0
T221 101022 0 0 0
T253 0 36 0 0
T357 0 5 0 0
T358 0 18 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0
T362 0 44 0 0

com_pre_sel_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5342 0 0
T20 970160 0 0 0
T33 0 57 0 0
T40 0 16 0 0
T41 0 83 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 35 0 0
T106 608367 45 0 0
T122 50869 0 0 0
T142 0 15 0 0
T188 0 20 0 0
T203 0 35 0 0
T221 101022 0 0 0
T357 0 2 0 0
T358 0 14 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_pre_sel_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5420 0 0
T20 970160 0 0 0
T33 0 65 0 0
T40 0 18 0 0
T41 0 75 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 39 0 0
T106 608367 41 0 0
T122 50869 0 0 0
T142 0 21 0 0
T188 0 15 0 0
T203 0 29 0 0
T221 101022 0 0 0
T357 0 3 0 0
T358 0 9 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_pre_sel_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5257 0 0
T20 970160 0 0 0
T33 0 64 0 0
T40 0 32 0 0
T41 0 63 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 51 0 0
T106 608367 41 0 0
T122 50869 0 0 0
T142 0 53 0 0
T188 0 10 0 0
T203 0 27 0 0
T221 101022 0 0 0
T357 0 8 0 0
T358 0 8 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_pre_sel_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5582 0 0
T20 970160 0 0 0
T33 0 94 0 0
T40 0 17 0 0
T41 0 77 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 33 0 0
T106 608367 43 0 0
T122 50869 0 0 0
T142 0 23 0 0
T188 0 28 0 0
T203 0 46 0 0
T221 101022 0 0 0
T357 0 26 0 0
T358 0 9 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_sel_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5446 0 0
T20 970160 0 0 0
T33 0 62 0 0
T40 0 43 0 0
T41 0 84 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 30 0 0
T106 608367 19 0 0
T122 50869 0 0 0
T142 0 38 0 0
T188 0 18 0 0
T203 0 23 0 0
T221 101022 0 0 0
T357 0 5 0 0
T358 0 17 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_sel_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5197 0 0
T20 970160 0 0 0
T33 0 80 0 0
T40 0 49 0 0
T41 0 83 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 33 0 0
T106 608367 33 0 0
T122 50869 0 0 0
T142 0 24 0 0
T188 0 20 0 0
T203 0 32 0 0
T221 101022 0 0 0
T357 0 4 0 0
T358 0 1 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_sel_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5330 0 0
T20 970160 0 0 0
T33 0 53 0 0
T40 0 50 0 0
T41 0 60 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 38 0 0
T106 608367 33 0 0
T122 50869 0 0 0
T142 0 28 0 0
T188 0 6 0 0
T203 0 36 0 0
T221 101022 0 0 0
T357 0 8 0 0
T358 0 6 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

com_sel_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5477 0 0
T20 970160 0 0 0
T33 0 71 0 0
T40 0 45 0 0
T41 0 79 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 43 0 0
T106 608367 40 0 0
T122 50869 0 0 0
T142 0 36 0 0
T188 0 26 0 0
T203 0 34 0 0
T221 101022 0 0 0
T357 0 17 0 0
T358 0 25 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

ec_rst_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 3096 0 0
T31 686712 0 0 0
T33 0 7 0 0
T40 0 26 0 0
T64 57849 0 0 0
T74 276958 0 0 0
T75 34349 0 0 0
T89 47915 0 0 0
T97 0 53 0 0
T102 47026 0 0 0
T103 52597 0 0 0
T104 16305 0 0 0
T106 0 44 0 0
T188 0 16 0 0
T201 0 3 0 0
T203 0 42 0 0
T330 531399 0 0 0
T357 0 3 0 0
T363 370171 1 0 0
T364 0 6 0 0

intr_enable_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 2344 0 0
T20 970160 0 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 52 0 0
T106 608367 32 0 0
T122 50869 0 0 0
T145 0 41 0 0
T184 0 38 0 0
T188 0 19 0 0
T203 0 13 0 0
T221 101022 0 0 0
T298 0 9 0 0
T357 0 16 0 0
T358 0 9 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0
T362 0 39 0 0

key_intr_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 4332 0 0
T20 970160 0 0 0
T48 0 10 0 0
T53 0 9 0 0
T54 0 1 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 49 0 0
T106 608367 36 0 0
T122 50869 0 0 0
T169 0 2 0 0
T188 0 34 0 0
T203 0 35 0 0
T221 101022 0 0 0
T232 0 4 0 0
T357 0 8 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0

key_intr_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1670 0 0
T20 970160 0 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 29 0 0
T106 608367 36 0 0
T122 50869 0 0 0
T145 0 34 0 0
T184 0 22 0 0
T188 0 17 0 0
T203 0 42 0 0
T221 101022 0 0 0
T253 0 40 0 0
T357 0 7 0 0
T358 0 17 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0
T362 0 34 0 0

key_invert_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 5701 0 0
T1 58212 0 0 0
T2 58326 0 0 0
T3 84049 0 0 0
T5 51852 65 0 0
T8 170148 0 0 0
T13 100929 0 0 0
T14 59339 72 0 0
T15 206905 0 0 0
T16 60563 0 0 0
T17 166273 0 0 0
T25 0 62 0 0
T92 0 37 0 0
T97 0 103 0 0
T106 0 31 0 0
T258 0 73 0 0
T357 0 10 0 0
T365 0 67 0 0
T366 0 30 0 0

pin_allowed_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 6032 0 0
T7 18204 0 0 0
T9 215113 0 0 0
T10 53711 0 0 0
T26 228945 57 0 0
T27 166213 0 0 0
T69 201128 0 0 0
T70 247878 0 0 0
T71 200634 0 0 0
T72 36325 0 0 0
T73 211157 0 0 0
T86 0 83 0 0
T97 0 183 0 0
T104 0 65 0 0
T106 0 37 0 0
T203 0 26 0 0
T256 0 73 0 0
T357 0 21 0 0
T367 0 50 0 0
T368 0 47 0 0

pin_out_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 4400 0 0
T7 18204 0 0 0
T9 215113 0 0 0
T10 53711 0 0 0
T26 228945 49 0 0
T27 166213 0 0 0
T69 201128 0 0 0
T70 247878 0 0 0
T71 200634 0 0 0
T72 36325 0 0 0
T73 211157 0 0 0
T86 0 78 0 0
T97 0 148 0 0
T104 0 43 0 0
T106 0 43 0 0
T203 0 30 0 0
T256 0 79 0 0
T357 0 14 0 0
T367 0 51 0 0
T368 0 28 0 0

pin_out_value_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 4114 0 0
T7 18204 0 0 0
T9 215113 0 0 0
T10 53711 0 0 0
T26 228945 44 0 0
T27 166213 0 0 0
T69 201128 0 0 0
T70 247878 0 0 0
T71 200634 0 0 0
T72 36325 0 0 0
T73 211157 0 0 0
T86 0 83 0 0
T97 0 209 0 0
T104 0 60 0 0
T106 0 44 0 0
T203 0 19 0 0
T256 0 74 0 0
T357 0 5 0 0
T367 0 42 0 0
T368 0 55 0 0

regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1814 0 0
T20 970160 0 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 41 0 0
T106 608367 38 0 0
T122 50869 0 0 0
T145 0 37 0 0
T184 0 40 0 0
T188 0 26 0 0
T203 0 27 0 0
T221 101022 0 0 0
T253 0 39 0 0
T357 0 6 0 0
T358 0 15 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0
T362 0 29 0 0

ulp_ac_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1774 0 0
T7 18204 7 0 0
T10 53711 0 0 0
T25 59610 0 0 0
T29 334136 0 0 0
T78 0 5 0 0
T80 0 3 0 0
T81 255838 0 0 0
T82 50623 0 0 0
T83 25669 0 0 0
T84 193090 0 0 0
T85 63118 0 0 0
T86 125912 0 0 0
T97 0 31 0 0
T106 0 34 0 0
T108 0 3 0 0
T188 0 16 0 0
T203 0 24 0 0
T357 0 22 0 0
T358 0 17 0 0

ulp_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1861 0 0
T20 970160 0 0 0
T78 0 4 0 0
T90 65794 0 0 0
T91 638794 0 0 0
T94 235465 0 0 0
T97 0 35 0 0
T106 608367 33 0 0
T108 0 6 0 0
T122 50869 0 0 0
T188 0 21 0 0
T203 0 41 0 0
T221 101022 0 0 0
T357 0 3 0 0
T358 0 4 0 0
T359 128009 0 0 0
T360 255918 0 0 0
T361 241128 0 0 0
T362 0 52 0 0
T369 0 1 0 0

ulp_lid_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1781 0 0
T7 18204 8 0 0
T10 53711 0 0 0
T25 59610 0 0 0
T29 334136 0 0 0
T78 0 4 0 0
T81 255838 0 0 0
T82 50623 0 0 0
T83 25669 0 0 0
T84 193090 0 0 0
T85 63118 0 0 0
T86 125912 0 0 0
T97 0 30 0 0
T106 0 45 0 0
T108 0 5 0 0
T188 0 28 0 0
T203 0 32 0 0
T357 0 18 0 0
T358 0 24 0 0
T362 0 33 0 0

ulp_pwrb_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1214223444 1835 0 0
T7 18204 5 0 0
T10 53711 0 0 0
T25 59610 0 0 0
T29 334136 0 0 0
T78 0 3 0 0
T80 0 7 0 0
T81 255838 0 0 0
T82 50623 0 0 0
T83 25669 0 0 0
T84 193090 0 0 0
T85 63118 0 0 0
T86 125912 0 0 0
T97 0 55 0 0
T106 0 41 0 0
T108 0 1 0 0
T188 0 17 0 0
T203 0 33 0 0
T357 0 3 0 0
T358 0 11 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%