Group : tb.dut.u_sysrst_ctrl_cov_if::sysrst_ctrl_combo_precondition_det_cg
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Group : tb.dut.u_sysrst_ctrl_cov_if::sysrst_ctrl_combo_precondition_det_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 75.00 1 100 1 1 64 64


Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_17/sysrst_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_dv_sysrst_ctrl_cov_0/sysrst_ctrl_cov_if.sv

4 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
sysrst_ctrl_combo_precondition_det_cg2 33.33 1 100 1 64 64
sysrst_ctrl_combo_precondition_det_cg3 66.67 1 100 1 64 64
sysrst_ctrl_combo_precondition_det_cg0 100.00 1 100 1 64 64
sysrst_ctrl_combo_precondition_det_cg1 100.00 1 100 1 64 64




Group Instance : sysrst_ctrl_combo_precondition_det_cg2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
33.33 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_combo_precondition_det_cg2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 2 1 33.33


Variables for Group Instance sysrst_ctrl_combo_precondition_det_cg2
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_precondition_timer 3 2 1 33.33 100 1 1 0



Group Instance : sysrst_ctrl_combo_precondition_det_cg3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
66.67 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_combo_precondition_det_cg3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 1 2 66.67


Variables for Group Instance sysrst_ctrl_combo_precondition_det_cg3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_precondition_timer 3 1 2 66.67 100 1 1 0



Group Instance : sysrst_ctrl_combo_precondition_det_cg0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_combo_precondition_det_cg0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance sysrst_ctrl_combo_precondition_det_cg0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_precondition_timer 3 0 3 100.00 100 1 1 0



Group Instance : sysrst_ctrl_combo_precondition_det_cg1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_combo_precondition_det_cg1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance sysrst_ctrl_combo_precondition_det_cg1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_precondition_timer 3 0 3 100.00 100 1 1 0


Summary for Variable cp_precondition_timer

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 2 1 33.33


User Defined Bins for cp_precondition_timer

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
max_range 0 1 1
mid_range 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
min_range 413 1 T34 1 T35 7 T36 2


Summary for Variable cp_precondition_timer

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 1 2 66.67


User Defined Bins for cp_precondition_timer

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
mid_range 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
max_range 7 1 T96 1 T417 6 - -
min_range 406 1 T34 1 T35 7 T36 2


Summary for Variable cp_precondition_timer

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_precondition_timer

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
max_range 17 1 T418 7 T419 1 T397 4
mid_range 5 1 T420 5 - - - -
min_range 391 1 T34 1 T35 7 T36 2


Summary for Variable cp_precondition_timer

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_precondition_timer

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
max_range 7 1 T292 1 T304 4 T421 1
mid_range 8 1 T293 4 T422 1 T393 3
min_range 398 1 T34 1 T35 7 T36 2

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