Group : tb.dut.u_sysrst_ctrl_cov_if::sysrst_ctrl_pin_in_value_cg
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Group : tb.dut.u_sysrst_ctrl_cov_if::sysrst_ctrl_pin_in_value_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_17/sysrst_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_dv_sysrst_ctrl_cov_0/sysrst_ctrl_cov_if.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
sysrst_ctrl_pin_in_value_cg 100.00 1 100 1 64 64



Group Instance : sysrst_ctrl_pin_in_value_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance sysrst_ctrl_pin_in_value_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 16 0 16 100.00


Variables for Group Instance sysrst_ctrl_pin_in_value_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_ac_present 2 0 2 100.00 100 1 1 2
cp_ec_rst_l 2 0 2 100.00 100 1 1 2
cp_flash_wp_l 2 0 2 100.00 100 1 1 2
cp_key0_in 2 0 2 100.00 100 1 1 2
cp_key1_in 2 0 2 100.00 100 1 1 2
cp_key2_in 2 0 2 100.00 100 1 1 2
cp_lid_open 2 0 2 100.00 100 1 1 2
cp_pwrb_in 2 0 2 100.00 100 1 1 2


Summary for Variable cp_ac_present

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_ac_present

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1049 1 T23 24 T28 28 T80 5
auto[1] 1007 1 T23 26 T28 26 T80 2


Summary for Variable cp_ec_rst_l

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_ec_rst_l

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1018 1 T23 25 T28 31 T80 3
auto[1] 1038 1 T23 25 T28 23 T80 4


Summary for Variable cp_flash_wp_l

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_flash_wp_l

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1016 1 T23 21 T28 29 T80 1
auto[1] 1040 1 T23 29 T28 25 T80 6


Summary for Variable cp_key0_in

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_in

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1005 1 T23 25 T28 27 T80 4
auto[1] 1051 1 T23 25 T28 27 T80 3


Summary for Variable cp_key1_in

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key1_in

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1023 1 T23 28 T28 23 T80 4
auto[1] 1033 1 T23 22 T28 31 T80 3


Summary for Variable cp_key2_in

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_in

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1012 1 T23 27 T28 34 T80 3
auto[1] 1044 1 T23 23 T28 20 T80 4


Summary for Variable cp_lid_open

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_lid_open

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1076 1 T23 26 T28 35 T80 6
auto[1] 980 1 T23 24 T28 19 T80 1


Summary for Variable cp_pwrb_in

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_pwrb_in

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1030 1 T23 28 T28 22 T80 4
auto[1] 1026 1 T23 22 T28 32 T80 3

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