Module Definition
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Module Instance : tb.dut.u_reg.u_rsp_intg_gen.gen_rsp_intg.u_rsp_gen

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
100.00 100.00 100.00 u_rsp_intg_gen


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : prim_secded_inv_64_57_enc
Line No.TotalCoveredPercent
TOTAL99100.00
ALWAYS1399100.00

12 always_comb begin : p_encode 13 1/1 data_o = 64'(data_i); Tests: T1 T2 T3  14 1/1 data_o[57] = ^(data_o & 64'h0103FFF800007FFF); Tests: T1 T2 T3  15 1/1 data_o[58] = ^(data_o & 64'h017C1FF801FF801F); Tests: T1 T2 T3  16 1/1 data_o[59] = ^(data_o & 64'h01BDE1F87E0781E1); Tests: T1 T2 T3  17 1/1 data_o[60] = ^(data_o & 64'h01DEEE3B8E388E22); Tests: T1 T2 T3  18 1/1 data_o[61] = ^(data_o & 64'h01EF76CDB2C93244); Tests: T1 T2 T3  19 1/1 data_o[62] = ^(data_o & 64'h01F7BB56D5525488); Tests: T1 T2 T3  20 1/1 data_o[63] = ^(data_o & 64'h01FBDDA769A46910); Tests: T1 T2 T3  21 1/1 data_o ^= 64'h5400000000000000; Tests: T1 T2 T3