Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.10 99.10 97.65 100.00 98.38 100.00 99.48


Total tests in report: 1320
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
69.78 69.78 89.25 89.25 65.41 65.41 89.65 89.65 77.08 77.08 94.36 94.36 2.94 2.94 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_rx_start_bit_filter.421972816
80.83 11.05 98.09 8.84 90.71 25.29 94.70 5.05 93.75 16.67 97.03 2.67 10.72 7.79 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_stress_all_with_rand_reset.1372453501
83.33 2.50 98.39 0.30 92.82 2.12 94.70 0.00 95.37 1.62 97.03 0.00 21.68 10.95 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_stress_all.1927318818
85.35 2.02 98.69 0.30 94.35 1.53 97.22 2.53 96.53 1.16 97.33 0.30 27.97 6.30 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_tx_rx.1979899070
87.24 1.89 98.69 0.00 94.35 0.00 97.22 0.00 96.53 0.00 97.33 0.00 39.31 11.33 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_long_xfer_wo_dly.2831719956
88.40 1.16 98.69 0.00 94.35 0.00 97.22 0.00 96.53 0.00 97.33 0.00 46.29 6.98 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_stress_all.977487993
89.40 1.00 98.69 0.00 94.71 0.35 97.22 0.00 96.53 0.00 97.33 0.00 51.93 5.64 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_rx_parity_err.2603342056
90.23 0.83 98.69 0.00 94.71 0.00 97.22 0.00 96.53 0.00 97.33 0.00 56.92 4.99 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_stress_all.1906245753
90.97 0.73 98.69 0.00 94.71 0.00 97.22 0.00 96.53 0.00 97.33 0.00 61.32 4.40 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_long_xfer_wo_dly.1757286973
91.67 0.70 98.69 0.00 94.71 0.00 97.22 0.00 96.53 0.00 97.33 0.00 65.55 4.22 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_fifo_full.1763768840
92.33 0.66 98.99 0.30 95.76 1.06 97.47 0.25 98.15 1.62 97.63 0.30 65.95 0.41 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_tx_ovrd.3200570953
92.97 0.64 98.99 0.00 95.76 0.00 97.47 0.00 98.15 0.00 97.63 0.00 69.81 3.86 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_stress_all.3045193537
93.58 0.61 98.99 0.00 95.76 0.00 97.47 0.00 98.15 0.00 97.63 0.00 73.45 3.64 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_stress_all.4094163417
94.14 0.56 99.10 0.10 96.12 0.35 99.75 2.27 98.38 0.23 97.92 0.30 73.56 0.11 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_sec_cm.3256444420
94.56 0.43 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 97.92 0.00 76.11 2.55 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_perf.1415977901
94.92 0.35 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 97.92 0.00 78.23 2.12 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_fifo_full.2397630661
95.24 0.32 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 97.92 0.00 80.15 1.92 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_stress_all_with_rand_reset.3317730071
95.53 0.30 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 99.70 1.78 80.15 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_aliasing.3479188937
95.82 0.28 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 99.70 0.00 81.85 1.69 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_stress_all.3966509334
96.09 0.27 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 99.70 0.00 83.50 1.65 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_fifo_reset.1332973899
96.34 0.25 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 99.70 0.00 85.01 1.51 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_fifo_reset.3312184541
96.58 0.23 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 99.70 0.00 86.41 1.40 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_perf.299739496
96.75 0.18 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 99.70 0.00 87.47 1.06 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_rx_parity_err.3921385661
96.91 0.16 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 99.70 0.00 88.44 0.97 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_stress_all.1492231088
97.05 0.14 99.10 0.00 96.12 0.00 99.75 0.00 98.38 0.00 99.70 0.00 89.28 0.84 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.860584855
97.19 0.13 99.10 0.00 96.47 0.35 99.75 0.00 98.38 0.00 99.70 0.00 89.73 0.45 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_intr.1056025594
97.32 0.13 99.10 0.00 97.06 0.59 99.75 0.00 98.38 0.00 99.70 0.00 89.93 0.20 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/5.uart_tl_intg_err.620742986
97.44 0.12 99.10 0.00 97.06 0.00 99.75 0.00 98.38 0.00 99.70 0.00 90.68 0.75 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_fifo_overflow.2074530611
97.56 0.12 99.10 0.00 97.06 0.00 99.75 0.00 98.38 0.00 99.70 0.00 91.40 0.72 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_fifo_reset.876090100
97.67 0.11 99.10 0.00 97.06 0.00 99.75 0.00 98.38 0.00 99.70 0.00 92.03 0.63 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_stress_all.3706861858
97.77 0.10 99.10 0.00 97.41 0.35 100.00 0.25 98.38 0.00 99.70 0.00 92.03 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_alert_test.46211913
97.86 0.09 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 99.70 0.00 92.59 0.56 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_fifo_full.2527956476
97.95 0.09 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 99.70 0.00 93.11 0.52 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_rx_parity_err.2682141363
98.03 0.08 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 99.70 0.00 93.59 0.47 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_fifo_overflow.917190019
98.10 0.07 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 99.70 0.00 93.99 0.41 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_rx_parity_err.604689754
98.16 0.06 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 99.70 0.00 94.38 0.38 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_fifo_full.1957459375
98.23 0.06 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 99.70 0.00 94.76 0.38 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_fifo_overflow.3625100470
98.28 0.06 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 99.70 0.00 95.10 0.34 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_stress_all.2044118709
98.33 0.05 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.30 95.10 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/0.uart_same_csr_outstanding.991278050
98.38 0.05 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 95.37 0.27 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_stress_all_with_rand_reset.3386327532
98.42 0.05 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 95.64 0.27 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/30.uart_fifo_full.22346652
98.47 0.05 99.10 0.00 97.41 0.00 100.00 0.00 98.38 0.00 100.00 0.00 95.91 0.27 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_fifo_reset.279003359
98.51 0.04 99.10 0.00 97.65 0.24 100.00 0.00 98.38 0.00 100.00 0.00 95.91 0.00 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/0.uart_tl_intg_err.3036893322
98.54 0.04 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 96.14 0.23 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_fifo_overflow.3398867335
98.58 0.04 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 96.36 0.23 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_fifo_reset.211500983
98.62 0.04 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 96.59 0.23 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_rx_parity_err.531514956
98.65 0.03 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 96.77 0.18 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/20.uart_tx_rx.2650217765
98.68 0.03 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 96.95 0.18 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_intr.1418832722
98.71 0.03 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.11 0.16 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.954790400
98.73 0.03 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.27 0.16 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/25.uart_fifo_full.1419516226
98.75 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.40 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_fifo_full.2963896984
98.78 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.54 0.14 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/43.uart_stress_all.2748706765
98.80 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.65 0.11 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_stress_all.2706208178
98.81 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.76 0.11 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/211.uart_fifo_reset.3481103870
98.83 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.88 0.11 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/23.uart_fifo_reset.2413298988
98.85 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 97.97 0.09 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_stress_all_with_rand_reset.3002418153
98.86 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.06 0.09 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/169.uart_fifo_reset.34609469
98.88 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.15 0.09 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.2764243051
98.89 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.24 0.09 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/273.uart_fifo_reset.2476444665
98.91 0.02 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.33 0.09 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/29.uart_fifo_full.520575614
98.92 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.40 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_intr.1258424095
98.93 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.46 0.07 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/33.uart_fifo_reset.2503934086
98.94 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.51 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_tx_rx.712832295
98.95 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.55 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_fifo_reset.2021321836
98.95 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.60 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_stress_all_with_rand_reset.2592624760
98.96 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.65 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/120.uart_fifo_reset.3528923338
98.97 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.69 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/125.uart_fifo_reset.3376552767
98.98 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.74 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_fifo_overflow.342932886
98.98 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.78 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/152.uart_fifo_reset.3804654236
98.99 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.83 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/203.uart_fifo_reset.2632951038
99.00 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.87 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/215.uart_fifo_reset.1730642615
99.01 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.92 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/296.uart_fifo_reset.1803695723
99.01 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.96 0.05 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/72.uart_fifo_reset.2910140337
99.02 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 98.98 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_stress_all_with_rand_reset.2826881721
99.02 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.01 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_stress_all.1273563533
99.03 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.03 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/105.uart_fifo_reset.612779491
99.03 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.05 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_tx_rx.4098672629
99.03 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.07 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/112.uart_fifo_reset.1435327033
99.04 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.10 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/113.uart_fifo_reset.2910921650
99.04 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.12 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/115.uart_fifo_reset.3666973742
99.04 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.14 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_tx_rx.596759397
99.05 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.16 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/131.uart_fifo_reset.4008674814
99.05 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.19 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/134.uart_fifo_reset.3657795563
99.06 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.21 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_stress_all.3482461331
99.06 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.23 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/161.uart_fifo_reset.2846500678
99.06 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.25 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/167.uart_fifo_reset.1722592297
99.07 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.28 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/171.uart_fifo_reset.3570986073
99.07 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.30 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/201.uart_fifo_reset.1883263240
99.07 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.32 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/208.uart_fifo_reset.2533121964
99.08 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.35 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/213.uart_fifo_reset.289001267
99.08 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.37 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/229.uart_fifo_reset.929264473
99.09 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.39 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/238.uart_fifo_reset.460766009
99.09 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.41 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/239.uart_fifo_reset.488522887
99.09 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.44 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/282.uart_fifo_reset.4116028346
99.10 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.46 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/285.uart_fifo_reset.2066190569
99.10 0.01 99.10 0.00 97.65 0.00 100.00 0.00 98.38 0.00 100.00 0.00 99.48 0.02 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_fifo_reset.3132926250

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_bit_bash.3714778759
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_hw_reset.208878001
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_mem_rw_with_rand_reset.2741067049
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_rw.92896893
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/0.uart_intr_test.2114527373
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/0.uart_tl_errors.2225954935
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_aliasing.183337785
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_bit_bash.2407583904
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_hw_reset.2601299744
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_mem_rw_with_rand_reset.256717186
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_rw.230704274
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/1.uart_intr_test.923234219
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/1.uart_same_csr_outstanding.937119628
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/1.uart_tl_errors.2215500858
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/1.uart_tl_intg_err.2097960836
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/10.uart_csr_mem_rw_with_rand_reset.4272883848
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/10.uart_csr_rw.3000447003
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/10.uart_intr_test.2808786407
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/10.uart_same_csr_outstanding.4007141409
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/10.uart_tl_errors.1366873435
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/10.uart_tl_intg_err.1217207012
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/11.uart_csr_mem_rw_with_rand_reset.1154638062
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/11.uart_csr_rw.184030435
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/11.uart_intr_test.1115615908
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/11.uart_same_csr_outstanding.4209695400
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/11.uart_tl_errors.2971521039
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/11.uart_tl_intg_err.1200773894
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/12.uart_csr_mem_rw_with_rand_reset.3850374656
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/12.uart_csr_rw.290043733
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/12.uart_intr_test.242559025
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/12.uart_same_csr_outstanding.1826696778
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/12.uart_tl_errors.2575848649
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/12.uart_tl_intg_err.1274806953
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/13.uart_csr_mem_rw_with_rand_reset.4293165327
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/13.uart_csr_rw.3822989465
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/13.uart_intr_test.1523905692
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/13.uart_same_csr_outstanding.3074236178
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/13.uart_tl_errors.3542746066
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/13.uart_tl_intg_err.2773796481
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/14.uart_csr_mem_rw_with_rand_reset.1279343790
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/14.uart_csr_rw.3537868975
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/14.uart_intr_test.3542167340
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/14.uart_same_csr_outstanding.2675028566
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/14.uart_tl_errors.1404727363
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/14.uart_tl_intg_err.3162938627
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/15.uart_csr_mem_rw_with_rand_reset.2825735118
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/15.uart_csr_rw.4210167851
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/15.uart_intr_test.3797572664
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/15.uart_same_csr_outstanding.482090392
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/15.uart_tl_errors.2527002688
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/15.uart_tl_intg_err.2098570250
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/16.uart_csr_mem_rw_with_rand_reset.19736248
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/16.uart_csr_rw.323689503
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/16.uart_intr_test.561460492
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/16.uart_same_csr_outstanding.1942147687
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/16.uart_tl_errors.950560976
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/16.uart_tl_intg_err.2886967053
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/17.uart_csr_mem_rw_with_rand_reset.2268087878
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/17.uart_csr_rw.739208830
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/17.uart_intr_test.3487519921
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/17.uart_same_csr_outstanding.3434070958
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/17.uart_tl_errors.302069343
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/17.uart_tl_intg_err.3835272398
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/18.uart_csr_mem_rw_with_rand_reset.639980650
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/18.uart_csr_rw.2574640773
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/18.uart_intr_test.4182530515
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/18.uart_same_csr_outstanding.3173499121
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/18.uart_tl_errors.315874872
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/18.uart_tl_intg_err.359844743
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/19.uart_csr_mem_rw_with_rand_reset.181002257
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/19.uart_csr_rw.4023966797
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/19.uart_intr_test.1930580563
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/19.uart_same_csr_outstanding.2655071479
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/19.uart_tl_errors.1956078459
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/19.uart_tl_intg_err.1583699475
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_aliasing.1302274151
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_bit_bash.124000327
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_hw_reset.463189280
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_mem_rw_with_rand_reset.3918052852
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_rw.3173957467
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/2.uart_intr_test.834968192
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/2.uart_same_csr_outstanding.3972979098
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/2.uart_tl_errors.2934031020
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/2.uart_tl_intg_err.2318781826
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/20.uart_intr_test.609920181
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/21.uart_intr_test.3222246515
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/22.uart_intr_test.1089436167
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/23.uart_intr_test.1858084999
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/24.uart_intr_test.2319784604
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/25.uart_intr_test.2686401140
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/26.uart_intr_test.2573373650
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/27.uart_intr_test.2282456420
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/28.uart_intr_test.4180268347
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/29.uart_intr_test.2665794891
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_aliasing.2030079883
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_bit_bash.2114390187
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_hw_reset.612653167
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_mem_rw_with_rand_reset.2190562547
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_rw.4224094631
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/3.uart_intr_test.2148519429
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/3.uart_same_csr_outstanding.1861554996
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/3.uart_tl_errors.2421183790
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/3.uart_tl_intg_err.1006624708
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/30.uart_intr_test.108868169
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/31.uart_intr_test.2610057222
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/32.uart_intr_test.4286080791
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/33.uart_intr_test.2844565076
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/34.uart_intr_test.3379110313
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/35.uart_intr_test.358081572
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/36.uart_intr_test.2245901431
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/37.uart_intr_test.2101346424
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/38.uart_intr_test.183079951
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/39.uart_intr_test.2683464999
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_aliasing.2718140536
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_bit_bash.381364005
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_hw_reset.1514918964
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_mem_rw_with_rand_reset.2645045038
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_rw.3612337195
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/4.uart_intr_test.814555021
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/4.uart_same_csr_outstanding.311683508
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/4.uart_tl_errors.2246037009
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/4.uart_tl_intg_err.696375180
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/40.uart_intr_test.1204134415
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/41.uart_intr_test.90041994
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/42.uart_intr_test.1319484684
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/43.uart_intr_test.683994518
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/44.uart_intr_test.1707884908
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/45.uart_intr_test.1485034482
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/46.uart_intr_test.4008632972
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/47.uart_intr_test.951342891
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/48.uart_intr_test.2562416218
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/49.uart_intr_test.3690460524
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/5.uart_csr_mem_rw_with_rand_reset.3208848440
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/cover_reg_top/5.uart_csr_rw.583610709
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/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/71.uart_fifo_reset.1773316791
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/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_smoke.4129202327
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/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_tx_ovrd.3581606718
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_tx_rx.1911883722
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/80.uart_fifo_reset.210502475
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/80.uart_stress_all_with_rand_reset.4146671149
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/81.uart_fifo_reset.2655891124
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/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/82.uart_fifo_reset.824400837
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/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/86.uart_fifo_reset.3743459814
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/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/89.uart_fifo_reset.1848376811
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/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_alert_test.2044647760
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_fifo_full.848584370
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_fifo_overflow.2888559425
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_intr.3829852105
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/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/91.uart_fifo_reset.3488126036
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/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/92.uart_fifo_reset.1533747762
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/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/93.uart_fifo_reset.1680212616
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/93.uart_stress_all_with_rand_reset.2656212845
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/94.uart_fifo_reset.2807979164
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/94.uart_stress_all_with_rand_reset.2581480563
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/95.uart_fifo_reset.2084329733
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/95.uart_stress_all_with_rand_reset.725457541
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/96.uart_fifo_reset.454763298
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/96.uart_stress_all_with_rand_reset.2509997564
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/97.uart_fifo_reset.3855799987
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/97.uart_stress_all_with_rand_reset.2283334123
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/98.uart_fifo_reset.619397810
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/98.uart_stress_all_with_rand_reset.4273314953
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/99.uart_fifo_reset.3974405875
/workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/99.uart_stress_all_with_rand_reset.4040142513



Total test records in report: 1320
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_alert_test.46211913 Sep 01 06:25:17 AM UTC 24 Sep 01 06:25:18 AM UTC 24 33769138 ps
T2 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_sec_cm.3256444420 Sep 01 06:25:17 AM UTC 24 Sep 01 06:25:19 AM UTC 24 179655791 ps
T3 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_tx_ovrd.1021797700 Sep 01 06:25:15 AM UTC 24 Sep 01 06:25:19 AM UTC 24 529884470 ps
T4 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_rx_start_bit_filter.421972816 Sep 01 06:25:15 AM UTC 24 Sep 01 06:25:19 AM UTC 24 642906500 ps
T5 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_smoke.879848630 Sep 01 06:25:17 AM UTC 24 Sep 01 06:25:20 AM UTC 24 491408377 ps
T6 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_alert_test.1679048008 Sep 01 06:25:20 AM UTC 24 Sep 01 06:25:21 AM UTC 24 41152399 ps
T7 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_sec_cm.3325135379 Sep 01 06:25:19 AM UTC 24 Sep 01 06:25:22 AM UTC 24 127321953 ps
T8 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_tx_ovrd.809019382 Sep 01 06:25:18 AM UTC 24 Sep 01 06:25:23 AM UTC 24 1300389434 ps
T9 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_smoke.638874269 Sep 01 06:25:20 AM UTC 24 Sep 01 06:25:26 AM UTC 24 503444158 ps
T10 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_loopback.1593963262 Sep 01 06:25:18 AM UTC 24 Sep 01 06:25:26 AM UTC 24 5888509113 ps
T14 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_rx_start_bit_filter.2921079209 Sep 01 06:25:22 AM UTC 24 Sep 01 06:25:27 AM UTC 24 4931688546 ps
T11 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_stress_all_with_rand_reset.1372453501 Sep 01 06:25:17 AM UTC 24 Sep 01 06:25:28 AM UTC 24 4082595558 ps
T15 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_rx_oversample.2569504066 Sep 01 06:25:21 AM UTC 24 Sep 01 06:25:28 AM UTC 24 3077668511 ps
T16 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_tx_ovrd.3200570953 Sep 01 06:25:23 AM UTC 24 Sep 01 06:25:29 AM UTC 24 2366578755 ps
T34 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_alert_test.1782737683 Sep 01 06:25:29 AM UTC 24 Sep 01 06:25:31 AM UTC 24 40633138 ps
T35 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_sec_cm.903848138 Sep 01 06:25:29 AM UTC 24 Sep 01 06:25:32 AM UTC 24 60263912 ps
T17 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_loopback.2597084173 Sep 01 06:25:24 AM UTC 24 Sep 01 06:25:34 AM UTC 24 3430375984 ps
T12 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_fifo_overflow.4281147682 Sep 01 06:25:15 AM UTC 24 Sep 01 06:25:35 AM UTC 24 167678683861 ps
T42 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_smoke.2579671731 Sep 01 06:25:30 AM UTC 24 Sep 01 06:25:36 AM UTC 24 899688759 ps
T43 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_rx_oversample.2537172317 Sep 01 06:25:15 AM UTC 24 Sep 01 06:25:36 AM UTC 24 2427101591 ps
T24 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_intr.4220945574 Sep 01 06:25:22 AM UTC 24 Sep 01 06:25:37 AM UTC 24 22956126319 ps
T27 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_loopback.2143252223 Sep 01 06:25:15 AM UTC 24 Sep 01 06:25:38 AM UTC 24 11558712860 ps
T13 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_stress_all_with_rand_reset.227828731 Sep 01 06:25:28 AM UTC 24 Sep 01 06:25:42 AM UTC 24 2179310838 ps
T28 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_rx_oversample.3264839705 Sep 01 06:25:34 AM UTC 24 Sep 01 06:25:42 AM UTC 24 1783795445 ps
T44 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_tx_ovrd.1787889317 Sep 01 06:25:38 AM UTC 24 Sep 01 06:25:42 AM UTC 24 1882948590 ps
T26 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_fifo_reset.1396838570 Sep 01 06:25:15 AM UTC 24 Sep 01 06:25:43 AM UTC 24 18028193107 ps
T84 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_sec_cm.78878261 Sep 01 06:25:41 AM UTC 24 Sep 01 06:25:43 AM UTC 24 151593062 ps
T448 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_alert_test.3678427919 Sep 01 06:25:42 AM UTC 24 Sep 01 06:25:44 AM UTC 24 86774402 ps
T30 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_fifo_reset.876090100 Sep 01 06:25:18 AM UTC 24 Sep 01 06:25:45 AM UTC 24 109461882342 ps
T45 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_smoke.1610144594 Sep 01 06:25:42 AM UTC 24 Sep 01 06:25:45 AM UTC 24 266406736 ps
T75 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_fifo_full.1097061770 Sep 01 06:25:15 AM UTC 24 Sep 01 06:25:49 AM UTC 24 43281903932 ps
T292 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_rx_start_bit_filter.265987942 Sep 01 06:25:47 AM UTC 24 Sep 01 06:25:50 AM UTC 24 1759269570 ps
T374 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_smoke.2961887381 Sep 01 06:25:15 AM UTC 24 Sep 01 06:25:51 AM UTC 24 11047383394 ps
T449 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_loopback.3334022446 Sep 01 06:25:50 AM UTC 24 Sep 01 06:25:52 AM UTC 24 80876786 ps
T359 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_tx_ovrd.416003347 Sep 01 06:25:48 AM UTC 24 Sep 01 06:25:54 AM UTC 24 763398349 ps
T450 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_loopback.4186214669 Sep 01 06:25:39 AM UTC 24 Sep 01 06:25:56 AM UTC 24 6507536432 ps
T85 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_sec_cm.3096617924 Sep 01 06:25:55 AM UTC 24 Sep 01 06:25:57 AM UTC 24 59271530 ps
T451 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_alert_test.3971684936 Sep 01 06:25:57 AM UTC 24 Sep 01 06:25:59 AM UTC 24 25142105 ps
T408 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_intr.2959987835 Sep 01 06:25:18 AM UTC 24 Sep 01 06:26:00 AM UTC 24 22211187047 ps
T32 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_tx_rx.1979899070 Sep 01 06:25:15 AM UTC 24 Sep 01 06:26:02 AM UTC 24 74426112511 ps
T333 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_smoke.2232919765 Sep 01 06:25:58 AM UTC 24 Sep 01 06:26:03 AM UTC 24 452075911 ps
T46 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_noise_filter.599320650 Sep 01 06:25:18 AM UTC 24 Sep 01 06:26:03 AM UTC 24 42243140312 ps
T33 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_tx_rx.3471736658 Sep 01 06:25:30 AM UTC 24 Sep 01 06:26:04 AM UTC 24 57895940653 ps
T107 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_rx_parity_err.1882906962 Sep 01 06:25:18 AM UTC 24 Sep 01 06:26:08 AM UTC 24 28992855929 ps
T31 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_stress_all_with_rand_reset.2826881721 Sep 01 06:25:18 AM UTC 24 Sep 01 06:26:09 AM UTC 24 2516821507 ps
T104 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_tx_rx.2453789443 Sep 01 06:25:20 AM UTC 24 Sep 01 06:26:09 AM UTC 24 43075719658 ps
T114 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_fifo_full.2262715623 Sep 01 06:25:21 AM UTC 24 Sep 01 06:26:11 AM UTC 24 97762971950 ps
T371 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_rx_start_bit_filter.1655906701 Sep 01 06:26:05 AM UTC 24 Sep 01 06:26:13 AM UTC 24 5292779724 ps
T29 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_rx_parity_err.2603342056 Sep 01 06:25:15 AM UTC 24 Sep 01 06:26:13 AM UTC 24 67704561835 ps
T311 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_rx_start_bit_filter.2061587044 Sep 01 06:25:18 AM UTC 24 Sep 01 06:26:14 AM UTC 24 76729162217 ps
T280 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_tx_ovrd.1343145506 Sep 01 06:26:09 AM UTC 24 Sep 01 06:26:15 AM UTC 24 1174479118 ps
T21 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_stress_all_with_rand_reset.2202907096 Sep 01 06:25:40 AM UTC 24 Sep 01 06:26:15 AM UTC 24 3750468290 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_fifo_reset.2401106674 Sep 01 06:25:43 AM UTC 24 Sep 01 06:26:16 AM UTC 24 22556068440 ps
T276 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_noise_filter.1574039424 Sep 01 06:25:15 AM UTC 24 Sep 01 06:26:16 AM UTC 24 44913690234 ps
T452 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_alert_test.154902691 Sep 01 06:26:15 AM UTC 24 Sep 01 06:26:16 AM UTC 24 22858740 ps
T453 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_loopback.2185484068 Sep 01 06:26:10 AM UTC 24 Sep 01 06:26:17 AM UTC 24 2888380017 ps
T18 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_intr.3014369979 Sep 01 06:25:15 AM UTC 24 Sep 01 06:26:19 AM UTC 24 20294855351 ps
T293 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_smoke.2022774541 Sep 01 06:26:18 AM UTC 24 Sep 01 06:26:22 AM UTC 24 531457461 ps
T285 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_fifo_reset.3445402307 Sep 01 06:25:21 AM UTC 24 Sep 01 06:26:24 AM UTC 24 19191344707 ps
T25 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_rx_oversample.3421121591 Sep 01 06:25:18 AM UTC 24 Sep 01 06:26:24 AM UTC 24 6366150754 ps
T47 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_rx_oversample.3762745031 Sep 01 06:25:44 AM UTC 24 Sep 01 06:26:25 AM UTC 24 6161339988 ps
T340 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_tx_ovrd.3220463113 Sep 01 06:26:25 AM UTC 24 Sep 01 06:26:30 AM UTC 24 3402051668 ps
T19 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_rx_parity_err.1618031311 Sep 01 06:25:48 AM UTC 24 Sep 01 06:26:30 AM UTC 24 117601374797 ps
T295 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_rx_start_bit_filter.261222402 Sep 01 06:25:37 AM UTC 24 Sep 01 06:26:30 AM UTC 24 44361097733 ps
T317 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_rx_start_bit_filter.3520072074 Sep 01 06:26:25 AM UTC 24 Sep 01 06:26:31 AM UTC 24 4830180386 ps
T36 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_stress_all_with_rand_reset.2147769198 Sep 01 06:26:14 AM UTC 24 Sep 01 06:26:34 AM UTC 24 1296519022 ps
T420 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_loopback.643313388 Sep 01 06:26:31 AM UTC 24 Sep 01 06:26:37 AM UTC 24 2099627345 ps
T20 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_fifo_overflow.879385976 Sep 01 06:26:01 AM UTC 24 Sep 01 06:26:38 AM UTC 24 75443690679 ps
T454 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_alert_test.1815153210 Sep 01 06:26:38 AM UTC 24 Sep 01 06:26:40 AM UTC 24 37334875 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_intr.1056025594 Sep 01 06:25:35 AM UTC 24 Sep 01 06:26:40 AM UTC 24 53124332489 ps
T37 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_stress_all_with_rand_reset.2139029088 Sep 01 06:25:53 AM UTC 24 Sep 01 06:26:41 AM UTC 24 2971121968 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_intr.2182164444 Sep 01 06:26:04 AM UTC 24 Sep 01 06:26:41 AM UTC 24 44823015964 ps
T48 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_tx_rx.2520150892 Sep 01 06:25:43 AM UTC 24 Sep 01 06:26:42 AM UTC 24 19566805165 ps
T106 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_fifo_full.2929835228 Sep 01 06:25:31 AM UTC 24 Sep 01 06:26:43 AM UTC 24 131166887857 ps
T306 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_smoke.3530002647 Sep 01 06:26:40 AM UTC 24 Sep 01 06:26:45 AM UTC 24 453016644 ps
T281 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_tx_rx.712832295 Sep 01 06:25:17 AM UTC 24 Sep 01 06:26:47 AM UTC 24 57929859238 ps
T455 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_rx_oversample.2982863173 Sep 01 06:26:19 AM UTC 24 Sep 01 06:26:48 AM UTC 24 2549821644 ps
T334 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_rx_start_bit_filter.2852258252 Sep 01 06:26:46 AM UTC 24 Sep 01 06:26:50 AM UTC 24 596724373 ps
T456 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_rx_oversample.3358306673 Sep 01 06:26:04 AM UTC 24 Sep 01 06:26:50 AM UTC 24 7181516284 ps
T145 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_rx_parity_err.3921385661 Sep 01 06:25:38 AM UTC 24 Sep 01 06:26:51 AM UTC 24 83954600712 ps
T315 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_tx_ovrd.355131792 Sep 01 06:26:49 AM UTC 24 Sep 01 06:26:53 AM UTC 24 1084279728 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_fifo_reset.3312184541 Sep 01 06:26:03 AM UTC 24 Sep 01 06:26:54 AM UTC 24 175622915537 ps
T457 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_alert_test.1277666674 Sep 01 06:26:53 AM UTC 24 Sep 01 06:26:55 AM UTC 24 29595613 ps
T316 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_smoke.4129202327 Sep 01 06:26:54 AM UTC 24 Sep 01 06:26:57 AM UTC 24 127926284 ps
T261 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_noise_filter.769302989 Sep 01 06:25:22 AM UTC 24 Sep 01 06:26:58 AM UTC 24 32700414020 ps
T22 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_intr.1418832722 Sep 01 06:26:21 AM UTC 24 Sep 01 06:27:00 AM UTC 24 59754501362 ps
T105 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_fifo_overflow.3398867335 Sep 01 06:25:18 AM UTC 24 Sep 01 06:27:01 AM UTC 24 26698955362 ps
T108 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_tx_rx.3385799956 Sep 01 06:26:40 AM UTC 24 Sep 01 06:27:06 AM UTC 24 40710302586 ps
T137 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_rx_parity_err.604689754 Sep 01 06:26:48 AM UTC 24 Sep 01 06:27:08 AM UTC 24 11603253483 ps
T458 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_rx_oversample.1113939140 Sep 01 06:26:43 AM UTC 24 Sep 01 06:27:09 AM UTC 24 2952177917 ps
T365 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_tx_rx.2961059111 Sep 01 06:26:18 AM UTC 24 Sep 01 06:27:10 AM UTC 24 20792640256 ps
T314 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_noise_filter.2669134880 Sep 01 06:26:44 AM UTC 24 Sep 01 06:27:13 AM UTC 24 14865700857 ps
T38 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_stress_all_with_rand_reset.3317730071 Sep 01 06:26:32 AM UTC 24 Sep 01 06:27:13 AM UTC 24 9464477125 ps
T419 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_loopback.1529432652 Sep 01 06:26:49 AM UTC 24 Sep 01 06:27:14 AM UTC 24 5456095434 ps
T118 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_fifo_full.1759493968 Sep 01 06:26:42 AM UTC 24 Sep 01 06:27:19 AM UTC 24 46715655495 ps
T264 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_fifo_full.1957459375 Sep 01 06:25:43 AM UTC 24 Sep 01 06:27:19 AM UTC 24 61765093926 ps
T459 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_alert_test.1264546121 Sep 01 06:27:20 AM UTC 24 Sep 01 06:27:21 AM UTC 24 71630837 ps
T49 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_fifo_reset.3235221612 Sep 01 06:25:32 AM UTC 24 Sep 01 06:27:22 AM UTC 24 98997625930 ps
T23 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_stress_all.1927318818 Sep 01 06:25:17 AM UTC 24 Sep 01 06:27:23 AM UTC 24 122555881007 ps
T460 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_loopback.1415000550 Sep 01 06:27:10 AM UTC 24 Sep 01 06:27:23 AM UTC 24 12733423856 ps
T335 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_tx_ovrd.3581606718 Sep 01 06:27:10 AM UTC 24 Sep 01 06:27:24 AM UTC 24 6635223363 ps
T282 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_noise_filter.3960174630 Sep 01 06:26:05 AM UTC 24 Sep 01 06:27:25 AM UTC 24 31827214162 ps
T331 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_smoke.3867122622 Sep 01 06:27:21 AM UTC 24 Sep 01 06:27:25 AM UTC 24 494051937 ps
T267 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_noise_filter.2361000408 Sep 01 06:25:46 AM UTC 24 Sep 01 06:27:25 AM UTC 24 43917544128 ps
T50 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_tx_rx.66718400 Sep 01 06:26:00 AM UTC 24 Sep 01 06:27:26 AM UTC 24 149275486645 ps
T262 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_noise_filter.2189374769 Sep 01 06:25:36 AM UTC 24 Sep 01 06:27:27 AM UTC 24 155589137497 ps
T51 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_fifo_full.2944936511 Sep 01 06:26:19 AM UTC 24 Sep 01 06:27:28 AM UTC 24 29779416229 ps
T388 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_rx_start_bit_filter.932927047 Sep 01 06:27:06 AM UTC 24 Sep 01 06:27:29 AM UTC 24 42868154168 ps
T39 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_stress_all_with_rand_reset.1207533311 Sep 01 06:27:14 AM UTC 24 Sep 01 06:27:29 AM UTC 24 1314281310 ps
T274 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_fifo_full.2527956476 Sep 01 06:25:17 AM UTC 24 Sep 01 06:27:30 AM UTC 24 57446290233 ps
T352 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_tx_ovrd.3519201265 Sep 01 06:27:27 AM UTC 24 Sep 01 06:27:31 AM UTC 24 3256206053 ps
T93 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_fifo_reset.3132926250 Sep 01 06:26:43 AM UTC 24 Sep 01 06:27:32 AM UTC 24 20902583918 ps
T461 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_alert_test.2044647760 Sep 01 06:27:31 AM UTC 24 Sep 01 06:27:33 AM UTC 24 21126737 ps
T332 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/0.uart_perf.1461081146 Sep 01 06:25:16 AM UTC 24 Sep 01 06:27:33 AM UTC 24 8115049990 ps
T112 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_fifo_overflow.1640239127 Sep 01 06:26:58 AM UTC 24 Sep 01 06:27:33 AM UTC 24 25022394946 ps
T40 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_stress_all_with_rand_reset.12485657 Sep 01 06:26:51 AM UTC 24 Sep 01 06:27:33 AM UTC 24 9251279734 ps
T283 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_fifo_overflow.917190019 Sep 01 06:25:21 AM UTC 24 Sep 01 06:27:34 AM UTC 24 118335987836 ps
T330 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_rx_start_bit_filter.1017753902 Sep 01 06:27:25 AM UTC 24 Sep 01 06:27:34 AM UTC 24 4611351969 ps
T351 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_smoke.646478731 Sep 01 06:27:33 AM UTC 24 Sep 01 06:27:36 AM UTC 24 473251065 ps
T462 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_rx_oversample.3407097535 Sep 01 06:27:01 AM UTC 24 Sep 01 06:27:36 AM UTC 24 7053710773 ps
T263 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_rx_parity_err.2903655713 Sep 01 06:26:09 AM UTC 24 Sep 01 06:27:42 AM UTC 24 99417445425 ps
T143 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_fifo_overflow.2906825235 Sep 01 06:25:43 AM UTC 24 Sep 01 06:27:44 AM UTC 24 97927731579 ps
T463 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_loopback.1721783881 Sep 01 06:27:45 AM UTC 24 Sep 01 06:27:49 AM UTC 24 3366946702 ps
T366 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_rx_start_bit_filter.986591884 Sep 01 06:27:37 AM UTC 24 Sep 01 06:27:51 AM UTC 24 31681287517 ps
T313 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_noise_filter.3125345804 Sep 01 06:27:25 AM UTC 24 Sep 01 06:27:51 AM UTC 24 49360258921 ps
T464 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_loopback.1684267601 Sep 01 06:27:28 AM UTC 24 Sep 01 06:27:53 AM UTC 24 7817988311 ps
T284 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_intr.3829852105 Sep 01 06:27:25 AM UTC 24 Sep 01 06:27:54 AM UTC 24 58533413043 ps
T465 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_alert_test.484628162 Sep 01 06:27:53 AM UTC 24 Sep 01 06:27:55 AM UTC 24 78091575 ps
T113 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_rx_parity_err.531514956 Sep 01 06:26:25 AM UTC 24 Sep 01 06:27:56 AM UTC 24 55230470632 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_smoke.2061195786 Sep 01 06:27:55 AM UTC 24 Sep 01 06:27:58 AM UTC 24 500837185 ps
T270 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_fifo_reset.375308472 Sep 01 06:27:35 AM UTC 24 Sep 01 06:28:00 AM UTC 24 12811024442 ps
T177 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_fifo_reset.279003359 Sep 01 06:27:24 AM UTC 24 Sep 01 06:28:01 AM UTC 24 46445504746 ps
T109 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_fifo_overflow.3998670848 Sep 01 06:26:19 AM UTC 24 Sep 01 06:28:01 AM UTC 24 54808101045 ps
T304 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_tx_ovrd.431214046 Sep 01 06:27:43 AM UTC 24 Sep 01 06:28:01 AM UTC 24 9868771219 ps
T110 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_fifo_reset.265882483 Sep 01 06:26:19 AM UTC 24 Sep 01 06:28:02 AM UTC 24 74323169216 ps
T278 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_tx_rx.1911883722 Sep 01 06:26:54 AM UTC 24 Sep 01 06:28:02 AM UTC 24 26653831986 ps
T303 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_noise_filter.1461029741 Sep 01 06:27:36 AM UTC 24 Sep 01 06:28:05 AM UTC 24 35104425345 ps
T289 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_rx_parity_err.2642548635 Sep 01 06:25:22 AM UTC 24 Sep 01 06:28:06 AM UTC 24 232415778477 ps
T466 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_rx_oversample.3288156344 Sep 01 06:28:01 AM UTC 24 Sep 01 06:28:07 AM UTC 24 2114166433 ps
T116 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_rx_parity_err.2917848951 Sep 01 06:27:09 AM UTC 24 Sep 01 06:28:07 AM UTC 24 33311822642 ps
T383 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_tx_ovrd.2757225808 Sep 01 06:28:05 AM UTC 24 Sep 01 06:28:08 AM UTC 24 1070175963 ps
T300 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_long_xfer_wo_dly.3221581609 Sep 01 06:25:40 AM UTC 24 Sep 01 06:28:08 AM UTC 24 73630473778 ps
T467 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_alert_test.3743705942 Sep 01 06:28:13 AM UTC 24 Sep 01 06:28:15 AM UTC 24 22608348 ps
T377 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_rx_start_bit_filter.1839569789 Sep 01 06:28:02 AM UTC 24 Sep 01 06:28:16 AM UTC 24 3163222275 ps
T290 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_intr.3156407465 Sep 01 06:26:43 AM UTC 24 Sep 01 06:28:16 AM UTC 24 34513428100 ps
T379 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_smoke.4122421114 Sep 01 06:28:16 AM UTC 24 Sep 01 06:28:19 AM UTC 24 642040727 ps
T468 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_rx_oversample.828338205 Sep 01 06:27:24 AM UTC 24 Sep 01 06:28:20 AM UTC 24 7658830211 ps
T111 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/5.uart_fifo_full.2397630661 Sep 01 06:26:01 AM UTC 24 Sep 01 06:28:22 AM UTC 24 263364428359 ps
T392 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_intr.1258424095 Sep 01 06:27:35 AM UTC 24 Sep 01 06:28:23 AM UTC 24 20833698068 ps
T41 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_stress_all_with_rand_reset.3002418153 Sep 01 06:27:51 AM UTC 24 Sep 01 06:28:24 AM UTC 24 7486994403 ps
T271 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_rx_parity_err.4051120079 Sep 01 06:27:26 AM UTC 24 Sep 01 06:28:26 AM UTC 24 60738279761 ps
T124 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_fifo_full.668490634 Sep 01 06:27:57 AM UTC 24 Sep 01 06:28:26 AM UTC 24 26722686704 ps
T341 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_stress_all_with_rand_reset.3515475128 Sep 01 06:28:09 AM UTC 24 Sep 01 06:28:32 AM UTC 24 3730483868 ps
T362 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_rx_start_bit_filter.66490951 Sep 01 06:28:27 AM UTC 24 Sep 01 06:28:32 AM UTC 24 4408398298 ps
T95 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_fifo_overflow.2341590475 Sep 01 06:27:59 AM UTC 24 Sep 01 06:28:35 AM UTC 24 36078468889 ps
T469 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_loopback.3814243838 Sep 01 06:28:06 AM UTC 24 Sep 01 06:28:35 AM UTC 24 8060470249 ps
T398 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_tx_ovrd.50460220 Sep 01 06:28:33 AM UTC 24 Sep 01 06:28:36 AM UTC 24 1367168259 ps
T411 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_intr.849552244 Sep 01 06:28:02 AM UTC 24 Sep 01 06:28:37 AM UTC 24 24583868415 ps
T272 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/3.uart_stress_all.3045193537 Sep 01 06:25:41 AM UTC 24 Sep 01 06:28:37 AM UTC 24 72104617775 ps
T96 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_intr.136303904 Sep 01 06:28:23 AM UTC 24 Sep 01 06:28:38 AM UTC 24 24334946593 ps
T148 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_fifo_overflow.1582573378 Sep 01 06:28:20 AM UTC 24 Sep 01 06:28:39 AM UTC 24 7815973928 ps
T470 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_rx_oversample.284546095 Sep 01 06:28:22 AM UTC 24 Sep 01 06:28:40 AM UTC 24 2543346416 ps
T471 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_alert_test.2605736239 Sep 01 06:28:38 AM UTC 24 Sep 01 06:28:40 AM UTC 24 14153811 ps
T287 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_fifo_full.1763768840 Sep 01 06:26:55 AM UTC 24 Sep 01 06:28:40 AM UTC 24 175178403202 ps
T472 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_rx_oversample.4090114263 Sep 01 06:27:35 AM UTC 24 Sep 01 06:28:40 AM UTC 24 7373641679 ps
T322 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_smoke.3504240287 Sep 01 06:28:38 AM UTC 24 Sep 01 06:28:42 AM UTC 24 869033431 ps
T473 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_rx_oversample.98508315 Sep 01 06:28:42 AM UTC 24 Sep 01 06:28:53 AM UTC 24 4648941730 ps
T310 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_fifo_full.2332112167 Sep 01 06:28:17 AM UTC 24 Sep 01 06:28:53 AM UTC 24 28061426724 ps
T318 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_stress_all.977487993 Sep 01 06:25:28 AM UTC 24 Sep 01 06:28:56 AM UTC 24 98714839314 ps
T121 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_fifo_reset.2021321836 Sep 01 06:28:01 AM UTC 24 Sep 01 06:28:57 AM UTC 24 43238362491 ps
T474 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_loopback.1284790373 Sep 01 06:28:33 AM UTC 24 Sep 01 06:28:58 AM UTC 24 5845838538 ps
T305 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_noise_filter.2402420211 Sep 01 06:26:23 AM UTC 24 Sep 01 06:29:02 AM UTC 24 202978397150 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_stress_all_with_rand_reset.3769993736 Sep 01 06:27:30 AM UTC 24 Sep 01 06:29:02 AM UTC 24 2779360781 ps
T277 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_intr.2364336938 Sep 01 06:28:43 AM UTC 24 Sep 01 06:29:04 AM UTC 24 11244669575 ps
T291 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_rx_start_bit_filter.3332443446 Sep 01 06:28:54 AM UTC 24 Sep 01 06:29:06 AM UTC 24 4717203006 ps
T266 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/6.uart_long_xfer_wo_dly.791038844 Sep 01 06:26:32 AM UTC 24 Sep 01 06:29:11 AM UTC 24 143355952051 ps
T273 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/2.uart_long_xfer_wo_dly.2831719956 Sep 01 06:25:27 AM UTC 24 Sep 01 06:29:11 AM UTC 24 79109640205 ps
T258 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_tx_rx.1473357873 Sep 01 06:27:34 AM UTC 24 Sep 01 06:29:12 AM UTC 24 92607930548 ps
T296 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_noise_filter.1329992342 Sep 01 06:27:02 AM UTC 24 Sep 01 06:29:13 AM UTC 24 178419258572 ps
T406 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_stress_all_with_rand_reset.2592624760 Sep 01 06:28:37 AM UTC 24 Sep 01 06:29:13 AM UTC 24 2117407972 ps
T475 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_alert_test.108251767 Sep 01 06:29:12 AM UTC 24 Sep 01 06:29:14 AM UTC 24 13084447 ps
T415 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_smoke.2696687835 Sep 01 06:29:12 AM UTC 24 Sep 01 06:29:14 AM UTC 24 108039595 ps
T175 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_rx_parity_err.1623748001 Sep 01 06:27:38 AM UTC 24 Sep 01 06:29:14 AM UTC 24 157686449576 ps
T117 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_fifo_reset.1740548635 Sep 01 06:28:42 AM UTC 24 Sep 01 06:29:15 AM UTC 24 30833056942 ps
T326 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_noise_filter.2369553519 Sep 01 06:28:02 AM UTC 24 Sep 01 06:29:18 AM UTC 24 26896872843 ps
T349 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_intr.3056043566 Sep 01 06:25:45 AM UTC 24 Sep 01 06:29:18 AM UTC 24 385928493057 ps
T279 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_fifo_full.2775250454 Sep 01 06:28:41 AM UTC 24 Sep 01 06:29:19 AM UTC 24 20747518107 ps
T476 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_loopback.1506160351 Sep 01 06:28:59 AM UTC 24 Sep 01 06:29:20 AM UTC 24 6935604518 ps
T401 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_rx_start_bit_filter.4217484473 Sep 01 06:29:18 AM UTC 24 Sep 01 06:29:21 AM UTC 24 481580483 ps
T119 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_fifo_reset.1332973899 Sep 01 06:26:59 AM UTC 24 Sep 01 06:29:28 AM UTC 24 175021176834 ps
T120 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_stress_all.1906245753 Sep 01 06:27:20 AM UTC 24 Sep 01 06:29:28 AM UTC 24 237319408749 ps
T373 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_fifo_reset.1287495081 Sep 01 06:28:21 AM UTC 24 Sep 01 06:29:28 AM UTC 24 100356143180 ps
T477 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_loopback.2190502007 Sep 01 06:29:21 AM UTC 24 Sep 01 06:29:30 AM UTC 24 4238090068 ps
T478 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_alert_test.3522933538 Sep 01 06:29:30 AM UTC 24 Sep 01 06:29:32 AM UTC 24 26102815 ps
T328 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_rx_parity_err.880826138 Sep 01 06:28:02 AM UTC 24 Sep 01 06:29:33 AM UTC 24 76339654222 ps
T367 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_tx_ovrd.3995557006 Sep 01 06:29:20 AM UTC 24 Sep 01 06:29:34 AM UTC 24 9474871820 ps
T200 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_fifo_reset.4135826249 Sep 01 06:29:14 AM UTC 24 Sep 01 06:29:36 AM UTC 24 49285197320 ps
T299 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_smoke.1339313159 Sep 01 06:29:33 AM UTC 24 Sep 01 06:29:36 AM UTC 24 756168912 ps
T327 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_tx_ovrd.3027570464 Sep 01 06:28:58 AM UTC 24 Sep 01 06:29:37 AM UTC 24 7365938218 ps
T403 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_rx_parity_err.86923870 Sep 01 06:29:19 AM UTC 24 Sep 01 06:29:39 AM UTC 24 22606999268 ps
T301 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_tx_rx.1732815461 Sep 01 06:29:13 AM UTC 24 Sep 01 06:29:44 AM UTC 24 30323676636 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_tx_rx.4287098165 Sep 01 06:29:33 AM UTC 24 Sep 01 06:29:45 AM UTC 24 5599545657 ps
T294 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/12.uart_noise_filter.1812325131 Sep 01 06:28:26 AM UTC 24 Sep 01 06:29:50 AM UTC 24 194917670170 ps
T479 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_rx_start_bit_filter.2345953301 Sep 01 06:29:46 AM UTC 24 Sep 01 06:29:52 AM UTC 24 4251629203 ps
T86 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_stress_all_with_rand_reset.4149990143 Sep 01 06:29:05 AM UTC 24 Sep 01 06:29:53 AM UTC 24 6828682039 ps
T480 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_rx_oversample.3558678405 Sep 01 06:29:39 AM UTC 24 Sep 01 06:29:56 AM UTC 24 5005482425 ps
T375 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_tx_ovrd.70734404 Sep 01 06:29:53 AM UTC 24 Sep 01 06:29:57 AM UTC 24 1380021167 ps
T395 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_intr.2933512370 Sep 01 06:29:15 AM UTC 24 Sep 01 06:29:57 AM UTC 24 36760110509 ps
T397 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_noise_filter.1176392894 Sep 01 06:29:16 AM UTC 24 Sep 01 06:29:57 AM UTC 24 49614851037 ps
T297 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/4.uart_perf.3414707625 Sep 01 06:25:51 AM UTC 24 Sep 01 06:29:58 AM UTC 24 14912054516 ps
T323 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_intr.1901006853 Sep 01 06:27:02 AM UTC 24 Sep 01 06:30:00 AM UTC 24 59667642496 ps
T481 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_loopback.2848040089 Sep 01 06:29:54 AM UTC 24 Sep 01 06:30:00 AM UTC 24 3695599258 ps
T482 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_alert_test.4234830066 Sep 01 06:29:59 AM UTC 24 Sep 01 06:30:00 AM UTC 24 81543482 ps
T363 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_noise_filter.3430556842 Sep 01 06:29:45 AM UTC 24 Sep 01 06:30:01 AM UTC 24 3397129733 ps
T483 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_smoke.3003709802 Sep 01 06:30:01 AM UTC 24 Sep 01 06:30:05 AM UTC 24 452025303 ps
T484 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_rx_oversample.1887459777 Sep 01 06:29:15 AM UTC 24 Sep 01 06:30:08 AM UTC 24 6757156734 ps
T87 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_stress_all_with_rand_reset.150522448 Sep 01 06:29:57 AM UTC 24 Sep 01 06:30:11 AM UTC 24 1402234840 ps
T161 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/7.uart_fifo_overflow.3625100470 Sep 01 06:26:42 AM UTC 24 Sep 01 06:30:17 AM UTC 24 101188816092 ps
T407 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_fifo_full.278925732 Sep 01 06:29:34 AM UTC 24 Sep 01 06:30:18 AM UTC 24 109827904971 ps
T122 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_fifo_overflow.3084924160 Sep 01 06:29:36 AM UTC 24 Sep 01 06:30:19 AM UTC 24 40512935436 ps
T361 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_fifo_overflow.2888559425 Sep 01 06:27:23 AM UTC 24 Sep 01 06:30:19 AM UTC 24 74425048169 ps
T298 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/1.uart_perf.299739496 Sep 01 06:25:18 AM UTC 24 Sep 01 06:30:21 AM UTC 24 18525358511 ps
T412 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_fifo_full.1180011306 Sep 01 06:29:14 AM UTC 24 Sep 01 06:30:24 AM UTC 24 242956720477 ps
T357 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_rx_parity_err.4212648094 Sep 01 06:29:51 AM UTC 24 Sep 01 06:30:25 AM UTC 24 8638787886 ps
T368 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_intr.4036163526 Sep 01 06:29:41 AM UTC 24 Sep 01 06:30:29 AM UTC 24 29888377278 ps
T485 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_loopback.2650351392 Sep 01 06:30:22 AM UTC 24 Sep 01 06:30:29 AM UTC 24 6465851156 ps
T307 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_fifo_overflow.342932886 Sep 01 06:28:41 AM UTC 24 Sep 01 06:30:29 AM UTC 24 61116919519 ps
T486 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_alert_test.213912648 Sep 01 06:30:30 AM UTC 24 Sep 01 06:30:32 AM UTC 24 41619525 ps
T100 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_stress_all_with_rand_reset.3386327532 Sep 01 06:29:29 AM UTC 24 Sep 01 06:30:32 AM UTC 24 4758754262 ps
T360 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_tx_rx.2267475275 Sep 01 06:30:01 AM UTC 24 Sep 01 06:30:37 AM UTC 24 23908881334 ps
T393 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/11.uart_long_xfer_wo_dly.829170626 Sep 01 06:28:08 AM UTC 24 Sep 01 06:30:38 AM UTC 24 66597571163 ps
T389 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_tx_ovrd.2709113779 Sep 01 06:30:21 AM UTC 24 Sep 01 06:30:39 AM UTC 24 6674145492 ps
T487 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_rx_start_bit_filter.1286651809 Sep 01 06:30:18 AM UTC 24 Sep 01 06:30:42 AM UTC 24 40546450754 ps
T370 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/13.uart_perf.3834461213 Sep 01 06:29:02 AM UTC 24 Sep 01 06:30:45 AM UTC 24 7754076126 ps
T358 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/8.uart_perf.3196457433 Sep 01 06:27:13 AM UTC 24 Sep 01 06:30:45 AM UTC 24 10123174868 ps
T488 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/14.uart_perf.3192607394 Sep 01 06:29:22 AM UTC 24 Sep 01 06:30:46 AM UTC 24 12439835320 ps
T489 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_tx_rx.2290931121 Sep 01 06:30:33 AM UTC 24 Sep 01 06:30:46 AM UTC 24 14704262389 ps
T447 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_noise_filter.2749023557 Sep 01 06:31:07 AM UTC 24 Sep 01 06:31:32 AM UTC 24 15678499092 ps
T414 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_rx_parity_err.3478149672 Sep 01 06:30:19 AM UTC 24 Sep 01 06:30:48 AM UTC 24 24328584594 ps
T490 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_rx_start_bit_filter.3184269636 Sep 01 06:30:47 AM UTC 24 Sep 01 06:30:49 AM UTC 24 3816547120 ps
T319 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_smoke.1649328004 Sep 01 06:30:33 AM UTC 24 Sep 01 06:30:50 AM UTC 24 6043741976 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.860584855 Sep 01 06:30:47 AM UTC 24 Sep 01 06:30:56 AM UTC 24 21964754784 ps
T345 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/9.uart_tx_rx.19056139 Sep 01 06:27:22 AM UTC 24 Sep 01 06:30:57 AM UTC 24 99861211084 ps
T320 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/10.uart_fifo_overflow.3818498677 Sep 01 06:27:34 AM UTC 24 Sep 01 06:31:00 AM UTC 24 76694566054 ps
T491 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/16.uart_rx_oversample.2473602727 Sep 01 06:30:09 AM UTC 24 Sep 01 06:31:01 AM UTC 24 4654256859 ps
T391 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_tx_ovrd.500639591 Sep 01 06:30:49 AM UTC 24 Sep 01 06:31:02 AM UTC 24 8124567493 ps
T492 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_rx_oversample.2894168370 Sep 01 06:30:43 AM UTC 24 Sep 01 06:31:02 AM UTC 24 6475313247 ps
T493 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/17.uart_alert_test.782361097 Sep 01 06:31:01 AM UTC 24 Sep 01 06:31:02 AM UTC 24 40325086 ps
T364 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/18.uart_smoke.2383938913 Sep 01 06:31:02 AM UTC 24 Sep 01 06:31:04 AM UTC 24 110924880 ps
T183 /workspaces/repo/scratch/os_regression_2024_08_31/uart-sim-vcs/coverage/default/15.uart_fifo_reset.55537636 Sep 01 06:29:38 AM UTC 24 Sep 01 06:31:06 AM UTC 24 44299657431 ps
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