Unified Coverage Report :: Module :: usb_fs_nb_out_pe

Module : usb_fs_nb_out_pe

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
43.24	54.84	20.16		0.00	41.18	100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_out_pe.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_nb_out_pe	43.24	54.84	20.16		0.00	41.18	100.00

---

Module Instance : tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_nb_out_pe

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
43.24	54.84	20.16		0.00	41.18	100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
43.24	54.84	20.16		0.00	41.18	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
72.22	100.00	16.67				100.00	u_usb_fs_nb_pe

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : usb_fs_nb_out_pe

	Line No.	Total	Covered	Percent
TOTAL		124	68	54.84
CONT_ASSIGN	85	1	1	100.00
CONT_ASSIGN	126	1	1	100.00
CONT_ASSIGN	127	1	1	100.00
CONT_ASSIGN	129	1	1	100.00
CONT_ASSIGN	135	1	1	100.00
CONT_ASSIGN	139	1	1	100.00
CONT_ASSIGN	143	1	1	100.00
CONT_ASSIGN	147	1	1	100.00
CONT_ASSIGN	152	1	1	100.00
CONT_ASSIGN	158	1	1	100.00
CONT_ASSIGN	159	1	1	100.00
CONT_ASSIGN	166	1	1	100.00
CONT_ASSIGN	167	1	1	100.00
CONT_ASSIGN	170	1	1	100.00
CONT_ASSIGN	171	1	1	100.00
CONT_ASSIGN	173	1	1	100.00
ALWAYS	179	6	4	66.67
ALWAYS	191	4	3	75.00
ALWAYS	207	54	11	20.37
CONT_ASSIGN	321	1	1	100.00
ALWAYS	324	3	3	100.00
CONT_ASSIGN	334	1	1	100.00
ALWAYS	337	3	3	100.00
ALWAYS	345	6	4	66.67
ALWAYS	357	5	4	80.00
ALWAYS	367	9	6	66.67
ALWAYS	384	3	3	100.00
ALWAYS	396	6	4	66.67
CONT_ASSIGN	412	1	1	100.00
ALWAYS	415	6	4	66.67

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_out_pe.sv' or '../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_out_pe.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
85	1	1
126	1	1
127	1	1
129	1	1
135	1	1
139	1	1
143	1	1
147	1	1
152	1	1
158	1	1
159	1	1
166	1	1
167	1	1
170	1	1
171	1	1
173	1	1
179	1	1
180	1	1
182	1	1
183	0	1
184	1	1
185	0	1
			MISSING_ELSE
191	1	1
192	1	1
194	1	1
195	0	1
			MISSING_ELSE
207	1	1
208	1	1
209	1	1
210	1	1
211	1	1
212	1	1
213	1	1
214	1	1
216	1	1
220	1	1
221	0	1
222	0	1
224	1	1
232	0	1
234	0	1
235	0	1
236	0	1
237	0	1
239	0	1
244	0	1
248	0	1
249	0	1
252	0	1
253	0	1
254	0	1
255	0	1
256	0	1
258	0	1
259	0	1
260	0	1
261	0	1
263	0	1
268	0	1
269	0	1
271	0	1
273	0	1
275	0	1
276	0	1
278	0	1
279	0	1
280	0	1
284	0	1
285	0	1
286	0	1
287	0	1
288	0	1
290	0	1
291	0	1
292	0	1
299	0	1
301	0	1
303	0	1
306	0	1
307	0	1
321	1	1
324	1	1
325	1	1
327	1	1
334	1	1
337	1	1
338	1	1
340	1	1
345	1	1
347	1	1
348	0	1
349	1	1
350	0	1
			MISSING_ELSE
353	1	1
357	1	1
358	1	1
359	1	1
360	0	1
362	1	1
367	1	1
368	1	1
369	1	1
370	1	1
372	1	1
373	0	1
374	0	1
375	0	1
377	1	1
384	1	1
385	1	1
387	1	1
396	1	1
397	1	1
399	1	1
400	1	1
401	0	1
402	0	1
			==> MISSING_ELSE
412	1	1
415	1	1
416	1	1
418	1	1
419	0	1
420	1	1
421	0	1
			MISSING_ELSE

---

Cond Coverage for Module : usb_fs_nb_out_pe

	Total	Covered	Percent
Conditions	124	25	20.16
Logical	124	25	20.16
Non-Logical	0	0
Event	0	0

 LINE       129
 EXPRESSION (rx_pkt_end_i && rx_pkt_valid_i && (rx_pid_type == UsbPidTypeToken) && (rx_addr_i == dev_addr_i))
             ------1-----    -------2------    ----------------3---------------    ------------4------------

-1-	-2-	-3-	-4-	Status	Tests
0	1	1	1	Not Covered
1	0	1	1	Not Covered
1	1	0	1	Not Covered
1	1	1	0	Not Covered
1	1	1	1	Not Covered

 LINE       129
 SUB-EXPRESSION (rx_pid_type == UsbPidTypeToken)
                ----------------1---------------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       129
 SUB-EXPRESSION (rx_addr_i == dev_addr_i)
                ------------1------------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Covered	T1,T2,T3

 LINE       135
 EXPRESSION (token_received && (rx_pid == UsbPidOut))
             -------1------    ----------2----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       135
 SUB-EXPRESSION (rx_pid == UsbPidOut)
                ----------1----------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       139
 EXPRESSION (token_received && (rx_pid == UsbPidSetup))
             -------1------    -----------2-----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       139
 SUB-EXPRESSION (rx_pid == UsbPidSetup)
                -----------1-----------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       143
 EXPRESSION (rx_pkt_end_i && ((!rx_pkt_valid_i)))
             ------1-----    ---------2---------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Not Covered
1	1	Not Covered

 LINE       147
 EXPRESSION (rx_pkt_end_i && rx_pkt_valid_i && ((rx_pid == UsbPidData0) || (rx_pid == UsbPidData1)))
             ------1-----    -------2------    --------------------------3-------------------------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       147
 SUB-EXPRESSION ((rx_pid == UsbPidData0) || (rx_pid == UsbPidData1))
                 -----------1-----------    -----------2-----------

-1-	-2-	Status	Tests
0	0	Covered	T1,T2,T3
0	1	Not Covered
1	0	Not Covered

 LINE       147
 SUB-EXPRESSION (rx_pid == UsbPidData0)
                -----------1-----------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       147
 SUB-EXPRESSION (rx_pid == UsbPidData1)
                -----------1-----------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       152
 EXPRESSION (rx_pkt_end_i && rx_pkt_valid_i && ( ! ((rx_pid == UsbPidData0) || (rx_pid == UsbPidData1)) ))
             ------1-----    -------2------    -----------------------------3----------------------------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       152
 SUB-EXPRESSION ( ! ((rx_pid == UsbPidData0) || (rx_pid == UsbPidData1)) )
                    --------------------------1-------------------------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       152
 SUB-EXPRESSION ((rx_pid == UsbPidData0) || (rx_pid == UsbPidData1))
                 -----------1-----------    -----------2-----------

-1-	-2-	Status	Tests
0	0	Covered	T1,T2,T3
0	1	Not Covered
1	0	Not Covered

 LINE       152
 SUB-EXPRESSION (rx_pid == UsbPidData0)
                -----------1-----------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       152
 SUB-EXPRESSION (rx_pid == UsbPidData1)
                -----------1-----------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       159
 EXPRESSION (ep_in_hw ? rx_endp_i : '0)
             ----1---

-1-	Status	Tests
0	Not Covered
1	Covered	T1,T2,T3

 LINE       170
 EXPRESSION (out_ep_enabled_i[out_ep_index_d] & ep_in_hw)
             ----------------1---------------   ----2---

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Not Covered
1	1	Not Covered

 LINE       173
 EXPRESSION (data_packet_received && ep_active && (rx_pid_i[3] != data_toggle_q[out_ep_index_d]))
             ----------1---------    ----2----    -----------------------3----------------------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       173
 SUB-EXPRESSION (rx_pid_i[3] != data_toggle_q[out_ep_index_d])
                -----------------------1----------------------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       182
 EXPRESSION (setup_token_received && ep_active)
             ----------1---------    ----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       184
 EXPRESSION (out_token_received && ep_active)
             ---------1--------    ----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       220
 EXPRESSION (ep_active && (out_token_received || (setup_token_received && ep_is_control)))
             ----1----    -------------------------------2-------------------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       220
 SUB-EXPRESSION (out_token_received || (setup_token_received && ep_is_control))
                 ---------1--------    -------------------2-------------------

-1-	-2-	Status	Tests
0	0	Covered	T1,T2,T3
0	1	Not Covered
1	0	Not Covered

 LINE       220
 SUB-EXPRESSION (setup_token_received && ep_is_control)
                 ----------1---------    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       236
 EXPRESSION (timeout_cntdown_q == '0)
            ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       244
 EXPRESSION (((!ep_is_control)) && out_ep_iso_i[out_ep_index] && data_packet_received)
             ---------1--------    -------------2------------    ----------3---------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       249
 EXPRESSION (bad_data_toggle && ((!out_ep_stall_i[out_ep_index])))
             -------1-------    ----------------2----------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       256
 EXPRESSION (invalid_packet_received || non_data_packet_received)
             -----------1-----------    ------------2-----------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       273
 EXPRESSION (nak_out_transaction | out_ep_full_i[out_ep_index])
             ---------1---------   -------------2-------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       286
 EXPRESSION (nak_out_transaction | out_ep_full_i[out_ep_index])
             ---------1---------   -------------2-------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       301
 EXPRESSION (nak_out_transaction | out_ep_full_i[out_ep_index])
             ---------1---------   -------------2-------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       340
 EXPRESSION (link_reset_i ? StIdle : out_xact_state_next)
             ------1-----

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       347
 EXPRESSION (setup_token_received && ep_active)
             ----------1---------    ----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       387
 EXPRESSION ((out_xact_state == StRcvdDataStart) && rx_data_put_i)
             -----------------1-----------------    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       387
 SUB-EXPRESSION (out_xact_state == StRcvdDataStart)
                -----------------1-----------------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       399
 EXPRESSION ((out_xact_state == StIdle) || (out_xact_state == StRcvdOut))
             -------------1------------    --------------2--------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Covered	T1,T2,T3

 LINE       399
 SUB-EXPRESSION (out_xact_state == StIdle)
                -------------1------------

-1-	Status	Tests
0	Not Covered
1	Covered	T1,T2,T3

 LINE       399
 SUB-EXPRESSION (out_xact_state == StRcvdOut)
                --------------1--------------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       401
 EXPRESSION (out_ep_data_put_o && out_ep_full_i[out_ep_index])
             --------1--------    -------------2-------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       412
 EXPRESSION (((!nak_out_transaction)) && ((~&out_ep_put_addr_o)) && out_ep_data_put_o)
             ------------1-----------    -----------2-----------    --------3--------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Covered	T1,T2,T3
1	1	1	Not Covered

 LINE       418
 EXPRESSION (out_xact_state == StRcvdOut)
            --------------1--------------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

 LINE       420
 EXPRESSION ((out_xact_state == StRcvdDataStart) && increment_addr)
             -----------------1-----------------    -------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       420
 SUB-EXPRESSION (out_xact_state == StRcvdDataStart)
                -----------------1-----------------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Not Covered

---

FSM Coverage for Module : usb_fs_nb_out_pe

Summary for FSM :: out_xact_state

	Total	Covered	Percent
States	5	1	20.00	(Not included in score)
Transitions	8	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: out_xact_state

---

states	Line No.	Covered	Tests
StIdle	340	Covered	T1,T2,T3
StRcvdDataEnd	261	Not Covered
StRcvdDataStart	235	Not Covered
StRcvdIsoDataEnd	248	Not Covered
StRcvdOut	221	Not Covered

transitions	Line No.	Covered	Tests
StIdle->StRcvdOut	221	Not Covered
StRcvdDataEnd->StIdle	340	Not Covered
StRcvdDataStart->StIdle	340	Not Covered
StRcvdDataStart->StRcvdDataEnd	261	Not Covered
StRcvdDataStart->StRcvdIsoDataEnd	248	Not Covered
StRcvdIsoDataEnd->StIdle	340	Not Covered
StRcvdOut->StIdle	340	Not Covered
StRcvdOut->StRcvdDataStart	235	Not Covered

---

Branch Coverage for Module : usb_fs_nb_out_pe

	Line No.	Total	Covered	Percent
Branches		51	21	41.18
TERNARY	159	2	1	50.00
IF	179	4	2	50.00
IF	191	3	2	66.67
CASE	216	18	1	5.56
IF	324	2	2	100.00
IF	337	3	2	66.67
IF	347	3	1	33.33
IF	357	3	2	66.67
IF	367	3	2	66.67
IF	384	2	2	100.00
IF	396	4	2	50.00
IF	415	4	2	50.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_out_pe.sv' or '../src/lowrisc_ip_usb_fs_nb_pe_0.1/rtl/usb_fs_nb_out_pe.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	159	(ep_in_hw) ? 

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Not Covered

	LineNo.	Expression
-1-:	179	if ((!rst_ni))
-2-:	182	if ((setup_token_received && ep_active))
-3-:	184	if ((out_token_received && ep_active))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T1,T2,T3
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	191	if ((!rst_ni))
-2-:	194	if (rx_data_put_i)

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	216	case (out_xact_state)
-2-:	220	if ((ep_active && (out_token_received || (setup_token_received && ep_is_control))))
-3-:	234	if (rx_pkt_start_i)
-4-:	236	if ((timeout_cntdown_q == '0))
-5-:	244	if ((((!ep_is_control) && out_ep_iso_i[out_ep_index]) && data_packet_received))
-6-:	249	if ((bad_data_toggle && (!out_ep_stall_i[out_ep_index])))
-7-:	256	if ((invalid_packet_received || non_data_packet_received))
-8-:	260	if (data_packet_received)
-9-:	271	if (current_xact_setup_q)
-10-:	273	if ((nak_out_transaction | out_ep_full_i[out_ep_index]))
-11-:	284	if (out_ep_stall_i[out_ep_index])
-12-:	286	if ((nak_out_transaction | out_ep_full_i[out_ep_index]))
-13-:	301	if ((nak_out_transaction | out_ep_full_i[out_ep_index]))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	Status	Tests
StIdle	1	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StIdle	0	-	-	-	-	-	-	-	-	-	-	-	Covered	T1,T2,T3
StRcvdOut	-	1	-	-	-	-	-	-	-	-	-	-	Not Covered
StRcvdOut	-	0	1	-	-	-	-	-	-	-	-	-	Not Covered
StRcvdOut	-	0	0	-	-	-	-	-	-	-	-	-	Not Covered
StRcvdDataStart	-	-	-	1	-	-	-	-	-	-	-	-	Not Covered
StRcvdDataStart	-	-	-	0	1	-	-	-	-	-	-	-	Not Covered
StRcvdDataStart	-	-	-	0	0	1	-	-	-	-	-	-	Not Covered
StRcvdDataStart	-	-	-	0	0	0	1	-	-	-	-	-	Not Covered
StRcvdDataStart	-	-	-	0	0	0	0	-	-	-	-	-	Not Covered
StRcvdDataEnd	-	-	-	-	-	-	-	1	1	-	-	-	Not Covered
StRcvdDataEnd	-	-	-	-	-	-	-	1	0	-	-	-	Not Covered
StRcvdDataEnd	-	-	-	-	-	-	-	0	-	1	-	-	Not Covered
StRcvdDataEnd	-	-	-	-	-	-	-	0	-	0	1	-	Not Covered
StRcvdDataEnd	-	-	-	-	-	-	-	0	-	0	0	-	Not Covered
StRcvdIsoDataEnd	-	-	-	-	-	-	-	-	-	-	-	1	Not Covered
StRcvdIsoDataEnd	-	-	-	-	-	-	-	-	-	-	-	0	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	324	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	337	if ((!rst_ni))
-2-:	340	(link_reset_i) ? 

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	347	if ((setup_token_received && ep_active))
-2-:	349	if (new_pkt_end)

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	357	if ((!rst_ni))
-2-:	359	if (link_reset_i)

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	367	if ((!rst_ni))
-2-:	372	if (out_xact_start)

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	384	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	396	if ((!rst_ni))
-2-:	399	if (((out_xact_state == StIdle) || (out_xact_state == StRcvdOut)))
-3-:	401	if ((out_ep_data_put_o && out_ep_full_i[out_ep_index]))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T1,T2,T3
0	1	-	Covered	T1,T2,T3
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	415	if ((!rst_ni))
-2-:	418	if ((out_xact_state == StRcvdOut))
-3-:	420	if (((out_xact_state == StRcvdDataStart) && increment_addr))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Covered	T1,T2,T3
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Covered	T1,T2,T3

---

Assert Coverage for Module : usb_fs_nb_out_pe

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	1	1	100.00	1	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	1	1	100.00	1	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
OutXactStateValid_A	27271	22416	0	0

OutXactStateValid_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27271	22416	0	0
T1	6658	5858	0	0
T2	4205	3342	0	0
T3	4216	3322	0	0
T4	7172	5662	0	0
T5	5020	4232	0	0