e844018f2c
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | smoke | usbdev_smoke | 9.980s | 8.475ms | 50 | 50 | 100.00 |
V1 | csr_hw_reset | usbdev_csr_hw_reset | 0.880s | 46.476us | 5 | 5 | 100.00 |
V1 | csr_rw | usbdev_csr_rw | 1.060s | 62.284us | 5 | 20 | 25.00 |
V1 | csr_bit_bash | usbdev_csr_bit_bash | 4.880s | 195.419us | 4 | 5 | 80.00 |
V1 | csr_aliasing | usbdev_csr_aliasing | 3.600s | 371.465us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | usbdev_csr_mem_rw_with_rand_reset | 2.320s | 71.643us | 13 | 20 | 65.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | usbdev_csr_rw | 1.060s | 62.284us | 5 | 20 | 25.00 |
usbdev_csr_aliasing | 3.600s | 371.465us | 5 | 5 | 100.00 | ||
V1 | mem_walk | usbdev_mem_walk | 3.990s | 153.771us | 5 | 5 | 100.00 |
V1 | mem_partial_access | usbdev_mem_partial_access | 2.310s | 149.945us | 5 | 5 | 100.00 |
V1 | TOTAL | 92 | 115 | 80.00 | |||
V2 | in_trans | usbdev_in_trans | 9.850s | 8.458ms | 48 | 50 | 96.00 |
V2 | data_toggle_clear | data_toggle_clear | 0 | 0 | -- | ||
V2 | phy_pins_sense | usbdev_phy_pins_sense | 0.730s | 26.572us | 50 | 50 | 100.00 |
V2 | wake_events | wake_events | 0 | 0 | -- | ||
V2 | av_buffer | usbdev_av_buffer | 9.710s | 8.374ms | 50 | 50 | 100.00 |
V2 | rx_fifo | rx_fifo | 0 | 0 | -- | ||
V2 | phy_config_tx_osc_test_mode | phy_config_tx_osc_test_mode | 0 | 0 | -- | ||
V2 | phy_config_eop_single_bit_handling | phy_config_eop_single_bit_handling | 0 | 0 | -- | ||
V2 | phy_config_pinflip | phy_config_pinflip | 0 | 0 | -- | ||
V2 | phy_config_usb_ref_disable | phy_config_usb_ref_disable | 0 | 0 | -- | ||
V2 | max_length_out_transaction | usbdev_max_length_out_transaction | 9.410s | 8.404ms | 50 | 50 | 100.00 |
V2 | max_length_in_transaction | max_length_in_transaction | 0 | 0 | -- | ||
V2 | min_length_out_transaction | usbdev_min_length_out_transaction | 10.120s | 8.369ms | 50 | 50 | 100.00 |
V2 | min_length_in_transaction | min_length_in_transaction | 0 | 0 | -- | ||
V2 | random_length_out_trans | usbdev_random_length_out_trans | 9.850s | 8.365ms | 50 | 50 | 100.00 |
V2 | random_length_in_trans | random_length_in_trans | 0 | 0 | -- | ||
V2 | out_stall | usbdev_out_stall | 10.200s | 8.397ms | 50 | 50 | 100.00 |
V2 | in_stall | in_stall | 0 | 0 | -- | ||
V2 | out_iso | out_iso | 0 | 0 | -- | ||
V2 | in_iso | in_iso | 0 | 0 | -- | ||
V2 | pkt_received | usbdev_pkt_received | 9.610s | 8.358ms | 0 | 50 | 0.00 |
V2 | pkt_sent | usbdev_pkt_sent | 10.160s | 8.405ms | 47 | 50 | 94.00 |
V2 | disconnected | disconnected | 0 | 0 | -- | ||
V2 | host_lost | host_lost | 0 | 0 | -- | ||
V2 | link_reset | link_reset | 0 | 0 | -- | ||
V2 | link_suspend | link_suspend | 0 | 0 | -- | ||
V2 | link_resume | link_resume | 0 | 0 | -- | ||
V2 | av_empty | av_empty | 0 | 0 | -- | ||
V2 | rx_full | rx_full | 0 | 0 | -- | ||
V2 | av_overflow | av_overflow | 0 | 0 | -- | ||
V2 | enable | usbdev_enable | 9.850s | 8.351ms | 0 | 50 | 0.00 |
V2 | resume_link_active | resume_link_active | 0 | 0 | -- | ||
V2 | device_address | device_address | 0 | 0 | -- | ||
V2 | link_in_err | link_in_err | 0 | 0 | -- | ||
V2 | rx_crc_err | rx_crc_err | 0 | 0 | -- | ||
V2 | rx_pid_err | rx_pid_err | 0 | 0 | -- | ||
V2 | rx_bitstuff_err | rx_bitstuff_err | 0 | 0 | -- | ||
V2 | link_out_err | link_out_err | 0 | 0 | -- | ||
V2 | invalid_data1_data0_toggle_test | invalid_data1_data0_toggle_test | 0 | 0 | -- | ||
V2 | setup_stage | setup_stage | 0 | 0 | -- | ||
V2 | in_data_stage | in_data_stage | 0 | 0 | -- | ||
V2 | out_data_stage | out_data_stage | 0 | 0 | -- | ||
V2 | out_status_stage | out_status_stage | 0 | 0 | -- | ||
V2 | in_status_stage | in_status_stage | 0 | 0 | -- | ||
V2 | endpoint_access | endpoint_access | 0 | 0 | -- | ||
V2 | disable_endpoint | disable_endpoint | 0 | 0 | -- | ||
V2 | out_trans_nak | usbdev_out_trans_nak | 9.920s | 8.381ms | 50 | 50 | 100.00 |
V2 | setup_trans_ignored | usbdev_setup_trans_ignored | 10.040s | 8.359ms | 50 | 50 | 100.00 |
V2 | nak_trans | usbdev_nak_trans | 10.360s | 8.418ms | 45 | 50 | 90.00 |
V2 | stall_trans | stall_trans | 0 | 0 | -- | ||
V2 | setup_priority_over_stall_response | setup_priority_over_stall_response | 0 | 0 | -- | ||
V2 | stall_priority_over_NAK | stall_priority_over_NAK | 0 | 0 | -- | ||
V2 | pending_in_trans | pending_in_trans | 0 | 0 | -- | ||
V2 | streaming_test | streaming_test | 0 | 0 | -- | ||
V2 | max_clock_error_untracked | max_clock_error_untracked | 0 | 0 | -- | ||
V2 | max_clock_error_tracking | max_clock_error_tracking | 0 | 0 | -- | ||
V2 | max_phase_error | max_phase_error | 0 | 0 | -- | ||
V2 | min_inter_pkt_delay | min_inter_pkt_delay | 0 | 0 | -- | ||
V2 | max_inter_pkt_delay | max_inter_pkt_delay | 0 | 0 | -- | ||
V2 | device_timeout_missing_host_handshake | device_timeout_missing_host_handshake | 0 | 0 | -- | ||
V2 | device_timeout | device_timeout | 0 | 0 | -- | ||
V2 | nak_to_out_trans_when_avbuffer_empty_rxfifo_full | nak_to_out_trans_when_avbuffer_empty_rxfifo_full | 0 | 0 | -- | ||
V2 | aon_wake_resume | aon_wake_resume | 0 | 0 | -- | ||
V2 | aon_wake_reset | aon_wake_reset | 0 | 0 | -- | ||
V2 | aon_wake_disconnect | aon_wake_disconnect | 0 | 0 | -- | ||
V2 | invalid_sync | invalid_sync | 0 | 0 | -- | ||
V2 | spurious_tokens_ignored | spurious_tokens_ignored | 0 | 0 | -- | ||
V2 | low_speed_traffic | low_speed_traffic | 0 | 0 | -- | ||
V2 | rand_bus_resets | rand_bus_resets | 0 | 0 | -- | ||
V2 | rand_disconnects | rand_disconnects | 0 | 0 | -- | ||
V2 | max_usb_traffic | max_usb_traffic | 0 | 0 | -- | ||
V2 | stress_usb_traffic | stress_usb_traffic | 0 | 0 | -- | ||
V2 | in_packet_retraction | in_packet_retraction | 0 | 0 | -- | ||
V2 | data_toggle_restore | data_toggle_restore | 0 | 0 | -- | ||
V2 | setup_priority | setup_priority | 0 | 0 | -- | ||
V2 | fifo_resets | usbdev_fifo_rst | 2.370s | 219.413us | 50 | 50 | 100.00 |
V2 | intr_test | usbdev_intr_test | 0.700s | 18.528us | 28 | 50 | 56.00 |
V2 | alert_test | usbdev_alert_test | 0 | 0 | -- | ||
V2 | tl_d_oob_addr_access | usbdev_tl_errors | 3.130s | 242.569us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | usbdev_tl_errors | 3.130s | 242.569us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | usbdev_csr_hw_reset | 0.880s | 46.476us | 5 | 5 | 100.00 |
usbdev_csr_rw | 1.060s | 62.284us | 5 | 20 | 25.00 | ||
usbdev_csr_aliasing | 3.600s | 371.465us | 5 | 5 | 100.00 | ||
usbdev_same_csr_outstanding | 1.600s | 152.345us | 16 | 20 | 80.00 | ||
V2 | tl_d_partial_access | usbdev_csr_hw_reset | 0.880s | 46.476us | 5 | 5 | 100.00 |
usbdev_csr_rw | 1.060s | 62.284us | 5 | 20 | 25.00 | ||
usbdev_csr_aliasing | 3.600s | 371.465us | 5 | 5 | 100.00 | ||
usbdev_same_csr_outstanding | 1.600s | 152.345us | 16 | 20 | 80.00 | ||
V2 | TOTAL | 654 | 790 | 82.78 | |||
V2S | tl_intg_err | usbdev_sec_cm | 1.080s | 165.085us | 5 | 5 | 100.00 |
usbdev_tl_intg_err | 2.460s | 502.490us | 0 | 20 | 0.00 | ||
V2S | sec_cm_bus_integrity | usbdev_tl_intg_err | 2.460s | 502.490us | 0 | 20 | 0.00 |
V2S | TOTAL | 5 | 25 | 20.00 | |||
V3 | TOTAL | 0 | 0 | -- | |||
Unmapped tests | usbdev_in_stall | 9.790s | 8.358ms | 50 | 50 | 100.00 | |
usbdev_stress_all_with_rand_reset | 0.620s | 5.135us | 0 | 50 | 0.00 | ||
usbdev_stress_all | 0.600s | 0 | 50 | 0.00 | |||
TOTAL | 801 | 1080 | 74.17 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
N.A. | 3 | 3 | 1 | 33.33 |
V1 | 8 | 8 | 5 | 62.50 |
V2 | 80 | 17 | 10 | 12.50 |
V2S | 2 | 2 | 1 | 50.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
---|---|---|---|---|---|---|---|
87.54 | 96.36 | 88.61 | 97.17 | 46.88 | 94.18 | 97.36 | 92.25 |
UVM_WARNING [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
has 100 failures:
0.usbdev_stress_all_with_rand_reset.27544854472919446609745169267212613630235448007871988431246740558808710296570
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_stress_all_with_rand_reset/latest/run.log
UVM_WARNING @ 5038059 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 5038059 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
1.usbdev_stress_all_with_rand_reset.90534531833236359720757572463094052527247292010601136396358140312859327861241
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_stress_all_with_rand_reset/latest/run.log
UVM_WARNING @ 5006425 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 5006425 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
... and 48 more failures.
0.usbdev_stress_all.19996452218531408092133851725131103552836206494723892554353571945097984452271
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_stress_all/latest/run.log
UVM_WARNING @ 0 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 0 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
1.usbdev_stress_all.98620618750094264408573165521971578640656810650862399415765348614384739024448
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_stress_all/latest/run.log
UVM_WARNING @ 0 ps: [BDTYP] Cannot create an object of type 'usbdev_stress_all_vseq' because it is not registered with the factory.
UVM_INFO @ 0 ps: (uvm_factory.svh:1645) [UVM/FACTORY/PRINT]
#### Factory Configuration (*)
No instance overrides are registered with this factory
... and 48 more failures.
UVM_ERROR (usbdev_enable_vseq.sv:48) [usbdev_enable_vseq] Check failed pkt_received == * (* [*] vs * [*])
has 50 failures:
0.usbdev_enable.5070454177583161837976076740618602411585027479564864391093866467726078268547
Line 287, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_enable/latest/run.log
UVM_ERROR @ 8354055369 ps: (usbdev_enable_vseq.sv:48) [uvm_test_top.env.virtual_sequencer.usbdev_enable_vseq] Check failed pkt_received == 1 (0 [0x0] vs 1 [0x1])
UVM_INFO @ 8354055369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.usbdev_enable.72080452469687391770432872477572850865050438641430841926548039333991860190465
Line 287, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_enable/latest/run.log
UVM_ERROR @ 8351807464 ps: (usbdev_enable_vseq.sv:48) [uvm_test_top.env.virtual_sequencer.usbdev_enable_vseq] Check failed pkt_received == 1 (0 [0x0] vs 1 [0x1])
UVM_INFO @ 8351807464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 48 more failures.
UVM_ERROR (usbdev_pkt_received_vseq.sv:59) [usbdev_pkt_received_vseq] Check failed pkt_received == * (* [*] vs * [*])
has 50 failures:
0.usbdev_pkt_received.71731636376659005239839361259507214599132836198987940870266251577492237603823
Line 290, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_pkt_received/latest/run.log
UVM_ERROR @ 8358476122 ps: (usbdev_pkt_received_vseq.sv:59) [uvm_test_top.env.virtual_sequencer.usbdev_pkt_received_vseq] Check failed pkt_received == 1 (0 [0x0] vs 1 [0x1])
UVM_INFO @ 8358476122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.usbdev_pkt_received.38101444510331489030297562079836968166136245802743419507749048161129050814847
Line 290, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_pkt_received/latest/run.log
UVM_ERROR @ 8388863019 ps: (usbdev_pkt_received_vseq.sv:59) [uvm_test_top.env.virtual_sequencer.usbdev_pkt_received_vseq] Check failed pkt_received == 1 (0 [0x0] vs 1 [0x1])
UVM_INFO @ 8388863019 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 48 more failures.
UVM_ERROR (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (* [*] vs * [*]) Regname: usbdev_reg_block.configin_* reset value: *
has 25 failures:
0.usbdev_csr_rw.107906540115869999574496710581384953099257275976725761142123316614901020773750
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_csr_rw/latest/run.log
UVM_ERROR @ 6118017 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073766666 [0x4000610a] vs 2147508490 [0x8000610a]) Regname: usbdev_reg_block.configin_6 reset value: 0x0
UVM_INFO @ 6118017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.usbdev_csr_rw.37542245795404224912505685997867339922118446304206618417246686150109875516618
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_csr_rw/latest/run.log
UVM_ERROR @ 6580865 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073753618 [0x40002e12] vs 2147495442 [0x80002e12]) Regname: usbdev_reg_block.configin_9 reset value: 0x0
UVM_INFO @ 6580865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 9 more failures.
0.usbdev_csr_mem_rw_with_rand_reset.97520487072998873985035350387357257246541579026509340061472338984362250142813
Line 250, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 8917717 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073745939 [0x40001013] vs 2147487763 [0x80001013]) Regname: usbdev_reg_block.configin_3 reset value: 0x0
UVM_INFO @ 8917717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.usbdev_csr_mem_rw_with_rand_reset.66692231315052381099002475821179555671565424971759649670402845760782564924804
Line 250, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 11321016 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073762314 [0x4000500a] vs 2147504138 [0x8000500a]) Regname: usbdev_reg_block.configin_3 reset value: 0x0
UVM_INFO @ 11321016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
1.usbdev_tl_intg_err.44426790747673008415210618765377812818810248143657394259120673782530564128038
Line 252, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 6058346 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073768206 [0x4000670e] vs 2147510030 [0x8000670e]) Regname: usbdev_reg_block.configin_11 reset value: 0x0
UVM_INFO @ 6058346 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
3.usbdev_tl_intg_err.48539708519378316087052445369721574875325148622797630083383173862866716904403
Line 264, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 29397022 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1073763083 [0x4000530b] vs 2147504907 [0x8000530b]) Regname: usbdev_reg_block.configin_3 reset value: 0x0
UVM_INFO @ 29397022 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 8 more failures.
UVM_ERROR (cip_base_vseq.sv:473) [usbdev_common_vseq] Check failed exp_val == act_val (* [*] vs * [*]) when reading the intr CSRusbdev_reg_block.intr_state
has 21 failures:
3.usbdev_intr_test.106065968980557712291313608566657180131706524409624075401946294546013951678302
Line 251, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/3.usbdev_intr_test/latest/run.log
UVM_ERROR @ 6111065 ps: (cip_base_vseq.sv:473) [uvm_test_top.env.virtual_sequencer.usbdev_common_vseq] Check failed exp_val == act_val (90156 [0x1602c] vs 90172 [0x1603c]) when reading the intr CSRusbdev_reg_block.intr_state
UVM_INFO @ 6111065 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.usbdev_intr_test.100204473047298109686161514122145292974110325551398737563565973035320358569772
Line 250, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/4.usbdev_intr_test/latest/run.log
UVM_ERROR @ 5920566 ps: (cip_base_vseq.sv:473) [uvm_test_top.env.virtual_sequencer.usbdev_common_vseq] Check failed exp_val == act_val (53248 [0xd000] vs 53264 [0xd010]) when reading the intr CSRusbdev_reg_block.intr_state
UVM_INFO @ 5920566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 19 more failures.
UVM_ERROR (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (* [*] vs * [*]) Regname: usbdev_reg_block.configin_*.pend reset value: *
has 8 failures:
0.usbdev_tl_intg_err.107715913678530208210902967638411260900436321954005366432492715936354388998837
Line 259, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 10314169 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: usbdev_reg_block.configin_7.pend reset value: 0x0
UVM_INFO @ 10314169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.usbdev_tl_intg_err.30600429152014288865034048876689814851366715834224720045762874198435193264194
Line 286, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 117138851 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: usbdev_reg_block.configin_11.pend reset value: 0x0
UVM_INFO @ 117138851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 5 more failures.
14.usbdev_csr_mem_rw_with_rand_reset.78582410453800340249449246370238184845452107865990183049726406367084835282452
Line 250, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 11304843 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: usbdev_reg_block.configin_0.pend reset value: 0x0
UVM_INFO @ 11304843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (* [*] vs * [*]) Regname: usbdev_reg_block.configin_*.rdy reset value: *
has 8 failures:
Test usbdev_csr_rw has 4 failures.
5.usbdev_csr_rw.50291505710521245224384958169293037945037243421681437840373063347278387517907
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/5.usbdev_csr_rw/latest/run.log
UVM_ERROR @ 8162773 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: usbdev_reg_block.configin_8.rdy reset value: 0x0
UVM_INFO @ 8162773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
9.usbdev_csr_rw.95883583121685577901183454096156729687916495914948064394016117334841160305280
Line 250, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/9.usbdev_csr_rw/latest/run.log
UVM_ERROR @ 17020187 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: usbdev_reg_block.configin_3.rdy reset value: 0x0
UVM_INFO @ 17020187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
Test usbdev_csr_mem_rw_with_rand_reset has 2 failures.
8.usbdev_csr_mem_rw_with_rand_reset.82088641174695437046003452349619520785759943199329280590344553775383107338163
Line 250, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 10827360 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: usbdev_reg_block.configin_2.rdy reset value: 0x0
UVM_INFO @ 10827360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
11.usbdev_csr_mem_rw_with_rand_reset.95217365111215416549416466442621196806047347612884143602866104630369252460433
Line 256, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 28502104 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: usbdev_reg_block.configin_2.rdy reset value: 0x0
UVM_INFO @ 28502104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test usbdev_tl_intg_err has 2 failures.
9.usbdev_tl_intg_err.23526517969531757196055934124669328551844488048749644108428061415826433234212
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 10686196 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: usbdev_reg_block.configin_0.rdy reset value: 0x0
UVM_INFO @ 10686196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
18.usbdev_tl_intg_err.27921542272705344081652082046661947633776827658574482787908042173992718459747
Line 278, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest/run.log
UVM_ERROR @ 26687486 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: usbdev_reg_block.configin_11.rdy reset value: 0x0
UVM_INFO @ 26687486 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:503) [usbdev_nak_trans_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*])
has 5 failures:
23.usbdev_nak_trans.72393382884944662442073802559265526325905564035483638476073409802513308132589
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/23.usbdev_nak_trans/latest/run.log
UVM_ERROR @ 8887075 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_nak_trans_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 8887075 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
24.usbdev_nak_trans.440408291785517344668198673895827675305004352898221751863963654302880512973
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/24.usbdev_nak_trans/latest/run.log
UVM_ERROR @ 9145738 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_nak_trans_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 9145738 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
UVM_ERROR (cip_base_vseq.sv:250) [usbdev_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch
has 4 failures:
3.usbdev_same_csr_outstanding.76696465221366679705434178305331914087783981080391504701674577805624095534156
Line 250, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest/run.log
UVM_ERROR @ 23573861 ps: (cip_base_vseq.sv:250) [uvm_test_top.env.virtual_sequencer.usbdev_common_vseq] Check failed masked_data == exp_data (1073767951 [0x4000660f] vs 2147509775 [0x8000660f]) addr 0xa9ec606c read out mismatch
UVM_INFO @ 23573861 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
6.usbdev_same_csr_outstanding.40347311637013683371403967982220611972604508388911779195036556939195291942796
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest/run.log
UVM_ERROR @ 6041628 ps: (cip_base_vseq.sv:250) [uvm_test_top.env.virtual_sequencer.usbdev_common_vseq] Check failed masked_data == exp_data (1073761032 [0x40004b08] vs 19208 [0x4b08]) addr 0x22aee048 read out mismatch
UVM_INFO @ 6041628 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_ERROR (cip_base_vseq.sv:503) [usbdev_pkt_sent_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*])
has 3 failures:
12.usbdev_pkt_sent.78280188456067111209026627767747062888803197205212608677116773975072419363977
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/12.usbdev_pkt_sent/latest/run.log
UVM_ERROR @ 9708906 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_pkt_sent_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 9708906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
16.usbdev_pkt_sent.85326690898014046469443998806934890016985506587258857309445826611160554780936
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/16.usbdev_pkt_sent/latest/run.log
UVM_ERROR @ 11608144 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_pkt_sent_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 11608144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_FATAL (usb20_driver.sv:295) [driver] timeout waiting for usb_pullup
has 2 failures:
Test usbdev_csr_bit_bash has 1 failures.
1.usbdev_csr_bit_bash.14884471583444930718963299715108413843458160877958760283644018852298270503377
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest/run.log
UVM_FATAL @ 501889709 ps: (usb20_driver.sv:295) [uvm_test_top.env.m_usb20_agent.driver] timeout waiting for usb_pullup
UVM_INFO @ 501889709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test usbdev_tl_intg_err has 1 failures.
14.usbdev_tl_intg_err.51232550615193787690490446084193316785351865966748110886097239068372904164990
Line 313, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest/run.log
UVM_FATAL @ 502490467 ps: (usb20_driver.sv:295) [uvm_test_top.env.m_usb20_agent.driver] timeout waiting for usb_pullup
UVM_INFO @ 502490467 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:503) [usbdev_in_trans_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*])
has 2 failures:
4.usbdev_in_trans.86509393727958956182717606698707465942496145558808862631192355921505254507411
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/4.usbdev_in_trans/latest/run.log
UVM_ERROR @ 10149746 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_in_trans_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 10149746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
16.usbdev_in_trans.106852009410862201645592377909592742572621607217350817295233749381921857072557
Line 248, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/16.usbdev_in_trans/latest/run.log
UVM_ERROR @ 10203125 ps: (cip_base_vseq.sv:503) [uvm_test_top.env.virtual_sequencer.usbdev_in_trans_vseq] Check failed data & ~ro_mask == 0 (16 [0x10] vs 0 [0x0])
UVM_INFO @ 10203125 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:480) [usbdev_common_vseq] Check failed exp_intr_pin === act_intr_pin (* [*] vs * [*])
has 1 failures:
2.usbdev_intr_test.42534123247792795383044204983170373855100169386212710757057812964695617780265
Line 249, in log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_intr_test/latest/run.log
UVM_ERROR @ 5476369 ps: (cip_base_vseq.sv:480) [uvm_test_top.env.virtual_sequencer.usbdev_common_vseq] Check failed exp_intr_pin === act_intr_pin (0x82 [10000010] vs 0x92 [10010010])
UVM_INFO @ 5476369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---