eb56ef55d0| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | usbdev_smoke | 0 | 50 | 0.00 | ||
| V1 | csr_hw_reset | usbdev_csr_hw_reset | 0.940s | 92.310us | 5 | 5 | 100.00 |
| V1 | csr_rw | usbdev_csr_rw | 1.170s | 151.850us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | usbdev_csr_bit_bash | 10.270s | 2.100ms | 5 | 5 | 100.00 |
| V1 | csr_aliasing | usbdev_csr_aliasing | 3.620s | 340.915us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | usbdev_csr_mem_rw_with_rand_reset | 2.560s | 167.561us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | usbdev_csr_rw | 1.170s | 151.850us | 20 | 20 | 100.00 |
| usbdev_csr_aliasing | 3.620s | 340.915us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | usbdev_mem_walk | 4.090s | 204.399us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | usbdev_mem_partial_access | 2.370s | 205.295us | 5 | 5 | 100.00 |
| V1 | TOTAL | 65 | 115 | 56.52 | |||
| V2 | in_trans | usbdev_in_trans | 0 | 50 | 0.00 | ||
| V2 | data_toggle_clear | usbdev_data_toggle_clear | 0 | 50 | 0.00 | ||
| V2 | phy_pins_sense | usbdev_phy_pins_sense | 0 | 50 | 0.00 | ||
| V2 | av_buffer | usbdev_av_buffer | 0 | 50 | 0.00 | ||
| V2 | rx_fifo | usbdev_pkt_buffer | 0 | 50 | 0.00 | ||
| V2 | phy_config_tx_osc_test_mode | usbdev_phy_config_tx_osc_test_mode | 0 | 1 | 0.00 | ||
| V2 | phy_config_eop_single_bit_handling | usbdev_phy_config_eop_single_bit_handling | 0 | 1 | 0.00 | ||
| V2 | phy_config_pinflip | usbdev_phy_config_pinflip | 0 | 50 | 0.00 | ||
| V2 | phy_config_rand_bus_type | usbdev_phy_config_rand_bus_type | 0 | 5 | 0.00 | ||
| V2 | phy_config_rx_dp_dn | usbdev_phy_config_rx_dp_dn | 0 | 1 | 0.00 | ||
| V2 | phy_config_tx_use_d_se0 | usbdev_phy_config_tx_use_d_se0 | 0 | 1 | 0.00 | ||
| V2 | phy_config_usb_ref_disable | usbdev_phy_config_usb_ref_disable | 0 | 50 | 0.00 | ||
| V2 | max_length_out_transaction | usbdev_max_length_out_transaction | 0 | 50 | 0.00 | ||
| V2 | max_length_in_transaction | usbdev_max_length_in_transaction | 0 | 50 | 0.00 | ||
| V2 | min_length_out_transaction | usbdev_min_length_out_transaction | 0 | 50 | 0.00 | ||
| V2 | min_length_in_transaction | usbdev_min_length_in_transaction | 0 | 50 | 0.00 | ||
| V2 | random_length_out_transaction | usbdev_random_length_out_transaction | 0 | 50 | 0.00 | ||
| V2 | random_length_in_transaction | usbdev_random_length_in_transaction | 0 | 50 | 0.00 | ||
| V2 | out_stall | usbdev_out_stall | 0 | 50 | 0.00 | ||
| V2 | in_stall | usbdev_in_stall | 0 | 50 | 0.00 | ||
| V2 | out_iso | usbdev_out_iso | 0 | 50 | 0.00 | ||
| V2 | in_iso | usbdev_in_iso | 0 | 50 | 0.00 | ||
| V2 | pkt_received | usbdev_pkt_received | 0 | 50 | 0.00 | ||
| V2 | pkt_sent | usbdev_pkt_sent | 0 | 50 | 0.00 | ||
| V2 | disconnected | usbdev_disconnected | 0 | 50 | 0.00 | ||
| V2 | host_lost | usbdev_host_lost | 0 | 1 | 0.00 | ||
| V2 | link_reset | usbdev_link_reset | 0 | 1 | 0.00 | ||
| V2 | link_suspend | usbdev_link_suspend | 0 | 50 | 0.00 | ||
| V2 | link_resume | usbdev_link_resume | 0 | 50 | 0.00 | ||
| V2 | av_empty | usbdev_av_empty | 0 | 5 | 0.00 | ||
| V2 | rx_full | usbdev_rx_full | 0 | 1 | 0.00 | ||
| V2 | av_overflow | usbdev_av_overflow | 0 | 5 | 0.00 | ||
| V2 | link_in_err | usbdev_link_in_err | 0 | 50 | 0.00 | ||
| V2 | rx_crc_err | usbdev_rx_crc_err | 0 | 50 | 0.00 | ||
| V2 | rx_pid_err | usbdev_rx_pid_err | 0 | 5 | 0.00 | ||
| V2 | rx_bitstuff_err | usbdev_bitstuff_err | 0 | 50 | 0.00 | ||
| V2 | link_out_err | usbdev_link_out_err | 0 | 1 | 0.00 | ||
| V2 | enable | usbdev_enable | 0 | 50 | 0.00 | ||
| V2 | resume_link_active | usbdev_resume_link_active | 0 | 1 | 0.00 | ||
| V2 | device_address | usbdev_device_address | 0 | 50 | 0.00 | ||
| V2 | invalid_data1_data0_toggle_test | usbdev_invalid_data1_data0_toggle_test | 0 | 1 | 0.00 | ||
| V2 | setup_stage | usbdev_setup_stage | 0 | 50 | 0.00 | ||
| V2 | endpoint_access | usbdev_endpoint_access | 0 | 50 | 0.00 | ||
| V2 | disable_endpoint | usbdev_disable_endpoint | 0 | 50 | 0.00 | ||
| V2 | out_trans_nak | usbdev_out_trans_nak | 0 | 50 | 0.00 | ||
| V2 | setup_trans_ignored | usbdev_setup_trans_ignored | 0 | 50 | 0.00 | ||
| V2 | nak_trans | usbdev_nak_trans | 0 | 50 | 0.00 | ||
| V2 | stall_trans | usbdev_stall_trans | 0 | 50 | 0.00 | ||
| V2 | setup_priority_over_stall_response | usbdev_setup_priority_over_stall_response | 0 | 5 | 0.00 | ||
| V2 | stall_priority_over_nak | usbdev_stall_priority_over_nak | 0 | 50 | 0.00 | ||
| V2 | pending_in_trans | usbdev_pending_in_trans | 0 | 50 | 0.00 | ||
| V2 | streaming_test | usbdev_streaming_out | 0 | 50 | 0.00 | ||
| V2 | max_clock_error_untracked | max_clock_error_untracked | 0 | 0 | -- | ||
| V2 | max_clock_error_tracking | max_clock_error_tracking | 0 | 0 | -- | ||
| V2 | max_phase_error | max_phase_error | 0 | 0 | -- | ||
| V2 | min_inter_pkt_delay | usbdev_min_inter_pkt_delay | 0 | 50 | 0.00 | ||
| V2 | max_inter_pkt_delay | usbdev_max_inter_pkt_delay | 0 | 50 | 0.00 | ||
| V2 | device_timeout_missing_host_handshake | device_timeout_missing_host_handshake | 0 | 0 | -- | ||
| V2 | device_timeout | device_timeout | 0 | 0 | -- | ||
| V2 | packet_buffer | usbdev_pkt_buffer | 0 | 50 | 0.00 | ||
| V2 | nak_to_out_trans_when_avbuffer_empty_rxfifo_full | usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full | 0 | 1 | 0.00 | ||
| V2 | aon_wake_resume | usbdev_aon_wake_resume | 0 | 50 | 0.00 | ||
| V2 | aon_wake_reset | usbdev_aon_wake_reset | 0 | 50 | 0.00 | ||
| V2 | aon_wake_disconnect | usbdev_aon_wake_disconnect | 0 | 50 | 0.00 | ||
| V2 | invalid_sync | usbdev_invalid_sync | 0 | 50 | 0.00 | ||
| V2 | spurious_pids_ignored | usbdev_spurious_pids_ignored | 0 | 50 | 0.00 | ||
| V2 | low_speed_traffic | usbdev_low_speed_traffic | 0 | 50 | 0.00 | ||
| V2 | rand_bus_resets | usbdev_rand_bus_resets | 0 | 10 | 0.00 | ||
| V2 | rand_disconnects | usbdev_rand_bus_disconnects | 0 | 10 | 0.00 | ||
| V2 | rand_suspends | usbdev_rand_suspends | 0 | 10 | 0.00 | ||
| V2 | max_usb_traffic | usbdev_max_usb_traffic | 0 | 50 | 0.00 | ||
| V2 | stress_usb_traffic | usbdev_stress_usb_traffic | 0 | 5 | 0.00 | ||
| V2 | in_packet_retraction | in_packet_retraction | 0 | 0 | -- | ||
| V2 | data_toggle_restore | usbdev_data_toggle_restore | 0 | 50 | 0.00 | ||
| V2 | setup_priority | usbdev_setup_priority | 0 | 5 | 0.00 | ||
| V2 | fifo_resets | usbdev_fifo_rst | 0 | 50 | 0.00 | ||
| V2 | intr_test | usbdev_intr_test | 0.810s | 87.676us | 50 | 50 | 100.00 |
| V2 | alert_test | usbdev_alert_test | 0 | 50 | 0.00 | ||
| V2 | tl_d_oob_addr_access | usbdev_tl_errors | 3.340s | 132.843us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | usbdev_tl_errors | 3.340s | 132.843us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | usbdev_csr_hw_reset | 0.940s | 92.310us | 5 | 5 | 100.00 |
| usbdev_csr_rw | 1.170s | 151.850us | 20 | 20 | 100.00 | ||
| usbdev_csr_aliasing | 3.620s | 340.915us | 5 | 5 | 100.00 | ||
| usbdev_same_csr_outstanding | 2.080s | 402.210us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | usbdev_csr_hw_reset | 0.940s | 92.310us | 5 | 5 | 100.00 |
| usbdev_csr_rw | 1.170s | 151.850us | 20 | 20 | 100.00 | ||
| usbdev_csr_aliasing | 3.620s | 340.915us | 5 | 5 | 100.00 | ||
| usbdev_same_csr_outstanding | 2.080s | 402.210us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 90 | 2616 | 3.44 | |||
| V2S | tl_intg_err | usbdev_sec_cm | 0 | 5 | 0.00 | ||
| usbdev_tl_intg_err | 5.360s | 900.491us | 20 | 20 | 100.00 | ||
| V2S | sec_cm_bus_integrity | usbdev_tl_intg_err | 5.360s | 900.491us | 20 | 20 | 100.00 |
| V2S | TOTAL | 20 | 25 | 80.00 | |||
| V3 | dpi_config_host | usbdev_dpi_config_host | 0 | 1 | 0.00 | ||
| V3 | TOTAL | 0 | 1 | 0.00 | |||
| Unmapped tests | usbdev_stress_all_with_rand_reset | 0 | 10 | 0.00 | |||
| usbdev_stress_all | 0 | 50 | 0.00 | ||||
| TOTAL | 175 | 2817 | 6.21 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| N.A. | 2 | 2 | 0 | 0.00 |
| V1 | 8 | 8 | 7 | 87.50 |
| V2 | 79 | 73 | 3 | 3.80 |
| V2S | 2 | 2 | 1 | 50.00 |
| V3 | 1 | 1 | 0 | 0.00 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 68.32 | 66.34 | 60.04 | 86.78 | 0.00 | 70.29 | 98.60 | 96.22 |
launch_task.returncode != *, err: * *:*:* * lswatcher.go:*] Failed to connect to Watcher service in the Envelope (you probably need to import _ "google3/tech/env/go/envelope"): generic::unimplemented: envrpc: no envelope available for service "chubby.googleapis.com" Failure to submit jobs: rpc error: code = Unavailable desc = The service is currently unavailable. has 1321 failures:
0.usbdev_aon_wake_disconnect.111453564984393259154089952381820912513194444822942434049768150971366446208776
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest/run.log
2.usbdev_aon_wake_disconnect.8152595166591348936529681885378319348403286623171544263084361366682649004453
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest/run.log
... and 23 more failures.
0.usbdev_aon_wake_resume.75922829512538174649292423092442605124988478094402446701536602499792444353791
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest/run.log
2.usbdev_aon_wake_resume.24225219380419829498160127369582767427541647634373538529411312334254746388916
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest/run.log
... and 23 more failures.
0.usbdev_av_empty.15795584700019468849059468242313919141696534534165667204005864899217223024107
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_av_empty/latest/run.log
2.usbdev_av_empty.3161857097599450111465343092799346111767145167452014459862267326381864581988
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_av_empty/latest/run.log
... and 1 more failures.
0.usbdev_bitstuff_err.31409552892954546481473015757551619588839602953283703065699377991712098801404
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest/run.log
2.usbdev_bitstuff_err.26898824052246827070954465983802998238511090620382985901939925164795743029866
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest/run.log
... and 23 more failures.
0.usbdev_data_toggle_restore.109433265019624797519697270821373567293314186798443083584063509760489713804508
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest/run.log
2.usbdev_data_toggle_restore.44716218996045196314341695259209056906319979938130911207774300293625638195197
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest/run.log
... and 23 more failures.
Job killed most likely because its dependent job failed. has 1321 failures:
0.usbdev_aon_wake_reset.99547223602026940878858593507870663977446265438017187756681898323465574113182
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest/run.log
2.usbdev_aon_wake_reset.1568664394505437107344132556056556618586210591878122400162510900143974201439
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest/run.log
... and 23 more failures.
0.usbdev_av_buffer.87960685639820555116273024258213161724275546102703370943942448691358208738769
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_av_buffer/latest/run.log
2.usbdev_av_buffer.63837451274981517143559598724411535611005453408557047668218873161786876149416
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_av_buffer/latest/run.log
... and 23 more failures.
0.usbdev_av_overflow.50575554637053383789190389169059217279591584544293805455844072664035960042952
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_av_overflow/latest/run.log
2.usbdev_av_overflow.110283780687550598735798281119893863644980754935004566149190690786794091219607
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_av_overflow/latest/run.log
... and 1 more failures.
0.usbdev_data_toggle_clear.25694121225253338295643875561167032208001223275558620914062164947858413043954
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest/run.log
2.usbdev_data_toggle_clear.85179512259643564272217426001440423467973298423480155009679222384030628270362
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest/run.log
... and 23 more failures.
0.usbdev_device_address.88158768759959784725552756645350416629359260770172578198701589989047313008201
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/0.usbdev_device_address/latest/run.log
2.usbdev_device_address.86553746505097172013896275975567349329943488958578916066041492420773364570716
Log /container/opentitan-public/scratch/os_regression/usbdev-sim-vcs/2.usbdev_device_address/latest/run.log
... and 23 more failures.