USBDEV Simulation Results

Wednesday June 26 2024 23:02:36 UTC

GitHub Revision: be1c4a4f52

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 44766564427213563291105655232733134394512207819884794315335669279596867428010

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.040s 302.241us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 0.970s 150.843us 5 5 100.00
V1 csr_rw usbdev_csr_rw 1.110s 89.082us 20 20 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 7.980s 1.255ms 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 3.660s 297.821us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 2.260s 98.294us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 1.110s 89.082us 20 20 100.00
usbdev_csr_aliasing 3.660s 297.821us 5 5 100.00
V1 mem_walk usbdev_mem_walk 4.370s 479.657us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 2.410s 200.472us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 in_trans usbdev_in_trans 1.000s 221.170us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 1.730s 605.433us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 0.730s 53.546us 50 50 100.00
V2 av_buffer usbdev_av_buffer 0.930s 242.741us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 55.360s 22.981ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 1.060s 303.831us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 0.790s 163.722us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.070s 261.718us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 0.950s 236.283us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 0.930s 276.824us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 0.920s 223.819us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 0.870s 194.409us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 0.970s 208.797us 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.050s 245.973us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 0.880s 195.046us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 0.860s 171.551us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 0.970s 188.489us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 0.980s 227.491us 50 50 100.00
V2 out_stall usbdev_out_stall 0.920s 238.391us 50 50 100.00
V2 in_stall usbdev_in_stall 0.860s 145.988us 50 50 100.00
V2 out_iso usbdev_out_iso 0.900s 227.127us 50 50 100.00
V2 in_iso usbdev_in_iso 0.990s 239.178us 50 50 100.00
V2 pkt_received usbdev_pkt_received 0.930s 176.579us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 1.010s 229.943us 50 50 100.00
V2 disconnected usbdev_disconnected 0.910s 167.002us 50 50 100.00
V2 host_lost usbdev_host_lost 10.220s 4.247ms 1 1 100.00
V2 link_reset usbdev_link_reset 0.820s 209.025us 1 1 100.00
V2 link_suspend usbdev_link_suspend 4.900s 3.322ms 50 50 100.00
V2 link_resume usbdev_link_resume 30.440s 23.387ms 50 50 100.00
V2 av_empty usbdev_av_empty 0.840s 180.396us 5 5 100.00
V2 rx_full usbdev_rx_full 0.980s 253.126us 1 1 100.00
V2 av_overflow usbdev_av_overflow 0.790s 145.292us 5 5 100.00
V2 link_in_err usbdev_link_in_err 0.930s 258.288us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 0.920s 189.174us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 0.880s 224.936us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 0.900s 191.958us 50 50 100.00
V2 link_out_err usbdev_link_out_err 1.200s 454.207us 1 1 100.00
V2 enable usbdev_enable 0.800s 62.751us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 21.050s 20.166ms 1 1 100.00
V2 device_address usbdev_device_address 46.910s 22.743ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 1.290s 473.876us 1 1 100.00
V2 setup_stage usbdev_setup_stage 0.900s 227.146us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 2.630s 1.162ms 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 1.560s 504.872us 50 50 100.00
V2 out_trans_nak usbdev_out_trans_nak 0.920s 213.737us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 0.870s 175.025us 50 50 100.00
V2 nak_trans usbdev_nak_trans 1.030s 268.207us 50 50 100.00
V2 stall_trans usbdev_stall_trans 0.940s 171.847us 50 50 100.00
V2 setup_priority_over_stall_response setup_priority_over_stall_response 0 0 --
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 0.900s 213.148us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 0.910s 165.388us 50 50 100.00
V2 streaming_test usbdev_streaming_out 2.590m 5.682ms 50 50 100.00
V2 max_clock_error_untracked max_clock_error_untracked 0 0 --
V2 max_clock_error_tracking max_clock_error_tracking 0 0 --
V2 max_phase_error max_phase_error 0 0 --
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 3.618m 7.633ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 3.752m 7.873ms 50 50 100.00
V2 device_timeout_missing_host_handshake device_timeout_missing_host_handshake 0 0 --
V2 device_timeout device_timeout 0 0 --
V2 packet_buffer usbdev_pkt_buffer 55.360s 22.981ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 1.340s 447.420us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 31.550s 23.479ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 16.580s 13.402ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 6.110s 4.369ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 4.405m 10.102ms 34 50 68.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 3.305m 7.351ms 50 50 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 5.233m 11.154ms 50 50 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 9.273m 20.852ms 10 10 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 9.423m 20.868ms 10 10 100.00
V2 max_usb_traffic usbdev_max_usb_traffic 3.536m 7.503ms 50 50 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 4.692m 13.271ms 5 5 100.00
V2 in_packet_retraction in_packet_retraction 0 0 --
V2 data_toggle_restore usbdev_data_toggle_restore 3.290s 1.547ms 50 50 100.00
V2 setup_priority usbdev_setup_priority 1.480s 411.244us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 2.420s 358.755us 50 50 100.00
V2 intr_test usbdev_intr_test 0.830s 123.324us 50 50 100.00
V2 alert_test usbdev_alert_test 0 0 --
V2 tl_d_oob_addr_access usbdev_tl_errors 3.320s 253.742us 20 20 100.00
V2 tl_d_illegal_access usbdev_tl_errors 3.320s 253.742us 20 20 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 0.970s 150.843us 5 5 100.00
usbdev_csr_rw 1.110s 89.082us 20 20 100.00
usbdev_csr_aliasing 3.660s 297.821us 5 5 100.00
usbdev_same_csr_outstanding 1.890s 210.915us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 0.970s 150.843us 5 5 100.00
usbdev_csr_rw 1.110s 89.082us 20 20 100.00
usbdev_csr_aliasing 3.660s 297.821us 5 5 100.00
usbdev_same_csr_outstanding 1.890s 210.915us 20 20 100.00
V2 TOTAL 2535 2551 99.37
V2S tl_intg_err usbdev_sec_cm 2.130s 1.345ms 5 5 100.00
usbdev_tl_intg_err 5.680s 1.432ms 20 20 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 5.680s 1.432ms 20 20 100.00
V2S TOTAL 25 25 100.00
V3 TOTAL 0 0 --
Unmapped tests usbdev_dpi_config_host 2.117m 5.108ms 1 1 100.00
usbdev_rand_suspends 6.267m 16.078ms 10 10 100.00
usbdev_stress_all_with_rand_reset 0.670s 52.202us 0 10 0.00
usbdev_stress_all 0.620s 0 50 0.00
TOTAL 2686 2762 97.25

Testplan Progress

Items Total Written Passing Progress
N.A. 4 4 2 50.00
V1 8 8 8 100.00
V2 78 70 69 88.46
V2S 2 2 2 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
93.35 97.82 93.76 97.44 73.44 96.21 98.17 96.58

Failure Buckets

Past Results