Group : usbdev_env_pkg::usbdev_env_cov::address_cg
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Group : usbdev_env_pkg::usbdev_env_cov::address_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
0.00 1 100 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv



Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 9 9 0 0.00
Crosses 14 14 0 0.00


Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_address 7 7 0 0.00 100 1 1 0
cp_endp 2 2 0 0.00 100 1 1 0


Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_address_X_endp 14 14 0 0.00 100 1 1 0


Summary for Variable cp_address

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 7 0 0.00


User Defined Bins for cp_address

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
range_127 0 1 1
range_16_to_126 0 1 1
fifteen 0 1 1
range_2_to_14 0 1 1
seven 0 1 1
one 0 1 1
zero 0 1 1



Summary for Variable cp_endp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 2 0 0.00


User Defined Bins for cp_endp

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
seven 0 1 1
three 0 1 1



Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 14 14 0 0.00 14


Automatically Generated Cross Bins for cr_address_X_endp

Uncovered bins
cp_addresscp_endpCOUNTAT LEASTNUMBERSTATUS
* * -- -- 14

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%