| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 96.82 | 98.16 | 96.01 | 97.44 | 96.61 | 98.38 | 98.17 | 92.94 |
| T3577 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.1657889141 | Aug 25 09:44:34 AM UTC 24 | Aug 25 09:44:37 AM UTC 24 | 590626874 ps | ||
| T3578 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.1739212204 | Aug 25 09:44:34 AM UTC 24 | Aug 25 09:44:37 AM UTC 24 | 489111385 ps | ||
| T3579 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.1435319151 | Aug 25 09:44:34 AM UTC 24 | Aug 25 09:44:37 AM UTC 24 | 456122894 ps | ||
| T3580 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.3102322198 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:37 AM UTC 24 | 498409978 ps | ||
| T3581 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.4163390503 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:40 AM UTC 24 | 470201398 ps | ||
| T3582 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.1134661869 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 502681441 ps | ||
| T3583 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.4202239785 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 607325959 ps | ||
| T3584 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.753701084 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 587314378 ps | ||
| T3585 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.1389995537 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 559065821 ps | ||
| T208 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.2986804671 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 696679835 ps | ||
| T3586 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.4275506904 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 615745878 ps | ||
| T3587 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.2727826146 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 514877465 ps | ||
| T3588 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.2045505132 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 437763482 ps | ||
| T3589 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.1818963157 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 434913045 ps | ||
| T3590 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.3049613056 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 571568771 ps | ||
| T3591 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.3397275951 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 659753511 ps | ||
| T3592 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.1253745193 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 538596608 ps | ||
| T3593 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.3508803885 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 559547444 ps | ||
| T3594 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.405207432 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 471999110 ps | ||
| T3595 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.3254830234 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:41 AM UTC 24 | 623446141 ps | ||
| T3596 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.4057047251 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:47 AM UTC 24 | 588990410 ps | ||
| T3597 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.1977870835 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 533205605 ps | ||
| T3598 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.3764912749 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 631632888 ps | ||
| T3599 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.3007958775 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 515346241 ps | ||
| T3600 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.2122504651 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 655836352 ps | ||
| T109 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.2481472574 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 701079247 ps | ||
| T3601 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.2699396003 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 469694044 ps | ||
| T3602 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.3673222271 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 709935396 ps | ||
| T3603 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.133197797 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 400434340 ps | ||
| T3604 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.3373082119 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 559868712 ps | ||
| T3605 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.787777344 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 525172880 ps | ||
| T3606 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.513216535 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:52 AM UTC 24 | 559389184 ps | ||
| T3607 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.3462595175 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:52 AM UTC 24 | 587026235 ps | ||
| T3608 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.3526547181 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:52 AM UTC 24 | 455507049 ps | ||
| T3609 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.2242386489 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:52 AM UTC 24 | 567232851 ps | ||
| T3610 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.2436037484 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:52 AM UTC 24 | 529819485 ps | ||
| T3611 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.2508782583 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:52 AM UTC 24 | 535059552 ps | ||
| T3612 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.3057650191 | Aug 25 09:44:36 AM UTC 24 | Aug 25 09:44:52 AM UTC 24 | 595784640 ps | ||
| T3613 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.224904203 | Aug 25 09:44:35 AM UTC 24 | Aug 25 09:44:53 AM UTC 24 | 511049068 ps | ||
| T3614 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.2305262823 | Aug 25 09:44:36 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 485016543 ps | ||
| T3615 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.161568924 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 636326785 ps | ||
| T3616 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.4072721982 | Aug 25 09:44:36 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 486104204 ps | ||
| T3617 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.2017081436 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 546201852 ps | ||
| T3618 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.1096955425 | Aug 25 09:44:36 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 527006215 ps | ||
| T3619 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.1334721121 | Aug 25 09:44:36 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 566632656 ps | ||
| T3620 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.2823363245 | Aug 25 09:44:36 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 453002655 ps | ||
| T3621 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.3067096449 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 626091978 ps | ||
| T3622 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.222871863 | Aug 25 09:44:36 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 610876936 ps | ||
| T3623 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.3980668977 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 590831284 ps | ||
| T230 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.3502364853 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:40 AM UTC 24 | 70230700 ps | ||
| T231 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.302378197 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:42 AM UTC 24 | 214429894 ps | ||
| T220 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.3344347612 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:42 AM UTC 24 | 335784848 ps | ||
| T221 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2608581200 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:44 AM UTC 24 | 484369499 ps | ||
| T184 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.4259891971 | Aug 25 09:44:48 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 141307946 ps | ||
| T193 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.1745444429 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:45 AM UTC 24 | 93225448 ps | ||
| T196 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.2940276311 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 45214464 ps | ||
| T222 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.3795734074 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:45 AM UTC 24 | 71790854 ps | ||
| T194 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.1984530413 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:46 AM UTC 24 | 61575324 ps | ||
| T254 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.3060334339 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:46 AM UTC 24 | 58317613 ps | ||
| T197 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2539660463 | Aug 25 09:44:43 AM UTC 24 | Aug 25 09:44:46 AM UTC 24 | 119138599 ps | ||
| T269 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.892950440 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:46 AM UTC 24 | 53675017 ps | ||
| T255 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.1928583026 | Aug 25 09:44:43 AM UTC 24 | Aug 25 09:44:46 AM UTC 24 | 67561682 ps | ||
| T185 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1747925163 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:46 AM UTC 24 | 132819331 ps | ||
| T186 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2442513904 | Aug 25 09:44:43 AM UTC 24 | Aug 25 09:44:46 AM UTC 24 | 126067783 ps | ||
| T270 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.2684571956 | Aug 25 09:44:43 AM UTC 24 | Aug 25 09:44:46 AM UTC 24 | 230431451 ps | ||
| T256 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.1824283708 | Aug 25 09:44:43 AM UTC 24 | Aug 25 09:44:47 AM UTC 24 | 165396653 ps | ||
| T3624 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.1344152545 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:47 AM UTC 24 | 267424668 ps | ||
| T3625 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.2138100286 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:47 AM UTC 24 | 129847013 ps | ||
| T219 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.4009239174 | Aug 25 09:44:44 AM UTC 24 | Aug 25 09:44:48 AM UTC 24 | 223407840 ps | ||
| T226 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.1630486465 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:48 AM UTC 24 | 258094015 ps | ||
| T257 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.158021268 | Aug 25 09:44:43 AM UTC 24 | Aug 25 09:44:48 AM UTC 24 | 294641958 ps | ||
| T258 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.859462808 | Aug 25 09:44:43 AM UTC 24 | Aug 25 09:44:49 AM UTC 24 | 473558877 ps | ||
| T227 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.2266482504 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:49 AM UTC 24 | 1007284371 ps | ||
| T195 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.726951845 | Aug 25 09:44:45 AM UTC 24 | Aug 25 09:44:50 AM UTC 24 | 42418499 ps | ||
| T259 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.3507319093 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:50 AM UTC 24 | 200120880 ps | ||
| T302 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.3484158341 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 40299993 ps | ||
| T278 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2134013172 | Aug 25 09:44:48 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 39147103 ps | ||
| T243 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.3748052624 | Aug 25 09:44:48 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 139300530 ps | ||
| T239 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.2117442153 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:51 AM UTC 24 | 142908827 ps | ||
| T274 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2812810655 | Aug 25 09:44:42 AM UTC 24 | Aug 25 09:44:52 AM UTC 24 | 1780470514 ps | ||
| T3626 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3908789584 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:52 AM UTC 24 | 262175749 ps | ||
| T235 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.2372185984 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:52 AM UTC 24 | 200067240 ps | ||
| T228 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.3830736460 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:53 AM UTC 24 | 464059396 ps | ||
| T3627 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.2993437317 | Aug 25 09:44:48 AM UTC 24 | Aug 25 09:44:53 AM UTC 24 | 379717758 ps | ||
| T229 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3502400712 | Aug 25 09:44:45 AM UTC 24 | Aug 25 09:44:53 AM UTC 24 | 832654239 ps | ||
| T236 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2372488147 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:44:53 AM UTC 24 | 327497654 ps | ||
| T260 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.2597461697 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:44:55 AM UTC 24 | 52233520 ps | ||
| T271 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2771321904 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:44:55 AM UTC 24 | 99180225 ps | ||
| T3628 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.197316232 | Aug 25 09:44:46 AM UTC 24 | Aug 25 09:44:55 AM UTC 24 | 53194245 ps | ||
| T261 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.22387500 | Aug 25 09:44:46 AM UTC 24 | Aug 25 09:44:55 AM UTC 24 | 128274228 ps | ||
| T3629 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.1871839898 | Aug 25 09:44:50 AM UTC 24 | Aug 25 09:44:56 AM UTC 24 | 85968672 ps | ||
| T198 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.837148960 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:44:56 AM UTC 24 | 35875820 ps | ||
| T244 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.3960542836 | Aug 25 09:44:50 AM UTC 24 | Aug 25 09:44:56 AM UTC 24 | 102505496 ps | ||
| T262 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.258458361 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:44:56 AM UTC 24 | 73820629 ps | ||
| T3630 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.489738435 | Aug 25 09:44:46 AM UTC 24 | Aug 25 09:44:56 AM UTC 24 | 86401440 ps | ||
| T268 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.2528653646 | Aug 25 09:44:46 AM UTC 24 | Aug 25 09:44:57 AM UTC 24 | 171243451 ps | ||
| T3631 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1172158619 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:44:57 AM UTC 24 | 99382274 ps | ||
| T3632 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.993307645 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:44:57 AM UTC 24 | 89564322 ps | ||
| T237 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.3611449174 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:44:57 AM UTC 24 | 187186281 ps | ||
| T238 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.104259775 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:44:58 AM UTC 24 | 273345609 ps | ||
| T275 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.1246668516 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:44:58 AM UTC 24 | 808902983 ps | ||
| T263 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1304031247 | Aug 25 09:44:46 AM UTC 24 | Aug 25 09:44:59 AM UTC 24 | 857817735 ps | ||
| T484 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.1448544577 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:00 AM UTC 24 | 1233409118 ps | ||
| T303 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.1688382987 | Aug 25 09:44:58 AM UTC 24 | Aug 25 09:45:00 AM UTC 24 | 51306571 ps | ||
| T310 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.568745282 | Aug 25 09:44:56 AM UTC 24 | Aug 25 09:45:00 AM UTC 24 | 34458512 ps | ||
| T3633 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.3159440267 | Aug 25 09:44:58 AM UTC 24 | Aug 25 09:45:01 AM UTC 24 | 252574370 ps | ||
| T276 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.78843003 | Aug 25 09:44:58 AM UTC 24 | Aug 25 09:45:01 AM UTC 24 | 166372840 ps | ||
| T304 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.4275271471 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 113260800 ps | ||
| T307 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.2735621466 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:45:01 AM UTC 24 | 39947767 ps | ||
| T3634 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1487184688 | Aug 25 09:44:58 AM UTC 24 | Aug 25 09:45:01 AM UTC 24 | 63885394 ps | ||
| T3635 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.576162803 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 82582048 ps | ||
| T311 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3101944500 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:45:01 AM UTC 24 | 41056311 ps | ||
| T264 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.4065273828 | Aug 25 09:44:49 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 50522776 ps | ||
| T3636 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.1043235951 | Aug 25 09:44:49 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 143496536 ps | ||
| T3637 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.3898360355 | Aug 25 09:44:58 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 274505336 ps | ||
| T3638 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.2200194226 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 110184803 ps | ||
| T3639 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.2438916922 | Aug 25 09:45:00 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 58486275 ps | ||
| T277 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.3791335708 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 227275856 ps | ||
| T265 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.4101806693 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 111221858 ps | ||
| T305 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.1893733162 | Aug 25 09:44:57 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 92187246 ps | ||
| T279 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.318856025 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:45:02 AM UTC 24 | 166066434 ps | ||
| T266 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.1375034576 | Aug 25 09:44:57 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 97010890 ps | ||
| T267 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3229082794 | Aug 25 09:44:49 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 200370397 ps | ||
| T3640 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.3185553454 | Aug 25 09:44:57 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 121161592 ps | ||
| T3641 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.1808393857 | Aug 25 09:44:46 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 101940171 ps | ||
| T3642 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1453075143 | Aug 25 09:44:57 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 154996513 ps | ||
| T308 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.2012944423 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 44543945 ps | ||
| T3643 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3013254626 | Aug 25 09:44:57 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 60243250 ps | ||
| T482 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.4057397034 | Aug 25 09:44:48 AM UTC 24 | Aug 25 09:45:03 AM UTC 24 | 843282166 ps | ||
| T3644 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.2843294586 | Aug 25 09:44:46 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 178947011 ps | ||
| T241 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.1734140801 | Aug 25 09:44:57 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 135325644 ps | ||
| T3645 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.321157554 | Aug 25 09:45:00 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 391770591 ps | ||
| T3646 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.1252564693 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 108358200 ps | ||
| T309 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3286150847 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 44831402 ps | ||
| T3647 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.54565005 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 170554124 ps | ||
| T3648 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.3084307290 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 259898710 ps | ||
| T3649 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.2963234039 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 127529689 ps | ||
| T3650 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.3324109332 | Aug 25 09:44:49 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 112467108 ps | ||
| T3651 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2468975763 | Aug 25 09:45:01 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 141327495 ps | ||
| T306 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3264528032 | Aug 25 09:45:02 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 39558161 ps | ||
| T3652 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.2124595236 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:04 AM UTC 24 | 164461008 ps | ||
| T3653 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3963740348 | Aug 25 09:45:02 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 44211838 ps | ||
| T485 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3721995019 | Aug 25 09:44:56 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 916483092 ps | ||
| T3654 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.720791503 | Aug 25 09:45:02 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 47814086 ps | ||
| T3655 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.62929606 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 281784452 ps | ||
| T3656 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.3688300815 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 238582020 ps | ||
| T3657 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.3789524939 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 146052251 ps | ||
| T483 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1522008536 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 687563528 ps | ||
| T3658 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2757253711 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 134348300 ps | ||
| T3659 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.1182828118 | Aug 25 09:45:02 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 262342462 ps | ||
| T3660 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.3401150138 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 336705559 ps | ||
| T3661 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2890734743 | Aug 25 09:45:01 AM UTC 24 | Aug 25 09:45:05 AM UTC 24 | 201754595 ps | ||
| T3662 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.76920341 | Aug 25 09:45:02 AM UTC 24 | Aug 25 09:45:06 AM UTC 24 | 183114474 ps | ||
| T3663 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.3423714031 | Aug 25 09:45:02 AM UTC 24 | Aug 25 09:45:06 AM UTC 24 | 78931196 ps | ||
| T3664 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.2237738889 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:06 AM UTC 24 | 120067581 ps | ||
| T3665 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2151597048 | Aug 25 09:44:54 AM UTC 24 | Aug 25 09:45:06 AM UTC 24 | 242861111 ps | ||
| T491 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.537484886 | Aug 25 09:44:38 AM UTC 24 | Aug 25 09:45:06 AM UTC 24 | 953612913 ps | ||
| T490 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.541337769 | Aug 25 09:44:52 AM UTC 24 | Aug 25 09:45:06 AM UTC 24 | 1317916345 ps | ||
| T489 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.2747260344 | Aug 25 09:44:57 AM UTC 24 | Aug 25 09:45:06 AM UTC 24 | 1245774927 ps | ||
| T3666 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.1140432408 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:07 AM UTC 24 | 106674059 ps | ||
| T312 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.654334246 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:07 AM UTC 24 | 31405234 ps | ||
| T3667 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1768646802 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 31477543 ps | ||
| T3668 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.557151671 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:07 AM UTC 24 | 88993468 ps | ||
| T3669 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.2266443077 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 106688347 ps | ||
| T3670 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3806984695 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 348025743 ps | ||
| T3671 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.3249704293 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 55751272 ps | ||
| T3672 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.3357916458 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 77233829 ps | ||
| T3673 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.925372472 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 67390716 ps | ||
| T3674 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.3493685797 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 107456873 ps | ||
| T3675 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.650022565 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 106585232 ps | ||
| T3676 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.256127656 | Aug 25 09:45:06 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 28922848 ps | ||
| T3677 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.2628143338 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 60957477 ps | ||
| T3678 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.1966042313 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 53444614 ps | ||
| T3679 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3630573973 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 43149628 ps | ||
| T3680 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.525984137 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 48742868 ps | ||
| T486 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.2789497266 | Aug 25 09:45:02 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 816326678 ps | ||
| T3681 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.1686258004 | Aug 25 09:45:02 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 794030435 ps | ||
| T3682 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.177426575 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 137651052 ps | ||
| T3683 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1118724594 | Aug 25 09:44:49 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 1411119260 ps | ||
| T3684 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.3658445400 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 265567481 ps | ||
| T3685 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1360369295 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 106201761 ps | ||
| T3686 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.1070995384 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 80532603 ps | ||
| T3687 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.1096006006 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 153714611 ps | ||
| T3688 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.2114858642 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 57912231 ps | ||
| T3689 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.4057279476 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:08 AM UTC 24 | 238302950 ps | ||
| T3690 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3690676419 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:09 AM UTC 24 | 195389144 ps | ||
| T3691 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3889535043 | Aug 25 09:45:06 AM UTC 24 | Aug 25 09:45:09 AM UTC 24 | 96676213 ps | ||
| T487 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.1747153266 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:09 AM UTC 24 | 674674373 ps | ||
| T3692 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.2193459472 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:09 AM UTC 24 | 231618827 ps | ||
| T492 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.3822872400 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:09 AM UTC 24 | 321443161 ps | ||
| T3693 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2984933021 | Aug 25 09:45:06 AM UTC 24 | Aug 25 09:45:10 AM UTC 24 | 92598975 ps | ||
| T488 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.1797266765 | Aug 25 09:45:06 AM UTC 24 | Aug 25 09:45:10 AM UTC 24 | 804969525 ps | ||
| T3694 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2872262034 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:10 AM UTC 24 | 625706025 ps | ||
| T240 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.1564745292 | Aug 25 09:45:05 AM UTC 24 | Aug 25 09:45:10 AM UTC 24 | 569320453 ps | ||
| T3695 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.2739706048 | Aug 25 09:45:06 AM UTC 24 | Aug 25 09:45:11 AM UTC 24 | 51480409 ps | ||
| T3696 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.2036867763 | Aug 25 09:45:06 AM UTC 24 | Aug 25 09:45:11 AM UTC 24 | 63557690 ps | ||
| T3697 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.4139492791 | Aug 25 09:45:06 AM UTC 24 | Aug 25 09:45:11 AM UTC 24 | 44641416 ps | ||
| T3698 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.943069968 | Aug 25 09:45:06 AM UTC 24 | Aug 25 09:45:11 AM UTC 24 | 240044289 ps | ||
| T3699 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2605950085 | Aug 25 09:45:06 AM UTC 24 | Aug 25 09:45:11 AM UTC 24 | 130669236 ps | ||
| T3700 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.2940536116 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:17 AM UTC 24 | 40364705 ps | ||
| T3701 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.1643048522 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 60223695 ps | ||
| T3702 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.4245179917 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:17 AM UTC 24 | 48832157 ps | ||
| T3703 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.2871123715 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:17 AM UTC 24 | 49675089 ps | ||
| T3704 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.1863165890 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:17 AM UTC 24 | 57115960 ps | ||
| T3705 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.3710063812 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 37791672 ps | ||
| T3706 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.3746254648 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 68750030 ps | ||
| T3707 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.2597070648 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 38224789 ps | ||
| T3708 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.861521136 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 33822724 ps | ||
| T3709 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.1328909829 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 40002305 ps | ||
| T3710 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.1072374154 | Aug 25 09:45:15 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 36282819 ps | ||
| T3711 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.721941320 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 137651455 ps | ||
| T3712 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.3983150559 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 49352910 ps | ||
| T3713 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.2320003139 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 48641725 ps | ||
| T3714 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.1262917558 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 58207531 ps | ||
| T3715 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.2740469508 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:18 AM UTC 24 | 68642863 ps | ||
| T3716 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.2666339396 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:21 AM UTC 24 | 39903288 ps | ||
| T3717 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.1197682584 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:21 AM UTC 24 | 37218290 ps | ||
| T3718 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.1130432200 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:21 AM UTC 24 | 55626032 ps | ||
| T3719 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.1573492789 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:21 AM UTC 24 | 46486938 ps | ||
| T3720 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.1426967945 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:21 AM UTC 24 | 56464361 ps | ||
| T3721 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.1876708120 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:21 AM UTC 24 | 57621152 ps | ||
| T3722 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.3310149032 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:21 AM UTC 24 | 44491505 ps | ||
| T3723 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.1240271930 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:21 AM UTC 24 | 54146342 ps | ||
| T3724 | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.4261038415 | Aug 25 09:45:16 AM UTC 24 | Aug 25 09:45:21 AM UTC 24 | 32552370 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.2726305060 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 11540194193 ps |
| CPU time | 30.64 seconds |
| Started | Aug 25 09:13:28 AM UTC 24 |
| Finished | Aug 25 09:14:00 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726305060 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.2726305060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.2267039136 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 33312074043 ps |
| CPU time | 89.39 seconds |
| Started | Aug 25 09:13:59 AM UTC 24 |
| Finished | Aug 25 09:15:31 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2267039136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.2267039136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.1984530413 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 61575324 ps |
| CPU time | 0.95 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:46 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984530413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.1984530413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3188631660 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 1031597975 ps |
| CPU time | 5.45 seconds |
| Started | Aug 25 09:13:59 AM UTC 24 |
| Finished | Aug 25 09:14:05 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188631660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.3188631660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.1667879775 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 3223979310 ps |
| CPU time | 44.4 seconds |
| Started | Aug 25 09:15:16 AM UTC 24 |
| Finished | Aug 25 09:16:02 AM UTC 24 |
| Peak memory | 235116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1667879775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.1667879775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.365921548 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 14943504627 ps |
| CPU time | 35.56 seconds |
| Started | Aug 25 09:13:29 AM UTC 24 |
| Finished | Aug 25 09:14:06 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=365921548 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.365921548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.4259891971 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 141307946 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:44:48 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259891971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.4259891971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.2769620480 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 769349720 ps |
| CPU time | 2.33 seconds |
| Started | Aug 25 09:18:38 AM UTC 24 |
| Finished | Aug 25 09:18:41 AM UTC 24 |
| Peak memory | 252424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769620480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.2769620480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.808248033 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 348434710 ps |
| CPU time | 2.15 seconds |
| Started | Aug 25 09:15:57 AM UTC 24 |
| Finished | Aug 25 09:16:00 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=808248033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test_ mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.808248033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.92734443 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 23782297099 ps |
| CPU time | 61.3 seconds |
| Started | Aug 25 09:28:25 AM UTC 24 |
| Finished | Aug 25 09:29:28 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=92734443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.92734443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.3830736460 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 464059396 ps |
| CPU time | 2.77 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:53 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830736460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.3830736460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.786482545 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 528455438 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:44:25 AM UTC 24 |
| Finished | Aug 25 09:44:35 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=786482545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_t x_rx_disruption.786482545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.3363974475 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 66228365 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:23:08 AM UTC 24 |
| Finished | Aug 25 09:23:10 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3363974475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.3363974475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3101944500 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 41056311 ps |
| CPU time | 0.72 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:45:01 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101944500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.3101944500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.3303329607 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 7729766591 ps |
| CPU time | 48.6 seconds |
| Started | Aug 25 09:18:30 AM UTC 24 |
| Finished | Aug 25 09:19:21 AM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3303329607 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.3303329607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.2241248259 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 29278411843 ps |
| CPU time | 93.48 seconds |
| Started | Aug 25 09:19:33 AM UTC 24 |
| Finished | Aug 25 09:21:09 AM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2241248259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.2241248259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.2135016918 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 446816154 ps |
| CPU time | 2.22 seconds |
| Started | Aug 25 09:23:23 AM UTC 24 |
| Finished | Aug 25 09:23:27 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2135016918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx _rx_disruption.2135016918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.4229191324 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 20201547712 ps |
| CPU time | 54.37 seconds |
| Started | Aug 25 09:16:07 AM UTC 24 |
| Finished | Aug 25 09:17:03 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229191324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_resume_link_active.4229191324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.2837690021 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 546603207 ps |
| CPU time | 2.06 seconds |
| Started | Aug 25 09:44:07 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2837690021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.2837690021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.1928583026 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 67561682 ps |
| CPU time | 0.99 seconds |
| Started | Aug 25 09:44:43 AM UTC 24 |
| Finished | Aug 25 09:44:46 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928583026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.1928583026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.1120628691 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 30632677317 ps |
| CPU time | 87.8 seconds |
| Started | Aug 25 09:17:07 AM UTC 24 |
| Finished | Aug 25 09:18:38 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1120628691 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.1120628691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.3691529728 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 6265975151 ps |
| CPU time | 19.49 seconds |
| Started | Aug 25 09:27:18 AM UTC 24 |
| Finished | Aug 25 09:27:39 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3691529728 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.3691529728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.1024589186 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 527895738 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:52 AM UTC 24 |
| Peak memory | 216056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1024589186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_ tx_rx_disruption.1024589186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.1100876018 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 3949327645 ps |
| CPU time | 43.59 seconds |
| Started | Aug 25 09:15:03 AM UTC 24 |
| Finished | Aug 25 09:15:48 AM UTC 24 |
| Peak memory | 232704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1100876018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.1100876018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.666273320 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 48826524999 ps |
| CPU time | 138.78 seconds |
| Started | Aug 25 09:20:44 AM UTC 24 |
| Finished | Aug 25 09:23:06 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=666273320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_device_address.666273320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.12338396 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 240742019 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:18:18 AM UTC 24 |
| Finished | Aug 25 09:18:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12338396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rx_full.12338396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.1271307827 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 879457943 ps |
| CPU time | 3.8 seconds |
| Started | Aug 25 09:42:39 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 217600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271307827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.1271307827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.2048438175 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 224731601 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:24:22 AM UTC 24 |
| Finished | Aug 25 09:24:25 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048438175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.2048438175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.2027010615 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 13673715060 ps |
| CPU time | 41.44 seconds |
| Started | Aug 25 09:17:15 AM UTC 24 |
| Finished | Aug 25 09:17:58 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2027010615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.2027010615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3813312902 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 525881608 ps |
| CPU time | 2.59 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813312902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.3813312902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.2956872147 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 314880634 ps |
| CPU time | 2.17 seconds |
| Started | Aug 25 09:40:22 AM UTC 24 |
| Finished | Aug 25 09:40:25 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2956872147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.2956872147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.601086824 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 683162219 ps |
| CPU time | 3.07 seconds |
| Started | Aug 25 09:36:47 AM UTC 24 |
| Finished | Aug 25 09:36:52 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=601086824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.601086824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.3555447890 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 161250809 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:13:56 AM UTC 24 |
| Finished | Aug 25 09:13:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3555447890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.3555447890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.2939475853 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 146417609 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:14:06 AM UTC 24 |
| Finished | Aug 25 09:14:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939475853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_disconnected.2939475853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.1893733162 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 92187246 ps |
| CPU time | 0.83 seconds |
| Started | Aug 25 09:44:57 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893733162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.1893733162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.3582233262 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 413201616 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582233262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.3582233262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.2902844955 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 871906740 ps |
| CPU time | 2.21 seconds |
| Started | Aug 25 09:43:09 AM UTC 24 |
| Finished | Aug 25 09:43:13 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902844955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.2902844955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.926808767 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 162208743 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:16:01 AM UTC 24 |
| Finished | Aug 25 09:16:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=926808767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_pkt_received.926808767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.1013197087 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 504906708 ps |
| CPU time | 2.35 seconds |
| Started | Aug 25 09:14:36 AM UTC 24 |
| Finished | Aug 25 09:14:39 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013197087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.1013197087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.836910654 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 657543734 ps |
| CPU time | 2.63 seconds |
| Started | Aug 25 09:42:43 AM UTC 24 |
| Finished | Aug 25 09:42:46 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=836910654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.836910654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.499158837 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 1022673801 ps |
| CPU time | 3.93 seconds |
| Started | Aug 25 09:23:31 AM UTC 24 |
| Finished | Aug 25 09:23:36 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=499158837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.499158837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.3835938515 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 386206980 ps |
| CPU time | 2.17 seconds |
| Started | Aug 25 09:42:58 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3835938515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.3835938515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.2429276911 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 379332039 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:43:00 AM UTC 24 |
| Finished | Aug 25 09:43:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2429276911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.2429276911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.634321304 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 420804470 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:30:45 AM UTC 24 |
| Finished | Aug 25 09:30:48 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=634321304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.634321304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.2288084838 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 364879397 ps |
| CPU time | 2.31 seconds |
| Started | Aug 25 09:32:02 AM UTC 24 |
| Finished | Aug 25 09:32:05 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2288084838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.2288084838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2372488147 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 327497654 ps |
| CPU time | 3.6 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:53 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372488147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.2372488147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.693002480 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 8929006351 ps |
| CPU time | 38.62 seconds |
| Started | Aug 25 09:18:07 AM UTC 24 |
| Finished | Aug 25 09:18:47 AM UTC 24 |
| Peak memory | 228504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=693002480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_pkt_buffer.693002480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.167704159 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 494415693 ps |
| CPU time | 2.23 seconds |
| Started | Aug 25 09:42:45 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=167704159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.167704159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.2829613100 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 461387463 ps |
| CPU time | 2.56 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:53 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2829613100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.2829613100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.213577704 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 671806590 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=213577704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.213577704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.2867761451 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 461681112 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:08 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867761451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.2867761451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.526201994 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 658561478 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:43:07 AM UTC 24 |
| Finished | Aug 25 09:43:27 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=526201994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.526201994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.3477453251 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 667081498 ps |
| CPU time | 3.15 seconds |
| Started | Aug 25 09:24:36 AM UTC 24 |
| Finished | Aug 25 09:24:40 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477453251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.3477453251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.2897216808 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 191398210 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:15:47 AM UTC 24 |
| Finished | Aug 25 09:15:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2897216808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.2897216808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.3936878444 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 85737271 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:18:39 AM UTC 24 |
| Finished | Aug 25 09:18:41 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936878444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.3936878444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.2266482504 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 1007284371 ps |
| CPU time | 4.58 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:49 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266482504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.2266482504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.2642947119 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 425938886 ps |
| CPU time | 2.17 seconds |
| Started | Aug 25 09:16:28 AM UTC 24 |
| Finished | Aug 25 09:16:31 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642947119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.2642947119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.256127656 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 28922848 ps |
| CPU time | 0.88 seconds |
| Started | Aug 25 09:45:06 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=256127656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.256127656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.1058020293 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 95187705349 ps |
| CPU time | 342.57 seconds |
| Started | Aug 25 09:17:28 AM UTC 24 |
| Finished | Aug 25 09:23:16 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058020293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.1058020293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.2435690813 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 492565516 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:42:50 AM UTC 24 |
| Finished | Aug 25 09:42:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435690813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.2435690813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.911560936 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 510436169 ps |
| CPU time | 2.45 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:00 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=911560936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.911560936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.1511890515 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 841345417 ps |
| CPU time | 3.08 seconds |
| Started | Aug 25 09:31:37 AM UTC 24 |
| Finished | Aug 25 09:31:41 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511890515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.1511890515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.1386674512 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 980596551 ps |
| CPU time | 4.96 seconds |
| Started | Aug 25 09:32:24 AM UTC 24 |
| Finished | Aug 25 09:32:30 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386674512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.1386674512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.1789546185 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 477007547 ps |
| CPU time | 2.43 seconds |
| Started | Aug 25 09:34:23 AM UTC 24 |
| Finished | Aug 25 09:34:26 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1789546185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.1789546185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.1182255740 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 3966375413 ps |
| CPU time | 144.52 seconds |
| Started | Aug 25 09:23:50 AM UTC 24 |
| Finished | Aug 25 09:26:18 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182255740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.1182255740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.3244492666 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 532253396 ps |
| CPU time | 2.46 seconds |
| Started | Aug 25 09:42:26 AM UTC 24 |
| Finished | Aug 25 09:42:30 AM UTC 24 |
| Peak memory | 217652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3244492666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.3244492666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.3190735826 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 31660115147 ps |
| CPU time | 95.6 seconds |
| Started | Aug 25 09:26:42 AM UTC 24 |
| Finished | Aug 25 09:28:20 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3190735826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.3190735826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.4101806693 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 111221858 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101806693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.4101806693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3463670707 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 191165836 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:13:55 AM UTC 24 |
| Finished | Aug 25 09:13:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463670707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.3463670707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.2789497266 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 816326678 ps |
| CPU time | 4.43 seconds |
| Started | Aug 25 09:45:02 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789497266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.2789497266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.2337943865 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 214540038 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2337943865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.2337943865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.2237529050 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 271336450 ps |
| CPU time | 1.92 seconds |
| Started | Aug 25 09:30:34 AM UTC 24 |
| Finished | Aug 25 09:30:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2237529050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.2237529050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.2007882563 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 545560993 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007882563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.2007882563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.1297221173 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 450288783 ps |
| CPU time | 2.43 seconds |
| Started | Aug 25 09:34:43 AM UTC 24 |
| Finished | Aug 25 09:34:47 AM UTC 24 |
| Peak memory | 217928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297221173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.1297221173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.2801135078 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 492939486 ps |
| CPU time | 2.63 seconds |
| Started | Aug 25 09:42:20 AM UTC 24 |
| Finished | Aug 25 09:42:24 AM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2801135078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.2801135078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2753879754 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 407288261 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:40 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2753879754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.2753879754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.1875378450 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 592888371 ps |
| CPU time | 3.11 seconds |
| Started | Aug 25 09:20:29 AM UTC 24 |
| Finished | Aug 25 09:20:33 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1875378450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.1875378450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.455030302 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 6803446326 ps |
| CPU time | 60.32 seconds |
| Started | Aug 25 09:20:07 AM UTC 24 |
| Finished | Aug 25 09:21:09 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=455030302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.455030302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.55950070 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 2829870333 ps |
| CPU time | 93.09 seconds |
| Started | Aug 25 09:17:49 AM UTC 24 |
| Finished | Aug 25 09:19:25 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=55950070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.55950070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.2747260344 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 1245774927 ps |
| CPU time | 4.85 seconds |
| Started | Aug 25 09:44:57 AM UTC 24 |
| Finished | Aug 25 09:45:06 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2747260344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.2747260344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2872262034 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 625706025 ps |
| CPU time | 3.76 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:10 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2872262034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.2872262034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.3822872400 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 321443161 ps |
| CPU time | 2.63 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:09 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822872400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.3822872400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.3191594176 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 1295315685 ps |
| CPU time | 6.32 seconds |
| Started | Aug 25 09:14:01 AM UTC 24 |
| Finished | Aug 25 09:14:08 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3191594176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_disable_endpoint.3191594176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.3413552358 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 183933915 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:17:27 AM UTC 24 |
| Finished | Aug 25 09:17:30 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413552358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.3413552358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.754567440 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 362898941 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:42:42 AM UTC 24 |
| Finished | Aug 25 09:42:45 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=754567440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.754567440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.4256315394 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 249149756 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:42:42 AM UTC 24 |
| Finished | Aug 25 09:42:45 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256315394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.4256315394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.255938638 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 730979731 ps |
| CPU time | 2.9 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:53 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=255938638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.255938638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.1173206678 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 341697879 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1173206678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.1173206678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.137297141 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 403055002 ps |
| CPU time | 2.09 seconds |
| Started | Aug 25 09:29:58 AM UTC 24 |
| Finished | Aug 25 09:30:01 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=137297141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.137297141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.757956830 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 467868760 ps |
| CPU time | 2.09 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=757956830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.757956830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.4027121474 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 533666177 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:43:05 AM UTC 24 |
| Finished | Aug 25 09:43:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027121474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.4027121474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.3917558235 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 517662988 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:43:07 AM UTC 24 |
| Finished | Aug 25 09:43:10 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3917558235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.3917558235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.2317954546 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 339320891 ps |
| CPU time | 2.4 seconds |
| Started | Aug 25 09:32:44 AM UTC 24 |
| Finished | Aug 25 09:32:48 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2317954546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_full.2317954546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.1255257749 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 413008118 ps |
| CPU time | 2.38 seconds |
| Started | Aug 25 09:35:26 AM UTC 24 |
| Finished | Aug 25 09:35:30 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255257749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.1255257749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.3744967112 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 22184356526 ps |
| CPU time | 93.11 seconds |
| Started | Aug 25 09:21:37 AM UTC 24 |
| Finished | Aug 25 09:23:12 AM UTC 24 |
| Peak memory | 228496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744967112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.3744967112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.409368820 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 472423933 ps |
| CPU time | 2.22 seconds |
| Started | Aug 25 09:38:54 AM UTC 24 |
| Finished | Aug 25 09:38:58 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=409368820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.409368820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.1943505497 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 119148832953 ps |
| CPU time | 367.94 seconds |
| Started | Aug 25 09:22:16 AM UTC 24 |
| Finished | Aug 25 09:28:30 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1943505497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_hiclk_max.1943505497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.1790495162 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 307836411 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:42:19 AM UTC 24 |
| Finished | Aug 25 09:42:22 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790495162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.1790495162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.4268983193 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 563631028 ps |
| CPU time | 2.73 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268983193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.4268983193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.567389571 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 159732615 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:15:59 AM UTC 24 |
| Finished | Aug 25 09:16:01 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567389571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.567389571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.784713221 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 548303711 ps |
| CPU time | 2.02 seconds |
| Started | Aug 25 09:43:09 AM UTC 24 |
| Finished | Aug 25 09:43:43 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=784713221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_t x_rx_disruption.784713221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.1590848656 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 153084277 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:17:10 AM UTC 24 |
| Finished | Aug 25 09:17:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590848656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.1590848656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.1114448130 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 39416756 ps |
| CPU time | 0.97 seconds |
| Started | Aug 25 09:18:06 AM UTC 24 |
| Finished | Aug 25 09:18:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114448130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.1114448130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.3565760498 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 172386215 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:20:41 AM UTC 24 |
| Finished | Aug 25 09:20:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3565760498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.3565760498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2151597048 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 242861111 ps |
| CPU time | 3.06 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:06 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151597048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.2151597048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.4140049941 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 215843857 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:13:53 AM UTC 24 |
| Finished | Aug 25 09:13:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4140049941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_empty.4140049941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.4164311585 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 4151926949 ps |
| CPU time | 15.58 seconds |
| Started | Aug 25 09:14:34 AM UTC 24 |
| Finished | Aug 25 09:14:51 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164311585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.4164311585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.285637610 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 169469801 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:15:00 AM UTC 24 |
| Finished | Aug 25 09:15:03 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=285637610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_link_reset.285637610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.4252983750 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 179972281 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:16:27 AM UTC 24 |
| Finished | Aug 25 09:16:29 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252983750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_pid_err.4252983750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.1771672036 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 3073056324 ps |
| CPU time | 32.21 seconds |
| Started | Aug 25 09:23:23 AM UTC 24 |
| Finished | Aug 25 09:23:57 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1771672036 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.1771672036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.1564745292 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 569320453 ps |
| CPU time | 3.76 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:10 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564745292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.1564745292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.3500331252 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 162833556 ps |
| CPU time | 3.22 seconds |
| Started | Aug 25 09:14:13 AM UTC 24 |
| Finished | Aug 25 09:14:17 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500331252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.3500331252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.3333128822 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 12851823768 ps |
| CPU time | 191.92 seconds |
| Started | Aug 25 09:14:57 AM UTC 24 |
| Finished | Aug 25 09:18:12 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333128822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.3333128822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.2900345137 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 198565877 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:17:59 AM UTC 24 |
| Finished | Aug 25 09:18:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2900345137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.2900345137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.568792198 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 236270976 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:27:41 AM UTC 24 |
| Finished | Aug 25 09:27:44 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=568792198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_nak_trans.568792198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.4239943561 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 185554917 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:28:11 AM UTC 24 |
| Finished | Aug 25 09:28:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239943561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.4239943561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.2357557762 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 227745653 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:28:42 AM UTC 24 |
| Finished | Aug 25 09:28:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357557762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_nak_trans.2357557762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.3741564183 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 237703707 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:29:13 AM UTC 24 |
| Finished | Aug 25 09:29:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741564183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.3741564183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.2838586702 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 183111657 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:29:40 AM UTC 24 |
| Finished | Aug 25 09:29:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838586702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_nak_trans.2838586702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.1595819725 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 204647925 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:31:48 AM UTC 24 |
| Finished | Aug 25 09:31:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595819725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.1595819725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.3295129803 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 193749985 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:19:52 AM UTC 24 |
| Finished | Aug 25 09:19:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295129803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.3295129803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.3241216703 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 227231475 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:32:08 AM UTC 24 |
| Finished | Aug 25 09:32:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241216703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.3241216703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.3114026270 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 226967199 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:37:31 AM UTC 24 |
| Finished | Aug 25 09:37:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114026270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.3114026270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.1330502949 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 563167702 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:44:04 AM UTC 24 |
| Finished | Aug 25 09:44:06 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1330502949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.1330502949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.302378197 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 214429894 ps |
| CPU time | 2.08 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:42 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=302378197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.302378197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2608581200 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 484369499 ps |
| CPU time | 4.12 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:44 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608581200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.2608581200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.3507319093 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 200120880 ps |
| CPU time | 0.9 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:50 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507319093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.3507319093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.2117442153 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 142908827 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117442153 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.2117442153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.3502364853 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 70230700 ps |
| CPU time | 0.91 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:40 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502364853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.3502364853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.4275271471 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 113260800 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275271471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.4275271471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.3084307290 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 259898710 ps |
| CPU time | 3.32 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084307290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.3084307290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.3344347612 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 335784848 ps |
| CPU time | 2.35 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:42 AM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344347612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.3344347612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.2372185984 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 200067240 ps |
| CPU time | 2.93 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:52 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372185984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.2372185984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.537484886 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 953612913 ps |
| CPU time | 5.26 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:45:06 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=537484886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.537484886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.2138100286 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 129847013 ps |
| CPU time | 2.86 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:47 AM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138100286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.2138100286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2812810655 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 1780470514 ps |
| CPU time | 7.28 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:52 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812810655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.2812810655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.1745444429 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 93225448 ps |
| CPU time | 0.86 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:45 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1745444429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.1745444429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1747925163 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 132819331 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:46 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747925163 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.1747925163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.3795734074 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 71790854 ps |
| CPU time | 0.84 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:45 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795734074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.3795734074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.3484158341 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 40299993 ps |
| CPU time | 0.69 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3484158341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.3484158341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.3060334339 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 58317613 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:46 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3060334339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.3060334339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3908789584 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 262175749 ps |
| CPU time | 2.38 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:52 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908789584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.3908789584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.892950440 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 53675017 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:46 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=892950440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.892950440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3013254626 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 60243250 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:44:57 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013254626 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.3013254626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.1375034576 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 97010890 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:44:57 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375034576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.1375034576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.568745282 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 34458512 ps |
| CPU time | 0.64 seconds |
| Started | Aug 25 09:44:56 AM UTC 24 |
| Finished | Aug 25 09:45:00 AM UTC 24 |
| Peak memory | 216960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=568745282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.568745282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1453075143 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 154996513 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:44:57 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1453075143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.1453075143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3721995019 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 916483092 ps |
| CPU time | 4.81 seconds |
| Started | Aug 25 09:44:56 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3721995019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.3721995019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.78843003 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 166372840 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:44:58 AM UTC 24 |
| Finished | Aug 25 09:45:01 AM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=78843003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os _regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.78843003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.3185553454 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 121161592 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:44:57 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185553454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.3185553454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.3159440267 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 252574370 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:44:58 AM UTC 24 |
| Finished | Aug 25 09:45:01 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159440267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.3159440267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.1734140801 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 135325644 ps |
| CPU time | 2.17 seconds |
| Started | Aug 25 09:44:57 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734140801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.1734140801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2468975763 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 141327495 ps |
| CPU time | 2.45 seconds |
| Started | Aug 25 09:45:01 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468975763 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.2468975763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.2438916922 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 58486275 ps |
| CPU time | 0.89 seconds |
| Started | Aug 25 09:45:00 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2438916922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.2438916922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.1688382987 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 51306571 ps |
| CPU time | 0.68 seconds |
| Started | Aug 25 09:44:58 AM UTC 24 |
| Finished | Aug 25 09:45:00 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688382987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.1688382987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.321157554 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 391770591 ps |
| CPU time | 2.91 seconds |
| Started | Aug 25 09:45:00 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=321157554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.321157554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1487184688 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 63885394 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:44:58 AM UTC 24 |
| Finished | Aug 25 09:45:01 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487184688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.1487184688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.3898360355 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 274505336 ps |
| CPU time | 2.14 seconds |
| Started | Aug 25 09:44:58 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898360355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.3898360355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.3423714031 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 78931196 ps |
| CPU time | 2.37 seconds |
| Started | Aug 25 09:45:02 AM UTC 24 |
| Finished | Aug 25 09:45:06 AM UTC 24 |
| Peak memory | 228180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423714031 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.3423714031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.720791503 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 47814086 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:45:02 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=720791503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.720791503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3264528032 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 39558161 ps |
| CPU time | 1.05 seconds |
| Started | Aug 25 09:45:02 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3264528032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.3264528032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.1182828118 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 262342462 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:45:02 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182828118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.1182828118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2890734743 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 201754595 ps |
| CPU time | 3.6 seconds |
| Started | Aug 25 09:45:01 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 235600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2890734743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.2890734743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.1686258004 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 794030435 ps |
| CPU time | 4.66 seconds |
| Started | Aug 25 09:45:02 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686258004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.1686258004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.925372472 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 67390716 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=925372472 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.925372472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.1140432408 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 106674059 ps |
| CPU time | 1.06 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:07 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140432408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.1140432408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3963740348 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 44211838 ps |
| CPU time | 0.97 seconds |
| Started | Aug 25 09:45:02 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963740348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.3963740348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3806984695 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 348025743 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806984695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.3806984695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.76920341 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 183114474 ps |
| CPU time | 2.06 seconds |
| Started | Aug 25 09:45:02 AM UTC 24 |
| Finished | Aug 25 09:45:06 AM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=76920341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.76920341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.177426575 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 137651052 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=177426575 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.177426575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.557151671 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 88993468 ps |
| CPU time | 0.99 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:07 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=557151671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.557151671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.654334246 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 31405234 ps |
| CPU time | 0.81 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:07 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=654334246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.654334246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.650022565 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 106585232 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=650022565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.650022565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3690676419 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 195389144 ps |
| CPU time | 2.65 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:09 AM UTC 24 |
| Peak memory | 235112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690676419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.3690676419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.1747153266 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 674674373 ps |
| CPU time | 3.07 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:09 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747153266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.1747153266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.1070995384 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 80532603 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070995384 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.1070995384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.2266443077 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 106688347 ps |
| CPU time | 1 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266443077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.2266443077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.3493685797 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 107456873 ps |
| CPU time | 1.03 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493685797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.3493685797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.3658445400 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 265567481 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658445400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.3658445400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.2628143338 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 60957477 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628143338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.2628143338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.1096006006 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 153714611 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096006006 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.1096006006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3630573973 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 43149628 ps |
| CPU time | 1.13 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630573973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.3630573973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.3249704293 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 55751272 ps |
| CPU time | 0.98 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249704293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.3249704293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.4057279476 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 238302950 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057279476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.4057279476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.2114858642 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 57912231 ps |
| CPU time | 1.92 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114858642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.2114858642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3889535043 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 96676213 ps |
| CPU time | 2.05 seconds |
| Started | Aug 25 09:45:06 AM UTC 24 |
| Finished | Aug 25 09:45:09 AM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3889535043 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.3889535043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.525984137 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 48742868 ps |
| CPU time | 0.96 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525984137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.525984137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.1966042313 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 53444614 ps |
| CPU time | 0.98 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966042313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.1966042313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1360369295 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 106201761 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1360369295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.1360369295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.2193459472 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 231618827 ps |
| CPU time | 2.41 seconds |
| Started | Aug 25 09:45:05 AM UTC 24 |
| Finished | Aug 25 09:45:09 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2193459472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.2193459472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2605950085 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 130669236 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:45:06 AM UTC 24 |
| Finished | Aug 25 09:45:11 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605950085 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.2605950085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.2036867763 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 63557690 ps |
| CPU time | 0.77 seconds |
| Started | Aug 25 09:45:06 AM UTC 24 |
| Finished | Aug 25 09:45:11 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2036867763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.2036867763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.943069968 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 240044289 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:45:06 AM UTC 24 |
| Finished | Aug 25 09:45:11 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=943069968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.943069968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2984933021 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 92598975 ps |
| CPU time | 2.54 seconds |
| Started | Aug 25 09:45:06 AM UTC 24 |
| Finished | Aug 25 09:45:10 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2984933021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.2984933021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.1797266765 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 804969525 ps |
| CPU time | 2.79 seconds |
| Started | Aug 25 09:45:06 AM UTC 24 |
| Finished | Aug 25 09:45:10 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797266765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.1797266765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.158021268 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 294641958 ps |
| CPU time | 3.04 seconds |
| Started | Aug 25 09:44:43 AM UTC 24 |
| Finished | Aug 25 09:44:48 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=158021268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.158021268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.859462808 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 473558877 ps |
| CPU time | 3.88 seconds |
| Started | Aug 25 09:44:43 AM UTC 24 |
| Finished | Aug 25 09:44:49 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=859462808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.859462808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2539660463 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 119138599 ps |
| CPU time | 0.88 seconds |
| Started | Aug 25 09:44:43 AM UTC 24 |
| Finished | Aug 25 09:44:46 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539660463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.2539660463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2442513904 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 126067783 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:44:43 AM UTC 24 |
| Finished | Aug 25 09:44:46 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442513904 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.2442513904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.1824283708 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 165396653 ps |
| CPU time | 2.08 seconds |
| Started | Aug 25 09:44:43 AM UTC 24 |
| Finished | Aug 25 09:44:47 AM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824283708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.1824283708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.1344152545 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 267424668 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:47 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344152545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.1344152545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.2684571956 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 230431451 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:44:43 AM UTC 24 |
| Finished | Aug 25 09:44:46 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684571956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.2684571956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.1630486465 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 258094015 ps |
| CPU time | 3.06 seconds |
| Started | Aug 25 09:44:42 AM UTC 24 |
| Finished | Aug 25 09:44:48 AM UTC 24 |
| Peak memory | 228380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1630486465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.1630486465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.2739706048 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 51480409 ps |
| CPU time | 0.73 seconds |
| Started | Aug 25 09:45:06 AM UTC 24 |
| Finished | Aug 25 09:45:11 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739706048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.2739706048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.4139492791 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 44641416 ps |
| CPU time | 0.71 seconds |
| Started | Aug 25 09:45:06 AM UTC 24 |
| Finished | Aug 25 09:45:11 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139492791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.4139492791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.2940536116 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 40364705 ps |
| CPU time | 0.69 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:17 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940536116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.2940536116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.1863165890 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 57115960 ps |
| CPU time | 0.82 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:17 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863165890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.1863165890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.4245179917 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 48832157 ps |
| CPU time | 0.7 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:17 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245179917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.4245179917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.2871123715 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 49675089 ps |
| CPU time | 0.74 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:17 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871123715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.2871123715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.3746254648 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 68750030 ps |
| CPU time | 0.78 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3746254648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.3746254648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.3357916458 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 77233829 ps |
| CPU time | 0.76 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357916458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.3357916458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.3710063812 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 37791672 ps |
| CPU time | 0.71 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710063812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.3710063812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.2597070648 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 38224789 ps |
| CPU time | 0.74 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597070648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.2597070648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.2528653646 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 171243451 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:44:46 AM UTC 24 |
| Finished | Aug 25 09:44:57 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528653646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.2528653646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1304031247 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 857817735 ps |
| CPU time | 4.16 seconds |
| Started | Aug 25 09:44:46 AM UTC 24 |
| Finished | Aug 25 09:44:59 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304031247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.1304031247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.22387500 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 128274228 ps |
| CPU time | 0.94 seconds |
| Started | Aug 25 09:44:46 AM UTC 24 |
| Finished | Aug 25 09:44:55 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=22387500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/ cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.22387500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.3748052624 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 139300530 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:44:48 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748052624 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.3748052624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.197316232 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 53194245 ps |
| CPU time | 0.8 seconds |
| Started | Aug 25 09:44:46 AM UTC 24 |
| Finished | Aug 25 09:44:55 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=197316232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.197316232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.726951845 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 42418499 ps |
| CPU time | 0.71 seconds |
| Started | Aug 25 09:44:45 AM UTC 24 |
| Finished | Aug 25 09:44:50 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726951845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.726951845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.2843294586 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 178947011 ps |
| CPU time | 2.68 seconds |
| Started | Aug 25 09:44:46 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843294586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.2843294586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.1808393857 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 101940171 ps |
| CPU time | 2.43 seconds |
| Started | Aug 25 09:44:46 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808393857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.1808393857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.489738435 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 86401440 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:44:46 AM UTC 24 |
| Finished | Aug 25 09:44:56 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=489738435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.489738435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.4009239174 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 223407840 ps |
| CPU time | 2.64 seconds |
| Started | Aug 25 09:44:44 AM UTC 24 |
| Finished | Aug 25 09:44:48 AM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4009239174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.4009239174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3502400712 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 832654239 ps |
| CPU time | 4.06 seconds |
| Started | Aug 25 09:44:45 AM UTC 24 |
| Finished | Aug 25 09:44:53 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502400712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.3502400712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.1643048522 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 60223695 ps |
| CPU time | 0.83 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1643048522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.1643048522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.1328909829 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 40002305 ps |
| CPU time | 0.87 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328909829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.1328909829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.1072374154 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 36282819 ps |
| CPU time | 0.8 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072374154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.1072374154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.861521136 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 33822724 ps |
| CPU time | 0.77 seconds |
| Started | Aug 25 09:45:15 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=861521136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.861521136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1768646802 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 31477543 ps |
| CPU time | 0.74 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768646802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.1768646802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3286150847 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 44831402 ps |
| CPU time | 0.74 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3286150847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.3286150847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.3983150559 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 49352910 ps |
| CPU time | 0.81 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3983150559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.3983150559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.2320003139 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 48641725 ps |
| CPU time | 0.78 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320003139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.2320003139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.721941320 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 137651455 ps |
| CPU time | 0.76 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=721941320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.721941320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.2740469508 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 68642863 ps |
| CPU time | 0.84 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740469508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.2740469508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.3324109332 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 112467108 ps |
| CPU time | 3.59 seconds |
| Started | Aug 25 09:44:49 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324109332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.3324109332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1118724594 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 1411119260 ps |
| CPU time | 7.63 seconds |
| Started | Aug 25 09:44:49 AM UTC 24 |
| Finished | Aug 25 09:45:08 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118724594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.1118724594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.1043235951 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 143496536 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:44:49 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043235951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.1043235951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.3960542836 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 102505496 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:44:50 AM UTC 24 |
| Finished | Aug 25 09:44:56 AM UTC 24 |
| Peak memory | 227424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960542836 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.3960542836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.4065273828 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 50522776 ps |
| CPU time | 1.06 seconds |
| Started | Aug 25 09:44:49 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065273828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.4065273828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2134013172 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 39147103 ps |
| CPU time | 0.77 seconds |
| Started | Aug 25 09:44:48 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134013172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.2134013172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3229082794 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 200370397 ps |
| CPU time | 2.48 seconds |
| Started | Aug 25 09:44:49 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3229082794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.3229082794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.2993437317 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 379717758 ps |
| CPU time | 2.59 seconds |
| Started | Aug 25 09:44:48 AM UTC 24 |
| Finished | Aug 25 09:44:53 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993437317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.2993437317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.1871839898 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 85968672 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:44:50 AM UTC 24 |
| Finished | Aug 25 09:44:56 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871839898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.1871839898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.4057397034 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 843282166 ps |
| CPU time | 3.24 seconds |
| Started | Aug 25 09:44:48 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057397034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.4057397034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.1262917558 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 58207531 ps |
| CPU time | 0.79 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:18 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262917558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.1262917558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.1130432200 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 55626032 ps |
| CPU time | 0.79 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:21 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130432200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.1130432200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.2666339396 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 39903288 ps |
| CPU time | 0.68 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:21 AM UTC 24 |
| Peak memory | 216736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2666339396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.2666339396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.1573492789 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 46486938 ps |
| CPU time | 0.71 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:21 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573492789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.1573492789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.1197682584 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 37218290 ps |
| CPU time | 0.64 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:21 AM UTC 24 |
| Peak memory | 216692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197682584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.1197682584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.1426967945 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 56464361 ps |
| CPU time | 0.76 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:21 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426967945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.1426967945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.1876708120 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 57621152 ps |
| CPU time | 0.81 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:21 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1876708120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.1876708120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.1240271930 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 54146342 ps |
| CPU time | 0.73 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:21 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240271930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.1240271930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.3310149032 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 44491505 ps |
| CPU time | 0.68 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:21 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3310149032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.3310149032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.4261038415 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 32552370 ps |
| CPU time | 0.7 seconds |
| Started | Aug 25 09:45:16 AM UTC 24 |
| Finished | Aug 25 09:45:21 AM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261038415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.4261038415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.318856025 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 166066434 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=318856025 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.318856025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.2200194226 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 110184803 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2200194226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.2200194226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.2735621466 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 39947767 ps |
| CPU time | 1.01 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:45:01 AM UTC 24 |
| Peak memory | 216808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735621466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.2735621466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.3791335708 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 227275856 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3791335708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.3791335708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.3401150138 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 336705559 ps |
| CPU time | 5.1 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401150138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.3401150138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.541337769 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 1317916345 ps |
| CPU time | 5.89 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:45:06 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=541337769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.541337769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1172158619 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 99382274 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:44:57 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172158619 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.1172158619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.2597461697 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 52233520 ps |
| CPU time | 0.78 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:44:55 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597461697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.2597461697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2771321904 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 99180225 ps |
| CPU time | 1 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:44:55 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771321904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.2771321904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.2963234039 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 127529689 ps |
| CPU time | 3.53 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963234039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.2963234039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1522008536 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 687563528 ps |
| CPU time | 4.43 seconds |
| Started | Aug 25 09:44:52 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1522008536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.1522008536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.993307645 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 89564322 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:44:57 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=993307645 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.993307645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.258458361 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 73820629 ps |
| CPU time | 0.98 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:44:56 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=258458361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.258458361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.837148960 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 35875820 ps |
| CPU time | 0.67 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:44:56 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=837148960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.837148960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.3688300815 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 238582020 ps |
| CPU time | 2.31 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688300815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.3688300815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.104259775 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 273345609 ps |
| CPU time | 2.39 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:44:58 AM UTC 24 |
| Peak memory | 235060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=104259775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.104259775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.1448544577 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 1233409118 ps |
| CPU time | 4.48 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:00 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448544577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.1448544577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.3789524939 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 146052251 ps |
| CPU time | 2.33 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3789524939 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.3789524939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.576162803 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 82582048 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=576162803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.576162803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.2012944423 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 44543945 ps |
| CPU time | 1.01 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012944423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.2012944423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.2124595236 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 164461008 ps |
| CPU time | 1.87 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124595236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.2124595236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.3611449174 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 187186281 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:44:57 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611449174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.3611449174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.1246668516 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 808902983 ps |
| CPU time | 2.94 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:44:58 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1246668516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.1246668516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2757253711 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 134348300 ps |
| CPU time | 2.22 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 228452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2757253711 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.2757253711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.1252564693 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 108358200 ps |
| CPU time | 1.13 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252564693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.1252564693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.2940276311 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 45214464 ps |
| CPU time | 0.91 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940276311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.2940276311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.54565005 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 170554124 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:04 AM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=54565005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.54565005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.2237738889 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 120067581 ps |
| CPU time | 3.14 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:06 AM UTC 24 |
| Peak memory | 235612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2237738889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.2237738889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.62929606 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 281784452 ps |
| CPU time | 2.16 seconds |
| Started | Aug 25 09:44:54 AM UTC 24 |
| Finished | Aug 25 09:45:05 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=62929606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SE Q=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/covera ge/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.62929606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.1188818277 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 82625839 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:17:04 AM UTC 24 |
| Finished | Aug 25 09:17:06 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188818277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.1188818277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.4120537235 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 25112620707 ps |
| CPU time | 74.38 seconds |
| Started | Aug 25 09:13:45 AM UTC 24 |
| Finished | Aug 25 09:15:01 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120537235 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.4120537235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.125534255 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 164179880 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:13:52 AM UTC 24 |
| Finished | Aug 25 09:13:55 AM UTC 24 |
| Peak memory | 217412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=125534255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_buffer.125534255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.393700285 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 468002354 ps |
| CPU time | 2.45 seconds |
| Started | Aug 25 09:13:57 AM UTC 24 |
| Finished | Aug 25 09:14:00 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=393700285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_data_toggle_clear.393700285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.2418749578 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 836028774 ps |
| CPU time | 25.01 seconds |
| Started | Aug 25 09:14:01 AM UTC 24 |
| Finished | Aug 25 09:14:27 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2418749578 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.2418749578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2224979899 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 5107132187 ps |
| CPU time | 196.06 seconds |
| Started | Aug 25 09:14:07 AM UTC 24 |
| Finished | Aug 25 09:17:28 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224979899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.2224979899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_enable.2281426716 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 34216195 ps |
| CPU time | 0.98 seconds |
| Started | Aug 25 09:14:09 AM UTC 24 |
| Finished | Aug 25 09:14:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2281426716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.2281426716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.1296730467 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 794766762 ps |
| CPU time | 4.35 seconds |
| Started | Aug 25 09:14:09 AM UTC 24 |
| Finished | Aug 25 09:14:15 AM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296730467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.1296730467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.4244319303 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 737882889 ps |
| CPU time | 3.29 seconds |
| Started | Aug 25 09:14:13 AM UTC 24 |
| Finished | Aug 25 09:14:17 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244319303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.4244319303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.3081609816 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 105188121617 ps |
| CPU time | 268.96 seconds |
| Started | Aug 25 09:14:16 AM UTC 24 |
| Finished | Aug 25 09:18:49 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081609816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.3081609816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.3054731617 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 107131484744 ps |
| CPU time | 378.05 seconds |
| Started | Aug 25 09:14:18 AM UTC 24 |
| Finished | Aug 25 09:20:41 AM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3054731617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.3054731617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.2536474674 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 81104924809 ps |
| CPU time | 206.09 seconds |
| Started | Aug 25 09:14:18 AM UTC 24 |
| Finished | Aug 25 09:17:47 AM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536474674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.2536474674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.2207016621 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 87057007375 ps |
| CPU time | 228.5 seconds |
| Started | Aug 25 09:14:28 AM UTC 24 |
| Finished | Aug 25 09:18:20 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2207016621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_loclk_max.2207016621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.3300865781 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 82172767945 ps |
| CPU time | 223.67 seconds |
| Started | Aug 25 09:14:29 AM UTC 24 |
| Finished | Aug 25 09:18:17 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3300865781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.3300865781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.3635856726 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 247324821 ps |
| CPU time | 2.11 seconds |
| Started | Aug 25 09:14:52 AM UTC 24 |
| Finished | Aug 25 09:14:55 AM UTC 24 |
| Peak memory | 228312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635856726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.3635856726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.3842028965 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 145440390 ps |
| CPU time | 1.18 seconds |
| Started | Aug 25 09:14:54 AM UTC 24 |
| Finished | Aug 25 09:14:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3842028965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_stall.3842028965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.806083678 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 174196715 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:14:56 AM UTC 24 |
| Finished | Aug 25 09:14:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=806083678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_in_trans.806083678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.1454034068 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 4234819070 ps |
| CPU time | 171.3 seconds |
| Started | Aug 25 09:14:40 AM UTC 24 |
| Finished | Aug 25 09:17:34 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454034068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.1454034068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.3579605472 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 185275483 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:14:57 AM UTC 24 |
| Finished | Aug 25 09:15:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579605472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.3579605472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.821789097 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 387461668 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:14:59 AM UTC 24 |
| Finished | Aug 25 09:15:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=821789097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_out_err.821789097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.818958327 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 11581920792 ps |
| CPU time | 36.01 seconds |
| Started | Aug 25 09:15:02 AM UTC 24 |
| Finished | Aug 25 09:15:39 AM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=818958327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_resume.818958327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.698931545 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 4234376283 ps |
| CPU time | 11.88 seconds |
| Started | Aug 25 09:15:03 AM UTC 24 |
| Finished | Aug 25 09:15:16 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698931545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_suspend.698931545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.788835327 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 4373069973 ps |
| CPU time | 151.77 seconds |
| Started | Aug 25 09:15:04 AM UTC 24 |
| Finished | Aug 25 09:17:39 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=788835327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.788835327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.3881399000 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 292490061 ps |
| CPU time | 1.88 seconds |
| Started | Aug 25 09:15:05 AM UTC 24 |
| Finished | Aug 25 09:15:08 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881399000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.3881399000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.663282240 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 207110482 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:15:09 AM UTC 24 |
| Finished | Aug 25 09:15:12 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=663282240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.663282240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1456054879 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 3118857793 ps |
| CPU time | 30.25 seconds |
| Started | Aug 25 09:15:12 AM UTC 24 |
| Finished | Aug 25 09:15:44 AM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1456054879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.1456054879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.2095688092 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 2994679915 ps |
| CPU time | 51.63 seconds |
| Started | Aug 25 09:15:32 AM UTC 24 |
| Finished | Aug 25 09:16:26 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095688092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.2095688092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.3017118557 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 152405230 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:15:40 AM UTC 24 |
| Finished | Aug 25 09:15:43 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017118557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.3017118557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.3122143174 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 140436192 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:15:43 AM UTC 24 |
| Finished | Aug 25 09:15:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122143174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.3122143174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.3083419838 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 500546125 ps |
| CPU time | 2.57 seconds |
| Started | Aug 25 09:15:44 AM UTC 24 |
| Finished | Aug 25 09:15:48 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083419838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.3083419838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.3973527485 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 216819086 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:15:49 AM UTC 24 |
| Finished | Aug 25 09:15:51 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3973527485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_out_iso.3973527485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.1558338146 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 161052022 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:15:49 AM UTC 24 |
| Finished | Aug 25 09:15:52 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558338146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_out_stall.1558338146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.4133690198 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 158929358 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:15:50 AM UTC 24 |
| Finished | Aug 25 09:15:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133690198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_out_trans_nak.4133690198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.2534078089 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 161490338 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:15:52 AM UTC 24 |
| Finished | Aug 25 09:15:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534078089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.2534078089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.1913153892 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 160166614 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:15:52 AM UTC 24 |
| Finished | Aug 25 09:15:55 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913153892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.1913153892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.1353386075 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 272502151 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:15:53 AM UTC 24 |
| Finished | Aug 25 09:15:56 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353386075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.1353386075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.747230147 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 202221652 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:15:55 AM UTC 24 |
| Finished | Aug 25 09:15:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=747230147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.747230147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.1319593238 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 283812924 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:15:55 AM UTC 24 |
| Finished | Aug 25 09:15:58 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1319593238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.1319593238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.4203901991 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 230868398 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:15:57 AM UTC 24 |
| Finished | Aug 25 09:15:59 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203901991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.4203901991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.1492478018 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 38363191 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:15:59 AM UTC 24 |
| Finished | Aug 25 09:16:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492478018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.1492478018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.202629689 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 13093432463 ps |
| CPU time | 56.2 seconds |
| Started | Aug 25 09:16:00 AM UTC 24 |
| Finished | Aug 25 09:16:58 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=202629689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_pkt_buffer.202629689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.2388937471 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 194572525 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:16:02 AM UTC 24 |
| Finished | Aug 25 09:16:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388937471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_sent.2388937471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.3372395024 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 10524030820 ps |
| CPU time | 90.01 seconds |
| Started | Aug 25 09:16:05 AM UTC 24 |
| Finished | Aug 25 09:17:37 AM UTC 24 |
| Peak memory | 228676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372395024 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.3372395024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.204451828 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 5043311527 ps |
| CPU time | 34.06 seconds |
| Started | Aug 25 09:16:06 AM UTC 24 |
| Finished | Aug 25 09:16:41 AM UTC 24 |
| Peak memory | 230732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=204451828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.204451828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.3435412331 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 7337710001 ps |
| CPU time | 139.02 seconds |
| Started | Aug 25 09:16:06 AM UTC 24 |
| Finished | Aug 25 09:18:28 AM UTC 24 |
| Peak memory | 235240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435412331 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.3435412331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.980850824 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 198733109 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:16:02 AM UTC 24 |
| Finished | Aug 25 09:16:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=980850824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_random_length_in_transaction.980850824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.1799476827 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 181833754 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:16:04 AM UTC 24 |
| Finished | Aug 25 09:16:06 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799476827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.1799476827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3694165924 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 145529070 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:16:21 AM UTC 24 |
| Finished | Aug 25 09:16:24 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694165924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_crc_err.3694165924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.509002632 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 342057970 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:16:24 AM UTC 24 |
| Finished | Aug 25 09:16:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=509002632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_rx_full.509002632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.1649110157 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 363086013 ps |
| CPU time | 2.24 seconds |
| Started | Aug 25 09:17:03 AM UTC 24 |
| Finished | Aug 25 09:17:06 AM UTC 24 |
| Peak memory | 252488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649110157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.1649110157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.3138062727 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 232305884 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:16:30 AM UTC 24 |
| Finished | Aug 25 09:16:32 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138062727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.3138062727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.2484919969 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 157208859 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:16:32 AM UTC 24 |
| Finished | Aug 25 09:16:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484919969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.2484919969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.1094414066 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 164245610 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:16:33 AM UTC 24 |
| Finished | Aug 25 09:16:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094414066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_setup_trans_ignored.1094414066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.1443728534 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 217974828 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:16:35 AM UTC 24 |
| Finished | Aug 25 09:16:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1443728534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.1443728534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.1834161906 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 2204331051 ps |
| CPU time | 32.84 seconds |
| Started | Aug 25 09:16:36 AM UTC 24 |
| Finished | Aug 25 09:17:11 AM UTC 24 |
| Peak memory | 235116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834161906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.1834161906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.4101916661 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 150691827 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:16:38 AM UTC 24 |
| Finished | Aug 25 09:16:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101916661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.4101916661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.1003556830 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 151663825 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:16:41 AM UTC 24 |
| Finished | Aug 25 09:16:44 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003556830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.1003556830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.1809945709 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 1261996651 ps |
| CPU time | 4.33 seconds |
| Started | Aug 25 09:16:45 AM UTC 24 |
| Finished | Aug 25 09:16:50 AM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1809945709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.1809945709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.2702564147 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 2360791411 ps |
| CPU time | 25.07 seconds |
| Started | Aug 25 09:16:43 AM UTC 24 |
| Finished | Aug 25 09:17:09 AM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2702564147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.2702564147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.1615151844 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 7069706615 ps |
| CPU time | 106.24 seconds |
| Started | Aug 25 09:16:54 AM UTC 24 |
| Finished | Aug 25 09:18:43 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615151844 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.1615151844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.1465791013 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 4753656782 ps |
| CPU time | 53.9 seconds |
| Started | Aug 25 09:14:01 AM UTC 24 |
| Finished | Aug 25 09:14:57 AM UTC 24 |
| Peak memory | 218436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1465791013 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.1465791013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.2382581402 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 524834784 ps |
| CPU time | 3 seconds |
| Started | Aug 25 09:16:59 AM UTC 24 |
| Finished | Aug 25 09:17:04 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2382581402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.2382581402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.138916954 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 5549336584 ps |
| CPU time | 13.43 seconds |
| Started | Aug 25 09:17:04 AM UTC 24 |
| Finished | Aug 25 09:17:19 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=138916954 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.138916954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.3030491887 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 19208240036 ps |
| CPU time | 34.12 seconds |
| Started | Aug 25 09:17:05 AM UTC 24 |
| Finished | Aug 25 09:17:42 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3030491887 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.3030491887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.491808339 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 199742431 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:17:07 AM UTC 24 |
| Finished | Aug 25 09:17:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=491808339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_buffer.491808339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.3658334112 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 152831207 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:17:11 AM UTC 24 |
| Finished | Aug 25 09:17:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658334112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.3658334112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.3319606937 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 150457760 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:17:12 AM UTC 24 |
| Finished | Aug 25 09:17:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3319606937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.3319606937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.4214032194 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 489609633 ps |
| CPU time | 2.35 seconds |
| Started | Aug 25 09:17:13 AM UTC 24 |
| Finished | Aug 25 09:17:16 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214032194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.4214032194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.2740422181 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 449036100 ps |
| CPU time | 2.3 seconds |
| Started | Aug 25 09:17:14 AM UTC 24 |
| Finished | Aug 25 09:17:18 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740422181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.2740422181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.3355873474 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 3764275425 ps |
| CPU time | 36.32 seconds |
| Started | Aug 25 09:17:17 AM UTC 24 |
| Finished | Aug 25 09:17:55 AM UTC 24 |
| Peak memory | 218380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3355873474 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.3355873474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.804289443 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 580308775 ps |
| CPU time | 2.29 seconds |
| Started | Aug 25 09:17:20 AM UTC 24 |
| Finished | Aug 25 09:17:23 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804289443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_disable_endpoint.804289443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.1353705298 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 155111934 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:17:24 AM UTC 24 |
| Finished | Aug 25 09:17:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353705298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.1353705298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3578172806 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 59783784 ps |
| CPU time | 0.97 seconds |
| Started | Aug 25 09:17:24 AM UTC 24 |
| Finished | Aug 25 09:17:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3578172806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.3578172806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.3304276125 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 910527812 ps |
| CPU time | 3.86 seconds |
| Started | Aug 25 09:17:27 AM UTC 24 |
| Finished | Aug 25 09:17:32 AM UTC 24 |
| Peak memory | 218196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304276125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.3304276125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.2765461270 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 188454908 ps |
| CPU time | 3.77 seconds |
| Started | Aug 25 09:17:28 AM UTC 24 |
| Finished | Aug 25 09:17:33 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765461270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_fifo_rst.2765461270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.3306036764 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 117058393059 ps |
| CPU time | 360.34 seconds |
| Started | Aug 25 09:17:30 AM UTC 24 |
| Finished | Aug 25 09:23:36 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3306036764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.3306036764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.1548892657 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 94106490999 ps |
| CPU time | 325.45 seconds |
| Started | Aug 25 09:17:31 AM UTC 24 |
| Finished | Aug 25 09:23:02 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548892657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.1548892657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.3991639520 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 108970373204 ps |
| CPU time | 284.65 seconds |
| Started | Aug 25 09:17:31 AM UTC 24 |
| Finished | Aug 25 09:22:20 AM UTC 24 |
| Peak memory | 218440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3991639520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_loclk_max.3991639520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.1053792740 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 99118759019 ps |
| CPU time | 331.63 seconds |
| Started | Aug 25 09:17:33 AM UTC 24 |
| Finished | Aug 25 09:23:10 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053792740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.1053792740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.4147876513 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 228377748 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:17:34 AM UTC 24 |
| Finished | Aug 25 09:17:37 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147876513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.4147876513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.3677516542 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 141102495 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:17:36 AM UTC 24 |
| Finished | Aug 25 09:17:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677516542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_stall.3677516542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.2980422416 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 195452959 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:17:38 AM UTC 24 |
| Finished | Aug 25 09:17:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980422416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_trans.2980422416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.3391973184 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 4479933909 ps |
| CPU time | 46.27 seconds |
| Started | Aug 25 09:17:33 AM UTC 24 |
| Finished | Aug 25 09:18:21 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391973184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.3391973184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.2389658797 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 6414127133 ps |
| CPU time | 111.94 seconds |
| Started | Aug 25 09:17:38 AM UTC 24 |
| Finished | Aug 25 09:19:32 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2389658797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.2389658797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.3213771354 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 240594902 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:17:39 AM UTC 24 |
| Finished | Aug 25 09:17:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3213771354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_in_err.3213771354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.4002304151 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 29234184126 ps |
| CPU time | 86.49 seconds |
| Started | Aug 25 09:17:40 AM UTC 24 |
| Finished | Aug 25 09:19:09 AM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002304151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.4002304151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.2095695998 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 5389054487 ps |
| CPU time | 13.65 seconds |
| Started | Aug 25 09:17:41 AM UTC 24 |
| Finished | Aug 25 09:17:56 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095695998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.2095695998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2833711105 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 3106624699 ps |
| CPU time | 33.11 seconds |
| Started | Aug 25 09:17:41 AM UTC 24 |
| Finished | Aug 25 09:18:16 AM UTC 24 |
| Peak memory | 235212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833711105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.2833711105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.933152253 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 2945605725 ps |
| CPU time | 111.1 seconds |
| Started | Aug 25 09:17:43 AM UTC 24 |
| Finished | Aug 25 09:19:36 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=933152253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.933152253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.1468641019 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 243224901 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:17:43 AM UTC 24 |
| Finished | Aug 25 09:17:45 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1468641019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.1468641019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.2988719009 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 193532183 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:17:46 AM UTC 24 |
| Finished | Aug 25 09:17:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988719009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.2988719009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.3414213832 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 3283362442 ps |
| CPU time | 129.7 seconds |
| Started | Aug 25 09:17:49 AM UTC 24 |
| Finished | Aug 25 09:20:02 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3414213832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.3414213832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.533282373 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 1785354386 ps |
| CPU time | 63.31 seconds |
| Started | Aug 25 09:17:51 AM UTC 24 |
| Finished | Aug 25 09:18:57 AM UTC 24 |
| Peak memory | 228284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=533282373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.533282373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.4240550654 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 181682906 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:17:56 AM UTC 24 |
| Finished | Aug 25 09:17:58 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4240550654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.4240550654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.3684267136 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 176873925 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:17:57 AM UTC 24 |
| Finished | Aug 25 09:17:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684267136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.3684267136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.725922574 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 188218521 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:17:59 AM UTC 24 |
| Finished | Aug 25 09:18:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=725922574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_out_iso.725922574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.2435430540 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 203585631 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:18:00 AM UTC 24 |
| Finished | Aug 25 09:18:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435430540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.2435430540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.214957418 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 239739141 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:18:02 AM UTC 24 |
| Finished | Aug 25 09:18:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=214957418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_out_trans_nak.214957418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.1978099613 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 169142706 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:18:02 AM UTC 24 |
| Finished | Aug 25 09:18:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1978099613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_pending_in_trans.1978099613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.3439882203 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 244632486 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:18:03 AM UTC 24 |
| Finished | Aug 25 09:18:06 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439882203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.3439882203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.506367557 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 277284545 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:18:06 AM UTC 24 |
| Finished | Aug 25 09:18:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506367557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.506367557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.2143177972 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 167107456 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:18:06 AM UTC 24 |
| Finished | Aug 25 09:18:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143177972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.2143177972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.3272291226 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 147024944 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:18:09 AM UTC 24 |
| Finished | Aug 25 09:18:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272291226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_pkt_received.3272291226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2501040602 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 184051308 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:18:09 AM UTC 24 |
| Finished | Aug 25 09:18:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2501040602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.2501040602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.1751288661 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 5796083271 ps |
| CPU time | 90.84 seconds |
| Started | Aug 25 09:18:12 AM UTC 24 |
| Finished | Aug 25 09:19:45 AM UTC 24 |
| Peak memory | 232516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751288661 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.1751288661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.3576093452 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 7533628827 ps |
| CPU time | 147.95 seconds |
| Started | Aug 25 09:18:12 AM UTC 24 |
| Finished | Aug 25 09:20:43 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576093452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.3576093452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.3884295303 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 9056754170 ps |
| CPU time | 84.04 seconds |
| Started | Aug 25 09:18:14 AM UTC 24 |
| Finished | Aug 25 09:19:40 AM UTC 24 |
| Peak memory | 235192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884295303 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.3884295303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.1452922089 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 214553989 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:18:09 AM UTC 24 |
| Finished | Aug 25 09:18:12 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452922089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_random_length_in_transaction.1452922089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.2613748176 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 213902170 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:18:12 AM UTC 24 |
| Finished | Aug 25 09:18:15 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613748176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.2613748176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.633287102 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 20162720343 ps |
| CPU time | 55.19 seconds |
| Started | Aug 25 09:18:16 AM UTC 24 |
| Finished | Aug 25 09:19:12 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=633287102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_resume_link_active.633287102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.575181510 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 159826023 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:18:17 AM UTC 24 |
| Finished | Aug 25 09:18:19 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=575181510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_rx_crc_err.575181510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.3590550443 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 175254354 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:18:20 AM UTC 24 |
| Finished | Aug 25 09:18:23 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590550443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.3590550443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.52065297 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 396778687 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:18:22 AM UTC 24 |
| Finished | Aug 25 09:18:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=52065297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_setup_priority.52065297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.2497556176 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 301625675 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:18:22 AM UTC 24 |
| Finished | Aug 25 09:18:25 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2497556176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.2497556176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.663465473 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 211497801 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:18:22 AM UTC 24 |
| Finished | Aug 25 09:18:25 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=663465473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_setup_stage.663465473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.1636731628 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 214802746 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:18:23 AM UTC 24 |
| Finished | Aug 25 09:18:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636731628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.1636731628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.1165464819 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 219969186 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:18:26 AM UTC 24 |
| Finished | Aug 25 09:18:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165464819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.1165464819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.1159616632 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 2121197869 ps |
| CPU time | 20.45 seconds |
| Started | Aug 25 09:18:26 AM UTC 24 |
| Finished | Aug 25 09:18:47 AM UTC 24 |
| Peak memory | 235192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159616632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.1159616632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.105572609 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 178685206 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:18:27 AM UTC 24 |
| Finished | Aug 25 09:18:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=105572609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.105572609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.1981638489 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 228653303 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:18:27 AM UTC 24 |
| Finished | Aug 25 09:18:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981638489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.1981638489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.461758930 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 967402361 ps |
| CPU time | 3.77 seconds |
| Started | Aug 25 09:18:29 AM UTC 24 |
| Finished | Aug 25 09:18:34 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=461758930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_stream_len_max.461758930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.3074657497 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 1800144323 ps |
| CPU time | 71.12 seconds |
| Started | Aug 25 09:18:29 AM UTC 24 |
| Finished | Aug 25 09:19:42 AM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3074657497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_streaming_out.3074657497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.4089560492 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 3964624981 ps |
| CPU time | 44.16 seconds |
| Started | Aug 25 09:17:18 AM UTC 24 |
| Finished | Aug 25 09:18:04 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089560492 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.4089560492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.1443769228 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 483382531 ps |
| CPU time | 2.86 seconds |
| Started | Aug 25 09:18:33 AM UTC 24 |
| Finished | Aug 25 09:18:37 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1443769228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.1443769228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.2713998841 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 33889471 ps |
| CPU time | 0.83 seconds |
| Started | Aug 25 09:27:57 AM UTC 24 |
| Finished | Aug 25 09:27:59 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713998841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.2713998841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.3894961168 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 19898461150 ps |
| CPU time | 36.97 seconds |
| Started | Aug 25 09:27:18 AM UTC 24 |
| Finished | Aug 25 09:27:57 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894961168 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.3894961168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.2876645679 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 24280673519 ps |
| CPU time | 68.82 seconds |
| Started | Aug 25 09:27:18 AM UTC 24 |
| Finished | Aug 25 09:28:29 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876645679 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.2876645679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.3139791337 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 206360482 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:27:19 AM UTC 24 |
| Finished | Aug 25 09:27:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3139791337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.3139791337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.2264888355 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 177360451 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:27:19 AM UTC 24 |
| Finished | Aug 25 09:27:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264888355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.2264888355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.2068447688 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 637969836 ps |
| CPU time | 3.43 seconds |
| Started | Aug 25 09:27:20 AM UTC 24 |
| Finished | Aug 25 09:27:24 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068447688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_data_toggle_clear.2068447688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.1879491124 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 688575448 ps |
| CPU time | 3.54 seconds |
| Started | Aug 25 09:27:21 AM UTC 24 |
| Finished | Aug 25 09:27:25 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1879491124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.1879491124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.2486656917 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 47266580679 ps |
| CPU time | 150.88 seconds |
| Started | Aug 25 09:27:22 AM UTC 24 |
| Finished | Aug 25 09:29:56 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2486656917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.2486656917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.1621046058 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 1099004979 ps |
| CPU time | 34.04 seconds |
| Started | Aug 25 09:27:22 AM UTC 24 |
| Finished | Aug 25 09:27:58 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621046058 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.1621046058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.100532161 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 580486049 ps |
| CPU time | 2.75 seconds |
| Started | Aug 25 09:27:23 AM UTC 24 |
| Finished | Aug 25 09:27:27 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=100532161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_disable_endpoint.100532161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.2278508626 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 171087806 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:27:23 AM UTC 24 |
| Finished | Aug 25 09:27:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278508626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.2278508626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_enable.2838033276 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 34997285 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:27:25 AM UTC 24 |
| Finished | Aug 25 09:27:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838033276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.2838033276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.2815540127 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 811136371 ps |
| CPU time | 4.48 seconds |
| Started | Aug 25 09:27:25 AM UTC 24 |
| Finished | Aug 25 09:27:31 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815540127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.2815540127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.2407810437 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 505163451 ps |
| CPU time | 1.97 seconds |
| Started | Aug 25 09:27:27 AM UTC 24 |
| Finished | Aug 25 09:27:30 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407810437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.2407810437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.3519060048 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 383943812 ps |
| CPU time | 3.98 seconds |
| Started | Aug 25 09:27:27 AM UTC 24 |
| Finished | Aug 25 09:27:33 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519060048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_fifo_rst.3519060048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.526241173 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 172181382 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:27:27 AM UTC 24 |
| Finished | Aug 25 09:27:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=526241173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.526241173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.1788241864 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 197625991 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:27:27 AM UTC 24 |
| Finished | Aug 25 09:27:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788241864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.1788241864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.1212652267 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 189553303 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:27:28 AM UTC 24 |
| Finished | Aug 25 09:27:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1212652267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.1212652267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.1509158766 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 4347448436 ps |
| CPU time | 153.92 seconds |
| Started | Aug 25 09:27:27 AM UTC 24 |
| Finished | Aug 25 09:30:05 AM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509158766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.1509158766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.382216108 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 4138173982 ps |
| CPU time | 38.63 seconds |
| Started | Aug 25 09:27:29 AM UTC 24 |
| Finished | Aug 25 09:28:09 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=382216108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.382216108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.636057232 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 232050657 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:27:33 AM UTC 24 |
| Finished | Aug 25 09:27:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=636057232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_link_in_err.636057232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.1258579512 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 13548460223 ps |
| CPU time | 34.65 seconds |
| Started | Aug 25 09:27:33 AM UTC 24 |
| Finished | Aug 25 09:28:09 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258579512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.1258579512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.3378953515 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 10654800966 ps |
| CPU time | 26.64 seconds |
| Started | Aug 25 09:27:33 AM UTC 24 |
| Finished | Aug 25 09:28:01 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3378953515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_link_suspend.3378953515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.1102647528 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 3543035131 ps |
| CPU time | 59.07 seconds |
| Started | Aug 25 09:27:33 AM UTC 24 |
| Finished | Aug 25 09:28:34 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102647528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.1102647528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.422988707 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 2564139074 ps |
| CPU time | 90.33 seconds |
| Started | Aug 25 09:27:33 AM UTC 24 |
| Finished | Aug 25 09:29:06 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=422988707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.422988707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.3827733042 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 257564075 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:27:34 AM UTC 24 |
| Finished | Aug 25 09:27:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827733042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.3827733042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.1682431377 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 223435611 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:27:34 AM UTC 24 |
| Finished | Aug 25 09:27:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682431377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.1682431377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.1422256028 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 3076064960 ps |
| CPU time | 39.82 seconds |
| Started | Aug 25 09:27:35 AM UTC 24 |
| Finished | Aug 25 09:28:17 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422256028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.1422256028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.3704794247 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 1794377139 ps |
| CPU time | 22.24 seconds |
| Started | Aug 25 09:27:36 AM UTC 24 |
| Finished | Aug 25 09:28:00 AM UTC 24 |
| Peak memory | 230336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704794247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.3704794247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.998267320 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 2635812014 ps |
| CPU time | 35.28 seconds |
| Started | Aug 25 09:27:38 AM UTC 24 |
| Finished | Aug 25 09:28:14 AM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=998267320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.998267320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.1947064308 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 186502982 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:27:38 AM UTC 24 |
| Finished | Aug 25 09:27:40 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947064308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.1947064308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.1634544183 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 175816946 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:27:40 AM UTC 24 |
| Finished | Aug 25 09:27:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1634544183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.1634544183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.2875295161 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 170270629 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:27:42 AM UTC 24 |
| Finished | Aug 25 09:27:44 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875295161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.2875295161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.2054895758 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 167487184 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:27:43 AM UTC 24 |
| Finished | Aug 25 09:27:45 AM UTC 24 |
| Peak memory | 216056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2054895758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_out_stall.2054895758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.666968635 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 184843378 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:27:43 AM UTC 24 |
| Finished | Aug 25 09:27:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=666968635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_out_trans_nak.666968635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.1391817426 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 154036357 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:27:45 AM UTC 24 |
| Finished | Aug 25 09:27:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391817426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.1391817426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.2241010813 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 237440741 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:27:45 AM UTC 24 |
| Finished | Aug 25 09:27:48 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2241010813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.2241010813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.1274040113 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 150881332 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:27:45 AM UTC 24 |
| Finished | Aug 25 09:27:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274040113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.1274040113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.160752788 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 30464235 ps |
| CPU time | 0.91 seconds |
| Started | Aug 25 09:27:47 AM UTC 24 |
| Finished | Aug 25 09:27:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=160752788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_phy_pins_sense.160752788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.2667014725 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 21452070996 ps |
| CPU time | 92.26 seconds |
| Started | Aug 25 09:27:47 AM UTC 24 |
| Finished | Aug 25 09:29:22 AM UTC 24 |
| Peak memory | 235232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667014725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_pkt_buffer.2667014725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.2994488488 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 182629843 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:27:47 AM UTC 24 |
| Finished | Aug 25 09:27:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2994488488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_pkt_received.2994488488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.2142120576 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 193220739 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:27:48 AM UTC 24 |
| Finished | Aug 25 09:27:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2142120576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_pkt_sent.2142120576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.301475234 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 164810523 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:27:48 AM UTC 24 |
| Finished | Aug 25 09:27:51 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=301475234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_random_length_in_transaction.301475234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.1378853577 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 182898676 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:27:48 AM UTC 24 |
| Finished | Aug 25 09:27:51 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378853577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.1378853577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.1989739872 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 20156788691 ps |
| CPU time | 44.5 seconds |
| Started | Aug 25 09:27:50 AM UTC 24 |
| Finished | Aug 25 09:28:36 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989739872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 10.usbdev_resume_link_active.1989739872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.1002115240 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 152835240 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:27:52 AM UTC 24 |
| Finished | Aug 25 09:27:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1002115240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_rx_crc_err.1002115240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.3015524808 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 379672116 ps |
| CPU time | 2.11 seconds |
| Started | Aug 25 09:27:52 AM UTC 24 |
| Finished | Aug 25 09:27:55 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015524808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_rx_full.3015524808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.358192561 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 201478966 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:27:52 AM UTC 24 |
| Finished | Aug 25 09:27:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=358192561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_setup_stage.358192561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.3046963984 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 148359369 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:27:52 AM UTC 24 |
| Finished | Aug 25 09:27:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3046963984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.3046963984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.5458898 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 229907294 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:27:52 AM UTC 24 |
| Finished | Aug 25 09:27:54 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=5458898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -c m_name 10.usbdev_smoke.5458898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.450882634 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 3886169681 ps |
| CPU time | 40.67 seconds |
| Started | Aug 25 09:27:54 AM UTC 24 |
| Finished | Aug 25 09:28:36 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=450882634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.450882634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.407654599 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 177216951 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:27:54 AM UTC 24 |
| Finished | Aug 25 09:27:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=407654599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.407654599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.825616356 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 187312154 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:27:54 AM UTC 24 |
| Finished | Aug 25 09:27:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825616356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_stall_trans.825616356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.638545554 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 441998898 ps |
| CPU time | 2.1 seconds |
| Started | Aug 25 09:27:55 AM UTC 24 |
| Finished | Aug 25 09:27:58 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=638545554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_stream_len_max.638545554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.277567669 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 2553454508 ps |
| CPU time | 98.77 seconds |
| Started | Aug 25 09:27:55 AM UTC 24 |
| Finished | Aug 25 09:29:36 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=277567669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_streaming_out.277567669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.3613218578 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 5204150863 ps |
| CPU time | 59.34 seconds |
| Started | Aug 25 09:27:22 AM UTC 24 |
| Finished | Aug 25 09:28:23 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3613218578 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.3613218578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.2943190395 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 549043289 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:27:55 AM UTC 24 |
| Finished | Aug 25 09:27:59 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2943190395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.2943190395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.4231665979 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 704371704 ps |
| CPU time | 2.71 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231665979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.4231665979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.1944037966 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 466990944 ps |
| CPU time | 2.13 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1944037966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.1944037966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1759932154 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 212606770 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759932154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.1759932154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.3132996051 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 442203332 ps |
| CPU time | 2.24 seconds |
| Started | Aug 25 09:42:42 AM UTC 24 |
| Finished | Aug 25 09:42:46 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3132996051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.3132996051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.3455033210 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 287704663 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:42:42 AM UTC 24 |
| Finished | Aug 25 09:42:45 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3455033210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.3455033210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.2969606659 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 547485473 ps |
| CPU time | 1.99 seconds |
| Started | Aug 25 09:42:42 AM UTC 24 |
| Finished | Aug 25 09:42:45 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2969606659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_ tx_rx_disruption.2969606659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.671627231 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 498499466 ps |
| CPU time | 2.43 seconds |
| Started | Aug 25 09:42:42 AM UTC 24 |
| Finished | Aug 25 09:42:46 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=671627231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_t x_rx_disruption.671627231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.3189196682 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 646414554 ps |
| CPU time | 2.55 seconds |
| Started | Aug 25 09:42:42 AM UTC 24 |
| Finished | Aug 25 09:42:46 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3189196682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.3189196682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.1949747473 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 552663566 ps |
| CPU time | 2.77 seconds |
| Started | Aug 25 09:42:43 AM UTC 24 |
| Finished | Aug 25 09:42:47 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1949747473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_ tx_rx_disruption.1949747473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.283782398 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 247149810 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:42:43 AM UTC 24 |
| Finished | Aug 25 09:42:45 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=283782398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.283782398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.1047039130 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 512588415 ps |
| CPU time | 2.39 seconds |
| Started | Aug 25 09:42:43 AM UTC 24 |
| Finished | Aug 25 09:42:46 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1047039130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_ tx_rx_disruption.1047039130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.778685547 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 503310252 ps |
| CPU time | 2.58 seconds |
| Started | Aug 25 09:42:43 AM UTC 24 |
| Finished | Aug 25 09:42:47 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=778685547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.778685547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.1936641484 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 424347211 ps |
| CPU time | 2.51 seconds |
| Started | Aug 25 09:42:43 AM UTC 24 |
| Finished | Aug 25 09:42:46 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1936641484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.1936641484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.2905102376 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 514259663 ps |
| CPU time | 2.59 seconds |
| Started | Aug 25 09:42:45 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905102376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.2905102376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.3320449358 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 567738405 ps |
| CPU time | 2.09 seconds |
| Started | Aug 25 09:42:45 AM UTC 24 |
| Finished | Aug 25 09:42:48 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3320449358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_ tx_rx_disruption.3320449358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.1035187832 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 631006293 ps |
| CPU time | 2.95 seconds |
| Started | Aug 25 09:42:45 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1035187832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.1035187832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.488046183 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 36129006 ps |
| CPU time | 0.96 seconds |
| Started | Aug 25 09:28:25 AM UTC 24 |
| Finished | Aug 25 09:28:27 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=488046183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.488046183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.3218744003 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 5919662682 ps |
| CPU time | 12.22 seconds |
| Started | Aug 25 09:27:57 AM UTC 24 |
| Finished | Aug 25 09:28:10 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218744003 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.3218744003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.983114704 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 20171804115 ps |
| CPU time | 52.77 seconds |
| Started | Aug 25 09:27:57 AM UTC 24 |
| Finished | Aug 25 09:28:51 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=983114704 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.983114704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.1802816310 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 30388652785 ps |
| CPU time | 67.61 seconds |
| Started | Aug 25 09:27:58 AM UTC 24 |
| Finished | Aug 25 09:29:08 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802816310 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.1802816310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.3688428685 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 197171244 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:27:58 AM UTC 24 |
| Finished | Aug 25 09:28:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688428685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.3688428685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.4154276360 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 148398464 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:27:58 AM UTC 24 |
| Finished | Aug 25 09:28:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154276360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.4154276360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.4152511911 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 645321057 ps |
| CPU time | 4.01 seconds |
| Started | Aug 25 09:27:58 AM UTC 24 |
| Finished | Aug 25 09:28:03 AM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152511911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_data_toggle_clear.4152511911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.4194934691 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 1080042839 ps |
| CPU time | 4.22 seconds |
| Started | Aug 25 09:28:00 AM UTC 24 |
| Finished | Aug 25 09:28:05 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194934691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.4194934691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.2181229670 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 45369193385 ps |
| CPU time | 125.47 seconds |
| Started | Aug 25 09:28:00 AM UTC 24 |
| Finished | Aug 25 09:30:08 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181229670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.2181229670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.1834003718 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 616668979 ps |
| CPU time | 7.09 seconds |
| Started | Aug 25 09:28:00 AM UTC 24 |
| Finished | Aug 25 09:28:08 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834003718 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.1834003718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.3393688601 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 442721397 ps |
| CPU time | 2.45 seconds |
| Started | Aug 25 09:28:01 AM UTC 24 |
| Finished | Aug 25 09:28:04 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393688601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.3393688601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.1545557604 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 139946315 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:28:04 AM UTC 24 |
| Finished | Aug 25 09:28:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545557604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.1545557604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_enable.1773633053 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 75634631 ps |
| CPU time | 1.08 seconds |
| Started | Aug 25 09:28:04 AM UTC 24 |
| Finished | Aug 25 09:28:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773633053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.1773633053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.1588643702 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 775668594 ps |
| CPU time | 4.02 seconds |
| Started | Aug 25 09:28:04 AM UTC 24 |
| Finished | Aug 25 09:28:09 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588643702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.1588643702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.4083371380 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 229173492 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:28:04 AM UTC 24 |
| Finished | Aug 25 09:28:07 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083371380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.4083371380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.1719831064 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 291552009 ps |
| CPU time | 3.17 seconds |
| Started | Aug 25 09:28:04 AM UTC 24 |
| Finished | Aug 25 09:28:08 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719831064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_fifo_rst.1719831064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.2321549321 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 243634815 ps |
| CPU time | 2 seconds |
| Started | Aug 25 09:28:05 AM UTC 24 |
| Finished | Aug 25 09:28:08 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321549321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.2321549321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.3747688119 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 177010899 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:28:05 AM UTC 24 |
| Finished | Aug 25 09:28:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3747688119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_stall.3747688119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.1638691992 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 261833848 ps |
| CPU time | 1.93 seconds |
| Started | Aug 25 09:28:06 AM UTC 24 |
| Finished | Aug 25 09:28:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1638691992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.1638691992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.2054415685 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 5663226635 ps |
| CPU time | 71.74 seconds |
| Started | Aug 25 09:28:04 AM UTC 24 |
| Finished | Aug 25 09:29:18 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2054415685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.2054415685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.2913260023 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 184881866 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:28:06 AM UTC 24 |
| Finished | Aug 25 09:28:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2913260023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.2913260023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.347715030 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 25914251142 ps |
| CPU time | 70.55 seconds |
| Started | Aug 25 09:28:08 AM UTC 24 |
| Finished | Aug 25 09:29:20 AM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347715030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_link_resume.347715030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.627510186 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 10606012710 ps |
| CPU time | 27.41 seconds |
| Started | Aug 25 09:28:08 AM UTC 24 |
| Finished | Aug 25 09:28:36 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=627510186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_suspend.627510186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.1802934928 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 3499809400 ps |
| CPU time | 40.35 seconds |
| Started | Aug 25 09:28:09 AM UTC 24 |
| Finished | Aug 25 09:28:51 AM UTC 24 |
| Peak memory | 235272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802934928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.1802934928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.4090558288 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 2634300647 ps |
| CPU time | 26.42 seconds |
| Started | Aug 25 09:28:09 AM UTC 24 |
| Finished | Aug 25 09:28:37 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090558288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.4090558288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.3610292297 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 249472655 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:28:09 AM UTC 24 |
| Finished | Aug 25 09:28:12 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3610292297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.3610292297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.234851239 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 199814937 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:28:09 AM UTC 24 |
| Finished | Aug 25 09:28:12 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=234851239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.234851239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.2751462660 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 3304352078 ps |
| CPU time | 41.72 seconds |
| Started | Aug 25 09:28:11 AM UTC 24 |
| Finished | Aug 25 09:28:54 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751462660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.2751462660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.2741462469 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 3575315511 ps |
| CPU time | 50.09 seconds |
| Started | Aug 25 09:28:11 AM UTC 24 |
| Finished | Aug 25 09:29:03 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741462469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.2741462469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.511461787 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 2683020859 ps |
| CPU time | 95 seconds |
| Started | Aug 25 09:28:11 AM UTC 24 |
| Finished | Aug 25 09:29:48 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=511461787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.511461787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.1244433773 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 156698185 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:28:11 AM UTC 24 |
| Finished | Aug 25 09:28:13 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244433773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.1244433773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.3763524051 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 159396325 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:28:11 AM UTC 24 |
| Finished | Aug 25 09:28:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763524051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.3763524051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.1180597507 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 168324527 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:28:12 AM UTC 24 |
| Finished | Aug 25 09:28:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1180597507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_out_iso.1180597507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.1001845247 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 183104277 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:28:14 AM UTC 24 |
| Finished | Aug 25 09:28:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1001845247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.1001845247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.3820140881 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 159260461 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:28:14 AM UTC 24 |
| Finished | Aug 25 09:28:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3820140881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.3820140881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.1052234720 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 155660279 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:28:15 AM UTC 24 |
| Finished | Aug 25 09:28:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052234720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.1052234720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.4052843955 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 265877130 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:28:15 AM UTC 24 |
| Finished | Aug 25 09:28:18 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052843955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.4052843955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.207797233 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 146325156 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:28:15 AM UTC 24 |
| Finished | Aug 25 09:28:18 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=207797233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.207797233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.1543366581 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 36038167 ps |
| CPU time | 1.01 seconds |
| Started | Aug 25 09:28:15 AM UTC 24 |
| Finished | Aug 25 09:28:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543366581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.1543366581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.3813241174 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 8607566174 ps |
| CPU time | 33.32 seconds |
| Started | Aug 25 09:28:15 AM UTC 24 |
| Finished | Aug 25 09:28:50 AM UTC 24 |
| Peak memory | 228572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813241174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.3813241174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.33378203 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 152351788 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:28:18 AM UTC 24 |
| Finished | Aug 25 09:28:20 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33378203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_received.33378203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.2223871352 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 217306168 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:28:18 AM UTC 24 |
| Finished | Aug 25 09:28:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223871352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.2223871352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.2448631497 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 213539533 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:28:18 AM UTC 24 |
| Finished | Aug 25 09:28:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448631497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.2448631497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.1028946444 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 168275424 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:28:18 AM UTC 24 |
| Finished | Aug 25 09:28:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1028946444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.1028946444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.2264279256 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 20170230753 ps |
| CPU time | 53.08 seconds |
| Started | Aug 25 09:28:19 AM UTC 24 |
| Finished | Aug 25 09:29:14 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264279256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_resume_link_active.2264279256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.3865760734 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 155586107 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:28:19 AM UTC 24 |
| Finished | Aug 25 09:28:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865760734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.3865760734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.398446536 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 414669997 ps |
| CPU time | 2.38 seconds |
| Started | Aug 25 09:28:19 AM UTC 24 |
| Finished | Aug 25 09:28:23 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=398446536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_rx_full.398446536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.3657742018 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 187271052 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:28:19 AM UTC 24 |
| Finished | Aug 25 09:28:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657742018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.3657742018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.1404595242 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 151148400 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:28:21 AM UTC 24 |
| Finished | Aug 25 09:28:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1404595242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.1404595242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.952476971 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 217614655 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:28:21 AM UTC 24 |
| Finished | Aug 25 09:28:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=952476971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.952476971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.3417237782 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 1839239032 ps |
| CPU time | 61.73 seconds |
| Started | Aug 25 09:28:21 AM UTC 24 |
| Finished | Aug 25 09:29:25 AM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3417237782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.3417237782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.2447890005 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 166378042 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:28:21 AM UTC 24 |
| Finished | Aug 25 09:28:24 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447890005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.2447890005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.1945241436 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 159300512 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:28:21 AM UTC 24 |
| Finished | Aug 25 09:28:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1945241436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.1945241436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.2600998542 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 893510589 ps |
| CPU time | 4.61 seconds |
| Started | Aug 25 09:28:23 AM UTC 24 |
| Finished | Aug 25 09:28:28 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2600998542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.2600998542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.2343231311 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 2243880977 ps |
| CPU time | 78.05 seconds |
| Started | Aug 25 09:28:23 AM UTC 24 |
| Finished | Aug 25 09:29:43 AM UTC 24 |
| Peak memory | 228252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343231311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.2343231311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.465749490 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 3397864616 ps |
| CPU time | 39.61 seconds |
| Started | Aug 25 09:28:00 AM UTC 24 |
| Finished | Aug 25 09:28:41 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=465749490 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.465749490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.630983742 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 427426246 ps |
| CPU time | 2.58 seconds |
| Started | Aug 25 09:28:24 AM UTC 24 |
| Finished | Aug 25 09:28:28 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=630983742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_tx _rx_disruption.630983742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.3124509011 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 278117077 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:42:45 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3124509011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.3124509011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.2985811484 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 458773196 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:42:45 AM UTC 24 |
| Finished | Aug 25 09:42:48 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2985811484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.2985811484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.1376568020 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 781845170 ps |
| CPU time | 3.22 seconds |
| Started | Aug 25 09:42:45 AM UTC 24 |
| Finished | Aug 25 09:42:50 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376568020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.1376568020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.4091215215 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 601589442 ps |
| CPU time | 2.92 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:50 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4091215215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_ tx_rx_disruption.4091215215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.4066236030 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 161988389 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:48 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066236030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.4066236030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.3844291167 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 475246929 ps |
| CPU time | 2.03 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3844291167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.3844291167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.887999283 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 561107473 ps |
| CPU time | 2.84 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:50 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=887999283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.887999283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.3119271512 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 551512646 ps |
| CPU time | 2.09 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3119271512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_ tx_rx_disruption.3119271512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.3343047288 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 293724607 ps |
| CPU time | 1.99 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343047288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.3343047288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.405716395 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 497322726 ps |
| CPU time | 2.65 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:50 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=405716395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_t x_rx_disruption.405716395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.1840465983 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 267429155 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840465983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.1840465983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.50063386 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 519599766 ps |
| CPU time | 2.23 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=50063386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_tx _rx_disruption.50063386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.1082986507 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 591390071 ps |
| CPU time | 2.19 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:50 AM UTC 24 |
| Peak memory | 217684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1082986507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.1082986507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.2191166439 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 635994785 ps |
| CPU time | 2.93 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:50 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2191166439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.2191166439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.312337977 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 171110920 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=312337977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.312337977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.1689610636 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 467882733 ps |
| CPU time | 2.43 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:50 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1689610636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.1689610636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.2446211032 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 619207913 ps |
| CPU time | 2.14 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:50 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446211032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.2446211032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.1940034162 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 611188575 ps |
| CPU time | 2.48 seconds |
| Started | Aug 25 09:42:46 AM UTC 24 |
| Finished | Aug 25 09:42:50 AM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1940034162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.1940034162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.3473107543 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 525039748 ps |
| CPU time | 2.16 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:52 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3473107543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_ tx_rx_disruption.3473107543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.3472143272 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 34827628 ps |
| CPU time | 0.94 seconds |
| Started | Aug 25 09:28:53 AM UTC 24 |
| Finished | Aug 25 09:28:56 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472143272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.3472143272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.4161399069 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 4453248501 ps |
| CPU time | 15 seconds |
| Started | Aug 25 09:28:25 AM UTC 24 |
| Finished | Aug 25 09:28:41 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161399069 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.4161399069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.217692778 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 15907310672 ps |
| CPU time | 37.89 seconds |
| Started | Aug 25 09:28:25 AM UTC 24 |
| Finished | Aug 25 09:29:04 AM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=217692778 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.217692778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.1191856696 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 175861347 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:28:25 AM UTC 24 |
| Finished | Aug 25 09:28:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1191856696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_av_buffer.1191856696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.4061838119 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 149384019 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:28:26 AM UTC 24 |
| Finished | Aug 25 09:28:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061838119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.4061838119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.749906218 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 293608894 ps |
| CPU time | 2.02 seconds |
| Started | Aug 25 09:28:27 AM UTC 24 |
| Finished | Aug 25 09:28:30 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=749906218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_data_toggle_clear.749906218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.163933188 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 318382655 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:28:27 AM UTC 24 |
| Finished | Aug 25 09:28:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=163933188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.163933188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.1862692830 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 32501465458 ps |
| CPU time | 89.1 seconds |
| Started | Aug 25 09:28:28 AM UTC 24 |
| Finished | Aug 25 09:30:00 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1862692830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.1862692830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.3324047184 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 746220264 ps |
| CPU time | 20.7 seconds |
| Started | Aug 25 09:28:28 AM UTC 24 |
| Finished | Aug 25 09:28:51 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324047184 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.3324047184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.466516289 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 642721494 ps |
| CPU time | 3 seconds |
| Started | Aug 25 09:28:30 AM UTC 24 |
| Finished | Aug 25 09:28:34 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=466516289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_disable_endpoint.466516289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.1774691381 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 202530490 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:28:30 AM UTC 24 |
| Finished | Aug 25 09:28:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774691381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.1774691381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_enable.4016098264 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 60413998 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:28:30 AM UTC 24 |
| Finished | Aug 25 09:28:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016098264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_enable.4016098264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.305170474 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 827794967 ps |
| CPU time | 4.18 seconds |
| Started | Aug 25 09:28:32 AM UTC 24 |
| Finished | Aug 25 09:28:37 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=305170474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.305170474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.2149362522 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 550049828 ps |
| CPU time | 2.56 seconds |
| Started | Aug 25 09:28:32 AM UTC 24 |
| Finished | Aug 25 09:28:36 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149362522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.2149362522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.999853494 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 205591245 ps |
| CPU time | 2.63 seconds |
| Started | Aug 25 09:28:32 AM UTC 24 |
| Finished | Aug 25 09:28:36 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=999853494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_fifo_rst.999853494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.4283265177 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 228668998 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:28:33 AM UTC 24 |
| Finished | Aug 25 09:28:36 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283265177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.4283265177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.218697133 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 154197924 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:28:34 AM UTC 24 |
| Finished | Aug 25 09:28:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=218697133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_stall.218697133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.2172456961 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 207184262 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:28:35 AM UTC 24 |
| Finished | Aug 25 09:28:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172456961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.2172456961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.1823917935 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 3101240279 ps |
| CPU time | 112.87 seconds |
| Started | Aug 25 09:28:33 AM UTC 24 |
| Finished | Aug 25 09:30:29 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823917935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.1823917935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.4237699049 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 11575298519 ps |
| CPU time | 107.21 seconds |
| Started | Aug 25 09:28:37 AM UTC 24 |
| Finished | Aug 25 09:30:27 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237699049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.4237699049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.1325184278 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 217529794 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:28:37 AM UTC 24 |
| Finished | Aug 25 09:28:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325184278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_in_err.1325184278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.2557186887 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 9488468517 ps |
| CPU time | 29.92 seconds |
| Started | Aug 25 09:28:37 AM UTC 24 |
| Finished | Aug 25 09:29:08 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2557186887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.2557186887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.3383967403 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 9845752466 ps |
| CPU time | 28.13 seconds |
| Started | Aug 25 09:28:37 AM UTC 24 |
| Finished | Aug 25 09:29:07 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383967403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_link_suspend.3383967403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.3641509935 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 3973070309 ps |
| CPU time | 131.11 seconds |
| Started | Aug 25 09:28:37 AM UTC 24 |
| Finished | Aug 25 09:30:51 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641509935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.3641509935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.3315735102 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 4170113962 ps |
| CPU time | 57.93 seconds |
| Started | Aug 25 09:28:39 AM UTC 24 |
| Finished | Aug 25 09:29:39 AM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315735102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.3315735102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.911457292 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 243472562 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:28:39 AM UTC 24 |
| Finished | Aug 25 09:28:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=911457292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.911457292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.3701834867 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 202732585 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:28:39 AM UTC 24 |
| Finished | Aug 25 09:28:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701834867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.3701834867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.365125493 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 3094131038 ps |
| CPU time | 38.47 seconds |
| Started | Aug 25 09:28:39 AM UTC 24 |
| Finished | Aug 25 09:29:19 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=365125493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.365125493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.3105529207 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 2734982414 ps |
| CPU time | 42.84 seconds |
| Started | Aug 25 09:28:39 AM UTC 24 |
| Finished | Aug 25 09:29:24 AM UTC 24 |
| Peak memory | 235240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105529207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.3105529207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.576576013 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 3141499475 ps |
| CPU time | 119.85 seconds |
| Started | Aug 25 09:28:39 AM UTC 24 |
| Finished | Aug 25 09:30:42 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=576576013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.576576013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.885080058 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 152781419 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:28:40 AM UTC 24 |
| Finished | Aug 25 09:28:43 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=885080058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.885080058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.2907984256 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 143066255 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:28:41 AM UTC 24 |
| Finished | Aug 25 09:28:43 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907984256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.2907984256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.3806784238 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 163369923 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:28:42 AM UTC 24 |
| Finished | Aug 25 09:28:44 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806784238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.3806784238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.2640439207 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 175623773 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:28:43 AM UTC 24 |
| Finished | Aug 25 09:28:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640439207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_out_stall.2640439207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.1810824250 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 207144945 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:28:43 AM UTC 24 |
| Finished | Aug 25 09:28:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810824250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.1810824250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.277637735 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 162464841 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:28:43 AM UTC 24 |
| Finished | Aug 25 09:28:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=277637735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pending_in_trans.277637735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.3464575460 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 220606564 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:28:44 AM UTC 24 |
| Finished | Aug 25 09:28:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464575460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.3464575460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.2588679842 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 141732450 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:28:44 AM UTC 24 |
| Finished | Aug 25 09:28:46 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2588679842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.2588679842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.2503319106 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 37547777 ps |
| CPU time | 0.95 seconds |
| Started | Aug 25 09:28:44 AM UTC 24 |
| Finished | Aug 25 09:28:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503319106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.2503319106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.3721248383 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 7033229034 ps |
| CPU time | 33.57 seconds |
| Started | Aug 25 09:28:45 AM UTC 24 |
| Finished | Aug 25 09:29:20 AM UTC 24 |
| Peak memory | 228508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3721248383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_pkt_buffer.3721248383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.1251489086 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 200047378 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:28:46 AM UTC 24 |
| Finished | Aug 25 09:28:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251489086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.1251489086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.2425052417 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 193816756 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:28:46 AM UTC 24 |
| Finished | Aug 25 09:28:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425052417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_pkt_sent.2425052417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.1437783577 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 157463845 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:28:47 AM UTC 24 |
| Finished | Aug 25 09:28:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437783577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.1437783577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.4155242450 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 153815527 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:28:47 AM UTC 24 |
| Finished | Aug 25 09:28:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4155242450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.4155242450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.86486596 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 20172800253 ps |
| CPU time | 47.28 seconds |
| Started | Aug 25 09:28:48 AM UTC 24 |
| Finished | Aug 25 09:29:37 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=86486596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_resume_link_active.86486596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.526448456 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 185278636 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:28:48 AM UTC 24 |
| Finished | Aug 25 09:28:50 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=526448456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_rx_crc_err.526448456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.3723153563 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 268690477 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:28:48 AM UTC 24 |
| Finished | Aug 25 09:28:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723153563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.3723153563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.1226557337 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 157170456 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:28:49 AM UTC 24 |
| Finished | Aug 25 09:28:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226557337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.1226557337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.2101227497 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 143710670 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:28:50 AM UTC 24 |
| Finished | Aug 25 09:28:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101227497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.2101227497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.283688810 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 242151812 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:28:52 AM UTC 24 |
| Finished | Aug 25 09:28:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=283688810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.283688810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.2716858033 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 1828766501 ps |
| CPU time | 64.72 seconds |
| Started | Aug 25 09:28:52 AM UTC 24 |
| Finished | Aug 25 09:29:59 AM UTC 24 |
| Peak memory | 235256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716858033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.2716858033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.2460972521 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 157417513 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:28:52 AM UTC 24 |
| Finished | Aug 25 09:28:55 AM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460972521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.2460972521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.1993179385 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 203119113 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:28:52 AM UTC 24 |
| Finished | Aug 25 09:28:55 AM UTC 24 |
| Peak memory | 216052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1993179385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_stall_trans.1993179385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.2908662427 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 1153490328 ps |
| CPU time | 5.25 seconds |
| Started | Aug 25 09:28:52 AM UTC 24 |
| Finished | Aug 25 09:28:59 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2908662427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.2908662427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.275114633 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 2477546234 ps |
| CPU time | 31.77 seconds |
| Started | Aug 25 09:28:52 AM UTC 24 |
| Finished | Aug 25 09:29:26 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=275114633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_streaming_out.275114633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.3614392612 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 5208554407 ps |
| CPU time | 61.44 seconds |
| Started | Aug 25 09:28:30 AM UTC 24 |
| Finished | Aug 25 09:29:33 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3614392612 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.3614392612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.916315430 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 499754137 ps |
| CPU time | 2.64 seconds |
| Started | Aug 25 09:28:52 AM UTC 24 |
| Finished | Aug 25 09:28:56 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=916315430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_tx _rx_disruption.916315430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.1564340728 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 280073749 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564340728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.1564340728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.587988631 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 652803684 ps |
| CPU time | 3.2 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:53 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=587988631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_t x_rx_disruption.587988631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.1937331811 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 228870193 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1937331811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.1937331811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.482684869 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 480450074 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:52 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=482684869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.482684869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.2363168755 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 654282046 ps |
| CPU time | 3.31 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:54 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2363168755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_ tx_rx_disruption.2363168755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.814643224 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 436791507 ps |
| CPU time | 2.29 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:53 AM UTC 24 |
| Peak memory | 218192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=814643224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_t x_rx_disruption.814643224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.2198918902 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 498420652 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2198918902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_ tx_rx_disruption.2198918902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.3948901249 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 297935040 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948901249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.3948901249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.252007734 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 624303506 ps |
| CPU time | 2.36 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:53 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=252007734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_t x_rx_disruption.252007734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.2948932596 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 488762435 ps |
| CPU time | 1.99 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2948932596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.2948932596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.3325273197 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 564772996 ps |
| CPU time | 2.05 seconds |
| Started | Aug 25 09:42:49 AM UTC 24 |
| Finished | Aug 25 09:42:53 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3325273197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_ tx_rx_disruption.3325273197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.3967099394 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 608524209 ps |
| CPU time | 3.3 seconds |
| Started | Aug 25 09:42:50 AM UTC 24 |
| Finished | Aug 25 09:42:54 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3967099394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.3967099394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.3731679994 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 554729059 ps |
| CPU time | 2.31 seconds |
| Started | Aug 25 09:42:50 AM UTC 24 |
| Finished | Aug 25 09:42:53 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3731679994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_ tx_rx_disruption.3731679994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.3774392859 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 401210234 ps |
| CPU time | 2.28 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:56 AM UTC 24 |
| Peak memory | 217944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3774392859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_ tx_rx_disruption.3774392859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.226044444 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 826060310 ps |
| CPU time | 2.39 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:56 AM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=226044444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.226044444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.1129029275 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 555589017 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1129029275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.1129029275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.2019224369 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 35917372 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:29:25 AM UTC 24 |
| Finished | Aug 25 09:29:28 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019224369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.2019224369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.1504867680 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 8993325233 ps |
| CPU time | 18.69 seconds |
| Started | Aug 25 09:28:54 AM UTC 24 |
| Finished | Aug 25 09:29:14 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1504867680 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.1504867680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.2417500627 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 21110054758 ps |
| CPU time | 48.13 seconds |
| Started | Aug 25 09:28:54 AM UTC 24 |
| Finished | Aug 25 09:29:44 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417500627 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.2417500627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.248204774 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 26222479570 ps |
| CPU time | 73.89 seconds |
| Started | Aug 25 09:28:55 AM UTC 24 |
| Finished | Aug 25 09:30:11 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=248204774 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.248204774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.197111366 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 189913776 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:28:56 AM UTC 24 |
| Finished | Aug 25 09:28:59 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197111366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_av_buffer.197111366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.2873753045 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 154471010 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:28:56 AM UTC 24 |
| Finished | Aug 25 09:28:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2873753045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_bitstuff_err.2873753045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.211230658 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 330584240 ps |
| CPU time | 2.28 seconds |
| Started | Aug 25 09:28:56 AM UTC 24 |
| Finished | Aug 25 09:29:00 AM UTC 24 |
| Peak memory | 217920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211230658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_data_toggle_clear.211230658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.3501353401 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 747904548 ps |
| CPU time | 3.22 seconds |
| Started | Aug 25 09:28:56 AM UTC 24 |
| Finished | Aug 25 09:29:01 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3501353401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.3501353401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.1120471394 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 49220301816 ps |
| CPU time | 141.21 seconds |
| Started | Aug 25 09:28:56 AM UTC 24 |
| Finished | Aug 25 09:31:21 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1120471394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_address.1120471394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.3376415825 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 2427539969 ps |
| CPU time | 24.3 seconds |
| Started | Aug 25 09:28:58 AM UTC 24 |
| Finished | Aug 25 09:29:23 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376415825 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.3376415825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.3495651033 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 575324099 ps |
| CPU time | 2.87 seconds |
| Started | Aug 25 09:29:00 AM UTC 24 |
| Finished | Aug 25 09:29:04 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495651033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.3495651033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.2608102223 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 155385286 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:29:00 AM UTC 24 |
| Finished | Aug 25 09:29:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608102223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_disconnected.2608102223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_enable.1684318094 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 83401110 ps |
| CPU time | 1.18 seconds |
| Started | Aug 25 09:29:01 AM UTC 24 |
| Finished | Aug 25 09:29:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684318094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_enable.1684318094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.108746022 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 874781515 ps |
| CPU time | 3.24 seconds |
| Started | Aug 25 09:29:02 AM UTC 24 |
| Finished | Aug 25 09:29:07 AM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108746022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.108746022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.3869846012 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 401172394 ps |
| CPU time | 2.37 seconds |
| Started | Aug 25 09:29:03 AM UTC 24 |
| Finished | Aug 25 09:29:07 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3869846012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.3869846012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.3262036252 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 208464578 ps |
| CPU time | 2.62 seconds |
| Started | Aug 25 09:29:03 AM UTC 24 |
| Finished | Aug 25 09:29:07 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262036252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.3262036252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.132368261 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 183674717 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:29:05 AM UTC 24 |
| Finished | Aug 25 09:29:08 AM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=132368261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.132368261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.4134009557 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 133401972 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:29:05 AM UTC 24 |
| Finished | Aug 25 09:29:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134009557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_stall.4134009557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.1088537649 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 194934855 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:29:07 AM UTC 24 |
| Finished | Aug 25 09:29:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088537649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.1088537649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.1840765874 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 2885421745 ps |
| CPU time | 31.83 seconds |
| Started | Aug 25 09:29:05 AM UTC 24 |
| Finished | Aug 25 09:29:38 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840765874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.1840765874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.4194792706 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 9469917466 ps |
| CPU time | 104.83 seconds |
| Started | Aug 25 09:29:07 AM UTC 24 |
| Finished | Aug 25 09:30:54 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194792706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.4194792706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.4180080036 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 187926597 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:29:07 AM UTC 24 |
| Finished | Aug 25 09:29:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4180080036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_in_err.4180080036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.705840632 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 11589979153 ps |
| CPU time | 35.39 seconds |
| Started | Aug 25 09:29:09 AM UTC 24 |
| Finished | Aug 25 09:29:46 AM UTC 24 |
| Peak memory | 218196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=705840632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_link_resume.705840632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.4002743523 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 4494601336 ps |
| CPU time | 11.4 seconds |
| Started | Aug 25 09:29:09 AM UTC 24 |
| Finished | Aug 25 09:29:22 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002743523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_link_suspend.4002743523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.4277344922 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 4380966838 ps |
| CPU time | 63.13 seconds |
| Started | Aug 25 09:29:09 AM UTC 24 |
| Finished | Aug 25 09:30:14 AM UTC 24 |
| Peak memory | 235268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277344922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.4277344922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.476197228 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 2436215381 ps |
| CPU time | 81.94 seconds |
| Started | Aug 25 09:29:09 AM UTC 24 |
| Finished | Aug 25 09:30:33 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=476197228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.476197228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.1093678909 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 292568373 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:29:09 AM UTC 24 |
| Finished | Aug 25 09:29:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1093678909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.1093678909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.4079460570 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 219427753 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:29:09 AM UTC 24 |
| Finished | Aug 25 09:29:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4079460570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.4079460570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.1852983554 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 2131060293 ps |
| CPU time | 77.6 seconds |
| Started | Aug 25 09:29:10 AM UTC 24 |
| Finished | Aug 25 09:30:30 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852983554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.1852983554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.1871741275 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 2404615549 ps |
| CPU time | 87.87 seconds |
| Started | Aug 25 09:29:11 AM UTC 24 |
| Finished | Aug 25 09:30:42 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871741275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.1871741275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.349176970 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 3027751610 ps |
| CPU time | 38.08 seconds |
| Started | Aug 25 09:29:11 AM UTC 24 |
| Finished | Aug 25 09:29:51 AM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=349176970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.349176970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.2752558823 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 188242797 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:29:11 AM UTC 24 |
| Finished | Aug 25 09:29:14 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752558823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.2752558823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.2595876944 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 165686087 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:29:12 AM UTC 24 |
| Finished | Aug 25 09:29:15 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2595876944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.2595876944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.2726343421 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 198093741 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:29:15 AM UTC 24 |
| Finished | Aug 25 09:29:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726343421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_out_iso.2726343421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.3632526939 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 161029368 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:29:15 AM UTC 24 |
| Finished | Aug 25 09:29:18 AM UTC 24 |
| Peak memory | 215988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632526939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_out_stall.3632526939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.3040986371 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 176781902 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:29:15 AM UTC 24 |
| Finished | Aug 25 09:29:18 AM UTC 24 |
| Peak memory | 215992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3040986371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.3040986371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.1866837011 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 153258279 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:29:16 AM UTC 24 |
| Finished | Aug 25 09:29:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866837011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.1866837011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.352025524 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 283665693 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:29:16 AM UTC 24 |
| Finished | Aug 25 09:29:19 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=352025524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.352025524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.166329952 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 148218792 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:29:18 AM UTC 24 |
| Finished | Aug 25 09:29:21 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=166329952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.166329952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.691983518 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 59820343 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:29:19 AM UTC 24 |
| Finished | Aug 25 09:29:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=691983518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_phy_pins_sense.691983518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.3791536119 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 15941661765 ps |
| CPU time | 63.22 seconds |
| Started | Aug 25 09:29:19 AM UTC 24 |
| Finished | Aug 25 09:30:24 AM UTC 24 |
| Peak memory | 228700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3791536119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.3791536119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.700165477 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 145748538 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:29:19 AM UTC 24 |
| Finished | Aug 25 09:29:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=700165477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_pkt_received.700165477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.718500910 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 173789505 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:29:20 AM UTC 24 |
| Finished | Aug 25 09:29:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=718500910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_pkt_sent.718500910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.3080495680 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 157610113 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:29:20 AM UTC 24 |
| Finished | Aug 25 09:29:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080495680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.3080495680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.3446909974 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 197036158 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:29:20 AM UTC 24 |
| Finished | Aug 25 09:29:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446909974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.3446909974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.1216223856 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 20152799223 ps |
| CPU time | 47.67 seconds |
| Started | Aug 25 09:29:22 AM UTC 24 |
| Finished | Aug 25 09:30:11 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216223856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.1216223856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.2937317162 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 169182379 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:29:22 AM UTC 24 |
| Finished | Aug 25 09:29:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937317162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.2937317162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.3728070479 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 338885342 ps |
| CPU time | 2.18 seconds |
| Started | Aug 25 09:29:22 AM UTC 24 |
| Finished | Aug 25 09:29:25 AM UTC 24 |
| Peak memory | 217892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728070479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_rx_full.3728070479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.2534648723 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 167904108 ps |
| CPU time | 0.99 seconds |
| Started | Aug 25 09:29:22 AM UTC 24 |
| Finished | Aug 25 09:29:24 AM UTC 24 |
| Peak memory | 216032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534648723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.2534648723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.201433950 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 176872903 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:29:22 AM UTC 24 |
| Finished | Aug 25 09:29:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201433950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_setup_trans_ignored.201433950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.3211495712 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 308126254 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:29:24 AM UTC 24 |
| Finished | Aug 25 09:29:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211495712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.3211495712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.42559266 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 3170496634 ps |
| CPU time | 32.91 seconds |
| Started | Aug 25 09:29:24 AM UTC 24 |
| Finished | Aug 25 09:29:58 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=42559266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.42559266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.390683664 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 183070368 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:29:24 AM UTC 24 |
| Finished | Aug 25 09:29:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=390683664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.390683664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.1224051254 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 161552338 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:29:24 AM UTC 24 |
| Finished | Aug 25 09:29:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224051254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.1224051254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.2617212452 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 949768998 ps |
| CPU time | 4.66 seconds |
| Started | Aug 25 09:29:25 AM UTC 24 |
| Finished | Aug 25 09:29:31 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2617212452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.2617212452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.1396123703 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 1673821465 ps |
| CPU time | 59.5 seconds |
| Started | Aug 25 09:29:24 AM UTC 24 |
| Finished | Aug 25 09:30:25 AM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396123703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.1396123703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.124584353 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 3934559127 ps |
| CPU time | 47.22 seconds |
| Started | Aug 25 09:29:00 AM UTC 24 |
| Finished | Aug 25 09:29:49 AM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=124584353 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.124584353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.2713762882 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 577339933 ps |
| CPU time | 2.72 seconds |
| Started | Aug 25 09:29:25 AM UTC 24 |
| Finished | Aug 25 09:29:29 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2713762882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.2713762882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.825856890 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 541931896 ps |
| CPU time | 2.23 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:56 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=825856890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.825856890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.984796146 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 499478799 ps |
| CPU time | 2.53 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=984796146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_t x_rx_disruption.984796146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.346626200 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 553564059 ps |
| CPU time | 2.93 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=346626200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_t x_rx_disruption.346626200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.3607201330 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 265851692 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:56 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607201330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.3607201330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.1247204528 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 486719668 ps |
| CPU time | 2.33 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1247204528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_ tx_rx_disruption.1247204528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.339949021 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 214132904 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:56 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=339949021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.339949021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.599365454 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 541947235 ps |
| CPU time | 2.65 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=599365454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_t x_rx_disruption.599365454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.2378310019 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 676766057 ps |
| CPU time | 2.99 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:58 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2378310019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.2378310019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.4203316621 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 174155412 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203316621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.4203316621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.3758551591 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 434291946 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3758551591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.3758551591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.3934726467 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 158447646 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:42:53 AM UTC 24 |
| Finished | Aug 25 09:42:56 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3934726467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.3934726467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.3136124058 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 608514242 ps |
| CPU time | 2.89 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:58 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3136124058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.3136124058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.397166240 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 511460577 ps |
| CPU time | 2.11 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=397166240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_t x_rx_disruption.397166240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.3869141426 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 509373192 ps |
| CPU time | 2.54 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3869141426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.3869141426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.3072017533 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 588287169 ps |
| CPU time | 1.87 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3072017533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.3072017533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.2961930677 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 452980879 ps |
| CPU time | 2.07 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961930677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.2961930677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.441423780 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 515494140 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=441423780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_t x_rx_disruption.441423780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.4232917772 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 44297349 ps |
| CPU time | 0.91 seconds |
| Started | Aug 25 09:29:50 AM UTC 24 |
| Finished | Aug 25 09:29:52 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232917772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.4232917772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.923295180 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 7032790802 ps |
| CPU time | 18.47 seconds |
| Started | Aug 25 09:29:25 AM UTC 24 |
| Finished | Aug 25 09:29:45 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=923295180 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.923295180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.1888825326 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 14756079964 ps |
| CPU time | 35.12 seconds |
| Started | Aug 25 09:29:27 AM UTC 24 |
| Finished | Aug 25 09:30:04 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888825326 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.1888825326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.3453015734 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 28599557527 ps |
| CPU time | 75.57 seconds |
| Started | Aug 25 09:29:27 AM UTC 24 |
| Finished | Aug 25 09:30:45 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453015734 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.3453015734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.1548279197 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 189454730 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:29:27 AM UTC 24 |
| Finished | Aug 25 09:29:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548279197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_av_buffer.1548279197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.1346483434 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 150705556 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:29:27 AM UTC 24 |
| Finished | Aug 25 09:29:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346483434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.1346483434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.3870497388 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 549717011 ps |
| CPU time | 2.84 seconds |
| Started | Aug 25 09:29:27 AM UTC 24 |
| Finished | Aug 25 09:29:31 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3870497388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_data_toggle_clear.3870497388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.2447999978 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 1338641825 ps |
| CPU time | 4.64 seconds |
| Started | Aug 25 09:29:27 AM UTC 24 |
| Finished | Aug 25 09:29:33 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447999978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.2447999978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.1679122239 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 29118794246 ps |
| CPU time | 102.66 seconds |
| Started | Aug 25 09:29:27 AM UTC 24 |
| Finished | Aug 25 09:31:12 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1679122239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.1679122239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.2449276272 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 307261073 ps |
| CPU time | 6.23 seconds |
| Started | Aug 25 09:29:29 AM UTC 24 |
| Finished | Aug 25 09:29:36 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449276272 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.2449276272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.2341583163 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 643883789 ps |
| CPU time | 2.37 seconds |
| Started | Aug 25 09:29:29 AM UTC 24 |
| Finished | Aug 25 09:29:32 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341583163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_disable_endpoint.2341583163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.2055766086 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 165430834 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:29:30 AM UTC 24 |
| Finished | Aug 25 09:29:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055766086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.2055766086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_enable.2762119265 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 34471919 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:29:31 AM UTC 24 |
| Finished | Aug 25 09:29:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2762119265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.2762119265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.3598427194 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 785318159 ps |
| CPU time | 3.42 seconds |
| Started | Aug 25 09:29:31 AM UTC 24 |
| Finished | Aug 25 09:29:35 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598427194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.3598427194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.312090596 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 376107341 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:29:32 AM UTC 24 |
| Finished | Aug 25 09:29:35 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=312090596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.312090596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.2106365889 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 275955984 ps |
| CPU time | 2.66 seconds |
| Started | Aug 25 09:29:32 AM UTC 24 |
| Finished | Aug 25 09:29:36 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106365889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.2106365889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.996598235 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 238259009 ps |
| CPU time | 2.28 seconds |
| Started | Aug 25 09:29:34 AM UTC 24 |
| Finished | Aug 25 09:29:37 AM UTC 24 |
| Peak memory | 228088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=996598235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.996598235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.494212383 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 159056128 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:29:34 AM UTC 24 |
| Finished | Aug 25 09:29:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=494212383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_in_stall.494212383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.618934111 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 158071939 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:29:35 AM UTC 24 |
| Finished | Aug 25 09:29:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=618934111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_in_trans.618934111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.706787917 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 2336999683 ps |
| CPU time | 24.43 seconds |
| Started | Aug 25 09:29:34 AM UTC 24 |
| Finished | Aug 25 09:29:59 AM UTC 24 |
| Peak memory | 228572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=706787917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.706787917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.2116737129 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 12110856568 ps |
| CPU time | 128.85 seconds |
| Started | Aug 25 09:29:35 AM UTC 24 |
| Finished | Aug 25 09:31:47 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116737129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.2116737129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.2614515206 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 257714465 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:29:36 AM UTC 24 |
| Finished | Aug 25 09:29:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614515206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.2614515206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.3280086094 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 9529494644 ps |
| CPU time | 30.66 seconds |
| Started | Aug 25 09:29:36 AM UTC 24 |
| Finished | Aug 25 09:30:08 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3280086094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.3280086094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.104513197 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 9034846024 ps |
| CPU time | 16.83 seconds |
| Started | Aug 25 09:29:38 AM UTC 24 |
| Finished | Aug 25 09:29:56 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=104513197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_suspend.104513197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.3681618182 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 3579608823 ps |
| CPU time | 37.7 seconds |
| Started | Aug 25 09:29:38 AM UTC 24 |
| Finished | Aug 25 09:30:17 AM UTC 24 |
| Peak memory | 235272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681618182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.3681618182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.1174414239 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 3261769293 ps |
| CPU time | 111.2 seconds |
| Started | Aug 25 09:29:38 AM UTC 24 |
| Finished | Aug 25 09:31:32 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174414239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.1174414239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.3341380450 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 258612703 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:29:38 AM UTC 24 |
| Finished | Aug 25 09:29:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3341380450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.3341380450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.54700482 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 186375309 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:29:38 AM UTC 24 |
| Finished | Aug 25 09:29:40 AM UTC 24 |
| Peak memory | 216060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=54700482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.54700482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.1331218204 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 1644480443 ps |
| CPU time | 16.82 seconds |
| Started | Aug 25 09:29:38 AM UTC 24 |
| Finished | Aug 25 09:29:56 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331218204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.1331218204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.1008943315 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 2663412383 ps |
| CPU time | 36.46 seconds |
| Started | Aug 25 09:29:38 AM UTC 24 |
| Finished | Aug 25 09:30:16 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008943315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.1008943315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.2321039520 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 2297678925 ps |
| CPU time | 21.78 seconds |
| Started | Aug 25 09:29:40 AM UTC 24 |
| Finished | Aug 25 09:30:03 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321039520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.2321039520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.2215108703 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 166577008 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:29:40 AM UTC 24 |
| Finished | Aug 25 09:29:42 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215108703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.2215108703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.3385959904 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 151356438 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:29:40 AM UTC 24 |
| Finished | Aug 25 09:29:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385959904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.3385959904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.2191749203 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 175416798 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:29:40 AM UTC 24 |
| Finished | Aug 25 09:29:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191749203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.2191749203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.3106248344 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 228288065 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:29:40 AM UTC 24 |
| Finished | Aug 25 09:29:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106248344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_out_stall.3106248344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.2766994531 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 168096999 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:29:41 AM UTC 24 |
| Finished | Aug 25 09:29:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766994531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.2766994531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.3212404077 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 152960014 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:29:42 AM UTC 24 |
| Finished | Aug 25 09:29:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3212404077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.3212404077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.2381152725 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 199609302 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:29:43 AM UTC 24 |
| Finished | Aug 25 09:29:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381152725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.2381152725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.653000227 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 144664776 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:29:43 AM UTC 24 |
| Finished | Aug 25 09:29:46 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=653000227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.653000227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.3749963392 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 50922536 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:29:44 AM UTC 24 |
| Finished | Aug 25 09:29:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749963392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.3749963392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.1859041025 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 15928051578 ps |
| CPU time | 59.16 seconds |
| Started | Aug 25 09:29:44 AM UTC 24 |
| Finished | Aug 25 09:30:44 AM UTC 24 |
| Peak memory | 228128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1859041025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_pkt_buffer.1859041025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.3290695983 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 189329720 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:29:44 AM UTC 24 |
| Finished | Aug 25 09:29:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290695983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.3290695983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.1011146030 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 230901637 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:29:45 AM UTC 24 |
| Finished | Aug 25 09:29:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011146030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.1011146030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.3516109093 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 173905725 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:29:45 AM UTC 24 |
| Finished | Aug 25 09:29:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516109093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_random_length_in_transaction.3516109093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.1222030206 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 154744238 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:29:45 AM UTC 24 |
| Finished | Aug 25 09:29:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222030206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.1222030206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.2584818745 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 20211161506 ps |
| CPU time | 49.03 seconds |
| Started | Aug 25 09:29:47 AM UTC 24 |
| Finished | Aug 25 09:30:37 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2584818745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.2584818745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.3602117944 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 162128359 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:29:47 AM UTC 24 |
| Finished | Aug 25 09:29:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3602117944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_rx_crc_err.3602117944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.4010651301 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 253117633 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:29:47 AM UTC 24 |
| Finished | Aug 25 09:29:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010651301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_rx_full.4010651301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.3931527518 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 144353599 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:29:47 AM UTC 24 |
| Finished | Aug 25 09:29:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3931527518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.3931527518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.2851031518 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 185834119 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:29:47 AM UTC 24 |
| Finished | Aug 25 09:29:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2851031518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 14.usbdev_setup_trans_ignored.2851031518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.933026706 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 198015585 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:29:48 AM UTC 24 |
| Finished | Aug 25 09:29:51 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=933026706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.933026706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.471489244 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 2836435191 ps |
| CPU time | 31.4 seconds |
| Started | Aug 25 09:29:48 AM UTC 24 |
| Finished | Aug 25 09:30:21 AM UTC 24 |
| Peak memory | 228556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=471489244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.471489244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.470188893 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 195958494 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:29:48 AM UTC 24 |
| Finished | Aug 25 09:29:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=470188893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.470188893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.3949679116 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 180831611 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:29:48 AM UTC 24 |
| Finished | Aug 25 09:29:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949679116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.3949679116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.2290213282 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 703514917 ps |
| CPU time | 3.7 seconds |
| Started | Aug 25 09:29:50 AM UTC 24 |
| Finished | Aug 25 09:29:55 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290213282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.2290213282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.822460487 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 3021856530 ps |
| CPU time | 111.26 seconds |
| Started | Aug 25 09:29:48 AM UTC 24 |
| Finished | Aug 25 09:31:43 AM UTC 24 |
| Peak memory | 228668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=822460487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_streaming_out.822460487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.1447359102 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 835578473 ps |
| CPU time | 7.88 seconds |
| Started | Aug 25 09:29:29 AM UTC 24 |
| Finished | Aug 25 09:29:38 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447359102 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.1447359102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.2967284741 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 658176020 ps |
| CPU time | 2.86 seconds |
| Started | Aug 25 09:29:50 AM UTC 24 |
| Finished | Aug 25 09:29:54 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2967284741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.2967284741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.1571951609 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 213442228 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571951609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.1571951609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.4037223405 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 521162221 ps |
| CPU time | 2.59 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:58 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4037223405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.4037223405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.2240888676 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 459055568 ps |
| CPU time | 2.15 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240888676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.2240888676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.615902888 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 570165156 ps |
| CPU time | 2.24 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=615902888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_t x_rx_disruption.615902888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.1988204562 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 381360597 ps |
| CPU time | 2.16 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988204562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.1988204562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.3231170774 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 597334411 ps |
| CPU time | 2.19 seconds |
| Started | Aug 25 09:42:54 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3231170774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.3231170774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.1184510142 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 306011790 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:42:59 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1184510142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.1184510142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.225585973 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 489285152 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:00 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=225585973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_t x_rx_disruption.225585973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.1895093933 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 498849443 ps |
| CPU time | 2.84 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1895093933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_ tx_rx_disruption.1895093933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.2061078062 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 536177795 ps |
| CPU time | 2.15 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:00 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061078062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.2061078062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.3400382542 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 496573946 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:00 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3400382542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.3400382542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.3913706055 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 317272823 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:00 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3913706055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.3913706055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.3617840579 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 458194032 ps |
| CPU time | 2.02 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:00 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3617840579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.3617840579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.1724085192 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 288151937 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:00 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724085192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.1724085192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.1948602663 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 546058417 ps |
| CPU time | 2.3 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1948602663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.1948602663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.3247708575 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 348268235 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:00 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247708575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.3247708575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.3264435263 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 541846192 ps |
| CPU time | 2.02 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:00 AM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3264435263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.3264435263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.625928961 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 670789552 ps |
| CPU time | 3.24 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:02 AM UTC 24 |
| Peak memory | 217900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=625928961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.625928961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.2551242095 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 524629211 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2551242095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.2551242095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.3191546493 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 46921411 ps |
| CPU time | 0.91 seconds |
| Started | Aug 25 09:30:14 AM UTC 24 |
| Finished | Aug 25 09:30:17 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3191546493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.3191546493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.3696588104 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 11294487261 ps |
| CPU time | 24.47 seconds |
| Started | Aug 25 09:29:50 AM UTC 24 |
| Finished | Aug 25 09:30:16 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3696588104 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.3696588104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.2277105294 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 18670416916 ps |
| CPU time | 52.28 seconds |
| Started | Aug 25 09:29:52 AM UTC 24 |
| Finished | Aug 25 09:30:46 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277105294 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.2277105294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.4015976708 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 24382540817 ps |
| CPU time | 61.39 seconds |
| Started | Aug 25 09:29:52 AM UTC 24 |
| Finished | Aug 25 09:30:55 AM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015976708 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.4015976708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.1326030027 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 207694959 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:29:52 AM UTC 24 |
| Finished | Aug 25 09:29:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326030027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.1326030027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.2360962442 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 146681474 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:29:52 AM UTC 24 |
| Finished | Aug 25 09:29:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360962442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.2360962442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.1979934045 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 364729944 ps |
| CPU time | 2.55 seconds |
| Started | Aug 25 09:29:52 AM UTC 24 |
| Finished | Aug 25 09:29:55 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979934045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.1979934045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.2172870807 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 932761606 ps |
| CPU time | 4.18 seconds |
| Started | Aug 25 09:29:53 AM UTC 24 |
| Finished | Aug 25 09:29:58 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172870807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.2172870807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.1037708556 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 39678452362 ps |
| CPU time | 119.96 seconds |
| Started | Aug 25 09:29:53 AM UTC 24 |
| Finished | Aug 25 09:31:56 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1037708556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.1037708556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.1569861178 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 2978730592 ps |
| CPU time | 32.79 seconds |
| Started | Aug 25 09:29:53 AM UTC 24 |
| Finished | Aug 25 09:30:27 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569861178 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.1569861178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.1137375294 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 657139435 ps |
| CPU time | 2.71 seconds |
| Started | Aug 25 09:29:56 AM UTC 24 |
| Finished | Aug 25 09:29:59 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1137375294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.1137375294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.966109524 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 141226908 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:29:56 AM UTC 24 |
| Finished | Aug 25 09:29:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=966109524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_disconnected.966109524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_enable.4019597018 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 46023741 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:29:56 AM UTC 24 |
| Finished | Aug 25 09:29:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4019597018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_enable.4019597018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.439637480 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 950370516 ps |
| CPU time | 3.99 seconds |
| Started | Aug 25 09:29:58 AM UTC 24 |
| Finished | Aug 25 09:30:03 AM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=439637480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.439637480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.2167389219 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 197386024 ps |
| CPU time | 3.2 seconds |
| Started | Aug 25 09:29:58 AM UTC 24 |
| Finished | Aug 25 09:30:02 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2167389219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.2167389219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.2761262447 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 206714467 ps |
| CPU time | 1.87 seconds |
| Started | Aug 25 09:29:59 AM UTC 24 |
| Finished | Aug 25 09:30:02 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761262447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.2761262447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.4172977821 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 141161615 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:29:59 AM UTC 24 |
| Finished | Aug 25 09:30:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172977821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.4172977821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.709005820 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 251243476 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:29:59 AM UTC 24 |
| Finished | Aug 25 09:30:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709005820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_in_trans.709005820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.206174905 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 4419088611 ps |
| CPU time | 166.16 seconds |
| Started | Aug 25 09:29:58 AM UTC 24 |
| Finished | Aug 25 09:32:47 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=206174905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.206174905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.2392430135 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 10508945783 ps |
| CPU time | 181.2 seconds |
| Started | Aug 25 09:29:59 AM UTC 24 |
| Finished | Aug 25 09:33:04 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2392430135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.2392430135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.2290638315 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 251286745 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:30:01 AM UTC 24 |
| Finished | Aug 25 09:30:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290638315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_in_err.2290638315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.4139934224 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 6254655669 ps |
| CPU time | 16.06 seconds |
| Started | Aug 25 09:30:01 AM UTC 24 |
| Finished | Aug 25 09:30:19 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139934224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_resume.4139934224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.3431780437 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 3590960064 ps |
| CPU time | 12.22 seconds |
| Started | Aug 25 09:30:02 AM UTC 24 |
| Finished | Aug 25 09:30:15 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431780437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.3431780437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.1930191581 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 3857361973 ps |
| CPU time | 47.94 seconds |
| Started | Aug 25 09:30:02 AM UTC 24 |
| Finished | Aug 25 09:30:51 AM UTC 24 |
| Peak memory | 235308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930191581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.1930191581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.1098053991 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 1686789650 ps |
| CPU time | 19.63 seconds |
| Started | Aug 25 09:30:02 AM UTC 24 |
| Finished | Aug 25 09:30:23 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098053991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.1098053991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.3710140612 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 240048050 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:30:03 AM UTC 24 |
| Finished | Aug 25 09:30:06 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710140612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.3710140612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.223255911 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 190936404 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:30:03 AM UTC 24 |
| Finished | Aug 25 09:30:06 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=223255911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.223255911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.1382163720 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 3053316350 ps |
| CPU time | 43.35 seconds |
| Started | Aug 25 09:30:03 AM UTC 24 |
| Finished | Aug 25 09:30:48 AM UTC 24 |
| Peak memory | 235112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382163720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.1382163720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.3216591182 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 2573038685 ps |
| CPU time | 28.99 seconds |
| Started | Aug 25 09:30:03 AM UTC 24 |
| Finished | Aug 25 09:30:34 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216591182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.3216591182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.4179845445 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 177781033 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:30:03 AM UTC 24 |
| Finished | Aug 25 09:30:06 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4179845445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.4179845445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.1030426329 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 202102314 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:30:05 AM UTC 24 |
| Finished | Aug 25 09:30:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030426329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.1030426329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.2623876564 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 211940897 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:30:05 AM UTC 24 |
| Finished | Aug 25 09:30:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2623876564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_nak_trans.2623876564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.578903643 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 168499374 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:30:05 AM UTC 24 |
| Finished | Aug 25 09:30:07 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=578903643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_out_iso.578903643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.3752325114 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 191491502 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:30:05 AM UTC 24 |
| Finished | Aug 25 09:30:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752325114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.3752325114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.3219960365 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 187750936 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:30:06 AM UTC 24 |
| Finished | Aug 25 09:30:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219960365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_out_trans_nak.3219960365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.2427334945 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 208540067 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:30:06 AM UTC 24 |
| Finished | Aug 25 09:30:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427334945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.2427334945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.951325479 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 233295137 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:30:07 AM UTC 24 |
| Finished | Aug 25 09:30:10 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=951325479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.951325479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.3736727059 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 151590085 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:30:07 AM UTC 24 |
| Finished | Aug 25 09:30:10 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736727059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.3736727059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.3377689702 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 91012929 ps |
| CPU time | 1.18 seconds |
| Started | Aug 25 09:30:10 AM UTC 24 |
| Finished | Aug 25 09:30:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377689702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.3377689702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.3812002974 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 7018308151 ps |
| CPU time | 32.09 seconds |
| Started | Aug 25 09:30:10 AM UTC 24 |
| Finished | Aug 25 09:30:43 AM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3812002974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.3812002974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.2115269415 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 150383756 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:30:10 AM UTC 24 |
| Finished | Aug 25 09:30:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2115269415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_pkt_received.2115269415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.4000149390 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 229045903 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:30:10 AM UTC 24 |
| Finished | Aug 25 09:30:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000149390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_pkt_sent.4000149390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.2932766665 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 266046075 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:30:10 AM UTC 24 |
| Finished | Aug 25 09:30:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932766665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.2932766665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.2573526705 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 165238290 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:30:10 AM UTC 24 |
| Finished | Aug 25 09:30:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573526705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.2573526705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.2795020088 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 20170661368 ps |
| CPU time | 60.45 seconds |
| Started | Aug 25 09:30:10 AM UTC 24 |
| Finished | Aug 25 09:31:12 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2795020088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.2795020088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.3668052630 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 145861233 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:30:10 AM UTC 24 |
| Finished | Aug 25 09:30:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3668052630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.3668052630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.4096138468 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 265277264 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:30:11 AM UTC 24 |
| Finished | Aug 25 09:30:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096138468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.4096138468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.1489339439 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 174574433 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:30:11 AM UTC 24 |
| Finished | Aug 25 09:30:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489339439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.1489339439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.2192339062 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 151845257 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:30:13 AM UTC 24 |
| Finished | Aug 25 09:30:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192339062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.2192339062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.1517733173 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 225076881 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:30:13 AM UTC 24 |
| Finished | Aug 25 09:30:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1517733173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.1517733173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.3405197629 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 2741188973 ps |
| CPU time | 38.49 seconds |
| Started | Aug 25 09:30:13 AM UTC 24 |
| Finished | Aug 25 09:30:53 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3405197629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.3405197629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.4050392360 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 187112884 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:30:13 AM UTC 24 |
| Finished | Aug 25 09:30:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4050392360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.4050392360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.60002128 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 159450738 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:30:14 AM UTC 24 |
| Finished | Aug 25 09:30:17 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=60002128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_stall_trans.60002128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.2154048064 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 1144810556 ps |
| CPU time | 5.32 seconds |
| Started | Aug 25 09:30:14 AM UTC 24 |
| Finished | Aug 25 09:30:21 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154048064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.2154048064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.4029288184 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 2196716360 ps |
| CPU time | 72.41 seconds |
| Started | Aug 25 09:30:14 AM UTC 24 |
| Finished | Aug 25 09:31:29 AM UTC 24 |
| Peak memory | 235104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4029288184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_streaming_out.4029288184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.3898948797 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 616632347 ps |
| CPU time | 15.94 seconds |
| Started | Aug 25 09:29:54 AM UTC 24 |
| Finished | Aug 25 09:30:11 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898948797 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.3898948797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.288088852 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 673299909 ps |
| CPU time | 2.65 seconds |
| Started | Aug 25 09:30:14 AM UTC 24 |
| Finished | Aug 25 09:30:18 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=288088852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_tx _rx_disruption.288088852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.144572504 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 311608963 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:00 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=144572504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.144572504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.2136241670 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 628603924 ps |
| CPU time | 2.77 seconds |
| Started | Aug 25 09:42:57 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2136241670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.2136241670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.1726817954 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 461636936 ps |
| CPU time | 2.17 seconds |
| Started | Aug 25 09:42:58 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726817954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.1726817954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.2442143919 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 523926721 ps |
| CPU time | 2.14 seconds |
| Started | Aug 25 09:42:58 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2442143919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_ tx_rx_disruption.2442143919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.890358439 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 618695411 ps |
| CPU time | 2.45 seconds |
| Started | Aug 25 09:42:58 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=890358439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_t x_rx_disruption.890358439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.3903587450 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 351887637 ps |
| CPU time | 2.22 seconds |
| Started | Aug 25 09:42:58 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903587450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.3903587450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.717218148 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 447742217 ps |
| CPU time | 1.88 seconds |
| Started | Aug 25 09:42:58 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=717218148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_t x_rx_disruption.717218148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.2298420382 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 179133401 ps |
| CPU time | 0.97 seconds |
| Started | Aug 25 09:43:00 AM UTC 24 |
| Finished | Aug 25 09:43:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2298420382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.2298420382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.2798221468 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 572488262 ps |
| CPU time | 1.98 seconds |
| Started | Aug 25 09:43:00 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2798221468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_ tx_rx_disruption.2798221468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.1719824138 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 804172649 ps |
| CPU time | 2.72 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1719824138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_ tx_rx_disruption.1719824138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.1506063538 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 335393537 ps |
| CPU time | 2.03 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506063538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.1506063538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.801262825 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 476397972 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:03 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=801262825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_t x_rx_disruption.801262825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.1000891960 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 525328814 ps |
| CPU time | 2.39 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1000891960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_ tx_rx_disruption.1000891960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.1020509433 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 326006240 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020509433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.1020509433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.3442063059 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 537915926 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3442063059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.3442063059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.2858817192 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 496769388 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2858817192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.2858817192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.3452855942 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 482388995 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3452855942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_ tx_rx_disruption.3452855942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.2460537020 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 68190158 ps |
| CPU time | 1.06 seconds |
| Started | Aug 25 09:30:39 AM UTC 24 |
| Finished | Aug 25 09:30:41 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460537020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.2460537020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.3814867234 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 6474185589 ps |
| CPU time | 20.04 seconds |
| Started | Aug 25 09:30:16 AM UTC 24 |
| Finished | Aug 25 09:30:37 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814867234 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.3814867234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.4123437186 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 18913779899 ps |
| CPU time | 41.24 seconds |
| Started | Aug 25 09:30:16 AM UTC 24 |
| Finished | Aug 25 09:30:59 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123437186 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.4123437186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.2715376199 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 28426453411 ps |
| CPU time | 71.58 seconds |
| Started | Aug 25 09:30:16 AM UTC 24 |
| Finished | Aug 25 09:31:30 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2715376199 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.2715376199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.743154061 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 242029347 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:30:16 AM UTC 24 |
| Finished | Aug 25 09:30:19 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743154061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_av_buffer.743154061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.106460542 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 148324201 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:30:16 AM UTC 24 |
| Finished | Aug 25 09:30:19 AM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=106460542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_bitstuff_err.106460542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.2963892160 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 181691757 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:30:16 AM UTC 24 |
| Finished | Aug 25 09:30:19 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963892160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.2963892160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.2144550279 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 613370049 ps |
| CPU time | 2.48 seconds |
| Started | Aug 25 09:30:18 AM UTC 24 |
| Finished | Aug 25 09:30:21 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2144550279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.2144550279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.3357307089 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 30819682161 ps |
| CPU time | 85.5 seconds |
| Started | Aug 25 09:30:18 AM UTC 24 |
| Finished | Aug 25 09:31:45 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357307089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.3357307089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.4128384413 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 1031101559 ps |
| CPU time | 27.44 seconds |
| Started | Aug 25 09:30:18 AM UTC 24 |
| Finished | Aug 25 09:30:47 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128384413 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.4128384413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.2204239653 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 761131572 ps |
| CPU time | 4.05 seconds |
| Started | Aug 25 09:30:18 AM UTC 24 |
| Finished | Aug 25 09:30:23 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204239653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.2204239653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.4067123855 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 194669154 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:30:19 AM UTC 24 |
| Finished | Aug 25 09:30:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067123855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_disconnected.4067123855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_enable.710808015 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 43098744 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:30:19 AM UTC 24 |
| Finished | Aug 25 09:30:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=710808015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_enable.710808015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.4000822677 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 891061308 ps |
| CPU time | 4.27 seconds |
| Started | Aug 25 09:30:19 AM UTC 24 |
| Finished | Aug 25 09:30:25 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000822677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.4000822677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.2496775246 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 423763569 ps |
| CPU time | 2.15 seconds |
| Started | Aug 25 09:30:19 AM UTC 24 |
| Finished | Aug 25 09:30:23 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496775246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.2496775246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.2253109850 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 244962312 ps |
| CPU time | 2.42 seconds |
| Started | Aug 25 09:30:21 AM UTC 24 |
| Finished | Aug 25 09:30:24 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253109850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.2253109850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.2099720232 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 183792242 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:30:22 AM UTC 24 |
| Finished | Aug 25 09:30:25 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099720232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.2099720232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.4093393130 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 142421647 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:30:22 AM UTC 24 |
| Finished | Aug 25 09:30:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093393130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_stall.4093393130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.1218694898 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 259169057 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:30:22 AM UTC 24 |
| Finished | Aug 25 09:30:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218694898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.1218694898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.471309380 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 4322904731 ps |
| CPU time | 47.85 seconds |
| Started | Aug 25 09:30:21 AM UTC 24 |
| Finished | Aug 25 09:31:10 AM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=471309380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.471309380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.3075173887 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 13202504828 ps |
| CPU time | 200.79 seconds |
| Started | Aug 25 09:30:22 AM UTC 24 |
| Finished | Aug 25 09:33:47 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075173887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.3075173887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.1390875279 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 221274991 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:30:22 AM UTC 24 |
| Finished | Aug 25 09:30:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390875279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_in_err.1390875279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.3404966404 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 33798209642 ps |
| CPU time | 111.24 seconds |
| Started | Aug 25 09:30:24 AM UTC 24 |
| Finished | Aug 25 09:32:17 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404966404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_resume.3404966404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.2896826862 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 9069116525 ps |
| CPU time | 23.63 seconds |
| Started | Aug 25 09:30:24 AM UTC 24 |
| Finished | Aug 25 09:30:49 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896826862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_link_suspend.2896826862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.325814625 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 4529056242 ps |
| CPU time | 49.97 seconds |
| Started | Aug 25 09:30:24 AM UTC 24 |
| Finished | Aug 25 09:31:15 AM UTC 24 |
| Peak memory | 235376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=325814625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.325814625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.1850195419 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 2236831300 ps |
| CPU time | 79.85 seconds |
| Started | Aug 25 09:30:26 AM UTC 24 |
| Finished | Aug 25 09:31:48 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850195419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.1850195419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.1451472394 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 237565544 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:30:26 AM UTC 24 |
| Finished | Aug 25 09:30:28 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1451472394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.1451472394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.4241808411 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 191695790 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:30:26 AM UTC 24 |
| Finished | Aug 25 09:30:28 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4241808411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.4241808411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.2905832950 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 3333079534 ps |
| CPU time | 115.51 seconds |
| Started | Aug 25 09:30:26 AM UTC 24 |
| Finished | Aug 25 09:32:24 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905832950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.2905832950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.3646789639 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 2876179477 ps |
| CPU time | 95.71 seconds |
| Started | Aug 25 09:30:26 AM UTC 24 |
| Finished | Aug 25 09:32:04 AM UTC 24 |
| Peak memory | 228616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3646789639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.3646789639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.1963354236 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 224219799 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:30:26 AM UTC 24 |
| Finished | Aug 25 09:30:28 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963354236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.1963354236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.2945741264 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 152860752 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:30:26 AM UTC 24 |
| Finished | Aug 25 09:30:28 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2945741264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.2945741264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.2290758699 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 238317343 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:30:27 AM UTC 24 |
| Finished | Aug 25 09:30:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290758699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_nak_trans.2290758699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.1101778064 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 166129870 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:30:28 AM UTC 24 |
| Finished | Aug 25 09:30:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101778064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_out_iso.1101778064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.2404541924 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 176461485 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:30:28 AM UTC 24 |
| Finished | Aug 25 09:30:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404541924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.2404541924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.1362514811 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 182038564 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:30:28 AM UTC 24 |
| Finished | Aug 25 09:30:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1362514811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_out_trans_nak.1362514811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.1504481541 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 156918416 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:30:30 AM UTC 24 |
| Finished | Aug 25 09:30:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1504481541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_pending_in_trans.1504481541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.4195289235 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 234731706 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:30:30 AM UTC 24 |
| Finished | Aug 25 09:30:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195289235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.4195289235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.4258736185 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 137835247 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:30:30 AM UTC 24 |
| Finished | Aug 25 09:30:33 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258736185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.4258736185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.2611840188 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 40606254 ps |
| CPU time | 1.05 seconds |
| Started | Aug 25 09:30:30 AM UTC 24 |
| Finished | Aug 25 09:30:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2611840188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.2611840188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.497828144 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 17506404544 ps |
| CPU time | 83.71 seconds |
| Started | Aug 25 09:30:30 AM UTC 24 |
| Finished | Aug 25 09:31:56 AM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=497828144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_pkt_buffer.497828144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.2628849567 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 179185006 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:30:32 AM UTC 24 |
| Finished | Aug 25 09:30:34 AM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628849567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_pkt_received.2628849567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.3163958921 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 207236763 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:30:32 AM UTC 24 |
| Finished | Aug 25 09:30:35 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163958921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.3163958921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.399939261 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 245712264 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:30:32 AM UTC 24 |
| Finished | Aug 25 09:30:35 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=399939261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_random_length_in_transaction.399939261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.3673267074 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 196909447 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:30:32 AM UTC 24 |
| Finished | Aug 25 09:30:35 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673267074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.3673267074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.679093291 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 20164841476 ps |
| CPU time | 61.84 seconds |
| Started | Aug 25 09:30:34 AM UTC 24 |
| Finished | Aug 25 09:31:38 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=679093291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_resume_link_active.679093291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.2782066679 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 141979319 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:30:34 AM UTC 24 |
| Finished | Aug 25 09:30:37 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782066679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.2782066679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.237061927 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 196231209 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:30:34 AM UTC 24 |
| Finished | Aug 25 09:30:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=237061927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_setup_stage.237061927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.4264435704 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 156163773 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:30:34 AM UTC 24 |
| Finished | Aug 25 09:30:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264435704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 16.usbdev_setup_trans_ignored.4264435704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.51974056 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 208196181 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:30:36 AM UTC 24 |
| Finished | Aug 25 09:30:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=51974056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 16.usbdev_smoke.51974056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.1706166691 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 2733897218 ps |
| CPU time | 37.63 seconds |
| Started | Aug 25 09:30:36 AM UTC 24 |
| Finished | Aug 25 09:31:15 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1706166691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.1706166691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.2341501513 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 245613944 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:30:36 AM UTC 24 |
| Finished | Aug 25 09:30:39 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341501513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.2341501513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.3537237625 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 163964961 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:30:36 AM UTC 24 |
| Finished | Aug 25 09:30:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537237625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_stall_trans.3537237625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.3390627867 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 1051320405 ps |
| CPU time | 3.88 seconds |
| Started | Aug 25 09:30:37 AM UTC 24 |
| Finished | Aug 25 09:30:42 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390627867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.3390627867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.3279689405 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 1980471969 ps |
| CPU time | 23.38 seconds |
| Started | Aug 25 09:30:36 AM UTC 24 |
| Finished | Aug 25 09:31:01 AM UTC 24 |
| Peak memory | 235104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3279689405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.3279689405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.234591793 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 1609669377 ps |
| CPU time | 16.66 seconds |
| Started | Aug 25 09:30:18 AM UTC 24 |
| Finished | Aug 25 09:30:36 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=234591793 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.234591793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.6303419 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 497034007 ps |
| CPU time | 2.59 seconds |
| Started | Aug 25 09:30:39 AM UTC 24 |
| Finished | Aug 25 09:30:42 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=6303419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_tx_r x_disruption.6303419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.4153855479 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 186956859 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4153855479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.4153855479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.757925108 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 550285838 ps |
| CPU time | 1.98 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=757925108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_t x_rx_disruption.757925108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.2175670879 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 312504912 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175670879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.2175670879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.189032237 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 503256669 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=189032237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_t x_rx_disruption.189032237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.3069449129 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 525165854 ps |
| CPU time | 2.64 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3069449129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.3069449129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.3804771466 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 577369924 ps |
| CPU time | 2.11 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3804771466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_ tx_rx_disruption.3804771466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.411278341 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 339299411 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=411278341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.411278341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.3882944500 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 565141739 ps |
| CPU time | 2.01 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3882944500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.3882944500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.3632288371 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 418710650 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632288371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.3632288371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.1615685043 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 507415214 ps |
| CPU time | 2.16 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1615685043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_ tx_rx_disruption.1615685043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.1336064130 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 411577970 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336064130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.1336064130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.1749126463 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 515948850 ps |
| CPU time | 2.17 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1749126463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.1749126463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.1155440364 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 253768752 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:43:01 AM UTC 24 |
| Finished | Aug 25 09:43:04 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155440364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.1155440364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.2402660610 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 476613515 ps |
| CPU time | 2.37 seconds |
| Started | Aug 25 09:43:02 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2402660610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.2402660610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.267408224 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 352794085 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:43:02 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=267408224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.267408224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.3972412611 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 639975624 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:43:02 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3972412611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.3972412611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.3346167741 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 615340978 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:43:05 AM UTC 24 |
| Finished | Aug 25 09:43:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3346167741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.3346167741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.3010900599 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 89979852 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:31:03 AM UTC 24 |
| Finished | Aug 25 09:31:05 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3010900599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.3010900599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.1093824047 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 3762718775 ps |
| CPU time | 11.57 seconds |
| Started | Aug 25 09:30:39 AM UTC 24 |
| Finished | Aug 25 09:30:52 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1093824047 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.1093824047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.1524695084 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 15624062273 ps |
| CPU time | 36.98 seconds |
| Started | Aug 25 09:30:39 AM UTC 24 |
| Finished | Aug 25 09:31:17 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1524695084 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.1524695084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.2678496523 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 28650067828 ps |
| CPU time | 72.68 seconds |
| Started | Aug 25 09:30:39 AM UTC 24 |
| Finished | Aug 25 09:31:54 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2678496523 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.2678496523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.2616819497 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 160347782 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:30:40 AM UTC 24 |
| Finished | Aug 25 09:30:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2616819497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.2616819497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.116007805 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 143786437 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:30:40 AM UTC 24 |
| Finished | Aug 25 09:30:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=116007805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_bitstuff_err.116007805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.1701141742 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 293687229 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:30:40 AM UTC 24 |
| Finished | Aug 25 09:30:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1701141742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.1701141742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.1063575998 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 1178346845 ps |
| CPU time | 4.68 seconds |
| Started | Aug 25 09:30:41 AM UTC 24 |
| Finished | Aug 25 09:30:48 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1063575998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.1063575998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.1448240883 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 45253486864 ps |
| CPU time | 130.18 seconds |
| Started | Aug 25 09:30:41 AM UTC 24 |
| Finished | Aug 25 09:32:55 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448240883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.1448240883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.2155479802 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 2521251668 ps |
| CPU time | 29.86 seconds |
| Started | Aug 25 09:30:43 AM UTC 24 |
| Finished | Aug 25 09:31:14 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155479802 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.2155479802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.354815161 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 649756300 ps |
| CPU time | 2.63 seconds |
| Started | Aug 25 09:30:44 AM UTC 24 |
| Finished | Aug 25 09:30:48 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354815161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_disable_endpoint.354815161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.4157418173 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 144072653 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:30:44 AM UTC 24 |
| Finished | Aug 25 09:30:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157418173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_disconnected.4157418173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_enable.2881579567 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 82771869 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:30:45 AM UTC 24 |
| Finished | Aug 25 09:30:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881579567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.2881579567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.2064173610 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 825215378 ps |
| CPU time | 3.57 seconds |
| Started | Aug 25 09:30:45 AM UTC 24 |
| Finished | Aug 25 09:30:50 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064173610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.2064173610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.2673778660 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 181515787 ps |
| CPU time | 2.55 seconds |
| Started | Aug 25 09:30:45 AM UTC 24 |
| Finished | Aug 25 09:30:49 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673778660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.2673778660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.4265232104 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 200494409 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:30:46 AM UTC 24 |
| Finished | Aug 25 09:30:49 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4265232104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.4265232104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.4118154600 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 145241304 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:30:46 AM UTC 24 |
| Finished | Aug 25 09:30:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4118154600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.4118154600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.774621885 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 238418119 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:30:47 AM UTC 24 |
| Finished | Aug 25 09:30:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=774621885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_in_trans.774621885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.930360366 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 4228349758 ps |
| CPU time | 146.54 seconds |
| Started | Aug 25 09:30:46 AM UTC 24 |
| Finished | Aug 25 09:33:16 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=930360366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.930360366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.566115845 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 6393387962 ps |
| CPU time | 59.96 seconds |
| Started | Aug 25 09:30:49 AM UTC 24 |
| Finished | Aug 25 09:31:51 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=566115845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.566115845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.1892189911 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 155731171 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:30:49 AM UTC 24 |
| Finished | Aug 25 09:30:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1892189911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.1892189911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.4209346495 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 25166489414 ps |
| CPU time | 80.51 seconds |
| Started | Aug 25 09:30:49 AM UTC 24 |
| Finished | Aug 25 09:32:13 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4209346495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_resume.4209346495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.189722988 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 5875892662 ps |
| CPU time | 20.91 seconds |
| Started | Aug 25 09:30:49 AM UTC 24 |
| Finished | Aug 25 09:31:12 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=189722988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_suspend.189722988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.1936613848 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 4388425361 ps |
| CPU time | 165.99 seconds |
| Started | Aug 25 09:30:49 AM UTC 24 |
| Finished | Aug 25 09:33:39 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1936613848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.1936613848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.2734004575 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 2524141867 ps |
| CPU time | 24.07 seconds |
| Started | Aug 25 09:30:50 AM UTC 24 |
| Finished | Aug 25 09:31:16 AM UTC 24 |
| Peak memory | 218456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2734004575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.2734004575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.465031276 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 245236267 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:30:50 AM UTC 24 |
| Finished | Aug 25 09:30:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=465031276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.465031276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.4212084055 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 186257655 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:30:50 AM UTC 24 |
| Finished | Aug 25 09:30:53 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212084055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.4212084055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.461918367 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 1992775996 ps |
| CPU time | 64.57 seconds |
| Started | Aug 25 09:30:50 AM UTC 24 |
| Finished | Aug 25 09:31:57 AM UTC 24 |
| Peak memory | 230336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=461918367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.461918367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.2028758982 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 2688720696 ps |
| CPU time | 39.12 seconds |
| Started | Aug 25 09:30:51 AM UTC 24 |
| Finished | Aug 25 09:31:32 AM UTC 24 |
| Peak memory | 228572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028758982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.2028758982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.1565129925 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 166737773 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:30:52 AM UTC 24 |
| Finished | Aug 25 09:30:54 AM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1565129925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.1565129925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.2689380199 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 166959363 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:30:52 AM UTC 24 |
| Finished | Aug 25 09:30:54 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689380199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.2689380199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.3443631006 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 189555530 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:30:53 AM UTC 24 |
| Finished | Aug 25 09:30:56 AM UTC 24 |
| Peak memory | 215964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3443631006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.3443631006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.2599092693 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 161791241 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:30:53 AM UTC 24 |
| Finished | Aug 25 09:30:56 AM UTC 24 |
| Peak memory | 215992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599092693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_out_iso.2599092693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.3507440171 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 193216440 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:30:53 AM UTC 24 |
| Finished | Aug 25 09:30:56 AM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507440171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_out_stall.3507440171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.652839807 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 165251713 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:30:53 AM UTC 24 |
| Finished | Aug 25 09:30:56 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=652839807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_out_trans_nak.652839807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.3223119110 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 148679326 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:30:55 AM UTC 24 |
| Finished | Aug 25 09:30:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3223119110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.3223119110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.3003213659 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 195566974 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:30:55 AM UTC 24 |
| Finished | Aug 25 09:30:58 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003213659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.3003213659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.2169435164 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 149007951 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:30:55 AM UTC 24 |
| Finished | Aug 25 09:30:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2169435164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.2169435164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.4126422500 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 38326540 ps |
| CPU time | 1.03 seconds |
| Started | Aug 25 09:30:55 AM UTC 24 |
| Finished | Aug 25 09:30:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126422500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.4126422500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.164672860 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 18023441904 ps |
| CPU time | 76.26 seconds |
| Started | Aug 25 09:30:56 AM UTC 24 |
| Finished | Aug 25 09:32:15 AM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=164672860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_pkt_buffer.164672860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.3749513309 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 196411781 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:30:56 AM UTC 24 |
| Finished | Aug 25 09:30:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749513309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.3749513309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.2217190916 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 223556376 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:30:56 AM UTC 24 |
| Finished | Aug 25 09:30:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217190916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_pkt_sent.2217190916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.587196426 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 177961020 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:30:58 AM UTC 24 |
| Finished | Aug 25 09:31:01 AM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=587196426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_random_length_in_transaction.587196426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.1962138842 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 159433275 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:30:58 AM UTC 24 |
| Finished | Aug 25 09:31:00 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962138842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.1962138842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.2115607355 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 20166749385 ps |
| CPU time | 47.52 seconds |
| Started | Aug 25 09:30:58 AM UTC 24 |
| Finished | Aug 25 09:31:47 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2115607355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.2115607355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.3678579314 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 142316506 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:30:58 AM UTC 24 |
| Finished | Aug 25 09:31:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678579314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.3678579314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.2749341170 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 270824421 ps |
| CPU time | 1.88 seconds |
| Started | Aug 25 09:30:58 AM UTC 24 |
| Finished | Aug 25 09:31:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2749341170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.2749341170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.3247727465 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 204256651 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:30:58 AM UTC 24 |
| Finished | Aug 25 09:31:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247727465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.3247727465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.2963556206 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 145756705 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:30:58 AM UTC 24 |
| Finished | Aug 25 09:31:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963556206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.2963556206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.1726389975 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 195500775 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:31:00 AM UTC 24 |
| Finished | Aug 25 09:31:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726389975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.1726389975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.3505912234 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 2193814573 ps |
| CPU time | 70.65 seconds |
| Started | Aug 25 09:31:00 AM UTC 24 |
| Finished | Aug 25 09:32:12 AM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505912234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.3505912234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.3553641764 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 162215687 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:31:00 AM UTC 24 |
| Finished | Aug 25 09:31:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3553641764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.3553641764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.4057354387 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 173035692 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:31:01 AM UTC 24 |
| Finished | Aug 25 09:31:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057354387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.4057354387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.2304283071 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 1360602663 ps |
| CPU time | 5.44 seconds |
| Started | Aug 25 09:31:01 AM UTC 24 |
| Finished | Aug 25 09:31:08 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2304283071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.2304283071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.2814021449 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 2178013950 ps |
| CPU time | 24.38 seconds |
| Started | Aug 25 09:31:01 AM UTC 24 |
| Finished | Aug 25 09:31:27 AM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2814021449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_streaming_out.2814021449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.2819672405 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 3370333642 ps |
| CPU time | 37.62 seconds |
| Started | Aug 25 09:30:44 AM UTC 24 |
| Finished | Aug 25 09:31:24 AM UTC 24 |
| Peak memory | 218436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819672405 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.2819672405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.19938791 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 516964646 ps |
| CPU time | 2.45 seconds |
| Started | Aug 25 09:31:01 AM UTC 24 |
| Finished | Aug 25 09:31:05 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=19938791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_tx_ rx_disruption.19938791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.3400692069 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 519448202 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:43:05 AM UTC 24 |
| Finished | Aug 25 09:43:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400692069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.3400692069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.1196915068 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 498828346 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:43:05 AM UTC 24 |
| Finished | Aug 25 09:43:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1196915068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_ tx_rx_disruption.1196915068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.47989205 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 433737160 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:43:05 AM UTC 24 |
| Finished | Aug 25 09:43:08 AM UTC 24 |
| Peak memory | 216200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=47989205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.47989205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.1458853796 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 622548419 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:43:05 AM UTC 24 |
| Finished | Aug 25 09:43:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1458853796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_ tx_rx_disruption.1458853796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.333567702 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 425905529 ps |
| CPU time | 2.03 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:09 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=333567702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.333567702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.3960698680 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 427546743 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3960698680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_ tx_rx_disruption.3960698680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.2657090550 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 436238271 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2657090550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_ tx_rx_disruption.2657090550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.1948406582 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 255468855 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:08 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1948406582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.1948406582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.3513379550 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 634005932 ps |
| CPU time | 1.82 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3513379550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.3513379550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.1157489065 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 272124758 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1157489065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.1157489065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.56255100 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 623690212 ps |
| CPU time | 2.55 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:10 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=56255100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_tx _rx_disruption.56255100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.2982432800 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 326876104 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982432800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.2982432800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.1910220922 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 393231151 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1910220922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.1910220922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.1632494031 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 659112205 ps |
| CPU time | 2.11 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:09 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632494031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.1632494031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.702646330 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 598478101 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:09 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=702646330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_t x_rx_disruption.702646330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.744991961 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 187446554 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=744991961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.744991961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.80733807 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 651088073 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=80733807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_tx _rx_disruption.80733807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.3604681439 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 241321682 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604681439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.3604681439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.734493572 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 459149685 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=734493572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_t x_rx_disruption.734493572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.183635645 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 49135209 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:31:29 AM UTC 24 |
| Finished | Aug 25 09:31:31 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=183635645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.183635645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.1084551439 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 3890093239 ps |
| CPU time | 13.1 seconds |
| Started | Aug 25 09:31:03 AM UTC 24 |
| Finished | Aug 25 09:31:17 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1084551439 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.1084551439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.270949240 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 15739047675 ps |
| CPU time | 44.45 seconds |
| Started | Aug 25 09:31:03 AM UTC 24 |
| Finished | Aug 25 09:31:49 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=270949240 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.270949240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.4051947675 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 29600329781 ps |
| CPU time | 77.83 seconds |
| Started | Aug 25 09:31:03 AM UTC 24 |
| Finished | Aug 25 09:32:23 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051947675 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.4051947675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.2507190615 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 159283219 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:31:03 AM UTC 24 |
| Finished | Aug 25 09:31:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507190615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.2507190615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.2356894008 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 158477960 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:31:04 AM UTC 24 |
| Finished | Aug 25 09:31:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356894008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.2356894008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.2987652491 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 613245086 ps |
| CPU time | 2.82 seconds |
| Started | Aug 25 09:31:04 AM UTC 24 |
| Finished | Aug 25 09:31:09 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987652491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.2987652491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.4205698548 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 284003813 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:31:05 AM UTC 24 |
| Finished | Aug 25 09:31:09 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4205698548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.4205698548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.942949297 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 51077552763 ps |
| CPU time | 146.06 seconds |
| Started | Aug 25 09:31:06 AM UTC 24 |
| Finished | Aug 25 09:33:35 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942949297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_device_address.942949297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.4048596497 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 326364581 ps |
| CPU time | 6.48 seconds |
| Started | Aug 25 09:31:06 AM UTC 24 |
| Finished | Aug 25 09:31:14 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048596497 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.4048596497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.2408817124 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 774755301 ps |
| CPU time | 3.82 seconds |
| Started | Aug 25 09:31:08 AM UTC 24 |
| Finished | Aug 25 09:31:13 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408817124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.2408817124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.2060032086 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 182724970 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:31:09 AM UTC 24 |
| Finished | Aug 25 09:31:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060032086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.2060032086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_enable.3784282396 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 51141023 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:31:09 AM UTC 24 |
| Finished | Aug 25 09:31:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3784282396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.3784282396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.489162480 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 1067098572 ps |
| CPU time | 4.47 seconds |
| Started | Aug 25 09:31:09 AM UTC 24 |
| Finished | Aug 25 09:31:15 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=489162480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.489162480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.1325543382 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 260701971 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:31:12 AM UTC 24 |
| Finished | Aug 25 09:31:15 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325543382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.1325543382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.359819073 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 310041505 ps |
| CPU time | 3.19 seconds |
| Started | Aug 25 09:31:14 AM UTC 24 |
| Finished | Aug 25 09:31:18 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=359819073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_fifo_rst.359819073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.1388641770 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 219586590 ps |
| CPU time | 2.05 seconds |
| Started | Aug 25 09:31:14 AM UTC 24 |
| Finished | Aug 25 09:31:17 AM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1388641770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.1388641770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.2219710688 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 168212696 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:31:14 AM UTC 24 |
| Finished | Aug 25 09:31:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219710688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.2219710688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.198942551 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 253268840 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:31:14 AM UTC 24 |
| Finished | Aug 25 09:31:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=198942551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_in_trans.198942551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.1228321663 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 3834826760 ps |
| CPU time | 45.89 seconds |
| Started | Aug 25 09:31:14 AM UTC 24 |
| Finished | Aug 25 09:32:01 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1228321663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.1228321663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.1992700653 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 4463831476 ps |
| CPU time | 46.85 seconds |
| Started | Aug 25 09:31:14 AM UTC 24 |
| Finished | Aug 25 09:32:03 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992700653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.1992700653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.658552888 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 266286392 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:31:16 AM UTC 24 |
| Finished | Aug 25 09:31:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=658552888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_link_in_err.658552888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.2074908461 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 26280783792 ps |
| CPU time | 85.26 seconds |
| Started | Aug 25 09:31:16 AM UTC 24 |
| Finished | Aug 25 09:32:43 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2074908461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.2074908461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.534365075 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 10651342673 ps |
| CPU time | 30.06 seconds |
| Started | Aug 25 09:31:16 AM UTC 24 |
| Finished | Aug 25 09:31:47 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=534365075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_suspend.534365075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.1357939116 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 3147824348 ps |
| CPU time | 42.13 seconds |
| Started | Aug 25 09:31:16 AM UTC 24 |
| Finished | Aug 25 09:31:59 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1357939116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.1357939116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.184589165 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 2988197944 ps |
| CPU time | 29.35 seconds |
| Started | Aug 25 09:31:17 AM UTC 24 |
| Finished | Aug 25 09:31:48 AM UTC 24 |
| Peak memory | 230192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=184589165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.184589165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.2337285463 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 248142612 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:31:17 AM UTC 24 |
| Finished | Aug 25 09:31:20 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2337285463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.2337285463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.3202714221 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 229474583 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:31:17 AM UTC 24 |
| Finished | Aug 25 09:31:20 AM UTC 24 |
| Peak memory | 215820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202714221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.3202714221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.881221434 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 3536483193 ps |
| CPU time | 132.12 seconds |
| Started | Aug 25 09:31:17 AM UTC 24 |
| Finished | Aug 25 09:33:33 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=881221434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.881221434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.1798765643 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 2651287627 ps |
| CPU time | 30.15 seconds |
| Started | Aug 25 09:31:17 AM UTC 24 |
| Finished | Aug 25 09:31:49 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798765643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.1798765643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.2782272204 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 192188542 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:31:19 AM UTC 24 |
| Finished | Aug 25 09:31:21 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782272204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.2782272204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.1170248494 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 146759871 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:31:19 AM UTC 24 |
| Finished | Aug 25 09:31:21 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170248494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.1170248494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.2774735362 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 180594845 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:31:19 AM UTC 24 |
| Finished | Aug 25 09:31:21 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774735362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_nak_trans.2774735362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.3114880616 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 195007541 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:31:19 AM UTC 24 |
| Finished | Aug 25 09:31:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114880616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_out_iso.3114880616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.4017833761 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 177019218 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:31:19 AM UTC 24 |
| Finished | Aug 25 09:31:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4017833761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.4017833761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.705925633 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 170758419 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:31:20 AM UTC 24 |
| Finished | Aug 25 09:31:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=705925633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_out_trans_nak.705925633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.3804343237 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 164040862 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:31:21 AM UTC 24 |
| Finished | Aug 25 09:31:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3804343237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.3804343237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.1819355567 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 225664622 ps |
| CPU time | 1.88 seconds |
| Started | Aug 25 09:31:21 AM UTC 24 |
| Finished | Aug 25 09:31:24 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819355567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.1819355567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.2505736490 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 181291837 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:31:23 AM UTC 24 |
| Finished | Aug 25 09:31:26 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505736490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.2505736490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.1099839039 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 41616135 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:31:23 AM UTC 24 |
| Finished | Aug 25 09:31:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099839039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_pins_sense.1099839039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.3872711485 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 20263526085 ps |
| CPU time | 83.31 seconds |
| Started | Aug 25 09:31:23 AM UTC 24 |
| Finished | Aug 25 09:32:49 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872711485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.3872711485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.1523230029 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 198734717 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:31:23 AM UTC 24 |
| Finished | Aug 25 09:31:26 AM UTC 24 |
| Peak memory | 216056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523230029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_pkt_received.1523230029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.2432685335 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 230283392 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:31:24 AM UTC 24 |
| Finished | Aug 25 09:31:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432685335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.2432685335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.1753247766 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 180946664 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:31:24 AM UTC 24 |
| Finished | Aug 25 09:31:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753247766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.1753247766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.1065419601 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 149366879 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:31:24 AM UTC 24 |
| Finished | Aug 25 09:31:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065419601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.1065419601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.6414703 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 20204717519 ps |
| CPU time | 56.91 seconds |
| Started | Aug 25 09:31:24 AM UTC 24 |
| Finished | Aug 25 09:32:22 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6414703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_resume_link_active.6414703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.2809334349 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 149910838 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:31:25 AM UTC 24 |
| Finished | Aug 25 09:31:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809334349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_rx_crc_err.2809334349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.3863103894 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 380646763 ps |
| CPU time | 2.23 seconds |
| Started | Aug 25 09:31:25 AM UTC 24 |
| Finished | Aug 25 09:31:28 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863103894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.3863103894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.2416023801 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 140789475 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:31:25 AM UTC 24 |
| Finished | Aug 25 09:31:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416023801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.2416023801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.1605254747 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 152274976 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:31:26 AM UTC 24 |
| Finished | Aug 25 09:31:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605254747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.1605254747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.1491741301 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 258284693 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:31:28 AM UTC 24 |
| Finished | Aug 25 09:31:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491741301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.1491741301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.4037427720 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 1777307712 ps |
| CPU time | 20.86 seconds |
| Started | Aug 25 09:31:28 AM UTC 24 |
| Finished | Aug 25 09:31:50 AM UTC 24 |
| Peak memory | 228368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037427720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.4037427720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.3867434257 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 195296205 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:31:28 AM UTC 24 |
| Finished | Aug 25 09:31:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867434257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.3867434257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.3829686566 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 160772595 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:31:28 AM UTC 24 |
| Finished | Aug 25 09:31:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829686566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.3829686566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.1595749781 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 459561936 ps |
| CPU time | 2.58 seconds |
| Started | Aug 25 09:31:28 AM UTC 24 |
| Finished | Aug 25 09:31:31 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595749781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.1595749781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.3394738129 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 4308612235 ps |
| CPU time | 167.91 seconds |
| Started | Aug 25 09:31:28 AM UTC 24 |
| Finished | Aug 25 09:34:19 AM UTC 24 |
| Peak memory | 230648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394738129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.3394738129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.3073684699 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 6782666746 ps |
| CPU time | 61.74 seconds |
| Started | Aug 25 09:31:07 AM UTC 24 |
| Finished | Aug 25 09:32:11 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3073684699 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.3073684699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.2142290655 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 428863578 ps |
| CPU time | 2.3 seconds |
| Started | Aug 25 09:31:29 AM UTC 24 |
| Finished | Aug 25 09:31:32 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2142290655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_t x_rx_disruption.2142290655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.1452863589 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 659553826 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452863589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.1452863589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.1933449492 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 618732679 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1933449492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_ tx_rx_disruption.1933449492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.4079699095 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 392577083 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4079699095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.4079699095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.3857909968 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 537251661 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:27 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3857909968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.3857909968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.280117183 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 514007922 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=280117183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.280117183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.2913668131 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 469314146 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2913668131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_ tx_rx_disruption.2913668131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.494316054 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 177291038 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=494316054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.494316054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.4268368023 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 513502540 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:21 AM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4268368023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.4268368023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.902009385 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 401425502 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:10 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=902009385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.902009385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.2434798576 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 480313024 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:43:06 AM UTC 24 |
| Finished | Aug 25 09:43:10 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2434798576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.2434798576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.2363588668 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 491386281 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:43:07 AM UTC 24 |
| Finished | Aug 25 09:43:11 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2363588668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.2363588668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.1687822733 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 147943851 ps |
| CPU time | 1.06 seconds |
| Started | Aug 25 09:43:07 AM UTC 24 |
| Finished | Aug 25 09:43:10 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687822733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.1687822733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.2905334679 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 569157363 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:43:07 AM UTC 24 |
| Finished | Aug 25 09:43:11 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2905334679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_ tx_rx_disruption.2905334679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.473800338 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 201623022 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:43:07 AM UTC 24 |
| Finished | Aug 25 09:43:10 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=473800338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.473800338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.1552133153 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 488732171 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:43:07 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1552133153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_ tx_rx_disruption.1552133153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.1855060936 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 581955711 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:43:07 AM UTC 24 |
| Finished | Aug 25 09:43:27 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1855060936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.1855060936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.870549442 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 584767828 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:43:07 AM UTC 24 |
| Finished | Aug 25 09:43:27 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=870549442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_t x_rx_disruption.870549442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.2838654938 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 36688531 ps |
| CPU time | 0.94 seconds |
| Started | Aug 25 09:31:56 AM UTC 24 |
| Finished | Aug 25 09:31:58 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838654938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.2838654938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.3828073620 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 4620270459 ps |
| CPU time | 12.22 seconds |
| Started | Aug 25 09:31:30 AM UTC 24 |
| Finished | Aug 25 09:31:44 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3828073620 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.3828073620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.25106258 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 19654501119 ps |
| CPU time | 42.65 seconds |
| Started | Aug 25 09:31:31 AM UTC 24 |
| Finished | Aug 25 09:32:15 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=25106258 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.25106258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.2257365664 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 31364005493 ps |
| CPU time | 85.83 seconds |
| Started | Aug 25 09:31:31 AM UTC 24 |
| Finished | Aug 25 09:32:59 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257365664 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.2257365664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.1822542741 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 165988133 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:31:31 AM UTC 24 |
| Finished | Aug 25 09:31:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822542741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.1822542741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.2156300545 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 174606464 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:31:31 AM UTC 24 |
| Finished | Aug 25 09:31:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156300545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.2156300545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.607552560 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 410637890 ps |
| CPU time | 2.32 seconds |
| Started | Aug 25 09:31:32 AM UTC 24 |
| Finished | Aug 25 09:31:36 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=607552560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_data_toggle_clear.607552560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.870229755 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 1304460865 ps |
| CPU time | 6.76 seconds |
| Started | Aug 25 09:31:32 AM UTC 24 |
| Finished | Aug 25 09:31:40 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=870229755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.870229755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.2499417990 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 38172107437 ps |
| CPU time | 113.1 seconds |
| Started | Aug 25 09:31:32 AM UTC 24 |
| Finished | Aug 25 09:33:28 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2499417990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.2499417990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.1763705431 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 307300681 ps |
| CPU time | 6.01 seconds |
| Started | Aug 25 09:31:32 AM UTC 24 |
| Finished | Aug 25 09:31:40 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763705431 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.1763705431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.3400271768 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 1071986808 ps |
| CPU time | 4.71 seconds |
| Started | Aug 25 09:31:33 AM UTC 24 |
| Finished | Aug 25 09:31:40 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400271768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_disable_endpoint.3400271768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.898747263 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 142887962 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:31:34 AM UTC 24 |
| Finished | Aug 25 09:31:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=898747263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_disconnected.898747263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_enable.3163534698 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 62490566 ps |
| CPU time | 1.17 seconds |
| Started | Aug 25 09:31:35 AM UTC 24 |
| Finished | Aug 25 09:31:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163534698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.3163534698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.3654121385 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 962855483 ps |
| CPU time | 4.3 seconds |
| Started | Aug 25 09:31:35 AM UTC 24 |
| Finished | Aug 25 09:31:40 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3654121385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.3654121385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.1278501958 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 282429172 ps |
| CPU time | 2.78 seconds |
| Started | Aug 25 09:31:37 AM UTC 24 |
| Finished | Aug 25 09:31:41 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1278501958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_fifo_rst.1278501958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.3181462652 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 261046719 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:31:39 AM UTC 24 |
| Finished | Aug 25 09:31:42 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181462652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.3181462652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.1844433305 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 167083944 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:31:40 AM UTC 24 |
| Finished | Aug 25 09:31:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1844433305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_stall.1844433305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.1220641979 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 225313374 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:31:40 AM UTC 24 |
| Finished | Aug 25 09:31:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1220641979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.1220641979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.2551271233 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 3342740867 ps |
| CPU time | 118.45 seconds |
| Started | Aug 25 09:31:38 AM UTC 24 |
| Finished | Aug 25 09:33:40 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551271233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.2551271233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.2269627978 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 11599485815 ps |
| CPU time | 182.27 seconds |
| Started | Aug 25 09:31:42 AM UTC 24 |
| Finished | Aug 25 09:34:48 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269627978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.2269627978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.1045986139 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 199948332 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:31:42 AM UTC 24 |
| Finished | Aug 25 09:31:44 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1045986139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_in_err.1045986139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.813223043 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 23880098374 ps |
| CPU time | 64.01 seconds |
| Started | Aug 25 09:31:42 AM UTC 24 |
| Finished | Aug 25 09:32:48 AM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=813223043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_resume.813223043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.1399661259 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 9559258415 ps |
| CPU time | 19.98 seconds |
| Started | Aug 25 09:31:42 AM UTC 24 |
| Finished | Aug 25 09:32:03 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399661259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_link_suspend.1399661259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.4286632861 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 3697196407 ps |
| CPU time | 52.4 seconds |
| Started | Aug 25 09:31:43 AM UTC 24 |
| Finished | Aug 25 09:32:38 AM UTC 24 |
| Peak memory | 228580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4286632861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.4286632861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.3244928637 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 2704112156 ps |
| CPU time | 101.97 seconds |
| Started | Aug 25 09:31:43 AM UTC 24 |
| Finished | Aug 25 09:33:28 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3244928637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.3244928637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.2886627053 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 232014212 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:31:43 AM UTC 24 |
| Finished | Aug 25 09:31:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2886627053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.2886627053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.2318248938 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 213865665 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:31:45 AM UTC 24 |
| Finished | Aug 25 09:31:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318248938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.2318248938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.3383753247 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 2166988057 ps |
| CPU time | 79.37 seconds |
| Started | Aug 25 09:31:45 AM UTC 24 |
| Finished | Aug 25 09:33:06 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383753247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.3383753247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.1310293802 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 2601593541 ps |
| CPU time | 89.77 seconds |
| Started | Aug 25 09:31:46 AM UTC 24 |
| Finished | Aug 25 09:33:18 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310293802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.1310293802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.3504520072 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 184765731 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:31:48 AM UTC 24 |
| Finished | Aug 25 09:31:50 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3504520072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.3504520072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.2760078471 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 145669100 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:31:48 AM UTC 24 |
| Finished | Aug 25 09:31:50 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760078471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.2760078471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.2109708990 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 197026624 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:31:48 AM UTC 24 |
| Finished | Aug 25 09:31:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2109708990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.2109708990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.3033604498 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 197128746 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:31:48 AM UTC 24 |
| Finished | Aug 25 09:31:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3033604498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.3033604498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.131947908 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 180513515 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:31:49 AM UTC 24 |
| Finished | Aug 25 09:31:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=131947908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_out_trans_nak.131947908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.3124347993 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 152430401 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:31:49 AM UTC 24 |
| Finished | Aug 25 09:31:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3124347993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.3124347993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.1951265700 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 249506811 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:31:49 AM UTC 24 |
| Finished | Aug 25 09:31:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1951265700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.1951265700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.593094920 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 145062398 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:31:51 AM UTC 24 |
| Finished | Aug 25 09:31:54 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=593094920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.593094920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.712162213 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 46366675 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:31:51 AM UTC 24 |
| Finished | Aug 25 09:31:53 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=712162213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_phy_pins_sense.712162213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.3016065313 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 11706799894 ps |
| CPU time | 56.53 seconds |
| Started | Aug 25 09:31:51 AM UTC 24 |
| Finished | Aug 25 09:32:49 AM UTC 24 |
| Peak memory | 228572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3016065313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.3016065313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.3338794880 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 169177392 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:31:51 AM UTC 24 |
| Finished | Aug 25 09:31:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3338794880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.3338794880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.1637006734 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 259188169 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:31:51 AM UTC 24 |
| Finished | Aug 25 09:31:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637006734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.1637006734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.3912673910 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 160812326 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:31:51 AM UTC 24 |
| Finished | Aug 25 09:31:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912673910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_random_length_in_transaction.3912673910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.3026955684 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 212540430 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:31:51 AM UTC 24 |
| Finished | Aug 25 09:31:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026955684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.3026955684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.41906351 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 20163524327 ps |
| CPU time | 44.87 seconds |
| Started | Aug 25 09:31:51 AM UTC 24 |
| Finished | Aug 25 09:32:38 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=41906351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_resume_link_active.41906351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.3993948250 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 139766949 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:31:53 AM UTC 24 |
| Finished | Aug 25 09:31:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993948250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.3993948250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.3598293837 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 251576398 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:31:53 AM UTC 24 |
| Finished | Aug 25 09:31:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598293837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.3598293837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.2503527014 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 148492897 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:31:53 AM UTC 24 |
| Finished | Aug 25 09:31:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503527014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_setup_stage.2503527014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.2289013253 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 148200308 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:31:53 AM UTC 24 |
| Finished | Aug 25 09:31:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289013253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.2289013253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.797537763 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 248884799 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:31:53 AM UTC 24 |
| Finished | Aug 25 09:31:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797537763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.797537763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.1365202172 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 2736718887 ps |
| CPU time | 34.71 seconds |
| Started | Aug 25 09:31:54 AM UTC 24 |
| Finished | Aug 25 09:32:31 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365202172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.1365202172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.4106031153 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 165002598 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:31:54 AM UTC 24 |
| Finished | Aug 25 09:31:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106031153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.4106031153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.1218884532 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 180927540 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:31:55 AM UTC 24 |
| Finished | Aug 25 09:31:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218884532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.1218884532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.2397072646 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 921948724 ps |
| CPU time | 4.22 seconds |
| Started | Aug 25 09:31:55 AM UTC 24 |
| Finished | Aug 25 09:32:00 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2397072646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.2397072646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.1452462154 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 3822959984 ps |
| CPU time | 136.07 seconds |
| Started | Aug 25 09:31:55 AM UTC 24 |
| Finished | Aug 25 09:34:14 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452462154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.1452462154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.2147163298 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 1525701656 ps |
| CPU time | 16.62 seconds |
| Started | Aug 25 09:31:33 AM UTC 24 |
| Finished | Aug 25 09:31:52 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147163298 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.2147163298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.2770437178 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 609199568 ps |
| CPU time | 2.6 seconds |
| Started | Aug 25 09:31:55 AM UTC 24 |
| Finished | Aug 25 09:31:58 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2770437178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.2770437178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.396631024 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 527280498 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:43:09 AM UTC 24 |
| Finished | Aug 25 09:43:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=396631024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_t x_rx_disruption.396631024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.1830563991 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 389119970 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:43:09 AM UTC 24 |
| Finished | Aug 25 09:43:12 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830563991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.1830563991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.2644991396 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 586013010 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:43:09 AM UTC 24 |
| Finished | Aug 25 09:43:43 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2644991396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_ tx_rx_disruption.2644991396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.3733661040 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 291067564 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:43:09 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733661040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.3733661040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.1452018947 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 644895170 ps |
| CPU time | 2.08 seconds |
| Started | Aug 25 09:43:09 AM UTC 24 |
| Finished | Aug 25 09:43:43 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1452018947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_ tx_rx_disruption.1452018947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.1501474010 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 662670288 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:43:09 AM UTC 24 |
| Finished | Aug 25 09:43:43 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501474010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.1501474010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.4101924119 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 341778742 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:43:09 AM UTC 24 |
| Finished | Aug 25 09:43:36 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101924119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.4101924119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.3240968563 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 561224793 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:43:09 AM UTC 24 |
| Finished | Aug 25 09:43:36 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3240968563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_ tx_rx_disruption.3240968563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.529355232 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 443084466 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:43:10 AM UTC 24 |
| Finished | Aug 25 09:43:15 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=529355232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.529355232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.3639338292 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 574980729 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:43:10 AM UTC 24 |
| Finished | Aug 25 09:43:15 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3639338292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.3639338292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.1089522426 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 101311210 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:20:35 AM UTC 24 |
| Finished | Aug 25 09:20:37 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089522426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.1089522426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.911068547 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 6595887334 ps |
| CPU time | 15.67 seconds |
| Started | Aug 25 09:18:39 AM UTC 24 |
| Finished | Aug 25 09:18:56 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=911068547 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.911068547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.1105326125 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 19980346932 ps |
| CPU time | 47.96 seconds |
| Started | Aug 25 09:18:42 AM UTC 24 |
| Finished | Aug 25 09:19:31 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105326125 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.1105326125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.3709516601 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 24992285817 ps |
| CPU time | 48.1 seconds |
| Started | Aug 25 09:18:42 AM UTC 24 |
| Finished | Aug 25 09:19:32 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709516601 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.3709516601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.1881751629 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 148613908 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:18:44 AM UTC 24 |
| Finished | Aug 25 09:18:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881751629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.1881751629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.2204966550 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 160467084 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:18:48 AM UTC 24 |
| Finished | Aug 25 09:18:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204966550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.2204966550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.2903464891 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 174793238 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:18:49 AM UTC 24 |
| Finished | Aug 25 09:18:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903464891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.2903464891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.1050351688 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 146471024 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:18:49 AM UTC 24 |
| Finished | Aug 25 09:18:51 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1050351688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.1050351688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.1197219622 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 627165091 ps |
| CPU time | 3.29 seconds |
| Started | Aug 25 09:18:50 AM UTC 24 |
| Finished | Aug 25 09:18:55 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197219622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.1197219622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.3795955206 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 1147499431 ps |
| CPU time | 5.27 seconds |
| Started | Aug 25 09:18:51 AM UTC 24 |
| Finished | Aug 25 09:18:58 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795955206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.3795955206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.718061762 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 39047728881 ps |
| CPU time | 104.71 seconds |
| Started | Aug 25 09:18:51 AM UTC 24 |
| Finished | Aug 25 09:20:38 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=718061762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_device_address.718061762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.3436816210 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 6347386452 ps |
| CPU time | 65.6 seconds |
| Started | Aug 25 09:18:53 AM UTC 24 |
| Finished | Aug 25 09:20:00 AM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436816210 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.3436816210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.986861251 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 714129196 ps |
| CPU time | 3.47 seconds |
| Started | Aug 25 09:18:57 AM UTC 24 |
| Finished | Aug 25 09:19:01 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=986861251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_disable_endpoint.986861251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.1816192872 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 144267875 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:18:58 AM UTC 24 |
| Finished | Aug 25 09:19:00 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1816192872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.1816192872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_enable.3172738910 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 67281235 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:18:59 AM UTC 24 |
| Finished | Aug 25 09:19:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3172738910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_enable.3172738910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.1562762178 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 885869000 ps |
| CPU time | 3.87 seconds |
| Started | Aug 25 09:19:01 AM UTC 24 |
| Finished | Aug 25 09:19:06 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1562762178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.1562762178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.1503750729 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 328617408 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:19:02 AM UTC 24 |
| Finished | Aug 25 09:19:05 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503750729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.1503750729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.1436785233 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 254519415 ps |
| CPU time | 2.42 seconds |
| Started | Aug 25 09:19:02 AM UTC 24 |
| Finished | Aug 25 09:19:06 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436785233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.1436785233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.1842972465 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 99176581700 ps |
| CPU time | 335.15 seconds |
| Started | Aug 25 09:19:05 AM UTC 24 |
| Finished | Aug 25 09:24:46 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1842972465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.1842972465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.3635990599 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 103285730119 ps |
| CPU time | 279.51 seconds |
| Started | Aug 25 09:19:07 AM UTC 24 |
| Finished | Aug 25 09:23:51 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3635990599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_hiclk_max.3635990599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.3113043252 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 121086671596 ps |
| CPU time | 370.37 seconds |
| Started | Aug 25 09:19:08 AM UTC 24 |
| Finished | Aug 25 09:25:25 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113043252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.3113043252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.3350078227 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 93067628089 ps |
| CPU time | 256.96 seconds |
| Started | Aug 25 09:19:08 AM UTC 24 |
| Finished | Aug 25 09:23:29 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3350078227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_loclk_max.3350078227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.1137763918 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 107124772490 ps |
| CPU time | 328.95 seconds |
| Started | Aug 25 09:19:10 AM UTC 24 |
| Finished | Aug 25 09:24:44 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1137763918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.1137763918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.1131763175 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 192002112 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:19:22 AM UTC 24 |
| Finished | Aug 25 09:19:25 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1131763175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.1131763175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.683491731 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 154144343 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:19:25 AM UTC 24 |
| Finished | Aug 25 09:19:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=683491731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_in_stall.683491731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.3338147867 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 172112397 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:19:26 AM UTC 24 |
| Finished | Aug 25 09:19:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3338147867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.3338147867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.3775012640 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 4196330908 ps |
| CPU time | 58.57 seconds |
| Started | Aug 25 09:19:13 AM UTC 24 |
| Finished | Aug 25 09:20:14 AM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3775012640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.3775012640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.565559971 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 4090315439 ps |
| CPU time | 50.56 seconds |
| Started | Aug 25 09:19:28 AM UTC 24 |
| Finished | Aug 25 09:20:21 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=565559971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.565559971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.2414264553 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 184543740 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:19:31 AM UTC 24 |
| Finished | Aug 25 09:19:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414264553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_in_err.2414264553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.510464711 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 6341624453 ps |
| CPU time | 16.69 seconds |
| Started | Aug 25 09:19:33 AM UTC 24 |
| Finished | Aug 25 09:19:51 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=510464711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_suspend.510464711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.2689420634 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 3698296286 ps |
| CPU time | 56.18 seconds |
| Started | Aug 25 09:19:34 AM UTC 24 |
| Finished | Aug 25 09:20:32 AM UTC 24 |
| Peak memory | 230692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689420634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.2689420634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.9517213 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 1773194496 ps |
| CPU time | 25.47 seconds |
| Started | Aug 25 09:19:35 AM UTC 24 |
| Finished | Aug 25 09:20:02 AM UTC 24 |
| Peak memory | 228504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=9517213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.9517213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.996896327 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 248899104 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:19:37 AM UTC 24 |
| Finished | Aug 25 09:19:40 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=996896327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.996896327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.303501428 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 196506650 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:19:40 AM UTC 24 |
| Finished | Aug 25 09:19:43 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=303501428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.303501428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.3919631724 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 2067921661 ps |
| CPU time | 29.79 seconds |
| Started | Aug 25 09:19:40 AM UTC 24 |
| Finished | Aug 25 09:20:12 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3919631724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.3919631724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.665274003 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 2810847008 ps |
| CPU time | 40.96 seconds |
| Started | Aug 25 09:19:43 AM UTC 24 |
| Finished | Aug 25 09:20:25 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=665274003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.665274003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.3622242810 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 1809341554 ps |
| CPU time | 18.6 seconds |
| Started | Aug 25 09:19:44 AM UTC 24 |
| Finished | Aug 25 09:20:04 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3622242810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.3622242810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.1261222356 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 193625976 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:19:46 AM UTC 24 |
| Finished | Aug 25 09:19:48 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261222356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.1261222356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.577288355 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 158866354 ps |
| CPU time | 1.18 seconds |
| Started | Aug 25 09:19:49 AM UTC 24 |
| Finished | Aug 25 09:19:51 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=577288355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.577288355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.2015128946 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 179060780 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:19:52 AM UTC 24 |
| Finished | Aug 25 09:19:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2015128946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.2015128946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.3139403052 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 188927698 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:19:55 AM UTC 24 |
| Finished | Aug 25 09:19:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3139403052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_out_stall.3139403052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.135587425 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 151298692 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:19:55 AM UTC 24 |
| Finished | Aug 25 09:19:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135587425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_out_trans_nak.135587425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.686984098 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 152042308 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:19:59 AM UTC 24 |
| Finished | Aug 25 09:20:01 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=686984098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_pending_in_trans.686984098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.2024290873 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 212083226 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:19:59 AM UTC 24 |
| Finished | Aug 25 09:20:01 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2024290873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.2024290873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.630207199 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 268513865 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:20:01 AM UTC 24 |
| Finished | Aug 25 09:20:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=630207199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.630207199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.2506660633 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 135392802 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:20:02 AM UTC 24 |
| Finished | Aug 25 09:20:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2506660633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.2506660633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.2059734620 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 63723635 ps |
| CPU time | 1.07 seconds |
| Started | Aug 25 09:20:02 AM UTC 24 |
| Finished | Aug 25 09:20:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059734620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.2059734620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.2755561002 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 15794724525 ps |
| CPU time | 66.08 seconds |
| Started | Aug 25 09:20:03 AM UTC 24 |
| Finished | Aug 25 09:21:11 AM UTC 24 |
| Peak memory | 232592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2755561002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.2755561002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.4020190977 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 159047443 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:20:03 AM UTC 24 |
| Finished | Aug 25 09:20:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020190977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.4020190977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.3136458817 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 224138257 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:20:04 AM UTC 24 |
| Finished | Aug 25 09:20:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136458817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.3136458817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.3238088945 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 6289149171 ps |
| CPU time | 96.57 seconds |
| Started | Aug 25 09:20:06 AM UTC 24 |
| Finished | Aug 25 09:21:44 AM UTC 24 |
| Peak memory | 228556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3238088945 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.3238088945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.1521217836 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 5952997279 ps |
| CPU time | 28.27 seconds |
| Started | Aug 25 09:20:08 AM UTC 24 |
| Finished | Aug 25 09:20:38 AM UTC 24 |
| Peak memory | 235252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521217836 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.1521217836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.3672050210 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 251219508 ps |
| CPU time | 1.82 seconds |
| Started | Aug 25 09:20:04 AM UTC 24 |
| Finished | Aug 25 09:20:07 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672050210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.3672050210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.3295810799 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 213616087 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:20:04 AM UTC 24 |
| Finished | Aug 25 09:20:07 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295810799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.3295810799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.2240053000 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 20222975299 ps |
| CPU time | 59.46 seconds |
| Started | Aug 25 09:20:08 AM UTC 24 |
| Finished | Aug 25 09:21:09 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240053000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.2240053000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.4101697354 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 173801630 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:20:08 AM UTC 24 |
| Finished | Aug 25 09:20:11 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101697354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_crc_err.4101697354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.962662896 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 249948235 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:20:11 AM UTC 24 |
| Finished | Aug 25 09:20:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=962662896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_rx_full.962662896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.4162704638 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 187791469 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:20:12 AM UTC 24 |
| Finished | Aug 25 09:20:15 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162704638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.4162704638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.1805845302 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 361529340 ps |
| CPU time | 1.99 seconds |
| Started | Aug 25 09:20:34 AM UTC 24 |
| Finished | Aug 25 09:20:37 AM UTC 24 |
| Peak memory | 250720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1805845302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.1805845302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.1804313595 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 435425679 ps |
| CPU time | 2.16 seconds |
| Started | Aug 25 09:20:15 AM UTC 24 |
| Finished | Aug 25 09:20:18 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1804313595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.1804313595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.1037152077 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 211396141 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:20:15 AM UTC 24 |
| Finished | Aug 25 09:20:17 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1037152077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.1037152077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.1530859705 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 155013884 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:20:16 AM UTC 24 |
| Finished | Aug 25 09:20:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530859705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_setup_stage.1530859705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1620062901 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 174877790 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:20:18 AM UTC 24 |
| Finished | Aug 25 09:20:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620062901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.1620062901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.3467573857 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 220578313 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:20:19 AM UTC 24 |
| Finished | Aug 25 09:20:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467573857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.3467573857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.904118931 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 3527585269 ps |
| CPU time | 49.27 seconds |
| Started | Aug 25 09:20:19 AM UTC 24 |
| Finished | Aug 25 09:21:10 AM UTC 24 |
| Peak memory | 235188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=904118931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.904118931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.2023703562 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 170032887 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:20:21 AM UTC 24 |
| Finished | Aug 25 09:20:24 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2023703562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.2023703562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.4267860534 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 181680169 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:20:23 AM UTC 24 |
| Finished | Aug 25 09:20:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267860534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.4267860534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.897430989 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 1245856728 ps |
| CPU time | 6.32 seconds |
| Started | Aug 25 09:20:25 AM UTC 24 |
| Finished | Aug 25 09:20:32 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=897430989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_stream_len_max.897430989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.3778889894 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 2412159480 ps |
| CPU time | 86.81 seconds |
| Started | Aug 25 09:20:23 AM UTC 24 |
| Finished | Aug 25 09:21:52 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778889894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_streaming_out.3778889894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.2569626182 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 11942804123 ps |
| CPU time | 88.1 seconds |
| Started | Aug 25 09:20:26 AM UTC 24 |
| Finished | Aug 25 09:21:56 AM UTC 24 |
| Peak memory | 235232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2569626182 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.2569626182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.1520760878 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 479224873 ps |
| CPU time | 9.62 seconds |
| Started | Aug 25 09:18:56 AM UTC 24 |
| Finished | Aug 25 09:19:06 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520760878 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.1520760878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.3353643433 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 47512286 ps |
| CPU time | 0.93 seconds |
| Started | Aug 25 09:32:21 AM UTC 24 |
| Finished | Aug 25 09:32:23 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3353643433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.3353643433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.675733562 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 9214355197 ps |
| CPU time | 24.3 seconds |
| Started | Aug 25 09:31:56 AM UTC 24 |
| Finished | Aug 25 09:32:22 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=675733562 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.675733562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.2129186885 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 15812830634 ps |
| CPU time | 35.13 seconds |
| Started | Aug 25 09:31:56 AM UTC 24 |
| Finished | Aug 25 09:32:33 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129186885 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.2129186885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.4294152820 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 30052566763 ps |
| CPU time | 96.51 seconds |
| Started | Aug 25 09:31:59 AM UTC 24 |
| Finished | Aug 25 09:33:38 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294152820 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.4294152820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.1355919118 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 147249526 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:31:59 AM UTC 24 |
| Finished | Aug 25 09:32:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355919118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_av_buffer.1355919118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.1432462293 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 206932274 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:31:59 AM UTC 24 |
| Finished | Aug 25 09:32:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1432462293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_bitstuff_err.1432462293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.3712272013 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 202858672 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:31:59 AM UTC 24 |
| Finished | Aug 25 09:32:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3712272013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.3712272013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.3669227156 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 1145071681 ps |
| CPU time | 4.84 seconds |
| Started | Aug 25 09:31:59 AM UTC 24 |
| Finished | Aug 25 09:32:05 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3669227156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.3669227156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.3544559085 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 22293114356 ps |
| CPU time | 66.55 seconds |
| Started | Aug 25 09:31:59 AM UTC 24 |
| Finished | Aug 25 09:33:08 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544559085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.3544559085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.3288693870 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 2932759563 ps |
| CPU time | 25.92 seconds |
| Started | Aug 25 09:31:59 AM UTC 24 |
| Finished | Aug 25 09:32:26 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3288693870 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.3288693870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.728759394 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 840081904 ps |
| CPU time | 3.36 seconds |
| Started | Aug 25 09:31:59 AM UTC 24 |
| Finished | Aug 25 09:32:04 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=728759394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disable_endpoint.728759394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.834325551 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 148497756 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:32:01 AM UTC 24 |
| Finished | Aug 25 09:32:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=834325551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_disconnected.834325551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_enable.410674 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 31029660 ps |
| CPU time | 0.99 seconds |
| Started | Aug 25 09:32:01 AM UTC 24 |
| Finished | Aug 25 09:32:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=410674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -c m_name 20.usbdev_enable.410674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.651115438 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 930642495 ps |
| CPU time | 3.92 seconds |
| Started | Aug 25 09:32:01 AM UTC 24 |
| Finished | Aug 25 09:32:06 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=651115438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.651115438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.290210380 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 171135203 ps |
| CPU time | 2.23 seconds |
| Started | Aug 25 09:32:02 AM UTC 24 |
| Finished | Aug 25 09:32:05 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=290210380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_fifo_rst.290210380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.2398295031 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 187116097 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:32:04 AM UTC 24 |
| Finished | Aug 25 09:32:06 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398295031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.2398295031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.2117553733 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 147215283 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:32:04 AM UTC 24 |
| Finished | Aug 25 09:32:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117553733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_stall.2117553733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.2824163329 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 184045611 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:32:04 AM UTC 24 |
| Finished | Aug 25 09:32:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2824163329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.2824163329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.978122400 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 2593603840 ps |
| CPU time | 33.55 seconds |
| Started | Aug 25 09:32:02 AM UTC 24 |
| Finished | Aug 25 09:32:37 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=978122400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.978122400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.1703322574 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 5152520455 ps |
| CPU time | 52.18 seconds |
| Started | Aug 25 09:32:04 AM UTC 24 |
| Finished | Aug 25 09:32:58 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703322574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.1703322574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.1741791215 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 255090842 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:32:05 AM UTC 24 |
| Finished | Aug 25 09:32:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741791215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.1741791215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.2252968165 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 4448623670 ps |
| CPU time | 13.63 seconds |
| Started | Aug 25 09:32:05 AM UTC 24 |
| Finished | Aug 25 09:32:20 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252968165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.2252968165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.3764194202 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 11023522084 ps |
| CPU time | 22.76 seconds |
| Started | Aug 25 09:32:05 AM UTC 24 |
| Finished | Aug 25 09:32:29 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764194202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.3764194202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.552068746 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 3349571867 ps |
| CPU time | 44.68 seconds |
| Started | Aug 25 09:32:07 AM UTC 24 |
| Finished | Aug 25 09:32:53 AM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=552068746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.552068746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.2753781752 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 2458314671 ps |
| CPU time | 25.33 seconds |
| Started | Aug 25 09:32:07 AM UTC 24 |
| Finished | Aug 25 09:32:34 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2753781752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.2753781752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.2524891381 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 261503300 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:32:07 AM UTC 24 |
| Finished | Aug 25 09:32:10 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524891381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.2524891381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.4214887286 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 255205041 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:32:07 AM UTC 24 |
| Finished | Aug 25 09:32:10 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214887286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.4214887286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.1788786619 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 3165856007 ps |
| CPU time | 112.57 seconds |
| Started | Aug 25 09:32:07 AM UTC 24 |
| Finished | Aug 25 09:34:02 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788786619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.1788786619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.2934943744 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 3921450269 ps |
| CPU time | 49.91 seconds |
| Started | Aug 25 09:32:07 AM UTC 24 |
| Finished | Aug 25 09:32:59 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2934943744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.2934943744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.983876825 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 175246045 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:32:07 AM UTC 24 |
| Finished | Aug 25 09:32:10 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=983876825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.983876825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.1583252316 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 145820872 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:32:08 AM UTC 24 |
| Finished | Aug 25 09:32:11 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1583252316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.1583252316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.908983925 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 211811704 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:32:11 AM UTC 24 |
| Finished | Aug 25 09:32:13 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=908983925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_out_iso.908983925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.888383384 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 175152134 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:32:11 AM UTC 24 |
| Finished | Aug 25 09:32:13 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=888383384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_out_stall.888383384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.598017539 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 203122872 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:32:11 AM UTC 24 |
| Finished | Aug 25 09:32:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598017539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_out_trans_nak.598017539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.3661902348 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 147201255 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:32:12 AM UTC 24 |
| Finished | Aug 25 09:32:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661902348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.3661902348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.1006226390 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 246403273 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:32:12 AM UTC 24 |
| Finished | Aug 25 09:32:15 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1006226390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.1006226390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.1748516769 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 210014384 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:32:12 AM UTC 24 |
| Finished | Aug 25 09:32:15 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748516769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.1748516769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.2263099843 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 56384058 ps |
| CPU time | 1.17 seconds |
| Started | Aug 25 09:32:13 AM UTC 24 |
| Finished | Aug 25 09:32:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2263099843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.2263099843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.208746685 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 20479551540 ps |
| CPU time | 67.5 seconds |
| Started | Aug 25 09:32:14 AM UTC 24 |
| Finished | Aug 25 09:33:23 AM UTC 24 |
| Peak memory | 228628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208746685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_pkt_buffer.208746685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.3688527983 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 189371615 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:32:14 AM UTC 24 |
| Finished | Aug 25 09:32:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688527983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_pkt_received.3688527983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.2263349204 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 196238991 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:32:15 AM UTC 24 |
| Finished | Aug 25 09:32:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2263349204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.2263349204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.775015247 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 240781690 ps |
| CPU time | 1.92 seconds |
| Started | Aug 25 09:32:15 AM UTC 24 |
| Finished | Aug 25 09:32:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=775015247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_random_length_in_transaction.775015247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.1075463171 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 185927201 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:32:17 AM UTC 24 |
| Finished | Aug 25 09:32:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075463171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.1075463171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.3383570522 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 144551414 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:32:17 AM UTC 24 |
| Finished | Aug 25 09:32:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383570522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_rx_crc_err.3383570522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.2601540110 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 250403228 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:32:17 AM UTC 24 |
| Finished | Aug 25 09:32:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601540110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.2601540110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.240007749 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 163076842 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:32:17 AM UTC 24 |
| Finished | Aug 25 09:32:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=240007749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_setup_stage.240007749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.1911787777 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 148825005 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:32:17 AM UTC 24 |
| Finished | Aug 25 09:32:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1911787777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.1911787777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.2614676057 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 228565820 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:32:17 AM UTC 24 |
| Finished | Aug 25 09:32:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614676057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.2614676057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.3403424919 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 2852101813 ps |
| CPU time | 30.08 seconds |
| Started | Aug 25 09:32:17 AM UTC 24 |
| Finished | Aug 25 09:32:49 AM UTC 24 |
| Peak memory | 230544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403424919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.3403424919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.2593553474 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 186521014 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:32:18 AM UTC 24 |
| Finished | Aug 25 09:32:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593553474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.2593553474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.3040705090 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 173043921 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:32:18 AM UTC 24 |
| Finished | Aug 25 09:32:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3040705090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_stall_trans.3040705090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.4233960854 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 194559526 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:32:21 AM UTC 24 |
| Finished | Aug 25 09:32:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233960854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.4233960854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.2896875365 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 2588839271 ps |
| CPU time | 34.58 seconds |
| Started | Aug 25 09:32:18 AM UTC 24 |
| Finished | Aug 25 09:32:55 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896875365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_streaming_out.2896875365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.837032736 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 621248006 ps |
| CPU time | 6.39 seconds |
| Started | Aug 25 09:31:59 AM UTC 24 |
| Finished | Aug 25 09:32:07 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=837032736 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.837032736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.4098326608 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 497892784 ps |
| CPU time | 2.69 seconds |
| Started | Aug 25 09:32:21 AM UTC 24 |
| Finished | Aug 25 09:32:25 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4098326608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.4098326608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.154449675 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 662614926 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:43:10 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=154449675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_t x_rx_disruption.154449675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.4110736950 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 587900294 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:43:10 AM UTC 24 |
| Finished | Aug 25 09:43:15 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4110736950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_ tx_rx_disruption.4110736950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.244970042 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 698586060 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:43:11 AM UTC 24 |
| Finished | Aug 25 09:43:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=244970042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_t x_rx_disruption.244970042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.1343129145 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 533672319 ps |
| CPU time | 1.99 seconds |
| Started | Aug 25 09:43:11 AM UTC 24 |
| Finished | Aug 25 09:43:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1343129145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.1343129145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.4203822060 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 520265492 ps |
| CPU time | 1.92 seconds |
| Started | Aug 25 09:43:11 AM UTC 24 |
| Finished | Aug 25 09:43:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4203822060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.4203822060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.2403814462 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 660715239 ps |
| CPU time | 1.87 seconds |
| Started | Aug 25 09:43:11 AM UTC 24 |
| Finished | Aug 25 09:43:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2403814462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.2403814462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.2409290705 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 491273794 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:43:11 AM UTC 24 |
| Finished | Aug 25 09:43:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2409290705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.2409290705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.2617727403 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 715557530 ps |
| CPU time | 2.42 seconds |
| Started | Aug 25 09:43:11 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2617727403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.2617727403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.4220286734 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 569138905 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:43:11 AM UTC 24 |
| Finished | Aug 25 09:43:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4220286734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.4220286734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.2803126563 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 693908274 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:43:11 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2803126563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.2803126563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.3964792538 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 30411254 ps |
| CPU time | 0.93 seconds |
| Started | Aug 25 09:32:51 AM UTC 24 |
| Finished | Aug 25 09:32:53 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3964792538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.3964792538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.3210949039 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 10985083549 ps |
| CPU time | 28.77 seconds |
| Started | Aug 25 09:32:21 AM UTC 24 |
| Finished | Aug 25 09:32:51 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210949039 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.3210949039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.2730823964 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 13643714156 ps |
| CPU time | 31.83 seconds |
| Started | Aug 25 09:32:21 AM UTC 24 |
| Finished | Aug 25 09:32:55 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730823964 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.2730823964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.4191759679 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 24185771147 ps |
| CPU time | 61.7 seconds |
| Started | Aug 25 09:32:21 AM UTC 24 |
| Finished | Aug 25 09:33:25 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4191759679 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.4191759679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.1773252156 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 177509695 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:32:23 AM UTC 24 |
| Finished | Aug 25 09:32:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773252156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.1773252156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.1022501672 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 155540495 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:32:23 AM UTC 24 |
| Finished | Aug 25 09:32:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022501672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.1022501672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.703105358 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 193113684 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:32:23 AM UTC 24 |
| Finished | Aug 25 09:32:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=703105358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_data_toggle_clear.703105358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.1962896174 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 44660227150 ps |
| CPU time | 136.06 seconds |
| Started | Aug 25 09:32:24 AM UTC 24 |
| Finished | Aug 25 09:34:43 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962896174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.1962896174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.1000449827 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 3407794065 ps |
| CPU time | 28.96 seconds |
| Started | Aug 25 09:32:24 AM UTC 24 |
| Finished | Aug 25 09:32:55 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1000449827 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.1000449827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.2960445152 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 815423789 ps |
| CPU time | 3.37 seconds |
| Started | Aug 25 09:32:24 AM UTC 24 |
| Finished | Aug 25 09:32:29 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960445152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.2960445152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.4267989176 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 142202024 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:32:25 AM UTC 24 |
| Finished | Aug 25 09:32:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267989176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.4267989176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_enable.819361018 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 54429819 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:32:26 AM UTC 24 |
| Finished | Aug 25 09:32:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=819361018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_enable.819361018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.17383063 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 914887374 ps |
| CPU time | 4.23 seconds |
| Started | Aug 25 09:32:26 AM UTC 24 |
| Finished | Aug 25 09:32:32 AM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17383063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_endpoint_access.17383063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.3635928942 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 327622519 ps |
| CPU time | 2.07 seconds |
| Started | Aug 25 09:32:27 AM UTC 24 |
| Finished | Aug 25 09:32:30 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635928942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.3635928942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.137591952 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 297713138 ps |
| CPU time | 3.45 seconds |
| Started | Aug 25 09:32:27 AM UTC 24 |
| Finished | Aug 25 09:32:31 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=137591952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_fifo_rst.137591952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.2936302372 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 236709861 ps |
| CPU time | 2.04 seconds |
| Started | Aug 25 09:32:29 AM UTC 24 |
| Finished | Aug 25 09:32:32 AM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936302372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.2936302372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.3488386880 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 169578844 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:32:29 AM UTC 24 |
| Finished | Aug 25 09:32:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488386880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_stall.3488386880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.2554140842 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 210830418 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:32:30 AM UTC 24 |
| Finished | Aug 25 09:32:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554140842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.2554140842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.3986872457 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 2447591886 ps |
| CPU time | 85.26 seconds |
| Started | Aug 25 09:32:28 AM UTC 24 |
| Finished | Aug 25 09:33:56 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986872457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.3986872457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.4269123615 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 11359653151 ps |
| CPU time | 107.81 seconds |
| Started | Aug 25 09:32:30 AM UTC 24 |
| Finished | Aug 25 09:34:21 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269123615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.4269123615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.1202806702 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 285948612 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:32:30 AM UTC 24 |
| Finished | Aug 25 09:32:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1202806702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_in_err.1202806702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.445721159 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 15517361709 ps |
| CPU time | 39.76 seconds |
| Started | Aug 25 09:32:32 AM UTC 24 |
| Finished | Aug 25 09:33:14 AM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=445721159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_link_resume.445721159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.879628466 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 11388942097 ps |
| CPU time | 29.55 seconds |
| Started | Aug 25 09:32:32 AM UTC 24 |
| Finished | Aug 25 09:33:03 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879628466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_suspend.879628466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.3959898635 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 5397824122 ps |
| CPU time | 74.52 seconds |
| Started | Aug 25 09:32:32 AM UTC 24 |
| Finished | Aug 25 09:33:49 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959898635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.3959898635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.1311166192 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 4013267560 ps |
| CPU time | 43.57 seconds |
| Started | Aug 25 09:32:32 AM UTC 24 |
| Finished | Aug 25 09:33:18 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1311166192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.1311166192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.3709346574 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 248862810 ps |
| CPU time | 1.92 seconds |
| Started | Aug 25 09:32:33 AM UTC 24 |
| Finished | Aug 25 09:32:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709346574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.3709346574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.573142550 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 199061394 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:32:33 AM UTC 24 |
| Finished | Aug 25 09:32:36 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=573142550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.573142550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.996035496 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 1819107939 ps |
| CPU time | 23.99 seconds |
| Started | Aug 25 09:32:35 AM UTC 24 |
| Finished | Aug 25 09:33:01 AM UTC 24 |
| Peak memory | 234968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=996035496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.996035496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.930363517 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 1612228089 ps |
| CPU time | 55.93 seconds |
| Started | Aug 25 09:32:35 AM UTC 24 |
| Finished | Aug 25 09:33:33 AM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=930363517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.930363517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.1937408753 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 148775917 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:32:35 AM UTC 24 |
| Finished | Aug 25 09:32:38 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1937408753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.1937408753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.2162707901 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 159562085 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:32:35 AM UTC 24 |
| Finished | Aug 25 09:32:38 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162707901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.2162707901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.762068000 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 179246079 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:32:37 AM UTC 24 |
| Finished | Aug 25 09:32:40 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762068000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_nak_trans.762068000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.2503664118 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 220262150 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:32:37 AM UTC 24 |
| Finished | Aug 25 09:32:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503664118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.2503664118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.813034367 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 153439384 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:32:39 AM UTC 24 |
| Finished | Aug 25 09:32:42 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=813034367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_out_stall.813034367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.559781959 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 165165709 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:32:39 AM UTC 24 |
| Finished | Aug 25 09:32:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=559781959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_out_trans_nak.559781959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.1693909698 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 148642700 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:32:39 AM UTC 24 |
| Finished | Aug 25 09:32:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693909698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.1693909698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.3464223193 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 236260752 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:32:39 AM UTC 24 |
| Finished | Aug 25 09:32:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464223193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.3464223193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.2037449795 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 138165407 ps |
| CPU time | 1.13 seconds |
| Started | Aug 25 09:32:39 AM UTC 24 |
| Finished | Aug 25 09:32:42 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037449795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.2037449795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.350792002 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 38076301 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:32:42 AM UTC 24 |
| Finished | Aug 25 09:32:44 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=350792002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_phy_pins_sense.350792002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.2779448028 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 8566443062 ps |
| CPU time | 28.55 seconds |
| Started | Aug 25 09:32:42 AM UTC 24 |
| Finished | Aug 25 09:33:12 AM UTC 24 |
| Peak memory | 235224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779448028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_pkt_buffer.2779448028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.4007250656 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 164330276 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:32:43 AM UTC 24 |
| Finished | Aug 25 09:32:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4007250656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.4007250656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.1236270346 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 173008415 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:32:43 AM UTC 24 |
| Finished | Aug 25 09:32:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1236270346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_pkt_sent.1236270346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.857810097 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 220991510 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:32:43 AM UTC 24 |
| Finished | Aug 25 09:32:46 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=857810097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_random_length_in_transaction.857810097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.2796788726 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 178210005 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:32:43 AM UTC 24 |
| Finished | Aug 25 09:32:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2796788726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.2796788726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.3981156877 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 144190284 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:32:43 AM UTC 24 |
| Finished | Aug 25 09:32:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981156877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.3981156877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.1660412622 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 152184906 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:32:44 AM UTC 24 |
| Finished | Aug 25 09:32:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660412622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_setup_stage.1660412622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.2606474564 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 159118390 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:32:47 AM UTC 24 |
| Finished | Aug 25 09:32:50 AM UTC 24 |
| Peak memory | 215932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2606474564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.2606474564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.3801308221 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 259308411 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:32:47 AM UTC 24 |
| Finished | Aug 25 09:32:50 AM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3801308221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.3801308221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.208546793 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 2425536420 ps |
| CPU time | 84.32 seconds |
| Started | Aug 25 09:32:47 AM UTC 24 |
| Finished | Aug 25 09:34:14 AM UTC 24 |
| Peak memory | 228492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=208546793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.208546793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.469747076 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 174903957 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:32:47 AM UTC 24 |
| Finished | Aug 25 09:32:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=469747076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.469747076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.4283579236 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 201253600 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:32:47 AM UTC 24 |
| Finished | Aug 25 09:32:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283579236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.4283579236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.203827923 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 1086810407 ps |
| CPU time | 4.24 seconds |
| Started | Aug 25 09:32:48 AM UTC 24 |
| Finished | Aug 25 09:32:54 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=203827923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_stream_len_max.203827923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.1291158095 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 1936691658 ps |
| CPU time | 24.26 seconds |
| Started | Aug 25 09:32:48 AM UTC 24 |
| Finished | Aug 25 09:33:14 AM UTC 24 |
| Peak memory | 235104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1291158095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.1291158095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.1448714547 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 2562280904 ps |
| CPU time | 25.09 seconds |
| Started | Aug 25 09:32:24 AM UTC 24 |
| Finished | Aug 25 09:32:51 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448714547 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.1448714547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.3732522498 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 629418988 ps |
| CPU time | 3.36 seconds |
| Started | Aug 25 09:32:49 AM UTC 24 |
| Finished | Aug 25 09:32:53 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3732522498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_t x_rx_disruption.3732522498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.1174059160 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 478079447 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:43:12 AM UTC 24 |
| Finished | Aug 25 09:43:31 AM UTC 24 |
| Peak memory | 217336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1174059160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_ tx_rx_disruption.1174059160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.633665472 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 517815246 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:43:12 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=633665472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_t x_rx_disruption.633665472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.328199915 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 546034345 ps |
| CPU time | 2.13 seconds |
| Started | Aug 25 09:43:12 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=328199915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_t x_rx_disruption.328199915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.1294970811 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 579639664 ps |
| CPU time | 2.47 seconds |
| Started | Aug 25 09:43:12 AM UTC 24 |
| Finished | Aug 25 09:43:43 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1294970811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.1294970811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.3256930542 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 536072207 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:43:12 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3256930542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_ tx_rx_disruption.3256930542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.3043082524 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 570206190 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:43:12 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3043082524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_ tx_rx_disruption.3043082524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.3741003370 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 571254733 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:43:12 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3741003370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.3741003370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.424016674 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 475803200 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:43:12 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=424016674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_t x_rx_disruption.424016674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.1442331686 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 475700298 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:43:12 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1442331686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.1442331686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.1287839164 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 631224544 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:43:13 AM UTC 24 |
| Finished | Aug 25 09:43:27 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1287839164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.1287839164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.2619124364 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 92571020 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:33:11 AM UTC 24 |
| Finished | Aug 25 09:33:13 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2619124364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.2619124364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.3777171601 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 9407517157 ps |
| CPU time | 29.95 seconds |
| Started | Aug 25 09:32:51 AM UTC 24 |
| Finished | Aug 25 09:33:23 AM UTC 24 |
| Peak memory | 218340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777171601 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.3777171601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.3448329354 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 20937127984 ps |
| CPU time | 45.41 seconds |
| Started | Aug 25 09:32:51 AM UTC 24 |
| Finished | Aug 25 09:33:39 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448329354 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.3448329354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.2941184678 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 28560342149 ps |
| CPU time | 68.89 seconds |
| Started | Aug 25 09:32:51 AM UTC 24 |
| Finished | Aug 25 09:34:02 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941184678 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.2941184678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.1414093503 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 176558188 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:32:51 AM UTC 24 |
| Finished | Aug 25 09:32:54 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414093503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.1414093503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.1450004417 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 143897426 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:32:51 AM UTC 24 |
| Finished | Aug 25 09:32:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450004417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_bitstuff_err.1450004417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.2785979537 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 398795386 ps |
| CPU time | 2.09 seconds |
| Started | Aug 25 09:32:51 AM UTC 24 |
| Finished | Aug 25 09:32:55 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785979537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.2785979537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.466491001 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 966032664 ps |
| CPU time | 5.18 seconds |
| Started | Aug 25 09:32:52 AM UTC 24 |
| Finished | Aug 25 09:32:59 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=466491001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.466491001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.927099199 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 32623013005 ps |
| CPU time | 98.4 seconds |
| Started | Aug 25 09:32:52 AM UTC 24 |
| Finished | Aug 25 09:34:34 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=927099199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_device_address.927099199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.594484519 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 6126462611 ps |
| CPU time | 74.77 seconds |
| Started | Aug 25 09:32:54 AM UTC 24 |
| Finished | Aug 25 09:34:11 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=594484519 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.594484519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.3845063876 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 850816433 ps |
| CPU time | 3.84 seconds |
| Started | Aug 25 09:32:56 AM UTC 24 |
| Finished | Aug 25 09:33:01 AM UTC 24 |
| Peak memory | 217472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845063876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.3845063876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.1858867906 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 146044992 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:32:56 AM UTC 24 |
| Finished | Aug 25 09:32:59 AM UTC 24 |
| Peak memory | 215480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858867906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.1858867906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_enable.469765356 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 34873541 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:32:56 AM UTC 24 |
| Finished | Aug 25 09:32:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=469765356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_enable.469765356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.407854023 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 909700600 ps |
| CPU time | 4.21 seconds |
| Started | Aug 25 09:32:56 AM UTC 24 |
| Finished | Aug 25 09:33:02 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=407854023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.407854023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.25281633 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 825715705 ps |
| CPU time | 3.16 seconds |
| Started | Aug 25 09:32:56 AM UTC 24 |
| Finished | Aug 25 09:33:01 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=25281633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.25281633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.2399066924 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 200191723 ps |
| CPU time | 3.03 seconds |
| Started | Aug 25 09:32:56 AM UTC 24 |
| Finished | Aug 25 09:33:01 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399066924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.2399066924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.1077279710 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 245242336 ps |
| CPU time | 1.82 seconds |
| Started | Aug 25 09:32:57 AM UTC 24 |
| Finished | Aug 25 09:33:00 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1077279710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.1077279710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.196330345 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 139160300 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:32:57 AM UTC 24 |
| Finished | Aug 25 09:32:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=196330345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_in_stall.196330345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.431122121 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 179099235 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:32:59 AM UTC 24 |
| Finished | Aug 25 09:33:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=431122121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_in_trans.431122121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.888028929 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 3957131978 ps |
| CPU time | 51.85 seconds |
| Started | Aug 25 09:32:57 AM UTC 24 |
| Finished | Aug 25 09:33:50 AM UTC 24 |
| Peak memory | 230640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=888028929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.888028929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.1104682374 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 8804138395 ps |
| CPU time | 99.93 seconds |
| Started | Aug 25 09:32:59 AM UTC 24 |
| Finished | Aug 25 09:34:41 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1104682374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.1104682374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.3619162040 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 191999805 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:33:00 AM UTC 24 |
| Finished | Aug 25 09:33:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619162040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_in_err.3619162040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.3316275061 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 5437074457 ps |
| CPU time | 11.88 seconds |
| Started | Aug 25 09:33:00 AM UTC 24 |
| Finished | Aug 25 09:33:14 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316275061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.3316275061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.635977822 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 3254322024 ps |
| CPU time | 11.29 seconds |
| Started | Aug 25 09:33:00 AM UTC 24 |
| Finished | Aug 25 09:33:13 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=635977822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_suspend.635977822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.2391892323 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 3027199383 ps |
| CPU time | 27.77 seconds |
| Started | Aug 25 09:33:01 AM UTC 24 |
| Finished | Aug 25 09:33:30 AM UTC 24 |
| Peak memory | 230640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391892323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.2391892323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.3366069773 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 3749245762 ps |
| CPU time | 43.73 seconds |
| Started | Aug 25 09:33:01 AM UTC 24 |
| Finished | Aug 25 09:33:46 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3366069773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.3366069773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.3265869238 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 247272753 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:33:01 AM UTC 24 |
| Finished | Aug 25 09:33:04 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265869238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.3265869238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.647868520 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 198463958 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:33:01 AM UTC 24 |
| Finished | Aug 25 09:33:03 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=647868520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.647868520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.1559432819 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 3540435802 ps |
| CPU time | 49.06 seconds |
| Started | Aug 25 09:33:01 AM UTC 24 |
| Finished | Aug 25 09:33:52 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559432819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.1559432819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.1355203056 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 3108181748 ps |
| CPU time | 36.2 seconds |
| Started | Aug 25 09:33:02 AM UTC 24 |
| Finished | Aug 25 09:33:40 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355203056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.1355203056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.3410528385 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 150685086 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:33:02 AM UTC 24 |
| Finished | Aug 25 09:33:04 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410528385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.3410528385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.1825425486 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 147524320 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:33:02 AM UTC 24 |
| Finished | Aug 25 09:33:05 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1825425486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.1825425486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.1898630451 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 218632075 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:33:02 AM UTC 24 |
| Finished | Aug 25 09:33:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1898630451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.1898630451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.2826571083 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 165340871 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:33:02 AM UTC 24 |
| Finished | Aug 25 09:33:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826571083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_out_iso.2826571083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.724516574 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 186976224 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:33:04 AM UTC 24 |
| Finished | Aug 25 09:33:07 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=724516574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_out_stall.724516574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.1790841448 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 171449402 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:33:04 AM UTC 24 |
| Finished | Aug 25 09:33:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790841448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.1790841448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.16440309 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 152434616 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:33:04 AM UTC 24 |
| Finished | Aug 25 09:33:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=16440309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pending_in_trans.16440309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.3124499469 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 239638559 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:33:06 AM UTC 24 |
| Finished | Aug 25 09:33:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3124499469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.3124499469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.841161430 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 141876354 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:33:06 AM UTC 24 |
| Finished | Aug 25 09:33:08 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=841161430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.841161430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.1968105402 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 49933755 ps |
| CPU time | 1.06 seconds |
| Started | Aug 25 09:33:06 AM UTC 24 |
| Finished | Aug 25 09:33:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968105402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.1968105402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.1237325717 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 10668866849 ps |
| CPU time | 49.27 seconds |
| Started | Aug 25 09:33:06 AM UTC 24 |
| Finished | Aug 25 09:33:57 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1237325717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.1237325717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.567859415 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 200039173 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:33:06 AM UTC 24 |
| Finished | Aug 25 09:33:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567859415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_pkt_received.567859415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.4016473239 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 179218326 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:33:06 AM UTC 24 |
| Finished | Aug 25 09:33:08 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016473239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.4016473239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.255905786 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 213872378 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:33:06 AM UTC 24 |
| Finished | Aug 25 09:33:08 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=255905786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_random_length_in_transaction.255905786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.2043381770 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 184894881 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:33:07 AM UTC 24 |
| Finished | Aug 25 09:33:10 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2043381770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.2043381770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.337265244 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 143022061 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:33:07 AM UTC 24 |
| Finished | Aug 25 09:33:10 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=337265244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_rx_crc_err.337265244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.923549715 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 352856507 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:33:07 AM UTC 24 |
| Finished | Aug 25 09:33:10 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=923549715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_rx_full.923549715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.2339788782 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 146894916 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:33:07 AM UTC 24 |
| Finished | Aug 25 09:33:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339788782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.2339788782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.3486288006 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 144579005 ps |
| CPU time | 1.12 seconds |
| Started | Aug 25 09:33:09 AM UTC 24 |
| Finished | Aug 25 09:33:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486288006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 22.usbdev_setup_trans_ignored.3486288006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.3282175712 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 214255046 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:33:09 AM UTC 24 |
| Finished | Aug 25 09:33:12 AM UTC 24 |
| Peak memory | 216024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282175712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.3282175712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.61815748 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 3981494072 ps |
| CPU time | 145.29 seconds |
| Started | Aug 25 09:33:09 AM UTC 24 |
| Finished | Aug 25 09:35:38 AM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=61815748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.61815748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.3389389341 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 176767624 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:33:09 AM UTC 24 |
| Finished | Aug 25 09:33:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3389389341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.3389389341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.452435972 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 238184112 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:33:09 AM UTC 24 |
| Finished | Aug 25 09:33:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=452435972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_stall_trans.452435972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.369838056 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 491356076 ps |
| CPU time | 2.96 seconds |
| Started | Aug 25 09:33:11 AM UTC 24 |
| Finished | Aug 25 09:33:15 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=369838056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_stream_len_max.369838056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.2549127084 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 1941154928 ps |
| CPU time | 59.53 seconds |
| Started | Aug 25 09:33:09 AM UTC 24 |
| Finished | Aug 25 09:34:11 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549127084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_streaming_out.2549127084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.3686510800 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 145757597 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:32:56 AM UTC 24 |
| Finished | Aug 25 09:32:59 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3686510800 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.3686510800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.2153581847 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 627982682 ps |
| CPU time | 3.18 seconds |
| Started | Aug 25 09:33:11 AM UTC 24 |
| Finished | Aug 25 09:33:15 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2153581847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.2153581847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.1038954906 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 480192553 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:43:13 AM UTC 24 |
| Finished | Aug 25 09:43:17 AM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1038954906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_ tx_rx_disruption.1038954906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.2371107677 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 582471024 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:43:16 AM UTC 24 |
| Finished | Aug 25 09:43:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2371107677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.2371107677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.979164055 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 600626816 ps |
| CPU time | 2.23 seconds |
| Started | Aug 25 09:43:16 AM UTC 24 |
| Finished | Aug 25 09:43:27 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=979164055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_t x_rx_disruption.979164055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.4241499473 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 557942693 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:43:16 AM UTC 24 |
| Finished | Aug 25 09:43:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4241499473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.4241499473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.1633473092 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 609882961 ps |
| CPU time | 2.04 seconds |
| Started | Aug 25 09:43:16 AM UTC 24 |
| Finished | Aug 25 09:43:27 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1633473092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.1633473092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.1043208686 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 559495608 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:43:16 AM UTC 24 |
| Finished | Aug 25 09:43:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1043208686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.1043208686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.2748195850 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 437385745 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:43:16 AM UTC 24 |
| Finished | Aug 25 09:43:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2748195850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_ tx_rx_disruption.2748195850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.1867224100 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 518588009 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:43:17 AM UTC 24 |
| Finished | Aug 25 09:43:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1867224100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_ tx_rx_disruption.1867224100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.704873042 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 458188898 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:43:18 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=704873042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_t x_rx_disruption.704873042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.916473693 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 47575337 ps |
| CPU time | 0.98 seconds |
| Started | Aug 25 09:33:36 AM UTC 24 |
| Finished | Aug 25 09:33:38 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=916473693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.916473693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.821902606 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 10772617512 ps |
| CPU time | 21.7 seconds |
| Started | Aug 25 09:33:12 AM UTC 24 |
| Finished | Aug 25 09:33:35 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=821902606 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.821902606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.3665243538 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 16096326172 ps |
| CPU time | 37.92 seconds |
| Started | Aug 25 09:33:12 AM UTC 24 |
| Finished | Aug 25 09:33:52 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665243538 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.3665243538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.593033881 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 29030798481 ps |
| CPU time | 70.64 seconds |
| Started | Aug 25 09:33:14 AM UTC 24 |
| Finished | Aug 25 09:34:27 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=593033881 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.593033881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.1750116641 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 183132520 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:33:14 AM UTC 24 |
| Finished | Aug 25 09:33:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750116641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_av_buffer.1750116641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.3979548547 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 194288792 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:33:14 AM UTC 24 |
| Finished | Aug 25 09:33:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979548547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_bitstuff_err.3979548547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.1615666345 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 187431662 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:33:14 AM UTC 24 |
| Finished | Aug 25 09:33:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615666345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 23.usbdev_data_toggle_clear.1615666345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.3444701420 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 1008101532 ps |
| CPU time | 4.2 seconds |
| Started | Aug 25 09:33:14 AM UTC 24 |
| Finished | Aug 25 09:33:20 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444701420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.3444701420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.2149820933 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 20886217240 ps |
| CPU time | 74.09 seconds |
| Started | Aug 25 09:33:14 AM UTC 24 |
| Finished | Aug 25 09:34:30 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149820933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.2149820933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.414524464 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 6334723405 ps |
| CPU time | 49.6 seconds |
| Started | Aug 25 09:33:14 AM UTC 24 |
| Finished | Aug 25 09:34:06 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=414524464 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.414524464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.3472566574 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 755053891 ps |
| CPU time | 3.89 seconds |
| Started | Aug 25 09:33:16 AM UTC 24 |
| Finished | Aug 25 09:33:21 AM UTC 24 |
| Peak memory | 217948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472566574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_disable_endpoint.3472566574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.3319590266 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 157975100 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:33:16 AM UTC 24 |
| Finished | Aug 25 09:33:18 AM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3319590266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_disconnected.3319590266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_enable.1098067810 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 52388996 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:33:16 AM UTC 24 |
| Finished | Aug 25 09:33:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098067810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.1098067810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.1030960756 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 773006851 ps |
| CPU time | 3.91 seconds |
| Started | Aug 25 09:33:16 AM UTC 24 |
| Finished | Aug 25 09:33:21 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030960756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.1030960756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.275302601 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 526120757 ps |
| CPU time | 2.67 seconds |
| Started | Aug 25 09:33:17 AM UTC 24 |
| Finished | Aug 25 09:33:21 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=275302601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.275302601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.3533659240 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 343004071 ps |
| CPU time | 3.17 seconds |
| Started | Aug 25 09:33:17 AM UTC 24 |
| Finished | Aug 25 09:33:22 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533659240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.3533659240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.435149629 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 212277379 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:33:17 AM UTC 24 |
| Finished | Aug 25 09:33:20 AM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=435149629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.435149629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.548428034 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 209205538 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:33:19 AM UTC 24 |
| Finished | Aug 25 09:33:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=548428034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_in_stall.548428034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.2779889738 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 158476035 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:33:19 AM UTC 24 |
| Finished | Aug 25 09:33:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779889738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.2779889738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.2780354599 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 3556024866 ps |
| CPU time | 34.58 seconds |
| Started | Aug 25 09:33:17 AM UTC 24 |
| Finished | Aug 25 09:33:54 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780354599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.2780354599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.3469398284 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 13677124525 ps |
| CPU time | 216.15 seconds |
| Started | Aug 25 09:33:19 AM UTC 24 |
| Finished | Aug 25 09:36:59 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469398284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.3469398284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.3676723531 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 252982798 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:33:19 AM UTC 24 |
| Finished | Aug 25 09:33:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676723531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.3676723531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.3868102041 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 26555543483 ps |
| CPU time | 54.86 seconds |
| Started | Aug 25 09:33:20 AM UTC 24 |
| Finished | Aug 25 09:34:17 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3868102041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_resume.3868102041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.4236441985 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 6195178967 ps |
| CPU time | 20.14 seconds |
| Started | Aug 25 09:33:22 AM UTC 24 |
| Finished | Aug 25 09:33:43 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236441985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_link_suspend.4236441985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.2820017286 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 2455692920 ps |
| CPU time | 34.35 seconds |
| Started | Aug 25 09:33:22 AM UTC 24 |
| Finished | Aug 25 09:33:58 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820017286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.2820017286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.298663352 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 2137971249 ps |
| CPU time | 23.15 seconds |
| Started | Aug 25 09:33:22 AM UTC 24 |
| Finished | Aug 25 09:33:46 AM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=298663352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.298663352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.1500244378 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 236428206 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:33:22 AM UTC 24 |
| Finished | Aug 25 09:33:24 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1500244378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.1500244378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.925564413 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 198460088 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:33:23 AM UTC 24 |
| Finished | Aug 25 09:33:26 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=925564413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.925564413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.4124090787 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 3181485176 ps |
| CPU time | 35.34 seconds |
| Started | Aug 25 09:33:23 AM UTC 24 |
| Finished | Aug 25 09:34:00 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124090787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.4124090787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.2047133794 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 2185543359 ps |
| CPU time | 23.46 seconds |
| Started | Aug 25 09:33:23 AM UTC 24 |
| Finished | Aug 25 09:33:48 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047133794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.2047133794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.3123285835 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 148123424 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:33:23 AM UTC 24 |
| Finished | Aug 25 09:33:26 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3123285835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.3123285835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.583434385 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 156703485 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:33:25 AM UTC 24 |
| Finished | Aug 25 09:33:27 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=583434385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.583434385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.4291386222 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 230509810 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:33:25 AM UTC 24 |
| Finished | Aug 25 09:33:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291386222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_nak_trans.4291386222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.4224326664 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 167418885 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:33:25 AM UTC 24 |
| Finished | Aug 25 09:33:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224326664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.4224326664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.3605282740 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 168174337 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:33:26 AM UTC 24 |
| Finished | Aug 25 09:33:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605282740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.3605282740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.1507108911 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 211358729 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:33:26 AM UTC 24 |
| Finished | Aug 25 09:33:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507108911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_out_trans_nak.1507108911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.615287576 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 149820952 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:33:26 AM UTC 24 |
| Finished | Aug 25 09:33:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=615287576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_pending_in_trans.615287576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.487577863 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 224111360 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:33:30 AM UTC 24 |
| Finished | Aug 25 09:33:32 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=487577863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.487577863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.3455560675 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 142987078 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:33:30 AM UTC 24 |
| Finished | Aug 25 09:33:32 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3455560675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.3455560675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.2141024217 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 34779913 ps |
| CPU time | 0.99 seconds |
| Started | Aug 25 09:33:30 AM UTC 24 |
| Finished | Aug 25 09:33:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2141024217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.2141024217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.1121633000 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 16665809117 ps |
| CPU time | 62.42 seconds |
| Started | Aug 25 09:33:30 AM UTC 24 |
| Finished | Aug 25 09:34:34 AM UTC 24 |
| Peak memory | 232732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121633000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_pkt_buffer.1121633000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.3076260816 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 145889884 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:33:30 AM UTC 24 |
| Finished | Aug 25 09:33:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076260816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_pkt_received.3076260816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.1469287220 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 211671742 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:33:30 AM UTC 24 |
| Finished | Aug 25 09:33:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1469287220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.1469287220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.1924296197 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 151763410 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:33:30 AM UTC 24 |
| Finished | Aug 25 09:33:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924296197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_random_length_in_transaction.1924296197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.901809910 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 216200183 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:33:30 AM UTC 24 |
| Finished | Aug 25 09:33:33 AM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901809910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.901809910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.3877100227 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 140318001 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:33:31 AM UTC 24 |
| Finished | Aug 25 09:33:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3877100227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.3877100227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.3269600554 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 265036179 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:33:31 AM UTC 24 |
| Finished | Aug 25 09:33:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269600554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_rx_full.3269600554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.3870854343 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 200641262 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:33:32 AM UTC 24 |
| Finished | Aug 25 09:33:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3870854343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.3870854343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.2916627268 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 157993260 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:33:34 AM UTC 24 |
| Finished | Aug 25 09:33:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2916627268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.2916627268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.3062483864 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 217415453 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:33:34 AM UTC 24 |
| Finished | Aug 25 09:33:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062483864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.3062483864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.997674231 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 2762161610 ps |
| CPU time | 97.66 seconds |
| Started | Aug 25 09:33:34 AM UTC 24 |
| Finished | Aug 25 09:35:14 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=997674231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.997674231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.2474355192 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 201393253 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:33:34 AM UTC 24 |
| Finished | Aug 25 09:33:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2474355192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.2474355192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.3581235421 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 225197425 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:33:34 AM UTC 24 |
| Finished | Aug 25 09:33:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581235421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.3581235421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.1099183970 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 663961186 ps |
| CPU time | 3.47 seconds |
| Started | Aug 25 09:33:34 AM UTC 24 |
| Finished | Aug 25 09:33:39 AM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099183970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.1099183970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.536780039 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 1920339289 ps |
| CPU time | 63.23 seconds |
| Started | Aug 25 09:33:34 AM UTC 24 |
| Finished | Aug 25 09:34:40 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=536780039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_streaming_out.536780039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.2989118671 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 1529894361 ps |
| CPU time | 13.69 seconds |
| Started | Aug 25 09:33:16 AM UTC 24 |
| Finished | Aug 25 09:33:31 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989118671 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.2989118671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.2576007701 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 532215267 ps |
| CPU time | 2 seconds |
| Started | Aug 25 09:33:34 AM UTC 24 |
| Finished | Aug 25 09:33:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2576007701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_t x_rx_disruption.2576007701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.1309021456 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 583529325 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:43:18 AM UTC 24 |
| Finished | Aug 25 09:43:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1309021456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_ tx_rx_disruption.1309021456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.3543027719 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 504957241 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:43:18 AM UTC 24 |
| Finished | Aug 25 09:43:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3543027719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.3543027719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.3530760167 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 533028339 ps |
| CPU time | 1.82 seconds |
| Started | Aug 25 09:43:18 AM UTC 24 |
| Finished | Aug 25 09:43:43 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3530760167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_ tx_rx_disruption.3530760167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.2975938437 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 549703276 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:43:18 AM UTC 24 |
| Finished | Aug 25 09:43:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2975938437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.2975938437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.836011520 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 521856301 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:43:18 AM UTC 24 |
| Finished | Aug 25 09:43:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=836011520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_t x_rx_disruption.836011520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.1674750401 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 567322028 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:43:18 AM UTC 24 |
| Finished | Aug 25 09:43:21 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1674750401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.1674750401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.176507339 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 625609256 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:43:18 AM UTC 24 |
| Finished | Aug 25 09:43:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=176507339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_t x_rx_disruption.176507339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.373238782 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 608548371 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:43:18 AM UTC 24 |
| Finished | Aug 25 09:43:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=373238782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_t x_rx_disruption.373238782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.1820344051 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 460117918 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:43:22 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1820344051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.1820344051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.2478944164 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 544889801 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:43:22 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2478944164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_ tx_rx_disruption.2478944164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.829022068 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 33987910 ps |
| CPU time | 1.02 seconds |
| Started | Aug 25 09:33:57 AM UTC 24 |
| Finished | Aug 25 09:33:59 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=829022068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.829022068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.3609876719 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 10882507126 ps |
| CPU time | 26.22 seconds |
| Started | Aug 25 09:33:36 AM UTC 24 |
| Finished | Aug 25 09:34:03 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609876719 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.3609876719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.3898916597 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 21416540359 ps |
| CPU time | 47.13 seconds |
| Started | Aug 25 09:33:36 AM UTC 24 |
| Finished | Aug 25 09:34:25 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898916597 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.3898916597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.1388169088 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 30889744548 ps |
| CPU time | 81.08 seconds |
| Started | Aug 25 09:33:38 AM UTC 24 |
| Finished | Aug 25 09:35:01 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1388169088 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.1388169088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.1328097723 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 172794647 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:33:38 AM UTC 24 |
| Finished | Aug 25 09:33:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328097723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.1328097723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.4166232253 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 160206599 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:33:38 AM UTC 24 |
| Finished | Aug 25 09:33:40 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166232253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.4166232253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.2358378574 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 528915265 ps |
| CPU time | 3.1 seconds |
| Started | Aug 25 09:33:38 AM UTC 24 |
| Finished | Aug 25 09:33:42 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2358378574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 24.usbdev_data_toggle_clear.2358378574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.519730843 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 695177120 ps |
| CPU time | 2.65 seconds |
| Started | Aug 25 09:33:38 AM UTC 24 |
| Finished | Aug 25 09:33:42 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=519730843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.519730843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.3390031997 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 24846013355 ps |
| CPU time | 69.23 seconds |
| Started | Aug 25 09:33:38 AM UTC 24 |
| Finished | Aug 25 09:34:49 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390031997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.3390031997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.61737348 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 401139753 ps |
| CPU time | 10.13 seconds |
| Started | Aug 25 09:33:39 AM UTC 24 |
| Finished | Aug 25 09:33:51 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=61737348 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.61737348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.1031304120 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 661376198 ps |
| CPU time | 3.16 seconds |
| Started | Aug 25 09:33:39 AM UTC 24 |
| Finished | Aug 25 09:33:44 AM UTC 24 |
| Peak memory | 217808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1031304120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_disable_endpoint.1031304120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.102514816 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 154291783 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:33:40 AM UTC 24 |
| Finished | Aug 25 09:33:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=102514816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_disconnected.102514816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_enable.2158916647 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 71393945 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:33:41 AM UTC 24 |
| Finished | Aug 25 09:33:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2158916647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.2158916647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.1773635505 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 889176646 ps |
| CPU time | 3.81 seconds |
| Started | Aug 25 09:33:41 AM UTC 24 |
| Finished | Aug 25 09:33:46 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773635505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.1773635505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.1918107975 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 642157550 ps |
| CPU time | 2.22 seconds |
| Started | Aug 25 09:33:41 AM UTC 24 |
| Finished | Aug 25 09:33:45 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1918107975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.1918107975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.3294154386 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 297410426 ps |
| CPU time | 3.88 seconds |
| Started | Aug 25 09:33:41 AM UTC 24 |
| Finished | Aug 25 09:33:46 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3294154386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.3294154386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.3854014123 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 254504819 ps |
| CPU time | 2.19 seconds |
| Started | Aug 25 09:33:41 AM UTC 24 |
| Finished | Aug 25 09:33:45 AM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854014123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.3854014123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.1774186567 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 139377123 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:33:43 AM UTC 24 |
| Finished | Aug 25 09:33:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774186567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_stall.1774186567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.303671601 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 228548646 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:33:43 AM UTC 24 |
| Finished | Aug 25 09:33:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=303671601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_in_trans.303671601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.2481849078 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 2939913959 ps |
| CPU time | 35.53 seconds |
| Started | Aug 25 09:33:41 AM UTC 24 |
| Finished | Aug 25 09:34:19 AM UTC 24 |
| Peak memory | 235112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481849078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.2481849078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.1102315677 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 6173462451 ps |
| CPU time | 89.87 seconds |
| Started | Aug 25 09:33:44 AM UTC 24 |
| Finished | Aug 25 09:35:16 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102315677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.1102315677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.3701373987 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 167084440 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:33:44 AM UTC 24 |
| Finished | Aug 25 09:33:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701373987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_in_err.3701373987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.1757122050 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 7647406134 ps |
| CPU time | 27.75 seconds |
| Started | Aug 25 09:33:44 AM UTC 24 |
| Finished | Aug 25 09:34:13 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757122050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_resume.1757122050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.1766102009 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 8969643406 ps |
| CPU time | 28.47 seconds |
| Started | Aug 25 09:33:45 AM UTC 24 |
| Finished | Aug 25 09:34:15 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1766102009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_link_suspend.1766102009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.979134709 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 3977552658 ps |
| CPU time | 50.36 seconds |
| Started | Aug 25 09:33:45 AM UTC 24 |
| Finished | Aug 25 09:34:38 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=979134709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.979134709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.1603347050 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 2921256835 ps |
| CPU time | 37.74 seconds |
| Started | Aug 25 09:33:45 AM UTC 24 |
| Finished | Aug 25 09:34:25 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1603347050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.1603347050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.1284927987 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 244267805 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:33:47 AM UTC 24 |
| Finished | Aug 25 09:33:50 AM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1284927987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.1284927987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.3836628308 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 277875874 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:33:47 AM UTC 24 |
| Finished | Aug 25 09:33:49 AM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836628308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.3836628308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.2976194653 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 2823380156 ps |
| CPU time | 39.55 seconds |
| Started | Aug 25 09:33:47 AM UTC 24 |
| Finished | Aug 25 09:34:28 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976194653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.2976194653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.2765203843 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 2176716483 ps |
| CPU time | 26.35 seconds |
| Started | Aug 25 09:33:47 AM UTC 24 |
| Finished | Aug 25 09:34:15 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765203843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.2765203843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.1051664972 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 151068365 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:33:47 AM UTC 24 |
| Finished | Aug 25 09:33:49 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051664972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.1051664972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.3688701461 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 180482108 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:33:48 AM UTC 24 |
| Finished | Aug 25 09:33:51 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688701461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.3688701461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.1388931059 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 163986556 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:33:48 AM UTC 24 |
| Finished | Aug 25 09:33:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1388931059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.1388931059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.1864018843 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 216488466 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:33:49 AM UTC 24 |
| Finished | Aug 25 09:33:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864018843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_out_iso.1864018843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.1908707051 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 204833584 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:33:50 AM UTC 24 |
| Finished | Aug 25 09:33:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908707051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.1908707051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.198690277 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 192788297 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:33:50 AM UTC 24 |
| Finished | Aug 25 09:33:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=198690277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_out_trans_nak.198690277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.2517279102 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 219391032 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:33:50 AM UTC 24 |
| Finished | Aug 25 09:33:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2517279102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_pending_in_trans.2517279102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.175115114 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 232951561 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:33:50 AM UTC 24 |
| Finished | Aug 25 09:33:53 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=175115114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.175115114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.171731495 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 135859483 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:33:50 AM UTC 24 |
| Finished | Aug 25 09:33:53 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=171731495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.171731495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.525441223 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 45183253 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:33:52 AM UTC 24 |
| Finished | Aug 25 09:33:54 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=525441223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_phy_pins_sense.525441223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.3811122293 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 15897535091 ps |
| CPU time | 65.26 seconds |
| Started | Aug 25 09:33:52 AM UTC 24 |
| Finished | Aug 25 09:34:59 AM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811122293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.3811122293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.1531994377 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 175313751 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:33:52 AM UTC 24 |
| Finished | Aug 25 09:33:54 AM UTC 24 |
| Peak memory | 216056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531994377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_pkt_received.1531994377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.1039552684 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 235110385 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:33:52 AM UTC 24 |
| Finished | Aug 25 09:33:55 AM UTC 24 |
| Peak memory | 216004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1039552684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.1039552684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.2604503065 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 204455593 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:33:52 AM UTC 24 |
| Finished | Aug 25 09:33:54 AM UTC 24 |
| Peak memory | 216024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604503065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.2604503065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.1195417561 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 180665433 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:33:53 AM UTC 24 |
| Finished | Aug 25 09:33:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195417561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.1195417561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.2360603555 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 179822001 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:33:53 AM UTC 24 |
| Finished | Aug 25 09:33:56 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360603555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.2360603555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.4168450309 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 392501147 ps |
| CPU time | 2.35 seconds |
| Started | Aug 25 09:33:53 AM UTC 24 |
| Finished | Aug 25 09:33:57 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4168450309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_rx_full.4168450309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.2717970922 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 169109673 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:33:54 AM UTC 24 |
| Finished | Aug 25 09:33:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2717970922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_setup_stage.2717970922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.276422849 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 188812254 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:33:54 AM UTC 24 |
| Finished | Aug 25 09:33:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=276422849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 24.usbdev_setup_trans_ignored.276422849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.2138899589 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 253594794 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:33:54 AM UTC 24 |
| Finished | Aug 25 09:33:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138899589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.2138899589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.3431371348 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 2520409974 ps |
| CPU time | 94.51 seconds |
| Started | Aug 25 09:33:54 AM UTC 24 |
| Finished | Aug 25 09:35:31 AM UTC 24 |
| Peak memory | 230456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431371348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.3431371348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.2451156685 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 199407451 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:33:55 AM UTC 24 |
| Finished | Aug 25 09:33:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451156685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.2451156685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.2091146575 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 166592558 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:33:55 AM UTC 24 |
| Finished | Aug 25 09:33:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2091146575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.2091146575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.3618304034 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 906426110 ps |
| CPU time | 4.71 seconds |
| Started | Aug 25 09:33:55 AM UTC 24 |
| Finished | Aug 25 09:34:01 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618304034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.3618304034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.1023042270 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 1811881973 ps |
| CPU time | 65.76 seconds |
| Started | Aug 25 09:33:55 AM UTC 24 |
| Finished | Aug 25 09:35:03 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023042270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_streaming_out.1023042270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.230394360 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 2980950407 ps |
| CPU time | 29.57 seconds |
| Started | Aug 25 09:33:39 AM UTC 24 |
| Finished | Aug 25 09:34:10 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=230394360 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.230394360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.2615297837 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 599440971 ps |
| CPU time | 3.16 seconds |
| Started | Aug 25 09:33:55 AM UTC 24 |
| Finished | Aug 25 09:34:00 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2615297837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.2615297837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.1103692719 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 552091281 ps |
| CPU time | 2.23 seconds |
| Started | Aug 25 09:43:22 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1103692719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.1103692719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.1847281224 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 520714813 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:43:22 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1847281224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_ tx_rx_disruption.1847281224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.2144174120 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 602442360 ps |
| CPU time | 2.07 seconds |
| Started | Aug 25 09:43:22 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2144174120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_ tx_rx_disruption.2144174120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.3687166727 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 514159903 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:43:22 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3687166727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_ tx_rx_disruption.3687166727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.379004145 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 648847020 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:43:22 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=379004145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_t x_rx_disruption.379004145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.1115414098 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 400785679 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:43:23 AM UTC 24 |
| Finished | Aug 25 09:43:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1115414098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_ tx_rx_disruption.1115414098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.1502603239 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 567444866 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:43:23 AM UTC 24 |
| Finished | Aug 25 09:43:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1502603239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.1502603239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.1708932601 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 44496984 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:34:18 AM UTC 24 |
| Finished | Aug 25 09:34:20 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1708932601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.1708932601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.2400052584 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 6969240829 ps |
| CPU time | 19.53 seconds |
| Started | Aug 25 09:33:57 AM UTC 24 |
| Finished | Aug 25 09:34:18 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400052584 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.2400052584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.737985807 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 14243301641 ps |
| CPU time | 31.58 seconds |
| Started | Aug 25 09:33:57 AM UTC 24 |
| Finished | Aug 25 09:34:30 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=737985807 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.737985807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.1980552036 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 25128651268 ps |
| CPU time | 53.44 seconds |
| Started | Aug 25 09:33:58 AM UTC 24 |
| Finished | Aug 25 09:34:54 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980552036 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.1980552036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.2937314507 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 201228016 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:33:58 AM UTC 24 |
| Finished | Aug 25 09:34:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937314507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.2937314507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.1615212002 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 150574839 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:33:59 AM UTC 24 |
| Finished | Aug 25 09:34:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615212002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.1615212002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.2469437994 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 271212399 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:33:59 AM UTC 24 |
| Finished | Aug 25 09:34:01 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469437994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 25.usbdev_data_toggle_clear.2469437994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.1032016152 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 885211415 ps |
| CPU time | 4.47 seconds |
| Started | Aug 25 09:33:59 AM UTC 24 |
| Finished | Aug 25 09:34:04 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032016152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.1032016152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.2976395034 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 25152719612 ps |
| CPU time | 65.22 seconds |
| Started | Aug 25 09:33:59 AM UTC 24 |
| Finished | Aug 25 09:35:06 AM UTC 24 |
| Peak memory | 218432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976395034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.2976395034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.2483914448 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 421468283 ps |
| CPU time | 10.14 seconds |
| Started | Aug 25 09:33:59 AM UTC 24 |
| Finished | Aug 25 09:34:10 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2483914448 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.2483914448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.1516499661 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 963082311 ps |
| CPU time | 3.83 seconds |
| Started | Aug 25 09:34:00 AM UTC 24 |
| Finished | Aug 25 09:34:05 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1516499661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.1516499661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.1097743712 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 151640922 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:34:01 AM UTC 24 |
| Finished | Aug 25 09:34:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1097743712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_disconnected.1097743712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_enable.4008556271 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 37552075 ps |
| CPU time | 1.05 seconds |
| Started | Aug 25 09:34:01 AM UTC 24 |
| Finished | Aug 25 09:34:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008556271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_enable.4008556271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.2541315796 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 815578349 ps |
| CPU time | 4.21 seconds |
| Started | Aug 25 09:34:01 AM UTC 24 |
| Finished | Aug 25 09:34:07 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541315796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.2541315796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.4045964535 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 313946118 ps |
| CPU time | 2.03 seconds |
| Started | Aug 25 09:34:03 AM UTC 24 |
| Finished | Aug 25 09:34:06 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4045964535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.4045964535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.3876927348 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 179904163 ps |
| CPU time | 2.68 seconds |
| Started | Aug 25 09:34:03 AM UTC 24 |
| Finished | Aug 25 09:34:06 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876927348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_fifo_rst.3876927348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.1098140472 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 206670083 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:34:04 AM UTC 24 |
| Finished | Aug 25 09:34:07 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098140472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.1098140472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.3850691965 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 138652499 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:34:04 AM UTC 24 |
| Finished | Aug 25 09:34:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850691965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.3850691965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.2592794193 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 246352860 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:34:04 AM UTC 24 |
| Finished | Aug 25 09:34:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2592794193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.2592794193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.4020651359 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 4872858309 ps |
| CPU time | 171.55 seconds |
| Started | Aug 25 09:34:03 AM UTC 24 |
| Finished | Aug 25 09:36:58 AM UTC 24 |
| Peak memory | 230576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020651359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.4020651359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.986402243 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 7556931759 ps |
| CPU time | 72.13 seconds |
| Started | Aug 25 09:34:04 AM UTC 24 |
| Finished | Aug 25 09:35:18 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=986402243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.986402243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.3256304175 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 239918797 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:34:05 AM UTC 24 |
| Finished | Aug 25 09:34:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256304175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.3256304175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.1385962049 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 9501280095 ps |
| CPU time | 24.15 seconds |
| Started | Aug 25 09:34:05 AM UTC 24 |
| Finished | Aug 25 09:34:31 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385962049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.1385962049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.658083442 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 5828720001 ps |
| CPU time | 15.82 seconds |
| Started | Aug 25 09:34:06 AM UTC 24 |
| Finished | Aug 25 09:34:22 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=658083442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_suspend.658083442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.3187172698 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 3254631324 ps |
| CPU time | 35.81 seconds |
| Started | Aug 25 09:34:07 AM UTC 24 |
| Finished | Aug 25 09:34:44 AM UTC 24 |
| Peak memory | 235268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187172698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.3187172698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.1960139578 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 2299033126 ps |
| CPU time | 29.74 seconds |
| Started | Aug 25 09:34:07 AM UTC 24 |
| Finished | Aug 25 09:34:38 AM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1960139578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.1960139578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.2933755240 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 265349071 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:34:07 AM UTC 24 |
| Finished | Aug 25 09:34:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933755240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.2933755240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.4243023872 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 226663483 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:34:07 AM UTC 24 |
| Finished | Aug 25 09:34:10 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4243023872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.4243023872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.3922895476 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 3603988310 ps |
| CPU time | 44.04 seconds |
| Started | Aug 25 09:34:08 AM UTC 24 |
| Finished | Aug 25 09:34:54 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922895476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.3922895476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.1601498582 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 185458385 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:34:08 AM UTC 24 |
| Finished | Aug 25 09:34:11 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601498582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.1601498582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.3751881386 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 139946801 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:34:08 AM UTC 24 |
| Finished | Aug 25 09:34:11 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3751881386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.3751881386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.3992212261 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 253652066 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:34:08 AM UTC 24 |
| Finished | Aug 25 09:34:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992212261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.3992212261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.2862906244 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 185915817 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:34:09 AM UTC 24 |
| Finished | Aug 25 09:34:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2862906244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_out_iso.2862906244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.3960883527 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 186257544 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:34:11 AM UTC 24 |
| Finished | Aug 25 09:34:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960883527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_out_stall.3960883527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.3350006985 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 151396941 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:34:11 AM UTC 24 |
| Finished | Aug 25 09:34:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3350006985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.3350006985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.2769306724 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 154671522 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:34:11 AM UTC 24 |
| Finished | Aug 25 09:34:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2769306724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_pending_in_trans.2769306724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.2002825243 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 262611284 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:34:12 AM UTC 24 |
| Finished | Aug 25 09:34:15 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002825243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.2002825243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.2936234081 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 144479404 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:34:12 AM UTC 24 |
| Finished | Aug 25 09:34:15 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936234081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.2936234081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.3398595398 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 37813427 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:34:12 AM UTC 24 |
| Finished | Aug 25 09:34:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398595398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.3398595398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.964628570 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 12233890844 ps |
| CPU time | 49.58 seconds |
| Started | Aug 25 09:34:12 AM UTC 24 |
| Finished | Aug 25 09:35:04 AM UTC 24 |
| Peak memory | 232588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=964628570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_pkt_buffer.964628570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.1606794949 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 186191774 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:34:12 AM UTC 24 |
| Finished | Aug 25 09:34:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1606794949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.1606794949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.1238559244 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 222891342 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:34:12 AM UTC 24 |
| Finished | Aug 25 09:34:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238559244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.1238559244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.2472863149 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 194555800 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:34:14 AM UTC 24 |
| Finished | Aug 25 09:34:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472863149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.2472863149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.3792127251 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 208752280 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:34:14 AM UTC 24 |
| Finished | Aug 25 09:34:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3792127251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.3792127251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.751151208 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 134226858 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:34:14 AM UTC 24 |
| Finished | Aug 25 09:34:16 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=751151208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_rx_crc_err.751151208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.2153508745 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 355620408 ps |
| CPU time | 1.97 seconds |
| Started | Aug 25 09:34:16 AM UTC 24 |
| Finished | Aug 25 09:34:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2153508745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.2153508745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.1685106363 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 173105973 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:34:16 AM UTC 24 |
| Finished | Aug 25 09:34:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685106363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.1685106363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.2002198527 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 164043778 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:34:16 AM UTC 24 |
| Finished | Aug 25 09:34:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002198527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 25.usbdev_setup_trans_ignored.2002198527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.1726776887 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 207188723 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:34:16 AM UTC 24 |
| Finished | Aug 25 09:34:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726776887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.1726776887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.547416460 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 2815546979 ps |
| CPU time | 99.52 seconds |
| Started | Aug 25 09:34:16 AM UTC 24 |
| Finished | Aug 25 09:35:58 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=547416460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.547416460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.787054251 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 147394688 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:34:16 AM UTC 24 |
| Finished | Aug 25 09:34:18 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=787054251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.787054251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.4286467689 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 200948916 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:34:16 AM UTC 24 |
| Finished | Aug 25 09:34:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4286467689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.4286467689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.1592499676 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 737725334 ps |
| CPU time | 3.63 seconds |
| Started | Aug 25 09:34:16 AM UTC 24 |
| Finished | Aug 25 09:34:21 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1592499676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.1592499676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.3231529627 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 3578335238 ps |
| CPU time | 35.54 seconds |
| Started | Aug 25 09:34:16 AM UTC 24 |
| Finished | Aug 25 09:34:53 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3231529627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_streaming_out.3231529627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.285234919 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 3432485265 ps |
| CPU time | 40.4 seconds |
| Started | Aug 25 09:34:00 AM UTC 24 |
| Finished | Aug 25 09:34:42 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=285234919 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.285234919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.3532917802 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 595556014 ps |
| CPU time | 3.14 seconds |
| Started | Aug 25 09:34:17 AM UTC 24 |
| Finished | Aug 25 09:34:22 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3532917802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.3532917802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.459768441 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 530794395 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:43:23 AM UTC 24 |
| Finished | Aug 25 09:43:26 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=459768441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_t x_rx_disruption.459768441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.1572777298 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 487742624 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:43:26 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1572777298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.1572777298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.2562775553 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 481330691 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2562775553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_ tx_rx_disruption.2562775553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.963610296 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 555390815 ps |
| CPU time | 2 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:43 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=963610296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_t x_rx_disruption.963610296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.2415224670 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 431868311 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2415224670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.2415224670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.984517483 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 533503838 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 216876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=984517483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_t x_rx_disruption.984517483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.912804765 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 487121530 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:31 AM UTC 24 |
| Peak memory | 216008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=912804765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_t x_rx_disruption.912804765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.3458941561 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 511100787 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 217548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3458941561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_ tx_rx_disruption.3458941561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.3364215527 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 511895338 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3364215527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_ tx_rx_disruption.3364215527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.2887447902 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 38200110 ps |
| CPU time | 1.08 seconds |
| Started | Aug 25 09:34:38 AM UTC 24 |
| Finished | Aug 25 09:34:40 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2887447902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.2887447902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.3479148987 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 11479060668 ps |
| CPU time | 33.73 seconds |
| Started | Aug 25 09:34:18 AM UTC 24 |
| Finished | Aug 25 09:34:53 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479148987 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.3479148987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.246919592 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 15849990712 ps |
| CPU time | 42.12 seconds |
| Started | Aug 25 09:34:18 AM UTC 24 |
| Finished | Aug 25 09:35:02 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=246919592 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.246919592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.1968675277 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 29334550059 ps |
| CPU time | 72.62 seconds |
| Started | Aug 25 09:34:18 AM UTC 24 |
| Finished | Aug 25 09:35:32 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968675277 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.1968675277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.2123848912 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 150011533 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:34:19 AM UTC 24 |
| Finished | Aug 25 09:34:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123848912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.2123848912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.4149317436 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 177361521 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:34:19 AM UTC 24 |
| Finished | Aug 25 09:34:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4149317436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.4149317436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.623898566 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 526352618 ps |
| CPU time | 3.02 seconds |
| Started | Aug 25 09:34:19 AM UTC 24 |
| Finished | Aug 25 09:34:23 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=623898566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_data_toggle_clear.623898566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.3926298798 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 551782342 ps |
| CPU time | 2.68 seconds |
| Started | Aug 25 09:34:19 AM UTC 24 |
| Finished | Aug 25 09:34:23 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926298798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.3926298798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.2536380796 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 30915928127 ps |
| CPU time | 91.42 seconds |
| Started | Aug 25 09:34:19 AM UTC 24 |
| Finished | Aug 25 09:35:53 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536380796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.2536380796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.1425282332 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 1314690511 ps |
| CPU time | 41.56 seconds |
| Started | Aug 25 09:34:19 AM UTC 24 |
| Finished | Aug 25 09:35:03 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1425282332 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.1425282332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.1454260505 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 501414357 ps |
| CPU time | 2.74 seconds |
| Started | Aug 25 09:34:21 AM UTC 24 |
| Finished | Aug 25 09:34:25 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454260505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.1454260505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.3228847675 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 213579106 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:34:21 AM UTC 24 |
| Finished | Aug 25 09:34:24 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228847675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.3228847675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_enable.3894829137 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 32383512 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:34:21 AM UTC 24 |
| Finished | Aug 25 09:34:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894829137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.3894829137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.831246486 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 909964940 ps |
| CPU time | 5.05 seconds |
| Started | Aug 25 09:34:21 AM UTC 24 |
| Finished | Aug 25 09:34:27 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=831246486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.831246486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.3159371052 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 281290991 ps |
| CPU time | 2.91 seconds |
| Started | Aug 25 09:34:23 AM UTC 24 |
| Finished | Aug 25 09:34:27 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159371052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.3159371052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.1070281845 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 231672655 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:34:23 AM UTC 24 |
| Finished | Aug 25 09:34:25 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070281845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.1070281845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.3561680527 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 143438656 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:34:23 AM UTC 24 |
| Finished | Aug 25 09:34:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561680527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.3561680527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.3293692769 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 255863026 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:34:24 AM UTC 24 |
| Finished | Aug 25 09:34:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293692769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.3293692769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.1879920025 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 4646095866 ps |
| CPU time | 173.91 seconds |
| Started | Aug 25 09:34:23 AM UTC 24 |
| Finished | Aug 25 09:37:20 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1879920025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.1879920025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.1012226591 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 3926842453 ps |
| CPU time | 37.36 seconds |
| Started | Aug 25 09:34:24 AM UTC 24 |
| Finished | Aug 25 09:35:03 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012226591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.1012226591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.4242800170 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 231833000 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:34:24 AM UTC 24 |
| Finished | Aug 25 09:34:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4242800170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.4242800170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.1379774058 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 32571371084 ps |
| CPU time | 93.29 seconds |
| Started | Aug 25 09:34:25 AM UTC 24 |
| Finished | Aug 25 09:36:00 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379774058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.1379774058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.2303187669 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 9552980815 ps |
| CPU time | 24.12 seconds |
| Started | Aug 25 09:34:25 AM UTC 24 |
| Finished | Aug 25 09:34:50 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2303187669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_link_suspend.2303187669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.444612206 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 4276097301 ps |
| CPU time | 157.65 seconds |
| Started | Aug 25 09:34:26 AM UTC 24 |
| Finished | Aug 25 09:37:07 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=444612206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.444612206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.667338624 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 2004301415 ps |
| CPU time | 19.31 seconds |
| Started | Aug 25 09:34:26 AM UTC 24 |
| Finished | Aug 25 09:34:47 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=667338624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.667338624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.4119290956 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 275654412 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:34:26 AM UTC 24 |
| Finished | Aug 25 09:34:29 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4119290956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.4119290956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.186513218 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 204514388 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:34:26 AM UTC 24 |
| Finished | Aug 25 09:34:29 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=186513218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.186513218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.456054823 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 2167654104 ps |
| CPU time | 72.11 seconds |
| Started | Aug 25 09:34:26 AM UTC 24 |
| Finished | Aug 25 09:35:41 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=456054823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.456054823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.211373505 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 168557199 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:34:27 AM UTC 24 |
| Finished | Aug 25 09:34:30 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=211373505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.211373505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.3632056931 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 180595334 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:34:28 AM UTC 24 |
| Finished | Aug 25 09:34:30 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632056931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.3632056931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.2894073178 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 208040961 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:34:28 AM UTC 24 |
| Finished | Aug 25 09:34:30 AM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894073178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.2894073178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.2503583673 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 232349379 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:34:29 AM UTC 24 |
| Finished | Aug 25 09:34:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503583673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.2503583673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.1211636380 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 153228545 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:34:29 AM UTC 24 |
| Finished | Aug 25 09:34:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211636380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_out_stall.1211636380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.218374505 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 173844872 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:34:29 AM UTC 24 |
| Finished | Aug 25 09:34:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=218374505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_out_trans_nak.218374505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.1140332705 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 160701243 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:34:29 AM UTC 24 |
| Finished | Aug 25 09:34:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140332705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_pending_in_trans.1140332705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.2096530058 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 252848568 ps |
| CPU time | 1.94 seconds |
| Started | Aug 25 09:34:30 AM UTC 24 |
| Finished | Aug 25 09:34:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096530058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.2096530058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.2152793551 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 167507544 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:34:30 AM UTC 24 |
| Finished | Aug 25 09:34:33 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152793551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.2152793551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.1210464549 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 36931322 ps |
| CPU time | 1.02 seconds |
| Started | Aug 25 09:34:32 AM UTC 24 |
| Finished | Aug 25 09:34:35 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1210464549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.1210464549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.2469552931 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 18502485107 ps |
| CPU time | 77.08 seconds |
| Started | Aug 25 09:34:32 AM UTC 24 |
| Finished | Aug 25 09:35:53 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469552931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.2469552931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.2772922670 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 157929673 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:34:32 AM UTC 24 |
| Finished | Aug 25 09:34:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2772922670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.2772922670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.4116032414 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 216494888 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:34:32 AM UTC 24 |
| Finished | Aug 25 09:34:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116032414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.4116032414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.4226677191 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 205658748 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:34:32 AM UTC 24 |
| Finished | Aug 25 09:34:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226677191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.4226677191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.2028070154 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 187288722 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:34:32 AM UTC 24 |
| Finished | Aug 25 09:34:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028070154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.2028070154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.2296859347 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 163302381 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:34:34 AM UTC 24 |
| Finished | Aug 25 09:34:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296859347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.2296859347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.119516240 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 256050462 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:34:34 AM UTC 24 |
| Finished | Aug 25 09:34:37 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=119516240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_rx_full.119516240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.2600075323 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 161033004 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:34:34 AM UTC 24 |
| Finished | Aug 25 09:34:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2600075323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.2600075323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.3290320212 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 159656687 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:34:34 AM UTC 24 |
| Finished | Aug 25 09:34:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290320212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.3290320212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.3733201687 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 205482584 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:34:34 AM UTC 24 |
| Finished | Aug 25 09:34:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733201687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.3733201687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.3615810570 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 2655628794 ps |
| CPU time | 98.32 seconds |
| Started | Aug 25 09:34:36 AM UTC 24 |
| Finished | Aug 25 09:36:17 AM UTC 24 |
| Peak memory | 230728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3615810570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.3615810570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.601835562 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 185079572 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:34:36 AM UTC 24 |
| Finished | Aug 25 09:34:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=601835562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.601835562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.2458032813 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 189522792 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:34:36 AM UTC 24 |
| Finished | Aug 25 09:34:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2458032813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.2458032813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.4197985697 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 787201016 ps |
| CPU time | 2.65 seconds |
| Started | Aug 25 09:34:38 AM UTC 24 |
| Finished | Aug 25 09:34:41 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197985697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.4197985697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.4209244152 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 3215830507 ps |
| CPU time | 118.21 seconds |
| Started | Aug 25 09:34:36 AM UTC 24 |
| Finished | Aug 25 09:36:37 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4209244152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.4209244152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.1072195088 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 4780322004 ps |
| CPU time | 55.62 seconds |
| Started | Aug 25 09:34:21 AM UTC 24 |
| Finished | Aug 25 09:35:18 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072195088 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.1072195088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.590771733 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 453287972 ps |
| CPU time | 2.1 seconds |
| Started | Aug 25 09:34:38 AM UTC 24 |
| Finished | Aug 25 09:34:41 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=590771733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_tx _rx_disruption.590771733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.2184858722 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 486627653 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 217272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2184858722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.2184858722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.4010649668 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 544608473 ps |
| CPU time | 2.16 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4010649668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.4010649668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.3192867074 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 513759691 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3192867074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.3192867074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.914719974 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 493232721 ps |
| CPU time | 1.92 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=914719974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_t x_rx_disruption.914719974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.3238411649 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 587944283 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:43:28 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 216000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3238411649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_ tx_rx_disruption.3238411649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.2526824299 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 513531216 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:43:29 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 215928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2526824299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.2526824299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.1580788523 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 710769797 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:43:32 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1580788523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.1580788523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.1014399808 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 615942197 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:43:33 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1014399808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.1014399808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.910222921 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 533001773 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:43:33 AM UTC 24 |
| Finished | Aug 25 09:43:54 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=910222921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_t x_rx_disruption.910222921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.1626963632 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 586112261 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:43:33 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1626963632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.1626963632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.2719913208 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 58391876 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:34:59 AM UTC 24 |
| Finished | Aug 25 09:35:02 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719913208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.2719913208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.497343304 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 11766236662 ps |
| CPU time | 33.93 seconds |
| Started | Aug 25 09:34:38 AM UTC 24 |
| Finished | Aug 25 09:35:13 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=497343304 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.497343304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.985402075 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 18566079857 ps |
| CPU time | 36.38 seconds |
| Started | Aug 25 09:34:38 AM UTC 24 |
| Finished | Aug 25 09:35:16 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=985402075 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.985402075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.2619951608 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 29747220068 ps |
| CPU time | 65.46 seconds |
| Started | Aug 25 09:34:38 AM UTC 24 |
| Finished | Aug 25 09:35:45 AM UTC 24 |
| Peak memory | 217688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2619951608 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.2619951608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.4053200904 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 193241773 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:34:38 AM UTC 24 |
| Finished | Aug 25 09:34:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053200904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.4053200904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.799799867 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 161532085 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:34:40 AM UTC 24 |
| Finished | Aug 25 09:34:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799799867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_bitstuff_err.799799867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.3485133269 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 511446970 ps |
| CPU time | 3.18 seconds |
| Started | Aug 25 09:34:40 AM UTC 24 |
| Finished | Aug 25 09:34:44 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485133269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.3485133269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.4269083977 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 553118472 ps |
| CPU time | 2.68 seconds |
| Started | Aug 25 09:34:40 AM UTC 24 |
| Finished | Aug 25 09:34:43 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269083977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.4269083977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.835314771 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 16577056356 ps |
| CPU time | 58.15 seconds |
| Started | Aug 25 09:34:40 AM UTC 24 |
| Finished | Aug 25 09:35:40 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=835314771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_device_address.835314771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.1742575125 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 1702706301 ps |
| CPU time | 48.05 seconds |
| Started | Aug 25 09:34:40 AM UTC 24 |
| Finished | Aug 25 09:35:30 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1742575125 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.1742575125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.2551247045 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 755709584 ps |
| CPU time | 3.95 seconds |
| Started | Aug 25 09:34:41 AM UTC 24 |
| Finished | Aug 25 09:34:46 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551247045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.2551247045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.329915406 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 151279743 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:34:41 AM UTC 24 |
| Finished | Aug 25 09:34:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=329915406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_disconnected.329915406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_enable.3496430290 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 88610947 ps |
| CPU time | 1.07 seconds |
| Started | Aug 25 09:34:41 AM UTC 24 |
| Finished | Aug 25 09:34:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3496430290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_enable.3496430290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.84367720 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 875366353 ps |
| CPU time | 4.22 seconds |
| Started | Aug 25 09:34:43 AM UTC 24 |
| Finished | Aug 25 09:34:49 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84367720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_endpoint_access.84367720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.968256820 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 181302984 ps |
| CPU time | 3.3 seconds |
| Started | Aug 25 09:34:43 AM UTC 24 |
| Finished | Aug 25 09:34:48 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=968256820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_fifo_rst.968256820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.991310131 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 186265196 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:34:43 AM UTC 24 |
| Finished | Aug 25 09:34:46 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=991310131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.991310131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.686587990 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 152615392 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:34:43 AM UTC 24 |
| Finished | Aug 25 09:34:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=686587990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_in_stall.686587990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.801942758 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 248417066 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:34:45 AM UTC 24 |
| Finished | Aug 25 09:34:49 AM UTC 24 |
| Peak memory | 216052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=801942758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_in_trans.801942758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.640981601 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 3061962505 ps |
| CPU time | 31.49 seconds |
| Started | Aug 25 09:34:43 AM UTC 24 |
| Finished | Aug 25 09:35:16 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=640981601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.640981601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.1338728100 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 10248685151 ps |
| CPU time | 167.72 seconds |
| Started | Aug 25 09:34:45 AM UTC 24 |
| Finished | Aug 25 09:37:38 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1338728100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.1338728100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.2381906090 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 188648421 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:34:45 AM UTC 24 |
| Finished | Aug 25 09:34:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381906090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.2381906090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.3384929411 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 12109334448 ps |
| CPU time | 35.65 seconds |
| Started | Aug 25 09:34:45 AM UTC 24 |
| Finished | Aug 25 09:35:24 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3384929411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.3384929411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.2753475960 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 10946128594 ps |
| CPU time | 30.75 seconds |
| Started | Aug 25 09:34:45 AM UTC 24 |
| Finished | Aug 25 09:35:19 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2753475960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_link_suspend.2753475960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.4224599068 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 3007818033 ps |
| CPU time | 37.02 seconds |
| Started | Aug 25 09:34:45 AM UTC 24 |
| Finished | Aug 25 09:35:25 AM UTC 24 |
| Peak memory | 230568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224599068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.4224599068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.3306795788 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 2748222422 ps |
| CPU time | 94.98 seconds |
| Started | Aug 25 09:34:48 AM UTC 24 |
| Finished | Aug 25 09:36:26 AM UTC 24 |
| Peak memory | 235236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306795788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.3306795788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.1328374448 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 306308900 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:34:48 AM UTC 24 |
| Finished | Aug 25 09:34:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328374448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.1328374448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.2190686215 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 197785585 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:34:48 AM UTC 24 |
| Finished | Aug 25 09:34:51 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2190686215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.2190686215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.1207320412 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 2872342364 ps |
| CPU time | 26.19 seconds |
| Started | Aug 25 09:34:48 AM UTC 24 |
| Finished | Aug 25 09:35:16 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1207320412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.1207320412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.2707361219 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 239710035 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:34:48 AM UTC 24 |
| Finished | Aug 25 09:34:51 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2707361219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.2707361219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.797741870 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 163821504 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:34:50 AM UTC 24 |
| Finished | Aug 25 09:34:53 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797741870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.797741870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.4044880671 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 237838053 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:34:50 AM UTC 24 |
| Finished | Aug 25 09:34:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044880671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.4044880671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.2400177532 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 211331388 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:34:50 AM UTC 24 |
| Finished | Aug 25 09:34:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400177532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.2400177532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.1597312166 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 191663292 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:34:50 AM UTC 24 |
| Finished | Aug 25 09:34:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597312166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.1597312166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.249097062 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 187647761 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:34:50 AM UTC 24 |
| Finished | Aug 25 09:34:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=249097062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_out_trans_nak.249097062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.2940391981 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 158761362 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:34:52 AM UTC 24 |
| Finished | Aug 25 09:34:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940391981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.2940391981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.4070792791 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 221606895 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:34:52 AM UTC 24 |
| Finished | Aug 25 09:34:55 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4070792791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.4070792791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.69214422 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 141683403 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:34:52 AM UTC 24 |
| Finished | Aug 25 09:34:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=69214422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.69214422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.3220269386 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 51254208 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:34:52 AM UTC 24 |
| Finished | Aug 25 09:34:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3220269386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.3220269386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.2766895398 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 21193744994 ps |
| CPU time | 88.94 seconds |
| Started | Aug 25 09:34:53 AM UTC 24 |
| Finished | Aug 25 09:36:24 AM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766895398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.2766895398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.94344015 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 186005135 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:34:55 AM UTC 24 |
| Finished | Aug 25 09:34:57 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=94344015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_received.94344015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.1325992436 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 197466965 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:34:55 AM UTC 24 |
| Finished | Aug 25 09:34:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325992436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_pkt_sent.1325992436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.1992494616 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 207294403 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:34:55 AM UTC 24 |
| Finished | Aug 25 09:34:58 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992494616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_random_length_in_transaction.1992494616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.479984749 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 150925973 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:34:55 AM UTC 24 |
| Finished | Aug 25 09:34:57 AM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=479984749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.479984749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.1052279634 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 172493214 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:34:55 AM UTC 24 |
| Finished | Aug 25 09:34:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052279634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.1052279634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.550097817 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 268643808 ps |
| CPU time | 1.92 seconds |
| Started | Aug 25 09:34:55 AM UTC 24 |
| Finished | Aug 25 09:34:58 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=550097817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_rx_full.550097817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.3924541606 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 159735214 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:34:55 AM UTC 24 |
| Finished | Aug 25 09:34:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924541606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_setup_stage.3924541606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.2257472037 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 150433097 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:34:55 AM UTC 24 |
| Finished | Aug 25 09:34:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257472037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.2257472037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.1860221034 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 205557801 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:34:56 AM UTC 24 |
| Finished | Aug 25 09:34:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860221034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.1860221034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.1449422928 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 2035787410 ps |
| CPU time | 81.18 seconds |
| Started | Aug 25 09:34:57 AM UTC 24 |
| Finished | Aug 25 09:36:20 AM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449422928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.1449422928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.1800330701 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 208487828 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:34:57 AM UTC 24 |
| Finished | Aug 25 09:34:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800330701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.1800330701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.143580451 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 163844690 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:34:57 AM UTC 24 |
| Finished | Aug 25 09:34:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=143580451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_stall_trans.143580451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.3689576117 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 266247078 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:34:58 AM UTC 24 |
| Finished | Aug 25 09:35:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689576117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.3689576117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.4220325588 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 4001363115 ps |
| CPU time | 57.36 seconds |
| Started | Aug 25 09:34:57 AM UTC 24 |
| Finished | Aug 25 09:35:56 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4220325588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.4220325588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.588517607 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 4422737133 ps |
| CPU time | 45.64 seconds |
| Started | Aug 25 09:34:41 AM UTC 24 |
| Finished | Aug 25 09:35:28 AM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=588517607 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.588517607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.3152472403 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 530839349 ps |
| CPU time | 2.22 seconds |
| Started | Aug 25 09:34:58 AM UTC 24 |
| Finished | Aug 25 09:35:02 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3152472403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_t x_rx_disruption.3152472403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.4054312166 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 445654649 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:54 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4054312166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.4054312166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.880854522 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 642726842 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=880854522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_t x_rx_disruption.880854522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.1987602226 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 539607893 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1987602226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.1987602226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.1131605809 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 490631078 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:54 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1131605809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.1131605809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.1487725623 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 576893331 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:44:04 AM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1487725623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_ tx_rx_disruption.1487725623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.832811427 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 511206860 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=832811427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_t x_rx_disruption.832811427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.2960079506 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 508548320 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2960079506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.2960079506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.3431081055 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 461596969 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3431081055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_ tx_rx_disruption.3431081055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.2751488633 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 531386002 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2751488633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_ tx_rx_disruption.2751488633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.3094685145 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 45430612 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:35:22 AM UTC 24 |
| Finished | Aug 25 09:35:25 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094685145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.3094685145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.466933223 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 6825410611 ps |
| CPU time | 22.8 seconds |
| Started | Aug 25 09:34:59 AM UTC 24 |
| Finished | Aug 25 09:35:24 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=466933223 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.466933223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.2235304558 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 20353036720 ps |
| CPU time | 56.97 seconds |
| Started | Aug 25 09:34:59 AM UTC 24 |
| Finished | Aug 25 09:35:58 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235304558 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.2235304558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.2379799063 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 25186607814 ps |
| CPU time | 57.39 seconds |
| Started | Aug 25 09:35:00 AM UTC 24 |
| Finished | Aug 25 09:35:59 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379799063 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.2379799063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.208984214 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 190197652 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:35:00 AM UTC 24 |
| Finished | Aug 25 09:35:02 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208984214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_av_buffer.208984214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.870860738 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 173539273 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:35:01 AM UTC 24 |
| Finished | Aug 25 09:35:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=870860738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_bitstuff_err.870860738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.1857877802 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 458297294 ps |
| CPU time | 1.93 seconds |
| Started | Aug 25 09:35:01 AM UTC 24 |
| Finished | Aug 25 09:35:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1857877802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.1857877802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.3097708333 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 423619340 ps |
| CPU time | 2.14 seconds |
| Started | Aug 25 09:35:01 AM UTC 24 |
| Finished | Aug 25 09:35:05 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097708333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.3097708333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.1796091295 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 23716518911 ps |
| CPU time | 62.76 seconds |
| Started | Aug 25 09:35:02 AM UTC 24 |
| Finished | Aug 25 09:36:06 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796091295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.1796091295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.1414856989 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 3755855798 ps |
| CPU time | 31.58 seconds |
| Started | Aug 25 09:35:03 AM UTC 24 |
| Finished | Aug 25 09:35:36 AM UTC 24 |
| Peak memory | 218432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414856989 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.1414856989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.3119330601 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 912007882 ps |
| CPU time | 4.25 seconds |
| Started | Aug 25 09:35:03 AM UTC 24 |
| Finished | Aug 25 09:35:09 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119330601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_disable_endpoint.3119330601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.2019849357 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 148791986 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:35:03 AM UTC 24 |
| Finished | Aug 25 09:35:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019849357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.2019849357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_enable.2936661501 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 50841094 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:35:03 AM UTC 24 |
| Finished | Aug 25 09:35:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936661501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.2936661501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.1318567780 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 1066259317 ps |
| CPU time | 4.61 seconds |
| Started | Aug 25 09:35:03 AM UTC 24 |
| Finished | Aug 25 09:35:09 AM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318567780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.1318567780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.1396805214 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 571501878 ps |
| CPU time | 2.63 seconds |
| Started | Aug 25 09:35:03 AM UTC 24 |
| Finished | Aug 25 09:35:07 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396805214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.1396805214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.4124704130 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 264817376 ps |
| CPU time | 3.06 seconds |
| Started | Aug 25 09:35:05 AM UTC 24 |
| Finished | Aug 25 09:35:10 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124704130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.4124704130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.1736260602 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 207978279 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:35:05 AM UTC 24 |
| Finished | Aug 25 09:35:08 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736260602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.1736260602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.1498090458 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 160142585 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:35:05 AM UTC 24 |
| Finished | Aug 25 09:35:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498090458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.1498090458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.3747311626 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 214003196 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:35:05 AM UTC 24 |
| Finished | Aug 25 09:35:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3747311626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.3747311626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.1407324366 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 2563810785 ps |
| CPU time | 24.62 seconds |
| Started | Aug 25 09:35:05 AM UTC 24 |
| Finished | Aug 25 09:35:32 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407324366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.1407324366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.1953807424 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 3811387577 ps |
| CPU time | 67.45 seconds |
| Started | Aug 25 09:35:06 AM UTC 24 |
| Finished | Aug 25 09:36:15 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953807424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.1953807424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.1432845313 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 291605006 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:35:06 AM UTC 24 |
| Finished | Aug 25 09:35:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1432845313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.1432845313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.2672989439 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 28405648483 ps |
| CPU time | 77.2 seconds |
| Started | Aug 25 09:35:07 AM UTC 24 |
| Finished | Aug 25 09:36:26 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2672989439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.2672989439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.1395318841 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 9899327551 ps |
| CPU time | 20.46 seconds |
| Started | Aug 25 09:35:07 AM UTC 24 |
| Finished | Aug 25 09:35:29 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395318841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.1395318841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.273422584 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 3304451559 ps |
| CPU time | 111.02 seconds |
| Started | Aug 25 09:35:07 AM UTC 24 |
| Finished | Aug 25 09:37:01 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=273422584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.273422584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.3343187209 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 3820056289 ps |
| CPU time | 139.4 seconds |
| Started | Aug 25 09:35:08 AM UTC 24 |
| Finished | Aug 25 09:37:31 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343187209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.3343187209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.3232458809 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 249071406 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:35:10 AM UTC 24 |
| Finished | Aug 25 09:35:13 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232458809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.3232458809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.1916933480 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 212036457 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:35:10 AM UTC 24 |
| Finished | Aug 25 09:35:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1916933480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.1916933480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.2463499793 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 1907559687 ps |
| CPU time | 26.92 seconds |
| Started | Aug 25 09:35:10 AM UTC 24 |
| Finished | Aug 25 09:35:38 AM UTC 24 |
| Peak memory | 228316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463499793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.2463499793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.3603584018 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 164506251 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:35:10 AM UTC 24 |
| Finished | Aug 25 09:35:13 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3603584018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.3603584018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.2345641757 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 184493128 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:35:10 AM UTC 24 |
| Finished | Aug 25 09:35:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2345641757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.2345641757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.2288844183 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 208257572 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:35:10 AM UTC 24 |
| Finished | Aug 25 09:35:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2288844183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.2288844183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.775459499 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 198358034 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:35:11 AM UTC 24 |
| Finished | Aug 25 09:35:14 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=775459499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_out_iso.775459499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.2484070213 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 154629269 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:35:13 AM UTC 24 |
| Finished | Aug 25 09:35:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484070213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_out_stall.2484070213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.1223146131 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 209554670 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:35:13 AM UTC 24 |
| Finished | Aug 25 09:35:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223146131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_out_trans_nak.1223146131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.1836852409 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 156914702 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:35:15 AM UTC 24 |
| Finished | Aug 25 09:35:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836852409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.1836852409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.4146046523 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 219508737 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:35:15 AM UTC 24 |
| Finished | Aug 25 09:35:18 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146046523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.4146046523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.3131671166 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 144352019 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:35:15 AM UTC 24 |
| Finished | Aug 25 09:35:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131671166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.3131671166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.1247421423 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 57743141 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:35:15 AM UTC 24 |
| Finished | Aug 25 09:35:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247421423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.1247421423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.1610678713 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 21645117435 ps |
| CPU time | 83.72 seconds |
| Started | Aug 25 09:35:15 AM UTC 24 |
| Finished | Aug 25 09:36:41 AM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1610678713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_pkt_buffer.1610678713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.2223728443 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 172335836 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:35:16 AM UTC 24 |
| Finished | Aug 25 09:35:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223728443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_pkt_received.2223728443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.613599723 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 239171248 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:35:18 AM UTC 24 |
| Finished | Aug 25 09:35:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=613599723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_pkt_sent.613599723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.3394376680 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 269902734 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:35:18 AM UTC 24 |
| Finished | Aug 25 09:35:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394376680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.3394376680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.2206220568 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 187577291 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:35:18 AM UTC 24 |
| Finished | Aug 25 09:35:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206220568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.2206220568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.3036625643 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 191162225 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:35:18 AM UTC 24 |
| Finished | Aug 25 09:35:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036625643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_rx_crc_err.3036625643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.2574299031 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 411215424 ps |
| CPU time | 2.06 seconds |
| Started | Aug 25 09:35:18 AM UTC 24 |
| Finished | Aug 25 09:35:21 AM UTC 24 |
| Peak memory | 217584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574299031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_rx_full.2574299031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.356399856 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 154411720 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:35:18 AM UTC 24 |
| Finished | Aug 25 09:35:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356399856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_setup_stage.356399856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.3607797602 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 187791279 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:35:18 AM UTC 24 |
| Finished | Aug 25 09:35:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607797602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.3607797602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.3880569319 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 224820966 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:35:18 AM UTC 24 |
| Finished | Aug 25 09:35:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880569319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.3880569319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.4226578101 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 1938287557 ps |
| CPU time | 23.52 seconds |
| Started | Aug 25 09:35:20 AM UTC 24 |
| Finished | Aug 25 09:35:45 AM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226578101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.4226578101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.830795099 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 188289938 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:35:20 AM UTC 24 |
| Finished | Aug 25 09:35:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=830795099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.830795099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.2768304952 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 168315836 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:35:20 AM UTC 24 |
| Finished | Aug 25 09:35:23 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768304952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.2768304952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.1374908088 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 726878371 ps |
| CPU time | 3.26 seconds |
| Started | Aug 25 09:35:20 AM UTC 24 |
| Finished | Aug 25 09:35:25 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1374908088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.1374908088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.2745432309 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 3932657947 ps |
| CPU time | 44.99 seconds |
| Started | Aug 25 09:35:20 AM UTC 24 |
| Finished | Aug 25 09:36:07 AM UTC 24 |
| Peak memory | 230520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2745432309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.2745432309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.530735328 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 1067445631 ps |
| CPU time | 13.11 seconds |
| Started | Aug 25 09:35:03 AM UTC 24 |
| Finished | Aug 25 09:35:18 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=530735328 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.530735328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.1417266936 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 459211994 ps |
| CPU time | 2.03 seconds |
| Started | Aug 25 09:35:20 AM UTC 24 |
| Finished | Aug 25 09:35:24 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1417266936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.1417266936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.268668170 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 492869092 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:54 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=268668170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_t x_rx_disruption.268668170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.3291040268 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 513711386 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:54 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3291040268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_ tx_rx_disruption.3291040268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.3944136247 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 503872781 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:54 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3944136247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_ tx_rx_disruption.3944136247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.3443911125 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 586411813 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3443911125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_ tx_rx_disruption.3443911125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.556197140 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 560209450 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:43:34 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=556197140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_t x_rx_disruption.556197140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.2313406858 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 483576806 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:43:36 AM UTC 24 |
| Finished | Aug 25 09:43:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2313406858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_ tx_rx_disruption.2313406858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.3835703973 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 564276306 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:43:37 AM UTC 24 |
| Finished | Aug 25 09:44:07 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3835703973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_ tx_rx_disruption.3835703973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.420730348 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 495771350 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:43:46 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=420730348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_t x_rx_disruption.420730348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.957003923 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 604122661 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:43:54 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=957003923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_t x_rx_disruption.957003923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.1227069029 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 572053426 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:43:54 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1227069029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.1227069029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.2433218568 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 35271606 ps |
| CPU time | 0.99 seconds |
| Started | Aug 25 09:35:41 AM UTC 24 |
| Finished | Aug 25 09:35:43 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433218568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.2433218568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.565359087 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 4936385881 ps |
| CPU time | 15.27 seconds |
| Started | Aug 25 09:35:23 AM UTC 24 |
| Finished | Aug 25 09:35:39 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=565359087 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.565359087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.705706357 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 14651975282 ps |
| CPU time | 48.53 seconds |
| Started | Aug 25 09:35:23 AM UTC 24 |
| Finished | Aug 25 09:36:13 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=705706357 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.705706357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.2286228239 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 24139885788 ps |
| CPU time | 66.26 seconds |
| Started | Aug 25 09:35:23 AM UTC 24 |
| Finished | Aug 25 09:36:31 AM UTC 24 |
| Peak memory | 228036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286228239 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.2286228239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.466815764 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 153165815 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:35:23 AM UTC 24 |
| Finished | Aug 25 09:35:25 AM UTC 24 |
| Peak memory | 216792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=466815764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_av_buffer.466815764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.2140623722 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 163773423 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:35:23 AM UTC 24 |
| Finished | Aug 25 09:35:25 AM UTC 24 |
| Peak memory | 216504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140623722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.2140623722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.1090751816 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 160674925 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:35:23 AM UTC 24 |
| Finished | Aug 25 09:35:25 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090751816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.1090751816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.2802331662 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 335245315 ps |
| CPU time | 1.94 seconds |
| Started | Aug 25 09:35:23 AM UTC 24 |
| Finished | Aug 25 09:35:26 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802331662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.2802331662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.3710881036 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 15333545395 ps |
| CPU time | 50 seconds |
| Started | Aug 25 09:35:24 AM UTC 24 |
| Finished | Aug 25 09:36:16 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710881036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.3710881036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.3146665806 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 3363897074 ps |
| CPU time | 37.3 seconds |
| Started | Aug 25 09:35:24 AM UTC 24 |
| Finished | Aug 25 09:36:03 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146665806 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.3146665806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.1151913520 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 523854373 ps |
| CPU time | 2.48 seconds |
| Started | Aug 25 09:35:24 AM UTC 24 |
| Finished | Aug 25 09:35:28 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1151913520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.1151913520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.506185548 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 161940751 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:35:26 AM UTC 24 |
| Finished | Aug 25 09:35:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506185548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_disconnected.506185548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_enable.1126377610 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 46776388 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:35:26 AM UTC 24 |
| Finished | Aug 25 09:35:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126377610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_enable.1126377610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.1477294679 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 625220651 ps |
| CPU time | 2.93 seconds |
| Started | Aug 25 09:35:26 AM UTC 24 |
| Finished | Aug 25 09:35:30 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477294679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.1477294679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.1275860361 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 223732495 ps |
| CPU time | 3.29 seconds |
| Started | Aug 25 09:35:26 AM UTC 24 |
| Finished | Aug 25 09:35:30 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1275860361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.1275860361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.1872893574 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 243132225 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:35:26 AM UTC 24 |
| Finished | Aug 25 09:35:29 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872893574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.1872893574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.135506135 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 139834510 ps |
| CPU time | 1.17 seconds |
| Started | Aug 25 09:35:26 AM UTC 24 |
| Finished | Aug 25 09:35:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135506135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_in_stall.135506135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.2124626911 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 238856545 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:35:27 AM UTC 24 |
| Finished | Aug 25 09:35:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124626911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.2124626911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.3715868300 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 3879002729 ps |
| CPU time | 144.84 seconds |
| Started | Aug 25 09:35:26 AM UTC 24 |
| Finished | Aug 25 09:37:54 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715868300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.3715868300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.2424147077 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 4304259243 ps |
| CPU time | 44.15 seconds |
| Started | Aug 25 09:35:29 AM UTC 24 |
| Finished | Aug 25 09:36:15 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2424147077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.2424147077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.2234406019 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 230100786 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:35:29 AM UTC 24 |
| Finished | Aug 25 09:35:31 AM UTC 24 |
| Peak memory | 215996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234406019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.2234406019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.1999655757 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 28007660109 ps |
| CPU time | 80.31 seconds |
| Started | Aug 25 09:35:29 AM UTC 24 |
| Finished | Aug 25 09:36:51 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999655757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.1999655757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.406484190 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 8856356248 ps |
| CPU time | 16.85 seconds |
| Started | Aug 25 09:35:30 AM UTC 24 |
| Finished | Aug 25 09:35:48 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=406484190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_suspend.406484190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.2070443257 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 2488442345 ps |
| CPU time | 33.32 seconds |
| Started | Aug 25 09:35:30 AM UTC 24 |
| Finished | Aug 25 09:36:05 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2070443257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.2070443257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.4129994981 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 2604271591 ps |
| CPU time | 31.78 seconds |
| Started | Aug 25 09:35:30 AM UTC 24 |
| Finished | Aug 25 09:36:04 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4129994981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.4129994981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.3611534872 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 270902262 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:35:30 AM UTC 24 |
| Finished | Aug 25 09:35:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611534872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.3611534872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.685904389 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 193695092 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:35:30 AM UTC 24 |
| Finished | Aug 25 09:35:33 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=685904389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.685904389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.605212320 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 3217549868 ps |
| CPU time | 111.56 seconds |
| Started | Aug 25 09:35:32 AM UTC 24 |
| Finished | Aug 25 09:37:26 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=605212320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.605212320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.1808610173 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 159990387 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:35:32 AM UTC 24 |
| Finished | Aug 25 09:35:35 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808610173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.1808610173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.1893104230 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 155272047 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:35:32 AM UTC 24 |
| Finished | Aug 25 09:35:35 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893104230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.1893104230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.831923808 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 227244948 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:35:32 AM UTC 24 |
| Finished | Aug 25 09:35:35 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=831923808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_nak_trans.831923808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.3191994609 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 179776083 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:35:32 AM UTC 24 |
| Finished | Aug 25 09:35:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3191994609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.3191994609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.3177615688 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 233816879 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:35:32 AM UTC 24 |
| Finished | Aug 25 09:35:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177615688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_out_stall.3177615688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.587491188 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 218912631 ps |
| CPU time | 1.82 seconds |
| Started | Aug 25 09:35:33 AM UTC 24 |
| Finished | Aug 25 09:35:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=587491188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_out_trans_nak.587491188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.3946937399 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 179598275 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:35:33 AM UTC 24 |
| Finished | Aug 25 09:35:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3946937399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.3946937399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.1262276113 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 233907329 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:35:35 AM UTC 24 |
| Finished | Aug 25 09:35:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262276113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.1262276113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.2149876712 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 147428439 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:35:35 AM UTC 24 |
| Finished | Aug 25 09:35:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149876712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.2149876712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.1950808044 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 45867831 ps |
| CPU time | 1.12 seconds |
| Started | Aug 25 09:35:36 AM UTC 24 |
| Finished | Aug 25 09:35:38 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950808044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.1950808044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.4269549135 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 19206227165 ps |
| CPU time | 75.11 seconds |
| Started | Aug 25 09:35:36 AM UTC 24 |
| Finished | Aug 25 09:36:53 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269549135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_pkt_buffer.4269549135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.497080190 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 187258563 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:35:36 AM UTC 24 |
| Finished | Aug 25 09:35:39 AM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=497080190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_pkt_received.497080190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.3524093845 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 244103969 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:35:36 AM UTC 24 |
| Finished | Aug 25 09:35:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524093845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.3524093845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.516621277 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 180156005 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:35:36 AM UTC 24 |
| Finished | Aug 25 09:35:39 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=516621277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_random_length_in_transaction.516621277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.1290359917 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 147978870 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:35:37 AM UTC 24 |
| Finished | Aug 25 09:35:40 AM UTC 24 |
| Peak memory | 215940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290359917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.1290359917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.4043535472 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 140716887 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:35:37 AM UTC 24 |
| Finished | Aug 25 09:35:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043535472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.4043535472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.2837741721 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 360559730 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:35:38 AM UTC 24 |
| Finished | Aug 25 09:35:41 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2837741721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.2837741721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.540384066 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 156302814 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:35:38 AM UTC 24 |
| Finished | Aug 25 09:35:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=540384066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_setup_stage.540384066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.1666411747 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 175499614 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:35:39 AM UTC 24 |
| Finished | Aug 25 09:35:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666411747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.1666411747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.3793947197 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 232463751 ps |
| CPU time | 1.87 seconds |
| Started | Aug 25 09:35:39 AM UTC 24 |
| Finished | Aug 25 09:35:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793947197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.3793947197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.1488556858 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 2641205522 ps |
| CPU time | 24.17 seconds |
| Started | Aug 25 09:35:39 AM UTC 24 |
| Finished | Aug 25 09:36:05 AM UTC 24 |
| Peak memory | 235252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488556858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.1488556858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.1779921709 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 199206057 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:35:39 AM UTC 24 |
| Finished | Aug 25 09:35:42 AM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779921709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.1779921709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.2918374378 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 153918775 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:35:39 AM UTC 24 |
| Finished | Aug 25 09:35:42 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918374378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_stall_trans.2918374378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.1346006263 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 790025544 ps |
| CPU time | 4.19 seconds |
| Started | Aug 25 09:35:40 AM UTC 24 |
| Finished | Aug 25 09:35:45 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346006263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.1346006263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.453243307 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 1698575943 ps |
| CPU time | 60.86 seconds |
| Started | Aug 25 09:35:39 AM UTC 24 |
| Finished | Aug 25 09:36:42 AM UTC 24 |
| Peak memory | 228316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=453243307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_streaming_out.453243307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.2133244263 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 1099220816 ps |
| CPU time | 11.8 seconds |
| Started | Aug 25 09:35:24 AM UTC 24 |
| Finished | Aug 25 09:35:37 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133244263 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.2133244263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.639320781 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 472883126 ps |
| CPU time | 2.32 seconds |
| Started | Aug 25 09:35:41 AM UTC 24 |
| Finished | Aug 25 09:35:45 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=639320781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_tx _rx_disruption.639320781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.2607183766 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 567657123 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2607183766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_ tx_rx_disruption.2607183766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.1240758566 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 515361075 ps |
| CPU time | 2.19 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:43:55 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1240758566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.1240758566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.2854572702 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 420576943 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:43:54 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2854572702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.2854572702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.1385875753 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 506790327 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:43:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1385875753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.1385875753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.421704671 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 513002100 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:43:54 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=421704671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_t x_rx_disruption.421704671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.2093092016 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 546253042 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:44:04 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2093092016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_ tx_rx_disruption.2093092016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.369593391 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 459330025 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:44:04 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=369593391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_t x_rx_disruption.369593391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.3044784736 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 543013183 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:44:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3044784736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.3044784736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.2756940382 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 491444631 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:43:43 AM UTC 24 |
| Finished | Aug 25 09:44:04 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2756940382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_ tx_rx_disruption.2756940382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.799176856 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 595284341 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:43:44 AM UTC 24 |
| Finished | Aug 25 09:44:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=799176856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_t x_rx_disruption.799176856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.1719628093 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 39128691 ps |
| CPU time | 0.94 seconds |
| Started | Aug 25 09:21:59 AM UTC 24 |
| Finished | Aug 25 09:22:01 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719628093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.1719628093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.2761084255 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 10466597609 ps |
| CPU time | 27.84 seconds |
| Started | Aug 25 09:20:36 AM UTC 24 |
| Finished | Aug 25 09:21:05 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761084255 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.2761084255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.3591832250 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 14416773913 ps |
| CPU time | 38.94 seconds |
| Started | Aug 25 09:20:37 AM UTC 24 |
| Finished | Aug 25 09:21:18 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591832250 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.3591832250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.3594555568 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 30161318740 ps |
| CPU time | 70.26 seconds |
| Started | Aug 25 09:20:38 AM UTC 24 |
| Finished | Aug 25 09:21:50 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3594555568 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.3594555568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.2045095756 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 167113931 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:20:38 AM UTC 24 |
| Finished | Aug 25 09:20:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2045095756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.2045095756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.3457844358 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 184643130 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:20:40 AM UTC 24 |
| Finished | Aug 25 09:20:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457844358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.3457844358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.2808272352 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 149363793 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:20:43 AM UTC 24 |
| Finished | Aug 25 09:20:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808272352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_bitstuff_err.2808272352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.786873309 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 518730532 ps |
| CPU time | 2.59 seconds |
| Started | Aug 25 09:20:44 AM UTC 24 |
| Finished | Aug 25 09:20:48 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=786873309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_data_toggle_clear.786873309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.2943346687 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 458623451 ps |
| CPU time | 2.25 seconds |
| Started | Aug 25 09:20:44 AM UTC 24 |
| Finished | Aug 25 09:20:47 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943346687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.2943346687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.811038821 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 3456511511 ps |
| CPU time | 35.27 seconds |
| Started | Aug 25 09:20:45 AM UTC 24 |
| Finished | Aug 25 09:21:22 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=811038821 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.811038821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.1680440696 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 762160618 ps |
| CPU time | 2.74 seconds |
| Started | Aug 25 09:20:49 AM UTC 24 |
| Finished | Aug 25 09:20:52 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680440696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_disable_endpoint.1680440696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.2067799855 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 143248680 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:20:49 AM UTC 24 |
| Finished | Aug 25 09:20:51 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2067799855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.2067799855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_enable.1016145273 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 31555313 ps |
| CPU time | 1.02 seconds |
| Started | Aug 25 09:20:52 AM UTC 24 |
| Finished | Aug 25 09:20:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016145273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_enable.1016145273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.3769409303 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 983000596 ps |
| CPU time | 3.67 seconds |
| Started | Aug 25 09:20:53 AM UTC 24 |
| Finished | Aug 25 09:20:58 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769409303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.3769409303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.669920414 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 230070125 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:20:55 AM UTC 24 |
| Finished | Aug 25 09:20:58 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=669920414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.669920414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.3948783926 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 260349557 ps |
| CPU time | 2.82 seconds |
| Started | Aug 25 09:20:59 AM UTC 24 |
| Finished | Aug 25 09:21:03 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948783926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_fifo_rst.3948783926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.2551559781 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 114188960193 ps |
| CPU time | 328.36 seconds |
| Started | Aug 25 09:20:59 AM UTC 24 |
| Finished | Aug 25 09:26:33 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551559781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.2551559781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.3085512263 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 87158610776 ps |
| CPU time | 297.68 seconds |
| Started | Aug 25 09:20:59 AM UTC 24 |
| Finished | Aug 25 09:26:02 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3085512263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_hiclk_max.3085512263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.1166658399 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 116097913580 ps |
| CPU time | 311.97 seconds |
| Started | Aug 25 09:20:59 AM UTC 24 |
| Finished | Aug 25 09:26:17 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166658399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.1166658399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.4134263905 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 109222194966 ps |
| CPU time | 398.74 seconds |
| Started | Aug 25 09:21:05 AM UTC 24 |
| Finished | Aug 25 09:27:50 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=4134263905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.4134263905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.4174950226 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 90146743408 ps |
| CPU time | 252.19 seconds |
| Started | Aug 25 09:21:07 AM UTC 24 |
| Finished | Aug 25 09:25:23 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4174950226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.4174950226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.3455552260 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 156355291 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:21:10 AM UTC 24 |
| Finished | Aug 25 09:21:13 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3455552260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.3455552260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.3286593774 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 147950252 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:21:10 AM UTC 24 |
| Finished | Aug 25 09:21:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3286593774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_stall.3286593774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.678074514 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 220373381 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:21:10 AM UTC 24 |
| Finished | Aug 25 09:21:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=678074514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_in_trans.678074514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.3764649415 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 4165575074 ps |
| CPU time | 57.97 seconds |
| Started | Aug 25 09:21:08 AM UTC 24 |
| Finished | Aug 25 09:22:09 AM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764649415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.3764649415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.920531571 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 11811881164 ps |
| CPU time | 111.24 seconds |
| Started | Aug 25 09:21:11 AM UTC 24 |
| Finished | Aug 25 09:23:05 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=920531571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.920531571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1201331068 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 248119406 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:21:13 AM UTC 24 |
| Finished | Aug 25 09:21:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201331068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.1201331068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.1008938056 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 7364018854 ps |
| CPU time | 20.33 seconds |
| Started | Aug 25 09:21:14 AM UTC 24 |
| Finished | Aug 25 09:21:36 AM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008938056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.1008938056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.658039989 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 10616747271 ps |
| CPU time | 23.32 seconds |
| Started | Aug 25 09:21:14 AM UTC 24 |
| Finished | Aug 25 09:21:39 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=658039989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_suspend.658039989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.622420727 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 3630709229 ps |
| CPU time | 50.54 seconds |
| Started | Aug 25 09:21:14 AM UTC 24 |
| Finished | Aug 25 09:22:07 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=622420727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.622420727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.3250537833 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 1657777712 ps |
| CPU time | 17.45 seconds |
| Started | Aug 25 09:21:17 AM UTC 24 |
| Finished | Aug 25 09:21:36 AM UTC 24 |
| Peak memory | 230236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250537833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.3250537833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.4026027988 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 241751067 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:21:17 AM UTC 24 |
| Finished | Aug 25 09:21:20 AM UTC 24 |
| Peak memory | 215940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026027988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.4026027988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.3170009832 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 184247906 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:21:19 AM UTC 24 |
| Finished | Aug 25 09:21:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170009832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.3170009832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.3096220478 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 2802451362 ps |
| CPU time | 100.14 seconds |
| Started | Aug 25 09:21:19 AM UTC 24 |
| Finished | Aug 25 09:23:01 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3096220478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.3096220478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.3540312368 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 2866606052 ps |
| CPU time | 31.69 seconds |
| Started | Aug 25 09:21:21 AM UTC 24 |
| Finished | Aug 25 09:21:54 AM UTC 24 |
| Peak memory | 235308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540312368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.3540312368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.1342026746 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 2698322849 ps |
| CPU time | 26.17 seconds |
| Started | Aug 25 09:21:22 AM UTC 24 |
| Finished | Aug 25 09:21:49 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342026746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.1342026746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.2622129209 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 177914342 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:21:23 AM UTC 24 |
| Finished | Aug 25 09:21:26 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622129209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.2622129209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.3688332552 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 145356658 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:21:24 AM UTC 24 |
| Finished | Aug 25 09:21:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688332552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.3688332552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.1382760482 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 189895199 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:21:26 AM UTC 24 |
| Finished | Aug 25 09:21:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382760482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.1382760482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.2918320805 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 157623846 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:21:26 AM UTC 24 |
| Finished | Aug 25 09:21:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918320805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_out_iso.2918320805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.1856365143 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 167075432 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:21:28 AM UTC 24 |
| Finished | Aug 25 09:21:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856365143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_out_stall.1856365143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.1097137322 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 205870944 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:21:30 AM UTC 24 |
| Finished | Aug 25 09:21:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1097137322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_out_trans_nak.1097137322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.186227574 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 158784342 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:21:30 AM UTC 24 |
| Finished | Aug 25 09:21:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=186227574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pending_in_trans.186227574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.1959836165 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 226057496 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:21:31 AM UTC 24 |
| Finished | Aug 25 09:21:34 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1959836165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.1959836165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.971529806 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 191043441 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:21:33 AM UTC 24 |
| Finished | Aug 25 09:21:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=971529806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.971529806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.332647825 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 175033688 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:21:33 AM UTC 24 |
| Finished | Aug 25 09:21:36 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332647825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.332647825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.2823529354 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 41413170 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:21:35 AM UTC 24 |
| Finished | Aug 25 09:21:37 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823529354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.2823529354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.396075724 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 203159862 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:21:37 AM UTC 24 |
| Finished | Aug 25 09:21:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=396075724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_pkt_received.396075724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.3014685813 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 171177467 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:21:37 AM UTC 24 |
| Finished | Aug 25 09:21:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014685813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_pkt_sent.3014685813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.1498726663 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 5955669992 ps |
| CPU time | 32.65 seconds |
| Started | Aug 25 09:21:39 AM UTC 24 |
| Finished | Aug 25 09:22:13 AM UTC 24 |
| Peak memory | 235248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498726663 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.1498726663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.4002371266 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 6836338869 ps |
| CPU time | 120.36 seconds |
| Started | Aug 25 09:21:41 AM UTC 24 |
| Finished | Aug 25 09:23:44 AM UTC 24 |
| Peak memory | 235308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002371266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.4002371266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.3080599355 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 7325031378 ps |
| CPU time | 125.24 seconds |
| Started | Aug 25 09:21:41 AM UTC 24 |
| Finished | Aug 25 09:23:49 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080599355 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.3080599355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.4278087756 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 199842754 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:21:37 AM UTC 24 |
| Finished | Aug 25 09:21:40 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278087756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.4278087756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.2171454111 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 210156149 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:21:38 AM UTC 24 |
| Finished | Aug 25 09:21:41 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2171454111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.2171454111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.1873304464 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 20180748707 ps |
| CPU time | 43.22 seconds |
| Started | Aug 25 09:21:41 AM UTC 24 |
| Finished | Aug 25 09:22:26 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873304464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.1873304464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.3718627171 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 130448638 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:21:42 AM UTC 24 |
| Finished | Aug 25 09:21:44 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718627171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.3718627171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.3332303869 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 280953543 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:21:45 AM UTC 24 |
| Finished | Aug 25 09:21:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332303869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_rx_full.3332303869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.2876412424 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 190531028 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:21:45 AM UTC 24 |
| Finished | Aug 25 09:21:48 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876412424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_pid_err.2876412424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.2302447994 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 885903823 ps |
| CPU time | 3.17 seconds |
| Started | Aug 25 09:21:59 AM UTC 24 |
| Finished | Aug 25 09:22:03 AM UTC 24 |
| Peak memory | 252488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302447994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.2302447994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.2206120521 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 379422303 ps |
| CPU time | 2 seconds |
| Started | Aug 25 09:21:48 AM UTC 24 |
| Finished | Aug 25 09:21:51 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206120521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.2206120521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.2996006406 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 210567493 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:21:49 AM UTC 24 |
| Finished | Aug 25 09:21:52 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996006406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.2996006406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.4221972077 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 146962405 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:21:51 AM UTC 24 |
| Finished | Aug 25 09:21:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221972077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_setup_stage.4221972077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.2277108575 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 151712461 ps |
| CPU time | 1.17 seconds |
| Started | Aug 25 09:21:51 AM UTC 24 |
| Finished | Aug 25 09:21:53 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277108575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 3.usbdev_setup_trans_ignored.2277108575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.2376294510 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 255085193 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:21:52 AM UTC 24 |
| Finished | Aug 25 09:21:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2376294510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.2376294510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.3458957507 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 2104380665 ps |
| CPU time | 19.6 seconds |
| Started | Aug 25 09:21:52 AM UTC 24 |
| Finished | Aug 25 09:22:13 AM UTC 24 |
| Peak memory | 235120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3458957507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.3458957507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.2090118541 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 190707988 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:21:54 AM UTC 24 |
| Finished | Aug 25 09:21:57 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2090118541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.2090118541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.3463128816 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 183759220 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:21:54 AM UTC 24 |
| Finished | Aug 25 09:21:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463128816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.3463128816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.3961637886 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 1119021887 ps |
| CPU time | 5.39 seconds |
| Started | Aug 25 09:21:54 AM UTC 24 |
| Finished | Aug 25 09:22:01 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961637886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.3961637886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.3152661861 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 2431032153 ps |
| CPU time | 86.49 seconds |
| Started | Aug 25 09:21:54 AM UTC 24 |
| Finished | Aug 25 09:23:23 AM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152661861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_streaming_out.3152661861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.2923589076 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 8351370737 ps |
| CPU time | 77.32 seconds |
| Started | Aug 25 09:21:56 AM UTC 24 |
| Finished | Aug 25 09:23:15 AM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923589076 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.2923589076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.2106211722 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 2438489154 ps |
| CPU time | 29.22 seconds |
| Started | Aug 25 09:20:46 AM UTC 24 |
| Finished | Aug 25 09:21:17 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106211722 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.2106211722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.2581333587 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 503453070 ps |
| CPU time | 2.24 seconds |
| Started | Aug 25 09:21:57 AM UTC 24 |
| Finished | Aug 25 09:22:00 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2581333587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.2581333587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.197078458 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 105136009 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:36:05 AM UTC 24 |
| Finished | Aug 25 09:36:07 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=197078458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.197078458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.1590184773 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 4616106821 ps |
| CPU time | 12.9 seconds |
| Started | Aug 25 09:35:41 AM UTC 24 |
| Finished | Aug 25 09:35:56 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590184773 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.1590184773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.3828860898 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 15756250302 ps |
| CPU time | 29.94 seconds |
| Started | Aug 25 09:35:41 AM UTC 24 |
| Finished | Aug 25 09:36:13 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3828860898 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.3828860898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.2958468958 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 30576399293 ps |
| CPU time | 78.78 seconds |
| Started | Aug 25 09:35:42 AM UTC 24 |
| Finished | Aug 25 09:37:02 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958468958 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.2958468958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.3608045430 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 189625501 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:35:42 AM UTC 24 |
| Finished | Aug 25 09:35:44 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608045430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.3608045430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.1741923162 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 150506554 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:35:43 AM UTC 24 |
| Finished | Aug 25 09:35:46 AM UTC 24 |
| Peak memory | 216060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741923162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_bitstuff_err.1741923162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.1956455913 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 540123174 ps |
| CPU time | 2.29 seconds |
| Started | Aug 25 09:35:43 AM UTC 24 |
| Finished | Aug 25 09:35:46 AM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956455913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.1956455913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.3532852754 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 289829348 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:35:43 AM UTC 24 |
| Finished | Aug 25 09:35:46 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532852754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.3532852754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.1863628175 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 12866203532 ps |
| CPU time | 26.89 seconds |
| Started | Aug 25 09:35:43 AM UTC 24 |
| Finished | Aug 25 09:36:11 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863628175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.1863628175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.1931634040 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 2945911670 ps |
| CPU time | 29.91 seconds |
| Started | Aug 25 09:35:43 AM UTC 24 |
| Finished | Aug 25 09:36:15 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931634040 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.1931634040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.527085279 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 329160420 ps |
| CPU time | 2.17 seconds |
| Started | Aug 25 09:35:44 AM UTC 24 |
| Finished | Aug 25 09:35:48 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=527085279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_disable_endpoint.527085279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.3381190804 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 147174454 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:35:46 AM UTC 24 |
| Finished | Aug 25 09:35:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381190804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.3381190804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_enable.3814458094 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 41725589 ps |
| CPU time | 1.17 seconds |
| Started | Aug 25 09:35:46 AM UTC 24 |
| Finished | Aug 25 09:35:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814458094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.3814458094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.1179091828 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 834090740 ps |
| CPU time | 4.46 seconds |
| Started | Aug 25 09:35:46 AM UTC 24 |
| Finished | Aug 25 09:35:52 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179091828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.1179091828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.1615097133 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 298876092 ps |
| CPU time | 1.94 seconds |
| Started | Aug 25 09:35:46 AM UTC 24 |
| Finished | Aug 25 09:35:49 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615097133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.1615097133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.2589655129 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 297705949 ps |
| CPU time | 3.19 seconds |
| Started | Aug 25 09:35:46 AM UTC 24 |
| Finished | Aug 25 09:35:50 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589655129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.2589655129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.4030268299 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 195017693 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:35:47 AM UTC 24 |
| Finished | Aug 25 09:35:50 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4030268299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.4030268299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.2261458279 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 160388731 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:35:47 AM UTC 24 |
| Finished | Aug 25 09:35:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2261458279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.2261458279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.2108487883 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 267799032 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:35:48 AM UTC 24 |
| Finished | Aug 25 09:35:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108487883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_trans.2108487883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.1677567306 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 4523716059 ps |
| CPU time | 62.3 seconds |
| Started | Aug 25 09:35:47 AM UTC 24 |
| Finished | Aug 25 09:36:52 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677567306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.1677567306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.383565096 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 6069709024 ps |
| CPU time | 91.3 seconds |
| Started | Aug 25 09:35:50 AM UTC 24 |
| Finished | Aug 25 09:37:23 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=383565096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.383565096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.4099105588 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 163109813 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:35:50 AM UTC 24 |
| Finished | Aug 25 09:35:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4099105588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.4099105588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.1221683592 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 15533285673 ps |
| CPU time | 35.5 seconds |
| Started | Aug 25 09:35:50 AM UTC 24 |
| Finished | Aug 25 09:36:27 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221683592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.1221683592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.2997203533 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 8495290340 ps |
| CPU time | 19.18 seconds |
| Started | Aug 25 09:35:50 AM UTC 24 |
| Finished | Aug 25 09:36:10 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997203533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.2997203533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.2911125943 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 3065970501 ps |
| CPU time | 110.57 seconds |
| Started | Aug 25 09:35:51 AM UTC 24 |
| Finished | Aug 25 09:37:45 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911125943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.2911125943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.1901832158 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 2990497785 ps |
| CPU time | 30.69 seconds |
| Started | Aug 25 09:35:51 AM UTC 24 |
| Finished | Aug 25 09:36:23 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901832158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.1901832158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.2781431938 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 271106334 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:35:51 AM UTC 24 |
| Finished | Aug 25 09:35:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2781431938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.2781431938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.2239368430 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 217785325 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:35:52 AM UTC 24 |
| Finished | Aug 25 09:35:55 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239368430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.2239368430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.698851581 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 1619246377 ps |
| CPU time | 15.91 seconds |
| Started | Aug 25 09:35:52 AM UTC 24 |
| Finished | Aug 25 09:36:10 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=698851581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.698851581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.2868868474 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 191068113 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:35:55 AM UTC 24 |
| Finished | Aug 25 09:35:57 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868868474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.2868868474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.1360445062 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 146279523 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:35:55 AM UTC 24 |
| Finished | Aug 25 09:35:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1360445062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.1360445062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.1212102338 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 190730541 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:35:55 AM UTC 24 |
| Finished | Aug 25 09:35:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1212102338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.1212102338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.1459264068 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 172770873 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:35:55 AM UTC 24 |
| Finished | Aug 25 09:35:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459264068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_iso.1459264068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.2970096920 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 161943232 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:35:56 AM UTC 24 |
| Finished | Aug 25 09:35:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2970096920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_out_stall.2970096920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.230797928 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 211272436 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:35:57 AM UTC 24 |
| Finished | Aug 25 09:36:00 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=230797928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_out_trans_nak.230797928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.1008885740 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 164358290 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:35:57 AM UTC 24 |
| Finished | Aug 25 09:36:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008885740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.1008885740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.2189092015 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 243243845 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:35:59 AM UTC 24 |
| Finished | Aug 25 09:36:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2189092015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.2189092015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.3493251677 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 175045435 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:35:59 AM UTC 24 |
| Finished | Aug 25 09:36:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493251677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.3493251677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.2724681290 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 31534877 ps |
| CPU time | 1.06 seconds |
| Started | Aug 25 09:35:59 AM UTC 24 |
| Finished | Aug 25 09:36:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724681290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.2724681290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.3898496961 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 18290039042 ps |
| CPU time | 69.77 seconds |
| Started | Aug 25 09:35:59 AM UTC 24 |
| Finished | Aug 25 09:37:11 AM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3898496961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.3898496961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.2868097199 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 160439363 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:35:59 AM UTC 24 |
| Finished | Aug 25 09:36:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868097199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.2868097199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.980315590 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 212460541 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:35:59 AM UTC 24 |
| Finished | Aug 25 09:36:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=980315590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_pkt_sent.980315590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.3008737913 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 204541851 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:36:00 AM UTC 24 |
| Finished | Aug 25 09:36:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008737913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.3008737913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.3765254249 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 178395621 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:36:00 AM UTC 24 |
| Finished | Aug 25 09:36:03 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3765254249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.3765254249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.2647953433 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 143997231 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:36:00 AM UTC 24 |
| Finished | Aug 25 09:36:03 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2647953433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_rx_crc_err.2647953433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.4063233173 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 256446771 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:36:00 AM UTC 24 |
| Finished | Aug 25 09:36:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063233173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.4063233173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.2905505195 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 165034940 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:36:02 AM UTC 24 |
| Finished | Aug 25 09:36:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905505195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.2905505195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.4166443065 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 191944232 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:36:02 AM UTC 24 |
| Finished | Aug 25 09:36:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166443065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.4166443065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.3715899350 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 186907930 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:36:03 AM UTC 24 |
| Finished | Aug 25 09:36:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715899350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.3715899350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.1570142916 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 2342078753 ps |
| CPU time | 23.95 seconds |
| Started | Aug 25 09:36:03 AM UTC 24 |
| Finished | Aug 25 09:36:28 AM UTC 24 |
| Peak memory | 235120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570142916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.1570142916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.1172432151 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 152469223 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:36:03 AM UTC 24 |
| Finished | Aug 25 09:36:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172432151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.1172432151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.1865639473 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 146950682 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:36:03 AM UTC 24 |
| Finished | Aug 25 09:36:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1865639473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.1865639473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.1489073879 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 330345495 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:36:05 AM UTC 24 |
| Finished | Aug 25 09:36:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489073879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.1489073879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.3623183463 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 4062448522 ps |
| CPU time | 40.99 seconds |
| Started | Aug 25 09:36:05 AM UTC 24 |
| Finished | Aug 25 09:36:47 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3623183463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.3623183463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.1742075100 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 1881687401 ps |
| CPU time | 52.94 seconds |
| Started | Aug 25 09:35:44 AM UTC 24 |
| Finished | Aug 25 09:36:39 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1742075100 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.1742075100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.3020502022 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 496909446 ps |
| CPU time | 2.75 seconds |
| Started | Aug 25 09:36:05 AM UTC 24 |
| Finished | Aug 25 09:36:09 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3020502022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_t x_rx_disruption.3020502022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.1462668118 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 507669528 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:43:45 AM UTC 24 |
| Finished | Aug 25 09:43:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1462668118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.1462668118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.441587370 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 500175869 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:43:45 AM UTC 24 |
| Finished | Aug 25 09:43:56 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=441587370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_t x_rx_disruption.441587370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.3196190854 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 609811914 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:43:45 AM UTC 24 |
| Finished | Aug 25 09:44:35 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3196190854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_ tx_rx_disruption.3196190854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.2118561139 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 481652275 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:43:45 AM UTC 24 |
| Finished | Aug 25 09:44:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2118561139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.2118561139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.643131213 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 606815555 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:43:45 AM UTC 24 |
| Finished | Aug 25 09:44:35 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=643131213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_t x_rx_disruption.643131213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.3494949619 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 496883639 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:43:45 AM UTC 24 |
| Finished | Aug 25 09:44:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3494949619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.3494949619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.1567354700 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 637272444 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:43:45 AM UTC 24 |
| Finished | Aug 25 09:44:11 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1567354700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.1567354700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.464765129 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 549413853 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:43:45 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=464765129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_t x_rx_disruption.464765129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.1240737268 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 602815216 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:43:45 AM UTC 24 |
| Finished | Aug 25 09:44:11 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1240737268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_ tx_rx_disruption.1240737268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.2578871105 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 531505802 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:43:47 AM UTC 24 |
| Finished | Aug 25 09:43:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2578871105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.2578871105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.4131847443 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 38212942 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:36:21 AM UTC 24 |
| Finished | Aug 25 09:36:23 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4131847443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.4131847443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.3165311426 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 9858438590 ps |
| CPU time | 24.11 seconds |
| Started | Aug 25 09:36:05 AM UTC 24 |
| Finished | Aug 25 09:36:30 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165311426 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.3165311426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.3668733911 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 14989524196 ps |
| CPU time | 23.17 seconds |
| Started | Aug 25 09:36:05 AM UTC 24 |
| Finished | Aug 25 09:36:29 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3668733911 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.3668733911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.3125847275 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 23819161338 ps |
| CPU time | 61.83 seconds |
| Started | Aug 25 09:36:05 AM UTC 24 |
| Finished | Aug 25 09:37:09 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125847275 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.3125847275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.2609014186 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 167095058 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:36:05 AM UTC 24 |
| Finished | Aug 25 09:36:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609014186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.2609014186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.76088314 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 148089698 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:36:06 AM UTC 24 |
| Finished | Aug 25 09:36:09 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=76088314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_bitstuff_err.76088314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.1346681227 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 294323208 ps |
| CPU time | 2.02 seconds |
| Started | Aug 25 09:36:07 AM UTC 24 |
| Finished | Aug 25 09:36:10 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346681227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 31.usbdev_data_toggle_clear.1346681227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.1258493874 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 343712113 ps |
| CPU time | 2.07 seconds |
| Started | Aug 25 09:36:07 AM UTC 24 |
| Finished | Aug 25 09:36:10 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258493874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.1258493874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.2147404200 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 34470498346 ps |
| CPU time | 101.71 seconds |
| Started | Aug 25 09:36:07 AM UTC 24 |
| Finished | Aug 25 09:37:51 AM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147404200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.2147404200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.2517125702 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 657195365 ps |
| CPU time | 6.66 seconds |
| Started | Aug 25 09:36:07 AM UTC 24 |
| Finished | Aug 25 09:36:15 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2517125702 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.2517125702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.1928288713 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 736629126 ps |
| CPU time | 2.65 seconds |
| Started | Aug 25 09:36:08 AM UTC 24 |
| Finished | Aug 25 09:36:12 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928288713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.1928288713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.451291398 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 172823315 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:36:09 AM UTC 24 |
| Finished | Aug 25 09:36:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=451291398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_disconnected.451291398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_enable.659214710 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 36046557 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:36:09 AM UTC 24 |
| Finished | Aug 25 09:36:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=659214710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_enable.659214710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.3960578019 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 836122534 ps |
| CPU time | 3.66 seconds |
| Started | Aug 25 09:36:09 AM UTC 24 |
| Finished | Aug 25 09:36:14 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960578019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.3960578019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.601355003 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 332575012 ps |
| CPU time | 2.24 seconds |
| Started | Aug 25 09:36:09 AM UTC 24 |
| Finished | Aug 25 09:36:12 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=601355003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.601355003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.2248096438 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 274763738 ps |
| CPU time | 2.35 seconds |
| Started | Aug 25 09:36:09 AM UTC 24 |
| Finished | Aug 25 09:36:12 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248096438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.2248096438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.186791807 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 226279919 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:36:10 AM UTC 24 |
| Finished | Aug 25 09:36:13 AM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=186791807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.186791807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.1644049432 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 148302125 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:36:11 AM UTC 24 |
| Finished | Aug 25 09:36:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644049432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.1644049432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.3681459514 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 241861671 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:36:12 AM UTC 24 |
| Finished | Aug 25 09:36:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681459514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.3681459514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.3594927504 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 3390991451 ps |
| CPU time | 43.76 seconds |
| Started | Aug 25 09:36:10 AM UTC 24 |
| Finished | Aug 25 09:36:55 AM UTC 24 |
| Peak memory | 235188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3594927504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.3594927504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.1716403109 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 9932031918 ps |
| CPU time | 157.32 seconds |
| Started | Aug 25 09:36:12 AM UTC 24 |
| Finished | Aug 25 09:38:52 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716403109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.1716403109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.2920589326 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 217591613 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:36:12 AM UTC 24 |
| Finished | Aug 25 09:36:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920589326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.2920589326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.870209757 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 12778728682 ps |
| CPU time | 44.42 seconds |
| Started | Aug 25 09:36:12 AM UTC 24 |
| Finished | Aug 25 09:36:58 AM UTC 24 |
| Peak memory | 218324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=870209757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_link_resume.870209757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.1587855578 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 3381711645 ps |
| CPU time | 11.3 seconds |
| Started | Aug 25 09:36:12 AM UTC 24 |
| Finished | Aug 25 09:36:24 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1587855578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.1587855578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.1194726163 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 3224237238 ps |
| CPU time | 37.18 seconds |
| Started | Aug 25 09:36:13 AM UTC 24 |
| Finished | Aug 25 09:36:52 AM UTC 24 |
| Peak memory | 228508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194726163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.1194726163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.816990086 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 2032210561 ps |
| CPU time | 26.97 seconds |
| Started | Aug 25 09:36:13 AM UTC 24 |
| Finished | Aug 25 09:36:42 AM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816990086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.816990086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.3734880829 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 240053293 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:36:13 AM UTC 24 |
| Finished | Aug 25 09:36:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734880829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.3734880829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.3836398410 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 194834782 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:36:13 AM UTC 24 |
| Finished | Aug 25 09:36:16 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836398410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.3836398410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.2686162256 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 3923161708 ps |
| CPU time | 137.66 seconds |
| Started | Aug 25 09:36:14 AM UTC 24 |
| Finished | Aug 25 09:38:34 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686162256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.2686162256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.3825179981 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 175714752 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:36:14 AM UTC 24 |
| Finished | Aug 25 09:36:16 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825179981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.3825179981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.1076854379 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 151467647 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:36:15 AM UTC 24 |
| Finished | Aug 25 09:36:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076854379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.1076854379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.4072031075 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 179959789 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:36:15 AM UTC 24 |
| Finished | Aug 25 09:36:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072031075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.4072031075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.1158208089 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 169579911 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:36:15 AM UTC 24 |
| Finished | Aug 25 09:36:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158208089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.1158208089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.330888160 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 169135811 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:36:15 AM UTC 24 |
| Finished | Aug 25 09:36:18 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=330888160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_out_stall.330888160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.152711652 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 161083027 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:36:15 AM UTC 24 |
| Finished | Aug 25 09:36:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=152711652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_out_trans_nak.152711652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.3005182610 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 201466125 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:36:15 AM UTC 24 |
| Finished | Aug 25 09:36:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005182610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.3005182610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.2450665773 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 220379610 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:36:17 AM UTC 24 |
| Finished | Aug 25 09:36:20 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450665773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.2450665773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.2153650790 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 141543221 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:36:17 AM UTC 24 |
| Finished | Aug 25 09:36:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2153650790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.2153650790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.795044867 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 110784235 ps |
| CPU time | 1.12 seconds |
| Started | Aug 25 09:36:17 AM UTC 24 |
| Finished | Aug 25 09:36:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=795044867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_phy_pins_sense.795044867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.3081087775 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 20387891603 ps |
| CPU time | 83.58 seconds |
| Started | Aug 25 09:36:17 AM UTC 24 |
| Finished | Aug 25 09:37:43 AM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081087775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.3081087775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.3993610372 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 177915993 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:36:17 AM UTC 24 |
| Finished | Aug 25 09:36:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993610372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.3993610372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.1934559720 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 220127781 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:36:17 AM UTC 24 |
| Finished | Aug 25 09:36:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1934559720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.1934559720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.1874767783 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 265833907 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:36:17 AM UTC 24 |
| Finished | Aug 25 09:36:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1874767783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.1874767783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.3437420183 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 152134684 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:36:17 AM UTC 24 |
| Finished | Aug 25 09:36:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3437420183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.3437420183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.1163199212 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 203655853 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:36:19 AM UTC 24 |
| Finished | Aug 25 09:36:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1163199212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.1163199212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.2096650849 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 386207577 ps |
| CPU time | 2.33 seconds |
| Started | Aug 25 09:36:19 AM UTC 24 |
| Finished | Aug 25 09:36:23 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096650849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.2096650849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.3292112744 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 154009953 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:36:19 AM UTC 24 |
| Finished | Aug 25 09:36:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292112744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_setup_stage.3292112744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.3792815835 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 161433404 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:36:19 AM UTC 24 |
| Finished | Aug 25 09:36:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3792815835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.3792815835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.2127200254 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 232387999 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:36:19 AM UTC 24 |
| Finished | Aug 25 09:36:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2127200254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.2127200254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.2375028356 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 3637762185 ps |
| CPU time | 134.12 seconds |
| Started | Aug 25 09:36:19 AM UTC 24 |
| Finished | Aug 25 09:38:37 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375028356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.2375028356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.3683257101 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 228524450 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:36:20 AM UTC 24 |
| Finished | Aug 25 09:36:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683257101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.3683257101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.1302765049 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 183742135 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:36:21 AM UTC 24 |
| Finished | Aug 25 09:36:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302765049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.1302765049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.2777970759 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 1201117922 ps |
| CPU time | 5.54 seconds |
| Started | Aug 25 09:36:21 AM UTC 24 |
| Finished | Aug 25 09:36:28 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777970759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.2777970759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.3724406469 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 4080429270 ps |
| CPU time | 44.51 seconds |
| Started | Aug 25 09:36:21 AM UTC 24 |
| Finished | Aug 25 09:37:07 AM UTC 24 |
| Peak memory | 230712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724406469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.3724406469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.3867074685 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 3585662352 ps |
| CPU time | 28.4 seconds |
| Started | Aug 25 09:36:07 AM UTC 24 |
| Finished | Aug 25 09:36:37 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867074685 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.3867074685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.159691740 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 600638859 ps |
| CPU time | 3.18 seconds |
| Started | Aug 25 09:36:21 AM UTC 24 |
| Finished | Aug 25 09:36:26 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=159691740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_tx _rx_disruption.159691740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.3974749922 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 480938224 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:43:51 AM UTC 24 |
| Finished | Aug 25 09:44:01 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3974749922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_ tx_rx_disruption.3974749922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.1550048051 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 616954651 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:43:51 AM UTC 24 |
| Finished | Aug 25 09:44:01 AM UTC 24 |
| Peak memory | 215964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1550048051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_ tx_rx_disruption.1550048051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.1753963802 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 626186120 ps |
| CPU time | 2.03 seconds |
| Started | Aug 25 09:43:51 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1753963802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.1753963802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.1553994661 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 481441644 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:43:51 AM UTC 24 |
| Finished | Aug 25 09:44:01 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1553994661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_ tx_rx_disruption.1553994661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.3486839793 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 552008228 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:43:53 AM UTC 24 |
| Finished | Aug 25 09:43:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3486839793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_ tx_rx_disruption.3486839793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.1743214515 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 540404945 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:43:53 AM UTC 24 |
| Finished | Aug 25 09:43:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1743214515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.1743214515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.3128475366 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 637349331 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:43:55 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3128475366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_ tx_rx_disruption.3128475366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.2382129612 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 558426328 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:43:55 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2382129612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_ tx_rx_disruption.2382129612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.736596622 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 484260080 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:43:55 AM UTC 24 |
| Finished | Aug 25 09:44:10 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=736596622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_t x_rx_disruption.736596622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.4080018576 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 520502597 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:43:55 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 215876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4080018576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_ tx_rx_disruption.4080018576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.735000764 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 49538057 ps |
| CPU time | 1.06 seconds |
| Started | Aug 25 09:36:41 AM UTC 24 |
| Finished | Aug 25 09:36:43 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=735000764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.735000764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.1289569233 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 11003768875 ps |
| CPU time | 29.01 seconds |
| Started | Aug 25 09:36:21 AM UTC 24 |
| Finished | Aug 25 09:36:52 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1289569233 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.1289569233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.3836450671 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 14931335373 ps |
| CPU time | 37.59 seconds |
| Started | Aug 25 09:36:21 AM UTC 24 |
| Finished | Aug 25 09:37:00 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836450671 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.3836450671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.903575654 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 25384931606 ps |
| CPU time | 48.89 seconds |
| Started | Aug 25 09:36:23 AM UTC 24 |
| Finished | Aug 25 09:37:13 AM UTC 24 |
| Peak memory | 228532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903575654 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.903575654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.1571146053 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 181191423 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:36:23 AM UTC 24 |
| Finished | Aug 25 09:36:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571146053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.1571146053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.3779177681 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 162303642 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:36:23 AM UTC 24 |
| Finished | Aug 25 09:36:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3779177681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_bitstuff_err.3779177681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.2680231202 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 287683129 ps |
| CPU time | 1.98 seconds |
| Started | Aug 25 09:36:23 AM UTC 24 |
| Finished | Aug 25 09:36:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680231202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.2680231202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.228310427 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 573222241 ps |
| CPU time | 2.32 seconds |
| Started | Aug 25 09:36:24 AM UTC 24 |
| Finished | Aug 25 09:36:28 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=228310427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.228310427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.3686761514 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 23466728093 ps |
| CPU time | 59.79 seconds |
| Started | Aug 25 09:36:24 AM UTC 24 |
| Finished | Aug 25 09:37:26 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3686761514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.3686761514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.2528764354 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 3381083162 ps |
| CPU time | 39.48 seconds |
| Started | Aug 25 09:36:24 AM UTC 24 |
| Finished | Aug 25 09:37:05 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528764354 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.2528764354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.638420699 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 495464016 ps |
| CPU time | 2.2 seconds |
| Started | Aug 25 09:36:24 AM UTC 24 |
| Finished | Aug 25 09:36:28 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=638420699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_disable_endpoint.638420699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.3455211858 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 146252906 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:36:24 AM UTC 24 |
| Finished | Aug 25 09:36:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3455211858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.3455211858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_enable.3133569149 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 40387755 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:36:26 AM UTC 24 |
| Finished | Aug 25 09:36:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3133569149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.3133569149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.3825578129 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 860211854 ps |
| CPU time | 4.73 seconds |
| Started | Aug 25 09:36:26 AM UTC 24 |
| Finished | Aug 25 09:36:32 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825578129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.3825578129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.1680113123 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 204702919 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:36:26 AM UTC 24 |
| Finished | Aug 25 09:36:29 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680113123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.1680113123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.180746046 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 413626471 ps |
| CPU time | 4.33 seconds |
| Started | Aug 25 09:36:26 AM UTC 24 |
| Finished | Aug 25 09:36:32 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=180746046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_fifo_rst.180746046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.1251395316 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 154016672 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:36:26 AM UTC 24 |
| Finished | Aug 25 09:36:29 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251395316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.1251395316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.3081551309 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 142639730 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:36:28 AM UTC 24 |
| Finished | Aug 25 09:36:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081551309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.3081551309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.1623728909 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 211647199 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:36:28 AM UTC 24 |
| Finished | Aug 25 09:36:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623728909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_trans.1623728909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.2045218281 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 3759173016 ps |
| CPU time | 142.39 seconds |
| Started | Aug 25 09:36:26 AM UTC 24 |
| Finished | Aug 25 09:38:52 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2045218281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.2045218281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.1318900781 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 4399998389 ps |
| CPU time | 72.29 seconds |
| Started | Aug 25 09:36:28 AM UTC 24 |
| Finished | Aug 25 09:37:42 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318900781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.1318900781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.1415285630 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 176411820 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:36:28 AM UTC 24 |
| Finished | Aug 25 09:36:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1415285630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.1415285630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.2549129761 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 5840292100 ps |
| CPU time | 16.94 seconds |
| Started | Aug 25 09:36:30 AM UTC 24 |
| Finished | Aug 25 09:36:48 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549129761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.2549129761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.2386652356 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 9242494333 ps |
| CPU time | 32.63 seconds |
| Started | Aug 25 09:36:30 AM UTC 24 |
| Finished | Aug 25 09:37:04 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386652356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.2386652356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.3348544466 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 2860616975 ps |
| CPU time | 88.36 seconds |
| Started | Aug 25 09:36:30 AM UTC 24 |
| Finished | Aug 25 09:38:00 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348544466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.3348544466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.730379101 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 3232873594 ps |
| CPU time | 42.92 seconds |
| Started | Aug 25 09:36:30 AM UTC 24 |
| Finished | Aug 25 09:37:14 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=730379101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.730379101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.3204821161 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 302131062 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:36:30 AM UTC 24 |
| Finished | Aug 25 09:36:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204821161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.3204821161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.3252451517 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 217055391 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:36:30 AM UTC 24 |
| Finished | Aug 25 09:36:32 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252451517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.3252451517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.2759209184 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 2388590056 ps |
| CPU time | 32.8 seconds |
| Started | Aug 25 09:36:30 AM UTC 24 |
| Finished | Aug 25 09:37:04 AM UTC 24 |
| Peak memory | 228616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2759209184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.2759209184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.1197164826 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 181571272 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:36:31 AM UTC 24 |
| Finished | Aug 25 09:36:34 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197164826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.1197164826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.3397379814 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 145790480 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:36:31 AM UTC 24 |
| Finished | Aug 25 09:36:33 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397379814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.3397379814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.1576298506 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 212283415 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:36:31 AM UTC 24 |
| Finished | Aug 25 09:36:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1576298506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.1576298506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.18503869 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 174476343 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:36:32 AM UTC 24 |
| Finished | Aug 25 09:36:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=18503869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_out_iso.18503869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.1651973644 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 188172271 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:36:32 AM UTC 24 |
| Finished | Aug 25 09:36:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651973644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_out_stall.1651973644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.1890474886 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 158978235 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:36:33 AM UTC 24 |
| Finished | Aug 25 09:36:35 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890474886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.1890474886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.692438945 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 178073114 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:36:33 AM UTC 24 |
| Finished | Aug 25 09:36:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=692438945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pending_in_trans.692438945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.2133829235 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 284105691 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:36:34 AM UTC 24 |
| Finished | Aug 25 09:36:38 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133829235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.2133829235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.4126233173 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 141698997 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:36:34 AM UTC 24 |
| Finished | Aug 25 09:36:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126233173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.4126233173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.4203308056 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 97723859 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:36:34 AM UTC 24 |
| Finished | Aug 25 09:36:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203308056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.4203308056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.1009422887 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 21627810567 ps |
| CPU time | 94.19 seconds |
| Started | Aug 25 09:36:34 AM UTC 24 |
| Finished | Aug 25 09:38:11 AM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009422887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.1009422887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.3367197446 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 163256433 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:36:35 AM UTC 24 |
| Finished | Aug 25 09:36:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367197446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.3367197446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.601299649 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 281418364 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:36:35 AM UTC 24 |
| Finished | Aug 25 09:36:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=601299649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_pkt_sent.601299649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.342412478 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 236820241 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:36:37 AM UTC 24 |
| Finished | Aug 25 09:36:39 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=342412478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_random_length_in_transaction.342412478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.212473472 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 192635523 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:36:37 AM UTC 24 |
| Finished | Aug 25 09:36:39 AM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=212473472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.212473472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.991139960 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 137923204 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:36:37 AM UTC 24 |
| Finished | Aug 25 09:36:39 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=991139960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_rx_crc_err.991139960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.1124433216 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 250037995 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:36:37 AM UTC 24 |
| Finished | Aug 25 09:36:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124433216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_rx_full.1124433216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.415670196 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 154582546 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:36:38 AM UTC 24 |
| Finished | Aug 25 09:36:41 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415670196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_setup_stage.415670196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.221821644 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 163812765 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:36:38 AM UTC 24 |
| Finished | Aug 25 09:36:40 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=221821644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 32.usbdev_setup_trans_ignored.221821644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.2432545817 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 241758038 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:36:38 AM UTC 24 |
| Finished | Aug 25 09:36:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432545817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.2432545817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.4152570779 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 3134415808 ps |
| CPU time | 31.59 seconds |
| Started | Aug 25 09:36:38 AM UTC 24 |
| Finished | Aug 25 09:37:11 AM UTC 24 |
| Peak memory | 235256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152570779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.4152570779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.270233838 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 191408084 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:36:38 AM UTC 24 |
| Finished | Aug 25 09:36:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270233838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.270233838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.981849203 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 163297808 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:36:39 AM UTC 24 |
| Finished | Aug 25 09:36:42 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=981849203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_stall_trans.981849203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.2357430782 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 1233197423 ps |
| CPU time | 4.66 seconds |
| Started | Aug 25 09:36:40 AM UTC 24 |
| Finished | Aug 25 09:36:46 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357430782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.2357430782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.244629767 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 2943367942 ps |
| CPU time | 32.58 seconds |
| Started | Aug 25 09:36:40 AM UTC 24 |
| Finished | Aug 25 09:37:14 AM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=244629767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_streaming_out.244629767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.2854399279 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 3597861912 ps |
| CPU time | 33.37 seconds |
| Started | Aug 25 09:36:24 AM UTC 24 |
| Finished | Aug 25 09:36:59 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854399279 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.2854399279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.646071761 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 469103083 ps |
| CPU time | 2.83 seconds |
| Started | Aug 25 09:36:41 AM UTC 24 |
| Finished | Aug 25 09:36:45 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=646071761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_tx _rx_disruption.646071761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.2897746136 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 467361254 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:43:55 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 215872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2897746136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_ tx_rx_disruption.2897746136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.1988851657 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 536213491 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:43:55 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1988851657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_ tx_rx_disruption.1988851657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.561202639 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 570068813 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:43:55 AM UTC 24 |
| Finished | Aug 25 09:44:36 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=561202639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_t x_rx_disruption.561202639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.3179178360 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 534154085 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:43:55 AM UTC 24 |
| Finished | Aug 25 09:44:36 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3179178360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.3179178360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.3384936559 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 628722975 ps |
| CPU time | 2.73 seconds |
| Started | Aug 25 09:43:55 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3384936559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_ tx_rx_disruption.3384936559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.3673498371 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 467790846 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:43:55 AM UTC 24 |
| Finished | Aug 25 09:44:36 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3673498371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.3673498371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.2507181797 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 687978922 ps |
| CPU time | 2.38 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:03 AM UTC 24 |
| Peak memory | 217876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2507181797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.2507181797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.3495979675 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 587610469 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3495979675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_ tx_rx_disruption.3495979675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.4006096198 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 445699457 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4006096198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.4006096198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.2497138836 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 508439957 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2497138836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.2497138836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.2551482515 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 37359904 ps |
| CPU time | 1.05 seconds |
| Started | Aug 25 09:37:03 AM UTC 24 |
| Finished | Aug 25 09:37:05 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551482515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.2551482515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.2468123872 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 4173213724 ps |
| CPU time | 12.49 seconds |
| Started | Aug 25 09:36:41 AM UTC 24 |
| Finished | Aug 25 09:36:55 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468123872 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.2468123872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.51647479 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 14522955265 ps |
| CPU time | 40.11 seconds |
| Started | Aug 25 09:36:41 AM UTC 24 |
| Finished | Aug 25 09:37:23 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51647479 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.51647479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.4040628430 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 29504334683 ps |
| CPU time | 87.58 seconds |
| Started | Aug 25 09:36:43 AM UTC 24 |
| Finished | Aug 25 09:38:13 AM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040628430 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.4040628430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.2881687251 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 162191539 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:36:43 AM UTC 24 |
| Finished | Aug 25 09:36:46 AM UTC 24 |
| Peak memory | 215932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881687251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.2881687251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.3078268747 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 146249563 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:36:43 AM UTC 24 |
| Finished | Aug 25 09:36:46 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3078268747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_bitstuff_err.3078268747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.1548433410 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 440261607 ps |
| CPU time | 2.73 seconds |
| Started | Aug 25 09:36:43 AM UTC 24 |
| Finished | Aug 25 09:36:47 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548433410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.1548433410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.1359228106 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 475027447 ps |
| CPU time | 2.64 seconds |
| Started | Aug 25 09:36:43 AM UTC 24 |
| Finished | Aug 25 09:36:47 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359228106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.1359228106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.1888666314 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 17448649572 ps |
| CPU time | 49.55 seconds |
| Started | Aug 25 09:36:43 AM UTC 24 |
| Finished | Aug 25 09:37:35 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888666314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.1888666314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.3218889030 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 3619316302 ps |
| CPU time | 30.72 seconds |
| Started | Aug 25 09:36:43 AM UTC 24 |
| Finished | Aug 25 09:37:16 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218889030 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.3218889030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.834731071 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 895410592 ps |
| CPU time | 4.03 seconds |
| Started | Aug 25 09:36:45 AM UTC 24 |
| Finished | Aug 25 09:36:50 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=834731071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_disable_endpoint.834731071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.678798374 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 160319224 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:36:46 AM UTC 24 |
| Finished | Aug 25 09:36:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=678798374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_disconnected.678798374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_enable.3318511850 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 45433918 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:36:47 AM UTC 24 |
| Finished | Aug 25 09:36:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318511850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_enable.3318511850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.2277966097 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 979862681 ps |
| CPU time | 5.02 seconds |
| Started | Aug 25 09:36:47 AM UTC 24 |
| Finished | Aug 25 09:36:54 AM UTC 24 |
| Peak memory | 218196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277966097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.2277966097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.1036336221 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 259720696 ps |
| CPU time | 2.64 seconds |
| Started | Aug 25 09:36:48 AM UTC 24 |
| Finished | Aug 25 09:36:52 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036336221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.1036336221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.858320799 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 175378873 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:36:49 AM UTC 24 |
| Finished | Aug 25 09:36:51 AM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=858320799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.858320799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.4231477837 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 153388234 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:36:49 AM UTC 24 |
| Finished | Aug 25 09:36:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231477837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.4231477837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.1781821207 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 244019936 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:36:50 AM UTC 24 |
| Finished | Aug 25 09:36:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1781821207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.1781821207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.4214625990 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 5307067070 ps |
| CPU time | 184.47 seconds |
| Started | Aug 25 09:36:49 AM UTC 24 |
| Finished | Aug 25 09:39:57 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214625990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.4214625990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.3485368079 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 12812070266 ps |
| CPU time | 126.85 seconds |
| Started | Aug 25 09:36:51 AM UTC 24 |
| Finished | Aug 25 09:39:01 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485368079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.3485368079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.911614858 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 198620862 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:36:51 AM UTC 24 |
| Finished | Aug 25 09:36:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911614858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_link_in_err.911614858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.244454001 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 12721629785 ps |
| CPU time | 33.77 seconds |
| Started | Aug 25 09:36:53 AM UTC 24 |
| Finished | Aug 25 09:37:28 AM UTC 24 |
| Peak memory | 218324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=244454001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_link_resume.244454001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.2310953579 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 10630825431 ps |
| CPU time | 21.86 seconds |
| Started | Aug 25 09:36:53 AM UTC 24 |
| Finished | Aug 25 09:37:16 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310953579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_link_suspend.2310953579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.61304136 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 3492988736 ps |
| CPU time | 119.37 seconds |
| Started | Aug 25 09:36:53 AM UTC 24 |
| Finished | Aug 25 09:38:55 AM UTC 24 |
| Peak memory | 230668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=61304136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.61304136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.2935906187 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 3197389802 ps |
| CPU time | 43.45 seconds |
| Started | Aug 25 09:36:53 AM UTC 24 |
| Finished | Aug 25 09:37:38 AM UTC 24 |
| Peak memory | 230652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935906187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.2935906187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.785222949 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 237613626 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:36:53 AM UTC 24 |
| Finished | Aug 25 09:36:55 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=785222949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.785222949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.4291253765 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 200994918 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:36:53 AM UTC 24 |
| Finished | Aug 25 09:36:55 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291253765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.4291253765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.155885782 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 2368653344 ps |
| CPU time | 23.92 seconds |
| Started | Aug 25 09:36:55 AM UTC 24 |
| Finished | Aug 25 09:37:20 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=155885782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.155885782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.1996229149 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 168045145 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:36:55 AM UTC 24 |
| Finished | Aug 25 09:36:57 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1996229149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.1996229149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.426789354 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 144045507 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:36:55 AM UTC 24 |
| Finished | Aug 25 09:36:57 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=426789354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.426789354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.3634478806 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 197637826 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:36:55 AM UTC 24 |
| Finished | Aug 25 09:36:57 AM UTC 24 |
| Peak memory | 216060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634478806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_nak_trans.3634478806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.3024140752 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 209676333 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:36:55 AM UTC 24 |
| Finished | Aug 25 09:36:58 AM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024140752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.3024140752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.814144891 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 197347678 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:36:55 AM UTC 24 |
| Finished | Aug 25 09:36:58 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=814144891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_out_stall.814144891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.2025392570 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 174165106 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:36:56 AM UTC 24 |
| Finished | Aug 25 09:36:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025392570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_out_trans_nak.2025392570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.378064933 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 153515181 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:36:56 AM UTC 24 |
| Finished | Aug 25 09:36:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=378064933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pending_in_trans.378064933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.2272025685 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 262049712 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:36:56 AM UTC 24 |
| Finished | Aug 25 09:36:59 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2272025685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.2272025685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.2028674685 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 138410850 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:36:56 AM UTC 24 |
| Finished | Aug 25 09:36:59 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028674685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.2028674685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.2050661328 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 68530112 ps |
| CPU time | 1.03 seconds |
| Started | Aug 25 09:36:58 AM UTC 24 |
| Finished | Aug 25 09:37:00 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050661328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.2050661328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.3668751543 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 21603051464 ps |
| CPU time | 82.76 seconds |
| Started | Aug 25 09:36:59 AM UTC 24 |
| Finished | Aug 25 09:38:24 AM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3668751543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.3668751543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.3934310602 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 194593751 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:36:59 AM UTC 24 |
| Finished | Aug 25 09:37:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3934310602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.3934310602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.4201759039 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 223191593 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:36:59 AM UTC 24 |
| Finished | Aug 25 09:37:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4201759039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.4201759039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.1565859916 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 199192301 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:36:59 AM UTC 24 |
| Finished | Aug 25 09:37:02 AM UTC 24 |
| Peak memory | 216020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1565859916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_random_length_in_transaction.1565859916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.1139913842 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 162936612 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:36:59 AM UTC 24 |
| Finished | Aug 25 09:37:02 AM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1139913842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.1139913842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.342268489 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 228647381 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:36:59 AM UTC 24 |
| Finished | Aug 25 09:37:02 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=342268489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_rx_crc_err.342268489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.1958963775 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 409237000 ps |
| CPU time | 2.47 seconds |
| Started | Aug 25 09:37:01 AM UTC 24 |
| Finished | Aug 25 09:37:05 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1958963775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.1958963775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.830741561 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 149506942 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:37:01 AM UTC 24 |
| Finished | Aug 25 09:37:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=830741561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_setup_stage.830741561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.3711715432 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 161435065 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:37:01 AM UTC 24 |
| Finished | Aug 25 09:37:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3711715432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.3711715432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.2988708619 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 242296169 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:37:01 AM UTC 24 |
| Finished | Aug 25 09:37:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988708619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.2988708619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.1710722430 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 2554324233 ps |
| CPU time | 98.06 seconds |
| Started | Aug 25 09:37:01 AM UTC 24 |
| Finished | Aug 25 09:38:42 AM UTC 24 |
| Peak memory | 230520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710722430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.1710722430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.403357844 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 189847301 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:37:01 AM UTC 24 |
| Finished | Aug 25 09:37:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=403357844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.403357844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.3474094166 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 197373278 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:37:01 AM UTC 24 |
| Finished | Aug 25 09:37:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3474094166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.3474094166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.1751936766 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 910537135 ps |
| CPU time | 3.93 seconds |
| Started | Aug 25 09:37:03 AM UTC 24 |
| Finished | Aug 25 09:37:08 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751936766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.1751936766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.3983995440 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 2074242291 ps |
| CPU time | 20.32 seconds |
| Started | Aug 25 09:37:03 AM UTC 24 |
| Finished | Aug 25 09:37:25 AM UTC 24 |
| Peak memory | 235116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3983995440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.3983995440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.838926147 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 2503898075 ps |
| CPU time | 29.14 seconds |
| Started | Aug 25 09:36:45 AM UTC 24 |
| Finished | Aug 25 09:37:15 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=838926147 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.838926147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.4158627111 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 458260094 ps |
| CPU time | 2.54 seconds |
| Started | Aug 25 09:37:03 AM UTC 24 |
| Finished | Aug 25 09:37:07 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4158627111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_t x_rx_disruption.4158627111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.1410541146 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 609405276 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:03 AM UTC 24 |
| Peak memory | 216016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1410541146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.1410541146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.4178966330 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 531999619 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4178966330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_ tx_rx_disruption.4178966330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.201296666 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 516708603 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:03 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=201296666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_t x_rx_disruption.201296666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.3274911806 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 506478494 ps |
| CPU time | 2.63 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:04 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3274911806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.3274911806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.1679488329 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 559546897 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1679488329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.1679488329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.3567578510 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 466252726 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3567578510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.3567578510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.3387552069 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 537462252 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3387552069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_ tx_rx_disruption.3387552069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.353221772 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 466269003 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=353221772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_t x_rx_disruption.353221772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.4259068645 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 641375811 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:43:57 AM UTC 24 |
| Finished | Aug 25 09:44:01 AM UTC 24 |
| Peak memory | 216036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4259068645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_ tx_rx_disruption.4259068645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.4025608666 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 514149794 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4025608666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_ tx_rx_disruption.4025608666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.246010996 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 38181706 ps |
| CPU time | 1.03 seconds |
| Started | Aug 25 09:37:22 AM UTC 24 |
| Finished | Aug 25 09:37:24 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=246010996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.246010996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.521306035 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 10520679925 ps |
| CPU time | 25.73 seconds |
| Started | Aug 25 09:37:03 AM UTC 24 |
| Finished | Aug 25 09:37:30 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=521306035 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.521306035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.3661489004 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 14957029087 ps |
| CPU time | 42.48 seconds |
| Started | Aug 25 09:37:03 AM UTC 24 |
| Finished | Aug 25 09:37:47 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661489004 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.3661489004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.2741769121 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 26267285335 ps |
| CPU time | 69.25 seconds |
| Started | Aug 25 09:37:04 AM UTC 24 |
| Finished | Aug 25 09:38:16 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741769121 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.2741769121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.2009563785 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 177736315 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:37:05 AM UTC 24 |
| Finished | Aug 25 09:37:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009563785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_av_buffer.2009563785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.79033217 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 195224519 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:37:05 AM UTC 24 |
| Finished | Aug 25 09:37:08 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=79033217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_bitstuff_err.79033217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.767225874 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 288939381 ps |
| CPU time | 1.94 seconds |
| Started | Aug 25 09:37:05 AM UTC 24 |
| Finished | Aug 25 09:37:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767225874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_data_toggle_clear.767225874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.1182580760 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 265024959 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:37:05 AM UTC 24 |
| Finished | Aug 25 09:37:08 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182580760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.1182580760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.660576600 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 41799618107 ps |
| CPU time | 113.12 seconds |
| Started | Aug 25 09:37:05 AM UTC 24 |
| Finished | Aug 25 09:39:01 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=660576600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_device_address.660576600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.140882407 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 2993727643 ps |
| CPU time | 32.19 seconds |
| Started | Aug 25 09:37:06 AM UTC 24 |
| Finished | Aug 25 09:37:40 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=140882407 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.140882407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.3432729339 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 432623812 ps |
| CPU time | 2.42 seconds |
| Started | Aug 25 09:37:06 AM UTC 24 |
| Finished | Aug 25 09:37:10 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3432729339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.3432729339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.3485564592 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 146322223 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:37:07 AM UTC 24 |
| Finished | Aug 25 09:37:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485564592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.3485564592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_enable.1401436897 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 35161615 ps |
| CPU time | 0.98 seconds |
| Started | Aug 25 09:37:07 AM UTC 24 |
| Finished | Aug 25 09:37:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401436897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_enable.1401436897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.3427607928 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 823421453 ps |
| CPU time | 4.21 seconds |
| Started | Aug 25 09:37:07 AM UTC 24 |
| Finished | Aug 25 09:37:12 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427607928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.3427607928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.444743789 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 148664616 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:37:08 AM UTC 24 |
| Finished | Aug 25 09:37:11 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=444743789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.444743789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.1573536638 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 232808754 ps |
| CPU time | 2.77 seconds |
| Started | Aug 25 09:37:08 AM UTC 24 |
| Finished | Aug 25 09:37:12 AM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573536638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_fifo_rst.1573536638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.2239915687 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 200043340 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:37:08 AM UTC 24 |
| Finished | Aug 25 09:37:12 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239915687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.2239915687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.2495349645 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 151376928 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:37:08 AM UTC 24 |
| Finished | Aug 25 09:37:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495349645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.2495349645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.949769268 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 176524354 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:37:08 AM UTC 24 |
| Finished | Aug 25 09:37:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=949769268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_in_trans.949769268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.4100954731 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 3621955668 ps |
| CPU time | 125.4 seconds |
| Started | Aug 25 09:37:08 AM UTC 24 |
| Finished | Aug 25 09:39:17 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100954731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.4100954731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.4120194684 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 13025277123 ps |
| CPU time | 121.31 seconds |
| Started | Aug 25 09:37:10 AM UTC 24 |
| Finished | Aug 25 09:39:14 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120194684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.4120194684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.1719304518 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 191931645 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:37:10 AM UTC 24 |
| Finished | Aug 25 09:37:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719304518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.1719304518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.3408014277 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 26472307240 ps |
| CPU time | 70.77 seconds |
| Started | Aug 25 09:37:10 AM UTC 24 |
| Finished | Aug 25 09:38:23 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3408014277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.3408014277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.1447604506 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 5448581012 ps |
| CPU time | 13.84 seconds |
| Started | Aug 25 09:37:10 AM UTC 24 |
| Finished | Aug 25 09:37:25 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447604506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_link_suspend.1447604506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.297187203 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 5082045475 ps |
| CPU time | 185.13 seconds |
| Started | Aug 25 09:37:10 AM UTC 24 |
| Finished | Aug 25 09:40:19 AM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=297187203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.297187203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.3973446667 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 3278159072 ps |
| CPU time | 31.68 seconds |
| Started | Aug 25 09:37:12 AM UTC 24 |
| Finished | Aug 25 09:37:45 AM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3973446667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.3973446667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.2226648663 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 245305820 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:37:12 AM UTC 24 |
| Finished | Aug 25 09:37:15 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2226648663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.2226648663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.30719515 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 193356602 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:37:12 AM UTC 24 |
| Finished | Aug 25 09:37:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=30719515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.30719515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.2421205422 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 2975222293 ps |
| CPU time | 107.48 seconds |
| Started | Aug 25 09:37:12 AM UTC 24 |
| Finished | Aug 25 09:39:02 AM UTC 24 |
| Peak memory | 235212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421205422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.2421205422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.3005334892 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 149345105 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:37:12 AM UTC 24 |
| Finished | Aug 25 09:37:15 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005334892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.3005334892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.1519935285 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 189614207 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:37:12 AM UTC 24 |
| Finished | Aug 25 09:37:15 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1519935285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.1519935285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.268441183 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 213206003 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:37:12 AM UTC 24 |
| Finished | Aug 25 09:37:15 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=268441183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_nak_trans.268441183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.3621139240 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 159207185 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:37:14 AM UTC 24 |
| Finished | Aug 25 09:37:16 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621139240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.3621139240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.1999457933 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 156365199 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:37:14 AM UTC 24 |
| Finished | Aug 25 09:37:16 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999457933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.1999457933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.1871362829 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 159327202 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:37:14 AM UTC 24 |
| Finished | Aug 25 09:37:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871362829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_out_trans_nak.1871362829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.4245537752 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 174606079 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:37:14 AM UTC 24 |
| Finished | Aug 25 09:37:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245537752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.4245537752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.293614809 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 231964106 ps |
| CPU time | 1.98 seconds |
| Started | Aug 25 09:37:15 AM UTC 24 |
| Finished | Aug 25 09:37:19 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=293614809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.293614809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.1552303807 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 147726317 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:37:15 AM UTC 24 |
| Finished | Aug 25 09:37:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1552303807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.1552303807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.3635783178 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 38286102 ps |
| CPU time | 1.07 seconds |
| Started | Aug 25 09:37:15 AM UTC 24 |
| Finished | Aug 25 09:37:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635783178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.3635783178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.1523178198 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 7786079808 ps |
| CPU time | 31.35 seconds |
| Started | Aug 25 09:37:16 AM UTC 24 |
| Finished | Aug 25 09:37:48 AM UTC 24 |
| Peak memory | 228700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523178198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.1523178198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.21391266 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 151645023 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:37:17 AM UTC 24 |
| Finished | Aug 25 09:37:20 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21391266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_received.21391266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.623851045 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 193662025 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:37:17 AM UTC 24 |
| Finished | Aug 25 09:37:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=623851045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_pkt_sent.623851045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.1861400967 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 184194865 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:37:17 AM UTC 24 |
| Finished | Aug 25 09:37:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1861400967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.1861400967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.3772797968 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 170928652 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:37:17 AM UTC 24 |
| Finished | Aug 25 09:37:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772797968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.3772797968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.2822854219 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 177551167 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:37:17 AM UTC 24 |
| Finished | Aug 25 09:37:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822854219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.2822854219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.2404345247 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 283152531 ps |
| CPU time | 2 seconds |
| Started | Aug 25 09:37:18 AM UTC 24 |
| Finished | Aug 25 09:37:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404345247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.2404345247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.1111838328 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 151571646 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:37:18 AM UTC 24 |
| Finished | Aug 25 09:37:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1111838328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_setup_stage.1111838328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.2041675076 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 156543680 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:37:18 AM UTC 24 |
| Finished | Aug 25 09:37:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041675076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.2041675076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.62561832 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 253741221 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:37:18 AM UTC 24 |
| Finished | Aug 25 09:37:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=62561832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 34.usbdev_smoke.62561832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.1268888278 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 2775801540 ps |
| CPU time | 98.71 seconds |
| Started | Aug 25 09:37:18 AM UTC 24 |
| Finished | Aug 25 09:38:59 AM UTC 24 |
| Peak memory | 235248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268888278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.1268888278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.1332589558 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 217087255 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:37:19 AM UTC 24 |
| Finished | Aug 25 09:37:21 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332589558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.1332589558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.3214253594 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 145149176 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:37:19 AM UTC 24 |
| Finished | Aug 25 09:37:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3214253594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.3214253594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.3364298458 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 623767349 ps |
| CPU time | 3.67 seconds |
| Started | Aug 25 09:37:20 AM UTC 24 |
| Finished | Aug 25 09:37:25 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364298458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.3364298458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.3656784384 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 1548664551 ps |
| CPU time | 21.15 seconds |
| Started | Aug 25 09:37:20 AM UTC 24 |
| Finished | Aug 25 09:37:43 AM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656784384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.3656784384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.2340868533 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 583629113 ps |
| CPU time | 14.18 seconds |
| Started | Aug 25 09:37:06 AM UTC 24 |
| Finished | Aug 25 09:37:22 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2340868533 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.2340868533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.2895357551 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 465025067 ps |
| CPU time | 2.96 seconds |
| Started | Aug 25 09:37:22 AM UTC 24 |
| Finished | Aug 25 09:37:26 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2895357551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_t x_rx_disruption.2895357551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.3675349505 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 639573188 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 215304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3675349505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_ tx_rx_disruption.3675349505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.994820115 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 606633040 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 215196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=994820115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_t x_rx_disruption.994820115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.1794695260 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 522879690 ps |
| CPU time | 2.3 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1794695260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_ tx_rx_disruption.1794695260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.2099024630 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 526916186 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2099024630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_ tx_rx_disruption.2099024630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.1890158525 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 469487932 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1890158525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_ tx_rx_disruption.1890158525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.293429652 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 502729830 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=293429652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_t x_rx_disruption.293429652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.2764794236 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 602226648 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2764794236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.2764794236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.2546600544 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 539307685 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2546600544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.2546600544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.1011045168 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 511141497 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1011045168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.1011045168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.1055337441 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 568292191 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:43:59 AM UTC 24 |
| Finished | Aug 25 09:44:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1055337441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_ tx_rx_disruption.1055337441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.2760844333 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 64406254 ps |
| CPU time | 1.03 seconds |
| Started | Aug 25 09:37:41 AM UTC 24 |
| Finished | Aug 25 09:37:43 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760844333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.2760844333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.3414800701 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 11109693596 ps |
| CPU time | 22.31 seconds |
| Started | Aug 25 09:37:22 AM UTC 24 |
| Finished | Aug 25 09:37:46 AM UTC 24 |
| Peak memory | 218340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3414800701 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.3414800701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.2666528808 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 18441998371 ps |
| CPU time | 50.21 seconds |
| Started | Aug 25 09:37:22 AM UTC 24 |
| Finished | Aug 25 09:38:14 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2666528808 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.2666528808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.1514634685 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 29634745227 ps |
| CPU time | 98.17 seconds |
| Started | Aug 25 09:37:22 AM UTC 24 |
| Finished | Aug 25 09:39:03 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514634685 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.1514634685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.3705172319 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 170333231 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:37:22 AM UTC 24 |
| Finished | Aug 25 09:37:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705172319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_av_buffer.3705172319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.1010787405 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 144028740 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:37:22 AM UTC 24 |
| Finished | Aug 25 09:37:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010787405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.1010787405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.2326063121 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 519414493 ps |
| CPU time | 3.18 seconds |
| Started | Aug 25 09:37:23 AM UTC 24 |
| Finished | Aug 25 09:37:27 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326063121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.2326063121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.3506559303 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 811398690 ps |
| CPU time | 3.46 seconds |
| Started | Aug 25 09:37:23 AM UTC 24 |
| Finished | Aug 25 09:37:27 AM UTC 24 |
| Peak memory | 218192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506559303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.3506559303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.3944635022 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 28101453401 ps |
| CPU time | 93.73 seconds |
| Started | Aug 25 09:37:23 AM UTC 24 |
| Finished | Aug 25 09:38:59 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3944635022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.3944635022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.4003378996 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 4305482661 ps |
| CPU time | 38.94 seconds |
| Started | Aug 25 09:37:23 AM UTC 24 |
| Finished | Aug 25 09:38:03 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4003378996 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.4003378996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.3109957244 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 919591830 ps |
| CPU time | 2.99 seconds |
| Started | Aug 25 09:37:24 AM UTC 24 |
| Finished | Aug 25 09:37:28 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109957244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.3109957244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.2155016294 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 140495054 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:37:24 AM UTC 24 |
| Finished | Aug 25 09:37:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155016294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_disconnected.2155016294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_enable.33105974 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 39162546 ps |
| CPU time | 1.12 seconds |
| Started | Aug 25 09:37:26 AM UTC 24 |
| Finished | Aug 25 09:37:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33105974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_enable.33105974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.589444955 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 723651157 ps |
| CPU time | 3.25 seconds |
| Started | Aug 25 09:37:26 AM UTC 24 |
| Finished | Aug 25 09:37:30 AM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=589444955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.589444955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.3304112316 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 186015003 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:37:26 AM UTC 24 |
| Finished | Aug 25 09:37:28 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304112316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.3304112316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.3181992831 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 268858567 ps |
| CPU time | 2.97 seconds |
| Started | Aug 25 09:37:26 AM UTC 24 |
| Finished | Aug 25 09:37:30 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181992831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.3181992831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.1594733896 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 261670368 ps |
| CPU time | 2.01 seconds |
| Started | Aug 25 09:37:26 AM UTC 24 |
| Finished | Aug 25 09:37:29 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1594733896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.1594733896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.1130272249 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 196966490 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:37:28 AM UTC 24 |
| Finished | Aug 25 09:37:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130272249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_stall.1130272249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.1573866955 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 185028271 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:37:28 AM UTC 24 |
| Finished | Aug 25 09:37:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573866955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_trans.1573866955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.3267311631 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 4077012093 ps |
| CPU time | 137.96 seconds |
| Started | Aug 25 09:37:26 AM UTC 24 |
| Finished | Aug 25 09:39:47 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267311631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.3267311631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.3274082198 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 7567889285 ps |
| CPU time | 119.51 seconds |
| Started | Aug 25 09:37:28 AM UTC 24 |
| Finished | Aug 25 09:39:30 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3274082198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.3274082198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.3269351838 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 300966656 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:37:28 AM UTC 24 |
| Finished | Aug 25 09:37:31 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269351838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_in_err.3269351838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.3866017439 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 29361166438 ps |
| CPU time | 91.26 seconds |
| Started | Aug 25 09:37:28 AM UTC 24 |
| Finished | Aug 25 09:39:02 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3866017439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.3866017439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.1173261569 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 6214498507 ps |
| CPU time | 14.61 seconds |
| Started | Aug 25 09:37:28 AM UTC 24 |
| Finished | Aug 25 09:37:44 AM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1173261569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.1173261569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.3917469406 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 4255009290 ps |
| CPU time | 40.84 seconds |
| Started | Aug 25 09:37:28 AM UTC 24 |
| Finished | Aug 25 09:38:11 AM UTC 24 |
| Peak memory | 230556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3917469406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.3917469406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.194991906 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 2323966080 ps |
| CPU time | 80.92 seconds |
| Started | Aug 25 09:37:30 AM UTC 24 |
| Finished | Aug 25 09:38:53 AM UTC 24 |
| Peak memory | 235240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=194991906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.194991906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.2462929482 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 275789057 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:37:30 AM UTC 24 |
| Finished | Aug 25 09:37:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2462929482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.2462929482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.2481068046 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 184517086 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:37:30 AM UTC 24 |
| Finished | Aug 25 09:37:33 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481068046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.2481068046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.2941396506 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 2034216807 ps |
| CPU time | 72.42 seconds |
| Started | Aug 25 09:37:30 AM UTC 24 |
| Finished | Aug 25 09:38:45 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941396506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.2941396506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.711505214 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 219429133 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:37:30 AM UTC 24 |
| Finished | Aug 25 09:37:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=711505214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.711505214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.3557666867 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 147262012 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:37:31 AM UTC 24 |
| Finished | Aug 25 09:37:34 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557666867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.3557666867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.1656595470 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 171233532 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:37:31 AM UTC 24 |
| Finished | Aug 25 09:37:34 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656595470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_out_iso.1656595470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.2306012049 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 193885495 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:37:32 AM UTC 24 |
| Finished | Aug 25 09:37:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2306012049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_out_stall.2306012049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.4044262351 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 175582171 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:37:32 AM UTC 24 |
| Finished | Aug 25 09:37:34 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044262351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.4044262351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.472620946 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 172974328 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:37:32 AM UTC 24 |
| Finished | Aug 25 09:37:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=472620946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pending_in_trans.472620946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.3202318372 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 214766137 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:37:33 AM UTC 24 |
| Finished | Aug 25 09:37:36 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202318372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.3202318372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.2647890366 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 169362094 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:37:34 AM UTC 24 |
| Finished | Aug 25 09:37:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2647890366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.2647890366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.1456121054 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 51720339 ps |
| CPU time | 1.07 seconds |
| Started | Aug 25 09:37:34 AM UTC 24 |
| Finished | Aug 25 09:37:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1456121054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.1456121054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.3177246588 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 19314454088 ps |
| CPU time | 69.36 seconds |
| Started | Aug 25 09:37:34 AM UTC 24 |
| Finished | Aug 25 09:38:46 AM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177246588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_pkt_buffer.3177246588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.2904266887 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 176070359 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:37:36 AM UTC 24 |
| Finished | Aug 25 09:37:39 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2904266887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.2904266887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.4134233936 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 207512999 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:37:36 AM UTC 24 |
| Finished | Aug 25 09:37:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134233936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.4134233936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.2310073288 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 240143143 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:37:36 AM UTC 24 |
| Finished | Aug 25 09:37:39 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310073288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.2310073288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.47062938 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 176836461 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:37:36 AM UTC 24 |
| Finished | Aug 25 09:37:39 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=47062938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.47062938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.1670745963 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 153150109 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:37:36 AM UTC 24 |
| Finished | Aug 25 09:37:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670745963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_rx_crc_err.1670745963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.439691797 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 442057482 ps |
| CPU time | 2.29 seconds |
| Started | Aug 25 09:37:36 AM UTC 24 |
| Finished | Aug 25 09:37:40 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=439691797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_rx_full.439691797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.3674540216 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 164057986 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:37:36 AM UTC 24 |
| Finished | Aug 25 09:37:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674540216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.3674540216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.4149237153 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 178360330 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:37:37 AM UTC 24 |
| Finished | Aug 25 09:37:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4149237153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 35.usbdev_setup_trans_ignored.4149237153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.3531085677 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 230203870 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:37:37 AM UTC 24 |
| Finished | Aug 25 09:37:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3531085677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.3531085677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.1754303885 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 3599484428 ps |
| CPU time | 129.74 seconds |
| Started | Aug 25 09:37:37 AM UTC 24 |
| Finished | Aug 25 09:39:50 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1754303885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.1754303885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.2731796325 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 156750820 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:37:39 AM UTC 24 |
| Finished | Aug 25 09:37:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2731796325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.2731796325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.3243229353 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 184988829 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:37:39 AM UTC 24 |
| Finished | Aug 25 09:37:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243229353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_stall_trans.3243229353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.3316568416 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 645197937 ps |
| CPU time | 2.59 seconds |
| Started | Aug 25 09:37:41 AM UTC 24 |
| Finished | Aug 25 09:37:44 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316568416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.3316568416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.2704692407 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 2428476693 ps |
| CPU time | 82.88 seconds |
| Started | Aug 25 09:37:40 AM UTC 24 |
| Finished | Aug 25 09:39:06 AM UTC 24 |
| Peak memory | 228664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704692407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_streaming_out.2704692407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.860540701 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 866786567 ps |
| CPU time | 22.32 seconds |
| Started | Aug 25 09:37:24 AM UTC 24 |
| Finished | Aug 25 09:37:48 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=860540701 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.860540701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.1278117826 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 579452020 ps |
| CPU time | 2.82 seconds |
| Started | Aug 25 09:37:41 AM UTC 24 |
| Finished | Aug 25 09:37:44 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1278117826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_t x_rx_disruption.1278117826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.264615379 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 579549649 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:44:01 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=264615379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_t x_rx_disruption.264615379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.333232534 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 486018311 ps |
| CPU time | 2.02 seconds |
| Started | Aug 25 09:44:01 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=333232534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_t x_rx_disruption.333232534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.957675946 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 515618639 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:44:01 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=957675946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_t x_rx_disruption.957675946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.2576439524 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 660391721 ps |
| CPU time | 2.01 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:17 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2576439524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.2576439524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.4083836404 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 468226776 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4083836404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.4083836404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.3391188986 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 470215667 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:06 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3391188986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_ tx_rx_disruption.3391188986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.136403963 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 656595855 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=136403963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_t x_rx_disruption.136403963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.797980450 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 638023378 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=797980450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_t x_rx_disruption.797980450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.2768172541 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 465659485 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:06 AM UTC 24 |
| Peak memory | 217716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2768172541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_ tx_rx_disruption.2768172541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.413925303 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 569712019 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:06 AM UTC 24 |
| Peak memory | 217588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=413925303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_t x_rx_disruption.413925303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.2994737793 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 40349801 ps |
| CPU time | 0.94 seconds |
| Started | Aug 25 09:38:01 AM UTC 24 |
| Finished | Aug 25 09:38:03 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2994737793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.2994737793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.2114745635 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 6731392751 ps |
| CPU time | 23.33 seconds |
| Started | Aug 25 09:37:41 AM UTC 24 |
| Finished | Aug 25 09:38:06 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114745635 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.2114745635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.3456688157 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 16102361162 ps |
| CPU time | 44.27 seconds |
| Started | Aug 25 09:37:41 AM UTC 24 |
| Finished | Aug 25 09:38:27 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3456688157 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.3456688157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.1809708149 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 30800182405 ps |
| CPU time | 74.47 seconds |
| Started | Aug 25 09:37:41 AM UTC 24 |
| Finished | Aug 25 09:38:57 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1809708149 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.1809708149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.1406187678 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 150192879 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:37:42 AM UTC 24 |
| Finished | Aug 25 09:37:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406187678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.1406187678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.312889207 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 150893305 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:37:42 AM UTC 24 |
| Finished | Aug 25 09:37:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312889207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_bitstuff_err.312889207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.1600941214 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 444404139 ps |
| CPU time | 2.45 seconds |
| Started | Aug 25 09:37:42 AM UTC 24 |
| Finished | Aug 25 09:37:46 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600941214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.1600941214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.3638985654 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 1249612321 ps |
| CPU time | 4.59 seconds |
| Started | Aug 25 09:37:42 AM UTC 24 |
| Finished | Aug 25 09:37:48 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3638985654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.3638985654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.1962587939 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 31674707186 ps |
| CPU time | 87.19 seconds |
| Started | Aug 25 09:37:44 AM UTC 24 |
| Finished | Aug 25 09:39:13 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962587939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.1962587939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.2269201807 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 653933303 ps |
| CPU time | 6.02 seconds |
| Started | Aug 25 09:37:44 AM UTC 24 |
| Finished | Aug 25 09:37:51 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269201807 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.2269201807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.2326550246 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 705984271 ps |
| CPU time | 3.32 seconds |
| Started | Aug 25 09:37:44 AM UTC 24 |
| Finished | Aug 25 09:37:48 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326550246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.2326550246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.2038503935 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 145011549 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:37:46 AM UTC 24 |
| Finished | Aug 25 09:37:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2038503935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_disconnected.2038503935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_enable.3393189232 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 42545236 ps |
| CPU time | 0.99 seconds |
| Started | Aug 25 09:37:46 AM UTC 24 |
| Finished | Aug 25 09:37:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393189232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.3393189232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.240513319 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 944417332 ps |
| CPU time | 3.58 seconds |
| Started | Aug 25 09:37:46 AM UTC 24 |
| Finished | Aug 25 09:37:50 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=240513319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.240513319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.1846568064 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 417000094 ps |
| CPU time | 2.21 seconds |
| Started | Aug 25 09:37:46 AM UTC 24 |
| Finished | Aug 25 09:37:49 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846568064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.1846568064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.731612424 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 250506252 ps |
| CPU time | 3.45 seconds |
| Started | Aug 25 09:37:46 AM UTC 24 |
| Finished | Aug 25 09:37:51 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=731612424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_fifo_rst.731612424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.4046971668 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 260441626 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:37:47 AM UTC 24 |
| Finished | Aug 25 09:37:50 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046971668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.4046971668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.4054527753 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 150377541 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:37:47 AM UTC 24 |
| Finished | Aug 25 09:37:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054527753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.4054527753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.4176431356 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 154989406 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:37:48 AM UTC 24 |
| Finished | Aug 25 09:37:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4176431356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.4176431356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.25815889 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 4119881027 ps |
| CPU time | 54.3 seconds |
| Started | Aug 25 09:37:46 AM UTC 24 |
| Finished | Aug 25 09:38:42 AM UTC 24 |
| Peak memory | 235196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=25815889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.25815889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.3126190046 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 8665290543 ps |
| CPU time | 93.71 seconds |
| Started | Aug 25 09:37:48 AM UTC 24 |
| Finished | Aug 25 09:39:24 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3126190046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.3126190046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.1857707572 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 220768046 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:37:49 AM UTC 24 |
| Finished | Aug 25 09:37:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1857707572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.1857707572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.1462902138 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 5488109231 ps |
| CPU time | 18.5 seconds |
| Started | Aug 25 09:37:49 AM UTC 24 |
| Finished | Aug 25 09:38:09 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1462902138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_resume.1462902138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.3919820116 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 5516342876 ps |
| CPU time | 13.88 seconds |
| Started | Aug 25 09:37:49 AM UTC 24 |
| Finished | Aug 25 09:38:04 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3919820116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.3919820116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.1195911042 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 3397194844 ps |
| CPU time | 48.83 seconds |
| Started | Aug 25 09:37:49 AM UTC 24 |
| Finished | Aug 25 09:38:40 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195911042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.1195911042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.165903254 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 2466444900 ps |
| CPU time | 85.2 seconds |
| Started | Aug 25 09:37:49 AM UTC 24 |
| Finished | Aug 25 09:39:17 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=165903254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.165903254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.2080906253 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 249546540 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:37:49 AM UTC 24 |
| Finished | Aug 25 09:37:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080906253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.2080906253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.1059400348 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 241938622 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:37:51 AM UTC 24 |
| Finished | Aug 25 09:37:54 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059400348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.1059400348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.1129013258 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 2406024552 ps |
| CPU time | 24.34 seconds |
| Started | Aug 25 09:37:51 AM UTC 24 |
| Finished | Aug 25 09:38:17 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1129013258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.1129013258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.2304124967 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 169695716 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:37:51 AM UTC 24 |
| Finished | Aug 25 09:37:54 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2304124967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.2304124967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.3544023371 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 160680882 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:37:51 AM UTC 24 |
| Finished | Aug 25 09:37:54 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544023371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.3544023371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.1732451093 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 182743084 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:37:51 AM UTC 24 |
| Finished | Aug 25 09:37:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1732451093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.1732451093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.3001023138 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 177697694 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:37:51 AM UTC 24 |
| Finished | Aug 25 09:37:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001023138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.3001023138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.3158004101 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 161530496 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:37:53 AM UTC 24 |
| Finished | Aug 25 09:37:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3158004101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_out_stall.3158004101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.2641036895 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 189426443 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:37:53 AM UTC 24 |
| Finished | Aug 25 09:37:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641036895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_out_trans_nak.2641036895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.596827326 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 167166905 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:37:53 AM UTC 24 |
| Finished | Aug 25 09:37:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=596827326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pending_in_trans.596827326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.3025303894 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 238109397 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:37:53 AM UTC 24 |
| Finished | Aug 25 09:37:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025303894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.3025303894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.1276636155 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 162123062 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:37:53 AM UTC 24 |
| Finished | Aug 25 09:37:56 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1276636155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.1276636155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.2979029144 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 49292775 ps |
| CPU time | 1.01 seconds |
| Started | Aug 25 09:37:54 AM UTC 24 |
| Finished | Aug 25 09:37:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2979029144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.2979029144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.3686803553 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 9538813334 ps |
| CPU time | 35.58 seconds |
| Started | Aug 25 09:37:55 AM UTC 24 |
| Finished | Aug 25 09:38:32 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3686803553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.3686803553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.3788586151 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 205978035 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:37:55 AM UTC 24 |
| Finished | Aug 25 09:37:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3788586151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.3788586151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.277962981 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 226282908 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:37:55 AM UTC 24 |
| Finished | Aug 25 09:37:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=277962981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_pkt_sent.277962981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.3419635097 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 248635542 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:37:55 AM UTC 24 |
| Finished | Aug 25 09:37:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3419635097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.3419635097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.4024761622 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 168866193 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:37:55 AM UTC 24 |
| Finished | Aug 25 09:37:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024761622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.4024761622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.1058182098 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 177903820 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:37:57 AM UTC 24 |
| Finished | Aug 25 09:38:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058182098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.1058182098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.580746597 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 430384579 ps |
| CPU time | 2.35 seconds |
| Started | Aug 25 09:37:57 AM UTC 24 |
| Finished | Aug 25 09:38:00 AM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580746597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_rx_full.580746597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.1650475539 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 188887678 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:37:57 AM UTC 24 |
| Finished | Aug 25 09:38:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650475539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.1650475539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.521687702 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 149844013 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:37:57 AM UTC 24 |
| Finished | Aug 25 09:37:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=521687702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 36.usbdev_setup_trans_ignored.521687702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.4128776500 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 220224745 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:37:57 AM UTC 24 |
| Finished | Aug 25 09:38:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128776500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.4128776500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.31180419 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 1907071619 ps |
| CPU time | 19.87 seconds |
| Started | Aug 25 09:37:57 AM UTC 24 |
| Finished | Aug 25 09:38:18 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=31180419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.31180419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.1193827213 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 154410776 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:37:57 AM UTC 24 |
| Finished | Aug 25 09:38:00 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193827213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.1193827213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.285018300 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 196031708 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:37:59 AM UTC 24 |
| Finished | Aug 25 09:38:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=285018300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_stall_trans.285018300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.797445521 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 1134607311 ps |
| CPU time | 5.06 seconds |
| Started | Aug 25 09:37:59 AM UTC 24 |
| Finished | Aug 25 09:38:05 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797445521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_stream_len_max.797445521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.953062130 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 2147705139 ps |
| CPU time | 61.53 seconds |
| Started | Aug 25 09:37:59 AM UTC 24 |
| Finished | Aug 25 09:39:02 AM UTC 24 |
| Peak memory | 235108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=953062130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_streaming_out.953062130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.535053715 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 602906610 ps |
| CPU time | 14.57 seconds |
| Started | Aug 25 09:37:44 AM UTC 24 |
| Finished | Aug 25 09:38:00 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=535053715 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.535053715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.2913570691 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 622277370 ps |
| CPU time | 2.84 seconds |
| Started | Aug 25 09:37:59 AM UTC 24 |
| Finished | Aug 25 09:38:03 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2913570691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_t x_rx_disruption.2913570691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.1574114325 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 500642936 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:16 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1574114325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_ tx_rx_disruption.1574114325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.907737379 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 501368466 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:16 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=907737379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_t x_rx_disruption.907737379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.1845884653 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 480660547 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1845884653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.1845884653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.4044517385 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 474564819 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4044517385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_ tx_rx_disruption.4044517385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.3586569039 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 419203086 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3586569039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_ tx_rx_disruption.3586569039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.3893490613 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 574841328 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:44:03 AM UTC 24 |
| Finished | Aug 25 09:44:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3893490613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_ tx_rx_disruption.3893490613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.1492758081 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 557313636 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:44:04 AM UTC 24 |
| Finished | Aug 25 09:44:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1492758081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_ tx_rx_disruption.1492758081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.1672297923 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 493928367 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:44:04 AM UTC 24 |
| Finished | Aug 25 09:44:07 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1672297923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.1672297923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.672226358 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 489945414 ps |
| CPU time | 1.98 seconds |
| Started | Aug 25 09:44:05 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=672226358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_t x_rx_disruption.672226358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.292739711 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 39126569 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:38:24 AM UTC 24 |
| Finished | Aug 25 09:38:27 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=292739711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.292739711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.1859587148 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 5684999342 ps |
| CPU time | 15.71 seconds |
| Started | Aug 25 09:38:01 AM UTC 24 |
| Finished | Aug 25 09:38:18 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1859587148 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.1859587148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.1164906814 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 19244156793 ps |
| CPU time | 54.98 seconds |
| Started | Aug 25 09:38:01 AM UTC 24 |
| Finished | Aug 25 09:38:58 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164906814 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.1164906814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.796193626 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 28917655144 ps |
| CPU time | 73.8 seconds |
| Started | Aug 25 09:38:01 AM UTC 24 |
| Finished | Aug 25 09:39:17 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=796193626 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.796193626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.3108210683 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 194969027 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:38:02 AM UTC 24 |
| Finished | Aug 25 09:38:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108210683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.3108210683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.1492204869 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 141505724 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:38:02 AM UTC 24 |
| Finished | Aug 25 09:38:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492204869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.1492204869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.3170348717 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 323174860 ps |
| CPU time | 2.26 seconds |
| Started | Aug 25 09:38:02 AM UTC 24 |
| Finished | Aug 25 09:38:05 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170348717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.3170348717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.3161687493 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 679186593 ps |
| CPU time | 2.85 seconds |
| Started | Aug 25 09:38:02 AM UTC 24 |
| Finished | Aug 25 09:38:06 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3161687493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.3161687493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.2631313941 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 47116200377 ps |
| CPU time | 128.28 seconds |
| Started | Aug 25 09:38:03 AM UTC 24 |
| Finished | Aug 25 09:40:14 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2631313941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.2631313941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.509481160 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 646769536 ps |
| CPU time | 7.39 seconds |
| Started | Aug 25 09:38:04 AM UTC 24 |
| Finished | Aug 25 09:38:13 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=509481160 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.509481160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.2658332224 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 759782482 ps |
| CPU time | 3.3 seconds |
| Started | Aug 25 09:38:04 AM UTC 24 |
| Finished | Aug 25 09:38:09 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2658332224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_disable_endpoint.2658332224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.3305108044 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 131443607 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:38:06 AM UTC 24 |
| Finished | Aug 25 09:38:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305108044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.3305108044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_enable.797714449 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 42824935 ps |
| CPU time | 1.07 seconds |
| Started | Aug 25 09:38:06 AM UTC 24 |
| Finished | Aug 25 09:38:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797714449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_enable.797714449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.998326377 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 781557995 ps |
| CPU time | 4.19 seconds |
| Started | Aug 25 09:38:06 AM UTC 24 |
| Finished | Aug 25 09:38:11 AM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=998326377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.998326377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.4233989289 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 348819116 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:38:06 AM UTC 24 |
| Finished | Aug 25 09:38:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233989289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.4233989289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.3445920643 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 282777883 ps |
| CPU time | 3.23 seconds |
| Started | Aug 25 09:38:06 AM UTC 24 |
| Finished | Aug 25 09:38:10 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445920643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.3445920643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.1977230913 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 191567798 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:38:07 AM UTC 24 |
| Finished | Aug 25 09:38:10 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977230913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.1977230913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.1598038130 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 138079216 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:38:08 AM UTC 24 |
| Finished | Aug 25 09:38:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598038130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.1598038130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.1069395007 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 193031421 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:38:10 AM UTC 24 |
| Finished | Aug 25 09:38:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1069395007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.1069395007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.4016138820 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 4574507777 ps |
| CPU time | 53.08 seconds |
| Started | Aug 25 09:38:07 AM UTC 24 |
| Finished | Aug 25 09:39:02 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016138820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.4016138820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.3222605736 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 5872309976 ps |
| CPU time | 57.2 seconds |
| Started | Aug 25 09:38:10 AM UTC 24 |
| Finished | Aug 25 09:39:09 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3222605736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.3222605736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.2372579922 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 154722817 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:38:10 AM UTC 24 |
| Finished | Aug 25 09:38:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372579922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.2372579922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.552429609 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 7553017365 ps |
| CPU time | 23.41 seconds |
| Started | Aug 25 09:38:10 AM UTC 24 |
| Finished | Aug 25 09:38:34 AM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=552429609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_link_resume.552429609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.748042379 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 8614473163 ps |
| CPU time | 30.49 seconds |
| Started | Aug 25 09:38:11 AM UTC 24 |
| Finished | Aug 25 09:38:43 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=748042379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_suspend.748042379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.2760112295 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 3658432907 ps |
| CPU time | 123.67 seconds |
| Started | Aug 25 09:38:11 AM UTC 24 |
| Finished | Aug 25 09:40:17 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760112295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.2760112295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.3560528315 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 2775159378 ps |
| CPU time | 29.13 seconds |
| Started | Aug 25 09:38:13 AM UTC 24 |
| Finished | Aug 25 09:38:44 AM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560528315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.3560528315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.4274976918 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 274971851 ps |
| CPU time | 1.82 seconds |
| Started | Aug 25 09:38:13 AM UTC 24 |
| Finished | Aug 25 09:38:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274976918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.4274976918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.1160517392 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 185637848 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:38:13 AM UTC 24 |
| Finished | Aug 25 09:38:16 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1160517392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.1160517392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.3449974141 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 2744965013 ps |
| CPU time | 36.33 seconds |
| Started | Aug 25 09:38:13 AM UTC 24 |
| Finished | Aug 25 09:38:51 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449974141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.3449974141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.1487693384 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 166225306 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:38:13 AM UTC 24 |
| Finished | Aug 25 09:38:16 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487693384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.1487693384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.1932819619 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 155940146 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:38:13 AM UTC 24 |
| Finished | Aug 25 09:38:16 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932819619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.1932819619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.2883991062 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 213737284 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:38:14 AM UTC 24 |
| Finished | Aug 25 09:38:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883991062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.2883991062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.1373956313 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 197077809 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:38:14 AM UTC 24 |
| Finished | Aug 25 09:38:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1373956313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.1373956313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.518305367 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 178069888 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:38:15 AM UTC 24 |
| Finished | Aug 25 09:38:18 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=518305367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_out_stall.518305367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.1065779830 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 197283051 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:38:17 AM UTC 24 |
| Finished | Aug 25 09:38:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065779830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_out_trans_nak.1065779830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.3150909893 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 149313740 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:38:17 AM UTC 24 |
| Finished | Aug 25 09:38:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150909893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_pending_in_trans.3150909893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.129310638 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 212638366 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:38:17 AM UTC 24 |
| Finished | Aug 25 09:38:20 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=129310638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.129310638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.2908441358 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 141591015 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:38:17 AM UTC 24 |
| Finished | Aug 25 09:38:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2908441358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.2908441358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.2057209061 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 69419168 ps |
| CPU time | 1.12 seconds |
| Started | Aug 25 09:38:17 AM UTC 24 |
| Finished | Aug 25 09:38:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057209061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.2057209061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.1020602679 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 8695327682 ps |
| CPU time | 34.64 seconds |
| Started | Aug 25 09:38:18 AM UTC 24 |
| Finished | Aug 25 09:38:55 AM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020602679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_pkt_buffer.1020602679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.2165895061 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 176048129 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:38:18 AM UTC 24 |
| Finished | Aug 25 09:38:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165895061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_pkt_received.2165895061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.2327883056 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 233541708 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:38:19 AM UTC 24 |
| Finished | Aug 25 09:38:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327883056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.2327883056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.2039641922 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 218051515 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:38:19 AM UTC 24 |
| Finished | Aug 25 09:38:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039641922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_random_length_in_transaction.2039641922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.1348505260 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 192319025 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:38:20 AM UTC 24 |
| Finished | Aug 25 09:38:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348505260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.1348505260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.3742587988 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 153210633 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:38:20 AM UTC 24 |
| Finished | Aug 25 09:38:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3742587988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.3742587988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.2795384204 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 327349593 ps |
| CPU time | 1.97 seconds |
| Started | Aug 25 09:38:20 AM UTC 24 |
| Finished | Aug 25 09:38:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2795384204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.2795384204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.3103290444 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 156531249 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:38:20 AM UTC 24 |
| Finished | Aug 25 09:38:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3103290444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.3103290444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.2105819919 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 142316587 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:38:20 AM UTC 24 |
| Finished | Aug 25 09:38:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2105819919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 37.usbdev_setup_trans_ignored.2105819919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.596470870 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 233603434 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:38:21 AM UTC 24 |
| Finished | Aug 25 09:38:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=596470870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.596470870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.4278098679 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 1826707100 ps |
| CPU time | 20.5 seconds |
| Started | Aug 25 09:38:21 AM UTC 24 |
| Finished | Aug 25 09:38:43 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278098679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.4278098679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.444518268 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 159711784 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:38:21 AM UTC 24 |
| Finished | Aug 25 09:38:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=444518268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.444518268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.3983154561 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 213460927 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:38:23 AM UTC 24 |
| Finished | Aug 25 09:38:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3983154561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.3983154561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.388108037 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 212208634 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:38:24 AM UTC 24 |
| Finished | Aug 25 09:38:27 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=388108037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_stream_len_max.388108037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.973207907 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 2852934844 ps |
| CPU time | 39.04 seconds |
| Started | Aug 25 09:38:23 AM UTC 24 |
| Finished | Aug 25 09:39:03 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973207907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_streaming_out.973207907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.1225921648 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 1973477971 ps |
| CPU time | 17.99 seconds |
| Started | Aug 25 09:38:04 AM UTC 24 |
| Finished | Aug 25 09:38:23 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225921648 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.1225921648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.2395531236 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 529082667 ps |
| CPU time | 2.61 seconds |
| Started | Aug 25 09:38:24 AM UTC 24 |
| Finished | Aug 25 09:38:28 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2395531236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_t x_rx_disruption.2395531236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.2670232710 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 580415272 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:44:05 AM UTC 24 |
| Finished | Aug 25 09:44:11 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2670232710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.2670232710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.1227685537 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 581784967 ps |
| CPU time | 2.31 seconds |
| Started | Aug 25 09:44:05 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1227685537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_ tx_rx_disruption.1227685537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.1730441431 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 603656893 ps |
| CPU time | 2.13 seconds |
| Started | Aug 25 09:44:05 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1730441431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.1730441431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.1717065541 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 440277996 ps |
| CPU time | 2.06 seconds |
| Started | Aug 25 09:44:05 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1717065541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_ tx_rx_disruption.1717065541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.4196066843 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 472729099 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:44:05 AM UTC 24 |
| Finished | Aug 25 09:44:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4196066843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.4196066843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.574944760 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 569063906 ps |
| CPU time | 2.32 seconds |
| Started | Aug 25 09:44:05 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=574944760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_t x_rx_disruption.574944760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.1833317132 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 565619482 ps |
| CPU time | 2.26 seconds |
| Started | Aug 25 09:44:05 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1833317132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_ tx_rx_disruption.1833317132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.1220771653 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 537112842 ps |
| CPU time | 2.25 seconds |
| Started | Aug 25 09:44:06 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1220771653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.1220771653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.2557875264 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 491860867 ps |
| CPU time | 2.33 seconds |
| Started | Aug 25 09:44:06 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2557875264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_ tx_rx_disruption.2557875264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.543438373 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 628230314 ps |
| CPU time | 2.47 seconds |
| Started | Aug 25 09:44:06 AM UTC 24 |
| Finished | Aug 25 09:44:33 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=543438373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_t x_rx_disruption.543438373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.2748000196 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 69137521 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:38:49 AM UTC 24 |
| Finished | Aug 25 09:38:52 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2748000196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.2748000196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.1173179251 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 7266990228 ps |
| CPU time | 18.04 seconds |
| Started | Aug 25 09:38:24 AM UTC 24 |
| Finished | Aug 25 09:38:44 AM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1173179251 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.1173179251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.1732120082 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 21439521474 ps |
| CPU time | 40.36 seconds |
| Started | Aug 25 09:38:24 AM UTC 24 |
| Finished | Aug 25 09:39:07 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1732120082 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.1732120082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.2169697944 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 30699192546 ps |
| CPU time | 74.25 seconds |
| Started | Aug 25 09:38:24 AM UTC 24 |
| Finished | Aug 25 09:39:41 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2169697944 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.2169697944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.415067254 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 151030452 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:38:26 AM UTC 24 |
| Finished | Aug 25 09:38:29 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415067254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_av_buffer.415067254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.3833109569 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 140291669 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:38:26 AM UTC 24 |
| Finished | Aug 25 09:38:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833109569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_bitstuff_err.3833109569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.518738261 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 310600849 ps |
| CPU time | 2.07 seconds |
| Started | Aug 25 09:38:26 AM UTC 24 |
| Finished | Aug 25 09:38:30 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=518738261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_data_toggle_clear.518738261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.164546796 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 274789503 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:38:26 AM UTC 24 |
| Finished | Aug 25 09:38:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=164546796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.164546796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.1804553269 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 27294441223 ps |
| CPU time | 65.58 seconds |
| Started | Aug 25 09:38:28 AM UTC 24 |
| Finished | Aug 25 09:39:35 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1804553269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.1804553269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.1004842692 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 166246673 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:38:28 AM UTC 24 |
| Finished | Aug 25 09:38:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004842692 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.1004842692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.2618288927 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 575784891 ps |
| CPU time | 3 seconds |
| Started | Aug 25 09:38:29 AM UTC 24 |
| Finished | Aug 25 09:38:34 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2618288927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.2618288927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.3118322558 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 160989408 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:38:29 AM UTC 24 |
| Finished | Aug 25 09:38:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118322558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.3118322558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_enable.406835268 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 34594187 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:38:30 AM UTC 24 |
| Finished | Aug 25 09:38:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=406835268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_enable.406835268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.1262497030 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 1094361646 ps |
| CPU time | 4.8 seconds |
| Started | Aug 25 09:38:30 AM UTC 24 |
| Finished | Aug 25 09:38:37 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262497030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.1262497030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.3996033850 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 171309751 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:38:30 AM UTC 24 |
| Finished | Aug 25 09:38:33 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3996033850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.3996033850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.194169329 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 191414055 ps |
| CPU time | 3.41 seconds |
| Started | Aug 25 09:38:30 AM UTC 24 |
| Finished | Aug 25 09:38:35 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=194169329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_fifo_rst.194169329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.2404706331 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 204026328 ps |
| CPU time | 1.92 seconds |
| Started | Aug 25 09:38:33 AM UTC 24 |
| Finished | Aug 25 09:38:36 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404706331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.2404706331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.2137097355 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 155505996 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:38:33 AM UTC 24 |
| Finished | Aug 25 09:38:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137097355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.2137097355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.1944132396 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 219115892 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:38:34 AM UTC 24 |
| Finished | Aug 25 09:38:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944132396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.1944132396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.1840897133 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 5023143169 ps |
| CPU time | 65.97 seconds |
| Started | Aug 25 09:38:32 AM UTC 24 |
| Finished | Aug 25 09:39:40 AM UTC 24 |
| Peak memory | 235308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840897133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.1840897133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.813556295 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 7335566773 ps |
| CPU time | 68.34 seconds |
| Started | Aug 25 09:38:34 AM UTC 24 |
| Finished | Aug 25 09:39:45 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=813556295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.813556295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.1127497573 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 178483724 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:38:35 AM UTC 24 |
| Finished | Aug 25 09:38:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127497573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_in_err.1127497573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.3246590104 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 30731524727 ps |
| CPU time | 83.98 seconds |
| Started | Aug 25 09:38:36 AM UTC 24 |
| Finished | Aug 25 09:40:02 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246590104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.3246590104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.644436930 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 6080247023 ps |
| CPU time | 15.49 seconds |
| Started | Aug 25 09:38:36 AM UTC 24 |
| Finished | Aug 25 09:38:53 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=644436930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_suspend.644436930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.2029608230 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 4633949937 ps |
| CPU time | 43.53 seconds |
| Started | Aug 25 09:38:37 AM UTC 24 |
| Finished | Aug 25 09:39:22 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2029608230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.2029608230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.2826138681 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 1780834954 ps |
| CPU time | 22.88 seconds |
| Started | Aug 25 09:38:37 AM UTC 24 |
| Finished | Aug 25 09:39:01 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826138681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.2826138681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.2688864996 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 276913582 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:38:37 AM UTC 24 |
| Finished | Aug 25 09:38:39 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688864996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.2688864996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.2328333442 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 212664428 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:38:38 AM UTC 24 |
| Finished | Aug 25 09:38:41 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2328333442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.2328333442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.252240248 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 4424716718 ps |
| CPU time | 149.44 seconds |
| Started | Aug 25 09:38:38 AM UTC 24 |
| Finished | Aug 25 09:41:11 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=252240248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.252240248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.4068273911 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 155198883 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:38:38 AM UTC 24 |
| Finished | Aug 25 09:38:41 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4068273911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.4068273911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.2653728420 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 169449579 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:38:39 AM UTC 24 |
| Finished | Aug 25 09:38:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653728420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.2653728420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.571372419 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 200520986 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:38:41 AM UTC 24 |
| Finished | Aug 25 09:38:43 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=571372419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_nak_trans.571372419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.1991141377 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 190318532 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:38:41 AM UTC 24 |
| Finished | Aug 25 09:38:43 AM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991141377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.1991141377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.2101445359 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 196590087 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:38:42 AM UTC 24 |
| Finished | Aug 25 09:38:44 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101445359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.2101445359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.688941776 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 251360144 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:38:42 AM UTC 24 |
| Finished | Aug 25 09:38:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=688941776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_out_trans_nak.688941776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.3047447781 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 154347472 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:38:43 AM UTC 24 |
| Finished | Aug 25 09:38:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047447781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.3047447781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.2345825612 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 285089762 ps |
| CPU time | 2.14 seconds |
| Started | Aug 25 09:38:43 AM UTC 24 |
| Finished | Aug 25 09:38:47 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2345825612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.2345825612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.1930655215 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 229787441 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:38:43 AM UTC 24 |
| Finished | Aug 25 09:38:46 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930655215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.1930655215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.40398998 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 32055008 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:38:44 AM UTC 24 |
| Finished | Aug 25 09:38:46 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40398998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_phy_pins_sense.40398998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.2271605866 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 13924466783 ps |
| CPU time | 58.94 seconds |
| Started | Aug 25 09:38:45 AM UTC 24 |
| Finished | Aug 25 09:39:46 AM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2271605866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.2271605866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.4185397633 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 152101864 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:38:45 AM UTC 24 |
| Finished | Aug 25 09:38:48 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4185397633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.4185397633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.1855153726 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 179335330 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:38:45 AM UTC 24 |
| Finished | Aug 25 09:38:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855153726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_pkt_sent.1855153726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.2285406834 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 207245916 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:38:45 AM UTC 24 |
| Finished | Aug 25 09:38:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285406834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_random_length_in_transaction.2285406834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.1396033119 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 176665583 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:38:45 AM UTC 24 |
| Finished | Aug 25 09:38:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396033119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.1396033119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.1834474117 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 209609398 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:38:45 AM UTC 24 |
| Finished | Aug 25 09:38:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834474117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_rx_crc_err.1834474117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.3251885223 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 289510784 ps |
| CPU time | 2.11 seconds |
| Started | Aug 25 09:38:45 AM UTC 24 |
| Finished | Aug 25 09:38:49 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251885223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.3251885223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.1947669468 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 160713188 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:38:47 AM UTC 24 |
| Finished | Aug 25 09:38:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947669468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_setup_stage.1947669468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.264455382 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 167436256 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:38:48 AM UTC 24 |
| Finished | Aug 25 09:38:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=264455382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 38.usbdev_setup_trans_ignored.264455382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.1096972730 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 216292743 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:38:48 AM UTC 24 |
| Finished | Aug 25 09:38:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096972730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.1096972730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.886522656 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 2085184589 ps |
| CPU time | 66.64 seconds |
| Started | Aug 25 09:38:48 AM UTC 24 |
| Finished | Aug 25 09:39:57 AM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=886522656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.886522656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.805896932 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 186495185 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:38:48 AM UTC 24 |
| Finished | Aug 25 09:38:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=805896932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.805896932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.1146415727 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 167539815 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:38:48 AM UTC 24 |
| Finished | Aug 25 09:38:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146415727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.1146415727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.3312742924 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 1148674944 ps |
| CPU time | 5.45 seconds |
| Started | Aug 25 09:38:49 AM UTC 24 |
| Finished | Aug 25 09:38:56 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312742924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.3312742924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.3108609293 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 3587615978 ps |
| CPU time | 36.6 seconds |
| Started | Aug 25 09:38:49 AM UTC 24 |
| Finished | Aug 25 09:39:27 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108609293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.3108609293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.2590921940 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 3666896027 ps |
| CPU time | 32.76 seconds |
| Started | Aug 25 09:38:28 AM UTC 24 |
| Finished | Aug 25 09:39:03 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590921940 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.2590921940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.3995958617 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 561449721 ps |
| CPU time | 2.58 seconds |
| Started | Aug 25 09:38:49 AM UTC 24 |
| Finished | Aug 25 09:38:53 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3995958617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.3995958617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.2847522427 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 555933700 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:44:06 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2847522427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_ tx_rx_disruption.2847522427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.3979222095 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 554996925 ps |
| CPU time | 2.13 seconds |
| Started | Aug 25 09:44:06 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3979222095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.3979222095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.3538265413 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 611402065 ps |
| CPU time | 2.37 seconds |
| Started | Aug 25 09:44:06 AM UTC 24 |
| Finished | Aug 25 09:44:33 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3538265413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_ tx_rx_disruption.3538265413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.2082004705 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 487225298 ps |
| CPU time | 2.32 seconds |
| Started | Aug 25 09:44:06 AM UTC 24 |
| Finished | Aug 25 09:44:33 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2082004705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.2082004705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.3191238857 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 560840895 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:44:07 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3191238857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_ tx_rx_disruption.3191238857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.974211948 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 469504456 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:44:07 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=974211948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_t x_rx_disruption.974211948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.1908091280 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 476547408 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:44:07 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1908091280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.1908091280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.3560144294 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 461603258 ps |
| CPU time | 2.31 seconds |
| Started | Aug 25 09:44:07 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3560144294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.3560144294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.2299791857 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 502631375 ps |
| CPU time | 2.46 seconds |
| Started | Aug 25 09:44:07 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2299791857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.2299791857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.2419009602 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 58248428 ps |
| CPU time | 1.06 seconds |
| Started | Aug 25 09:39:06 AM UTC 24 |
| Finished | Aug 25 09:39:08 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419009602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.2419009602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.1769996776 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 8705122927 ps |
| CPU time | 21.73 seconds |
| Started | Aug 25 09:38:50 AM UTC 24 |
| Finished | Aug 25 09:39:14 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769996776 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.1769996776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.2330398757 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 14519409850 ps |
| CPU time | 31.53 seconds |
| Started | Aug 25 09:38:52 AM UTC 24 |
| Finished | Aug 25 09:39:25 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2330398757 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.2330398757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.2145192744 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 29025271449 ps |
| CPU time | 82.68 seconds |
| Started | Aug 25 09:38:52 AM UTC 24 |
| Finished | Aug 25 09:40:17 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145192744 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.2145192744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.858962492 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 195266746 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:38:52 AM UTC 24 |
| Finished | Aug 25 09:38:55 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=858962492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_av_buffer.858962492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.2962663168 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 177198342 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:38:52 AM UTC 24 |
| Finished | Aug 25 09:38:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2962663168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.2962663168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.1531577054 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 210024744 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:38:52 AM UTC 24 |
| Finished | Aug 25 09:38:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531577054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.1531577054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.700124275 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 277692527 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:38:52 AM UTC 24 |
| Finished | Aug 25 09:38:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=700124275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.700124275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.280726817 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 16931739065 ps |
| CPU time | 48.76 seconds |
| Started | Aug 25 09:38:52 AM UTC 24 |
| Finished | Aug 25 09:39:43 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280726817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_device_address.280726817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.2508605118 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 218764759 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:38:52 AM UTC 24 |
| Finished | Aug 25 09:38:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2508605118 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.2508605118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.129510723 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 1040188315 ps |
| CPU time | 4.15 seconds |
| Started | Aug 25 09:38:54 AM UTC 24 |
| Finished | Aug 25 09:38:59 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=129510723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_disable_endpoint.129510723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.853109627 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 165525239 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:38:54 AM UTC 24 |
| Finished | Aug 25 09:38:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=853109627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_disconnected.853109627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_enable.286672802 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 38562474 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:38:54 AM UTC 24 |
| Finished | Aug 25 09:38:56 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=286672802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_enable.286672802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.2655162273 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 868294799 ps |
| CPU time | 4.29 seconds |
| Started | Aug 25 09:38:54 AM UTC 24 |
| Finished | Aug 25 09:38:59 AM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655162273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.2655162273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.3123693617 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 287996159 ps |
| CPU time | 2.5 seconds |
| Started | Aug 25 09:38:56 AM UTC 24 |
| Finished | Aug 25 09:38:59 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3123693617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_fifo_rst.3123693617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.304980171 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 206199835 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:38:56 AM UTC 24 |
| Finished | Aug 25 09:38:59 AM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=304980171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.304980171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.4278532738 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 139543029 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:38:56 AM UTC 24 |
| Finished | Aug 25 09:38:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278532738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_stall.4278532738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.3909921068 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 166593534 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:38:56 AM UTC 24 |
| Finished | Aug 25 09:38:59 AM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909921068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_trans.3909921068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.2472339248 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 4472531031 ps |
| CPU time | 43.45 seconds |
| Started | Aug 25 09:38:56 AM UTC 24 |
| Finished | Aug 25 09:39:41 AM UTC 24 |
| Peak memory | 235196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472339248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.2472339248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.149910153 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 8037146523 ps |
| CPU time | 118.25 seconds |
| Started | Aug 25 09:38:56 AM UTC 24 |
| Finished | Aug 25 09:40:57 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=149910153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.149910153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.1683889885 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 257633544 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:38:56 AM UTC 24 |
| Finished | Aug 25 09:38:59 AM UTC 24 |
| Peak memory | 215552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683889885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_in_err.1683889885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.1787504646 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 5389514299 ps |
| CPU time | 16.81 seconds |
| Started | Aug 25 09:38:57 AM UTC 24 |
| Finished | Aug 25 09:39:15 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787504646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.1787504646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.900397210 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 10146109655 ps |
| CPU time | 29.19 seconds |
| Started | Aug 25 09:38:57 AM UTC 24 |
| Finished | Aug 25 09:39:28 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=900397210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_suspend.900397210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.283167204 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 2693347094 ps |
| CPU time | 87.46 seconds |
| Started | Aug 25 09:38:57 AM UTC 24 |
| Finished | Aug 25 09:40:27 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=283167204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.283167204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.986830207 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 1568558469 ps |
| CPU time | 15.86 seconds |
| Started | Aug 25 09:38:57 AM UTC 24 |
| Finished | Aug 25 09:39:15 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=986830207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.986830207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.2386707159 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 246673460 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:38:59 AM UTC 24 |
| Finished | Aug 25 09:39:01 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386707159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.2386707159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.1189330675 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 204273663 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:38:59 AM UTC 24 |
| Finished | Aug 25 09:39:01 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1189330675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.1189330675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.1348703769 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 3480462701 ps |
| CPU time | 129.81 seconds |
| Started | Aug 25 09:39:01 AM UTC 24 |
| Finished | Aug 25 09:41:13 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348703769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.1348703769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.3450436328 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 155225402 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:39:01 AM UTC 24 |
| Finished | Aug 25 09:39:03 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450436328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.3450436328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.3236746728 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 140753429 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:39:01 AM UTC 24 |
| Finished | Aug 25 09:39:03 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236746728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.3236746728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.3596239213 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 181759914 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:39:01 AM UTC 24 |
| Finished | Aug 25 09:39:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596239213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_nak_trans.3596239213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.601074006 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 186634185 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:39:01 AM UTC 24 |
| Finished | Aug 25 09:39:04 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=601074006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_out_iso.601074006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.1953587347 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 158174680 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:39:01 AM UTC 24 |
| Finished | Aug 25 09:39:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953587347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_out_stall.1953587347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.278661019 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 172931806 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:39:01 AM UTC 24 |
| Finished | Aug 25 09:39:04 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=278661019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_out_trans_nak.278661019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.421658436 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 143204528 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:39:01 AM UTC 24 |
| Finished | Aug 25 09:39:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=421658436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_pending_in_trans.421658436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.1593640997 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 210266448 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:39:01 AM UTC 24 |
| Finished | Aug 25 09:39:04 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593640997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.1593640997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.2085963217 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 143484826 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:39:01 AM UTC 24 |
| Finished | Aug 25 09:39:03 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085963217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.2085963217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.1010652442 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 47698248 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010652442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_pins_sense.1010652442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.3279492519 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 9013587862 ps |
| CPU time | 43.17 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:50 AM UTC 24 |
| Peak memory | 235288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3279492519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_buffer.3279492519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.3671978393 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 212670062 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671978393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.3671978393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.1772030901 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 193853229 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772030901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.1772030901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.1878595969 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 227341304 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878595969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.1878595969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.2933521401 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 176365123 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933521401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.2933521401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.8269579 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 222006492 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:07 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=8269579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_rx_crc_err.8269579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.2533025814 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 295926917 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533025814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_rx_full.2533025814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.2221990732 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 169807418 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221990732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_setup_stage.2221990732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.2128454072 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 159474340 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2128454072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 39.usbdev_setup_trans_ignored.2128454072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.322215253 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 234574749 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=322215253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.322215253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.1459899712 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 1988575546 ps |
| CPU time | 72.74 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:40:20 AM UTC 24 |
| Peak memory | 235120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459899712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.1459899712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.523476486 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 175934019 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=523476486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.523476486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.420363953 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 173883232 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=420363953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_stall_trans.420363953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.3298202906 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 374290906 ps |
| CPU time | 2.15 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:09 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3298202906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.3298202906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.127033422 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 2848821384 ps |
| CPU time | 27.27 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:34 AM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=127033422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_streaming_out.127033422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.1305006171 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 226767239 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:38:54 AM UTC 24 |
| Finished | Aug 25 09:38:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1305006171 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.1305006171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.280778732 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 645881923 ps |
| CPU time | 2.68 seconds |
| Started | Aug 25 09:39:05 AM UTC 24 |
| Finished | Aug 25 09:39:09 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=280778732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_tx _rx_disruption.280778732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.1839795866 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 472988199 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:44:07 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1839795866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.1839795866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.753278332 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 622249654 ps |
| CPU time | 2.24 seconds |
| Started | Aug 25 09:44:07 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=753278332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_t x_rx_disruption.753278332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.706715781 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 490020804 ps |
| CPU time | 2.14 seconds |
| Started | Aug 25 09:44:08 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=706715781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_t x_rx_disruption.706715781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.2095037250 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 514704848 ps |
| CPU time | 2.26 seconds |
| Started | Aug 25 09:44:08 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2095037250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.2095037250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.2190855795 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 459272619 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:44:08 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2190855795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.2190855795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.3021285233 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 491776821 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:44:08 AM UTC 24 |
| Finished | Aug 25 09:44:20 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3021285233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.3021285233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.1280401779 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 528826346 ps |
| CPU time | 2.41 seconds |
| Started | Aug 25 09:44:09 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1280401779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.1280401779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.2704962233 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 609162474 ps |
| CPU time | 2.16 seconds |
| Started | Aug 25 09:44:09 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2704962233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.2704962233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.1795821357 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 585587769 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:44:11 AM UTC 24 |
| Finished | Aug 25 09:44:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1795821357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.1795821357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.2183586092 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 427838207 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:44:11 AM UTC 24 |
| Finished | Aug 25 09:44:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2183586092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.2183586092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.3312150618 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 60915594 ps |
| CPU time | 1.08 seconds |
| Started | Aug 25 09:23:25 AM UTC 24 |
| Finished | Aug 25 09:23:27 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312150618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.3312150618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.1351907798 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 5739463815 ps |
| CPU time | 19.64 seconds |
| Started | Aug 25 09:21:59 AM UTC 24 |
| Finished | Aug 25 09:22:20 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1351907798 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.1351907798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.4010689684 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 15922728685 ps |
| CPU time | 32.59 seconds |
| Started | Aug 25 09:22:01 AM UTC 24 |
| Finished | Aug 25 09:22:35 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010689684 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.4010689684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.4203150836 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 29563720722 ps |
| CPU time | 75.99 seconds |
| Started | Aug 25 09:22:01 AM UTC 24 |
| Finished | Aug 25 09:23:19 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203150836 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.4203150836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.2052563614 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 184922356 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:22:01 AM UTC 24 |
| Finished | Aug 25 09:22:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2052563614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.2052563614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.2725801101 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 152817910 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:22:02 AM UTC 24 |
| Finished | Aug 25 09:22:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725801101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.2725801101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.500255085 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 168452281 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:22:03 AM UTC 24 |
| Finished | Aug 25 09:22:06 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=500255085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_av_overflow.500255085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.4029942707 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 147097337 ps |
| CPU time | 1.12 seconds |
| Started | Aug 25 09:22:04 AM UTC 24 |
| Finished | Aug 25 09:22:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4029942707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.4029942707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.935142209 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 261801876 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:22:06 AM UTC 24 |
| Finished | Aug 25 09:22:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=935142209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_data_toggle_clear.935142209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.2998953309 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 1020915286 ps |
| CPU time | 4.5 seconds |
| Started | Aug 25 09:22:07 AM UTC 24 |
| Finished | Aug 25 09:22:12 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998953309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.2998953309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.1748919711 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 13191318997 ps |
| CPU time | 38.25 seconds |
| Started | Aug 25 09:22:08 AM UTC 24 |
| Finished | Aug 25 09:22:48 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748919711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.1748919711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.21260567 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 851775633 ps |
| CPU time | 6.75 seconds |
| Started | Aug 25 09:22:08 AM UTC 24 |
| Finished | Aug 25 09:22:16 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=21260567 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.21260567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.2092993347 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 1201153435 ps |
| CPU time | 3.54 seconds |
| Started | Aug 25 09:22:09 AM UTC 24 |
| Finished | Aug 25 09:22:14 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2092993347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_disable_endpoint.2092993347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.3844543177 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 164229054 ps |
| CPU time | 1.18 seconds |
| Started | Aug 25 09:22:12 AM UTC 24 |
| Finished | Aug 25 09:22:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844543177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_disconnected.3844543177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_enable.2036311112 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 39046755 ps |
| CPU time | 0.93 seconds |
| Started | Aug 25 09:22:14 AM UTC 24 |
| Finished | Aug 25 09:22:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2036311112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.2036311112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.1678556651 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 851103958 ps |
| CPU time | 3.68 seconds |
| Started | Aug 25 09:22:14 AM UTC 24 |
| Finished | Aug 25 09:22:19 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1678556651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.1678556651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.1544541344 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 794039389 ps |
| CPU time | 2.72 seconds |
| Started | Aug 25 09:22:15 AM UTC 24 |
| Finished | Aug 25 09:22:19 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544541344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.1544541344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.3471426250 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 303158763 ps |
| CPU time | 3 seconds |
| Started | Aug 25 09:22:15 AM UTC 24 |
| Finished | Aug 25 09:22:19 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3471426250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.3471426250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.2576113626 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 94200992724 ps |
| CPU time | 338.86 seconds |
| Started | Aug 25 09:22:16 AM UTC 24 |
| Finished | Aug 25 09:28:01 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2576113626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.2576113626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.1070874994 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 95108967521 ps |
| CPU time | 243.43 seconds |
| Started | Aug 25 09:22:17 AM UTC 24 |
| Finished | Aug 25 09:26:24 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070874994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.1070874994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.1722506469 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 104967988284 ps |
| CPU time | 322.99 seconds |
| Started | Aug 25 09:22:17 AM UTC 24 |
| Finished | Aug 25 09:27:45 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1722506469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_loclk_max.1722506469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.4186703040 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 115217158371 ps |
| CPU time | 315.18 seconds |
| Started | Aug 25 09:22:20 AM UTC 24 |
| Finished | Aug 25 09:27:40 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186703040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.4186703040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.609005329 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 176869040 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:22:20 AM UTC 24 |
| Finished | Aug 25 09:22:23 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=609005329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.609005329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.357367216 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 141996911 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:22:22 AM UTC 24 |
| Finished | Aug 25 09:22:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=357367216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_in_stall.357367216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.1778101099 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 176008838 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:22:22 AM UTC 24 |
| Finished | Aug 25 09:22:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778101099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.1778101099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.3094284903 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 3312416841 ps |
| CPU time | 114.47 seconds |
| Started | Aug 25 09:22:20 AM UTC 24 |
| Finished | Aug 25 09:24:17 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094284903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.3094284903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.4219309108 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 11975555428 ps |
| CPU time | 114.25 seconds |
| Started | Aug 25 09:22:24 AM UTC 24 |
| Finished | Aug 25 09:24:21 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4219309108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.4219309108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.3526458189 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 168205163 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:22:25 AM UTC 24 |
| Finished | Aug 25 09:22:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3526458189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_in_err.3526458189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.3218856370 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 33137155100 ps |
| CPU time | 109.7 seconds |
| Started | Aug 25 09:22:25 AM UTC 24 |
| Finished | Aug 25 09:24:17 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218856370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.3218856370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.1547084336 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 10349661681 ps |
| CPU time | 23.01 seconds |
| Started | Aug 25 09:22:25 AM UTC 24 |
| Finished | Aug 25 09:22:50 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1547084336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_link_suspend.1547084336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.2933912208 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 3967633778 ps |
| CPU time | 59.83 seconds |
| Started | Aug 25 09:22:26 AM UTC 24 |
| Finished | Aug 25 09:23:28 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933912208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.2933912208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.1694360726 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 2768067353 ps |
| CPU time | 30.53 seconds |
| Started | Aug 25 09:22:29 AM UTC 24 |
| Finished | Aug 25 09:23:01 AM UTC 24 |
| Peak memory | 228444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694360726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.1694360726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.3382990119 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 236702663 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:22:36 AM UTC 24 |
| Finished | Aug 25 09:22:38 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3382990119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.3382990119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.2544467641 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 237392672 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:22:39 AM UTC 24 |
| Finished | Aug 25 09:22:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2544467641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.2544467641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.2470323063 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 2559998557 ps |
| CPU time | 88.02 seconds |
| Started | Aug 25 09:22:40 AM UTC 24 |
| Finished | Aug 25 09:24:10 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470323063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.2470323063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.1439522752 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 2771412994 ps |
| CPU time | 102.95 seconds |
| Started | Aug 25 09:22:42 AM UTC 24 |
| Finished | Aug 25 09:24:28 AM UTC 24 |
| Peak memory | 235240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439522752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.1439522752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.283501610 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 3283706472 ps |
| CPU time | 33.53 seconds |
| Started | Aug 25 09:22:49 AM UTC 24 |
| Finished | Aug 25 09:23:24 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=283501610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.283501610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.1270820749 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 178747282 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:22:51 AM UTC 24 |
| Finished | Aug 25 09:22:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270820749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.1270820749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.3064039580 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 145498691 ps |
| CPU time | 1.18 seconds |
| Started | Aug 25 09:22:54 AM UTC 24 |
| Finished | Aug 25 09:22:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3064039580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.3064039580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.1513815139 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 183190236 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:22:57 AM UTC 24 |
| Finished | Aug 25 09:23:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513815139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_nak_trans.1513815139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.3402783144 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 227225608 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:23:00 AM UTC 24 |
| Finished | Aug 25 09:23:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3402783144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.3402783144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.4211502859 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 162391496 ps |
| CPU time | 1.05 seconds |
| Started | Aug 25 09:23:02 AM UTC 24 |
| Finished | Aug 25 09:23:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211502859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_out_stall.4211502859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.767848286 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 153274327 ps |
| CPU time | 1.18 seconds |
| Started | Aug 25 09:23:03 AM UTC 24 |
| Finished | Aug 25 09:23:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767848286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_out_trans_nak.767848286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.2528197084 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 161173515 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:23:03 AM UTC 24 |
| Finished | Aug 25 09:23:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528197084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.2528197084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.291598184 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 188692702 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:23:05 AM UTC 24 |
| Finished | Aug 25 09:23:07 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=291598184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.291598184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.42116127 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 208086953 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:23:05 AM UTC 24 |
| Finished | Aug 25 09:23:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=42116127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.42116127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.1116031338 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 195904597 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:23:08 AM UTC 24 |
| Finished | Aug 25 09:23:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116031338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.1116031338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.3640455204 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 7459331354 ps |
| CPU time | 28.77 seconds |
| Started | Aug 25 09:23:08 AM UTC 24 |
| Finished | Aug 25 09:23:38 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3640455204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.3640455204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.3553972945 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 201055048 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:23:08 AM UTC 24 |
| Finished | Aug 25 09:23:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3553972945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_pkt_received.3553972945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.3084649367 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 224486637 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:23:08 AM UTC 24 |
| Finished | Aug 25 09:23:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084649367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.3084649367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.458824028 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 5542003521 ps |
| CPU time | 38.64 seconds |
| Started | Aug 25 09:23:12 AM UTC 24 |
| Finished | Aug 25 09:23:52 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=458824028 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.458824028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.3472491420 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 3112681517 ps |
| CPU time | 28.35 seconds |
| Started | Aug 25 09:23:12 AM UTC 24 |
| Finished | Aug 25 09:23:41 AM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472491420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.3472491420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.3608640723 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 6751625774 ps |
| CPU time | 123.29 seconds |
| Started | Aug 25 09:23:12 AM UTC 24 |
| Finished | Aug 25 09:25:18 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608640723 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.3608640723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.340190144 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 150314454 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:23:08 AM UTC 24 |
| Finished | Aug 25 09:23:10 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=340190144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_random_length_in_transaction.340190144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.693475144 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 239289500 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:23:12 AM UTC 24 |
| Finished | Aug 25 09:23:14 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=693475144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.693475144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.1504143667 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 20172882138 ps |
| CPU time | 53.89 seconds |
| Started | Aug 25 09:23:12 AM UTC 24 |
| Finished | Aug 25 09:24:07 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1504143667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 4.usbdev_resume_link_active.1504143667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.112067557 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 135509354 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:23:12 AM UTC 24 |
| Finished | Aug 25 09:23:14 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=112067557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_rx_crc_err.112067557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.2709938884 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 394476220 ps |
| CPU time | 2.55 seconds |
| Started | Aug 25 09:23:14 AM UTC 24 |
| Finished | Aug 25 09:23:17 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709938884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.2709938884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.3588837586 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 192086475 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:23:15 AM UTC 24 |
| Finished | Aug 25 09:23:18 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588837586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.3588837586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.1957252828 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 773274454 ps |
| CPU time | 3.08 seconds |
| Started | Aug 25 09:23:25 AM UTC 24 |
| Finished | Aug 25 09:23:29 AM UTC 24 |
| Peak memory | 252488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1957252828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.1957252828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.2856832238 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 432753049 ps |
| CPU time | 2.22 seconds |
| Started | Aug 25 09:23:15 AM UTC 24 |
| Finished | Aug 25 09:23:18 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856832238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.2856832238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.1983042525 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 200915482 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:23:16 AM UTC 24 |
| Finished | Aug 25 09:23:19 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983042525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.1983042525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.3154202398 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 149379672 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:23:18 AM UTC 24 |
| Finished | Aug 25 09:23:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154202398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.3154202398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.4189274583 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 173190469 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:23:18 AM UTC 24 |
| Finished | Aug 25 09:23:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189274583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.4189274583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.1364882520 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 228977056 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:23:18 AM UTC 24 |
| Finished | Aug 25 09:23:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1364882520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.1364882520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.537835951 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 3346028563 ps |
| CPU time | 32.6 seconds |
| Started | Aug 25 09:23:19 AM UTC 24 |
| Finished | Aug 25 09:23:54 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=537835951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.537835951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.3476413485 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 203633572 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:23:20 AM UTC 24 |
| Finished | Aug 25 09:23:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476413485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.3476413485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.2067979177 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 165129716 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:23:20 AM UTC 24 |
| Finished | Aug 25 09:23:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2067979177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.2067979177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.393175652 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 1034341343 ps |
| CPU time | 4.83 seconds |
| Started | Aug 25 09:23:22 AM UTC 24 |
| Finished | Aug 25 09:23:28 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=393175652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_stream_len_max.393175652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.2386995029 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 3809502067 ps |
| CPU time | 54.73 seconds |
| Started | Aug 25 09:23:22 AM UTC 24 |
| Finished | Aug 25 09:24:18 AM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386995029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_streaming_out.2386995029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.1114610772 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 3675927776 ps |
| CPU time | 28.01 seconds |
| Started | Aug 25 09:22:09 AM UTC 24 |
| Finished | Aug 25 09:22:39 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114610772 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.1114610772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.2264214399 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 39157456 ps |
| CPU time | 1.02 seconds |
| Started | Aug 25 09:39:21 AM UTC 24 |
| Finished | Aug 25 09:39:23 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264214399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.2264214399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.1029560077 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 3918582881 ps |
| CPU time | 12.94 seconds |
| Started | Aug 25 09:39:06 AM UTC 24 |
| Finished | Aug 25 09:39:20 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1029560077 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.1029560077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.877730851 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 20763388474 ps |
| CPU time | 43.6 seconds |
| Started | Aug 25 09:39:06 AM UTC 24 |
| Finished | Aug 25 09:39:51 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=877730851 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.877730851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.2080337964 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 24567959580 ps |
| CPU time | 51.51 seconds |
| Started | Aug 25 09:39:07 AM UTC 24 |
| Finished | Aug 25 09:40:00 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080337964 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.2080337964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.3468907128 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 214016162 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:39:07 AM UTC 24 |
| Finished | Aug 25 09:39:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468907128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.3468907128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.726760792 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 184662573 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=726760792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_bitstuff_err.726760792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.2975516031 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 694232390 ps |
| CPU time | 3.74 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:14 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2975516031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.2975516031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.4294309248 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 966780714 ps |
| CPU time | 3.92 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:14 AM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294309248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.4294309248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.875758740 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 38192930731 ps |
| CPU time | 100.88 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:40:52 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=875758740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_device_address.875758740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.1912811290 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 349767879 ps |
| CPU time | 6.11 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:16 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912811290 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.1912811290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.1037250136 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 607562531 ps |
| CPU time | 3.17 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:13 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1037250136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_disable_endpoint.1037250136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.871109029 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 135048108 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=871109029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_disconnected.871109029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_enable.3020932482 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 60081157 ps |
| CPU time | 1.13 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3020932482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.3020932482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.2885140631 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 890958646 ps |
| CPU time | 4.56 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:15 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885140631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.2885140631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.354450906 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 260235142 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:12 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=354450906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.354450906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.3903866461 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 229113244 ps |
| CPU time | 2.54 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:13 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903866461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.3903866461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.2310620940 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 239922293 ps |
| CPU time | 2.22 seconds |
| Started | Aug 25 09:39:11 AM UTC 24 |
| Finished | Aug 25 09:39:14 AM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310620940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.2310620940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.672981966 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 171439249 ps |
| CPU time | 1.17 seconds |
| Started | Aug 25 09:39:11 AM UTC 24 |
| Finished | Aug 25 09:39:13 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=672981966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_in_stall.672981966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.2504114493 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 265717054 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:39:11 AM UTC 24 |
| Finished | Aug 25 09:39:14 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504114493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.2504114493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.1035130387 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 3047944822 ps |
| CPU time | 42.41 seconds |
| Started | Aug 25 09:39:10 AM UTC 24 |
| Finished | Aug 25 09:39:55 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035130387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.1035130387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.3477142404 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 5478134875 ps |
| CPU time | 57.64 seconds |
| Started | Aug 25 09:39:11 AM UTC 24 |
| Finished | Aug 25 09:40:10 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477142404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.3477142404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.3043196804 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 193485578 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:39:11 AM UTC 24 |
| Finished | Aug 25 09:39:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3043196804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_in_err.3043196804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.249502917 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 26728420957 ps |
| CPU time | 79.53 seconds |
| Started | Aug 25 09:39:12 AM UTC 24 |
| Finished | Aug 25 09:40:34 AM UTC 24 |
| Peak memory | 228468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=249502917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_link_resume.249502917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.3796230027 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 4011413005 ps |
| CPU time | 11.95 seconds |
| Started | Aug 25 09:39:12 AM UTC 24 |
| Finished | Aug 25 09:39:26 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796230027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.3796230027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.3158908605 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 3373212671 ps |
| CPU time | 35.82 seconds |
| Started | Aug 25 09:39:12 AM UTC 24 |
| Finished | Aug 25 09:39:50 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3158908605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.3158908605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.3581408263 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 2811906928 ps |
| CPU time | 96.49 seconds |
| Started | Aug 25 09:39:12 AM UTC 24 |
| Finished | Aug 25 09:40:51 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581408263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.3581408263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.2236421889 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 242143433 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:39:15 AM UTC 24 |
| Finished | Aug 25 09:39:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2236421889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.2236421889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.2205162633 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 186640023 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:39:15 AM UTC 24 |
| Finished | Aug 25 09:39:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205162633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.2205162633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.3676860935 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 2955875930 ps |
| CPU time | 29.51 seconds |
| Started | Aug 25 09:39:15 AM UTC 24 |
| Finished | Aug 25 09:39:46 AM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676860935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.3676860935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.1096361299 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 154323242 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:39:15 AM UTC 24 |
| Finished | Aug 25 09:39:17 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096361299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.1096361299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.2203560962 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 149688215 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:39:15 AM UTC 24 |
| Finished | Aug 25 09:39:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203560962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.2203560962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.2309476343 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 203521466 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:39:15 AM UTC 24 |
| Finished | Aug 25 09:39:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309476343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.2309476343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.2198532441 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 201445986 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:39:15 AM UTC 24 |
| Finished | Aug 25 09:39:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198532441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_iso.2198532441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.2770513671 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 177050163 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:39:15 AM UTC 24 |
| Finished | Aug 25 09:39:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770513671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_out_stall.2770513671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.4158568995 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 176277899 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:39:15 AM UTC 24 |
| Finished | Aug 25 09:39:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158568995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_out_trans_nak.4158568995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.3537843378 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 154082454 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:39:17 AM UTC 24 |
| Finished | Aug 25 09:39:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537843378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.3537843378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.431915362 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 207963133 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:39:17 AM UTC 24 |
| Finished | Aug 25 09:39:19 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=431915362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.431915362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.3078207530 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 151133863 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:39:17 AM UTC 24 |
| Finished | Aug 25 09:39:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3078207530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.3078207530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.975132708 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 35334087 ps |
| CPU time | 1 seconds |
| Started | Aug 25 09:39:17 AM UTC 24 |
| Finished | Aug 25 09:39:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=975132708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_phy_pins_sense.975132708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.2782573546 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 13706463188 ps |
| CPU time | 50.2 seconds |
| Started | Aug 25 09:39:17 AM UTC 24 |
| Finished | Aug 25 09:40:09 AM UTC 24 |
| Peak memory | 232596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782573546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_pkt_buffer.2782573546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.209803154 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 168918887 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=209803154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_pkt_received.209803154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.3369770429 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 218267003 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369770429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.3369770429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.1922876465 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 270218977 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:22 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922876465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_random_length_in_transaction.1922876465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.270078426 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 184977874 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:21 AM UTC 24 |
| Peak memory | 216284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270078426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.270078426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.66154048 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 144541259 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:21 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=66154048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_rx_crc_err.66154048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.1825489301 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 269321970 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1825489301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.1825489301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.1635567186 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 160170203 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:22 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1635567186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_setup_stage.1635567186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.4121191437 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 143792511 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:21 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121191437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 40.usbdev_setup_trans_ignored.4121191437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.2080127638 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 193095181 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080127638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.2080127638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.4176995653 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 2964615114 ps |
| CPU time | 42.85 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:40:04 AM UTC 24 |
| Peak memory | 228624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4176995653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.4176995653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.2002960840 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 148631539 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002960840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.2002960840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.3034213361 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 170451354 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:39:19 AM UTC 24 |
| Finished | Aug 25 09:39:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034213361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_stall_trans.3034213361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.4221402181 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 1274240468 ps |
| CPU time | 5.11 seconds |
| Started | Aug 25 09:39:21 AM UTC 24 |
| Finished | Aug 25 09:39:27 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221402181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.4221402181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.1378593548 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 2690510732 ps |
| CPU time | 94.79 seconds |
| Started | Aug 25 09:39:21 AM UTC 24 |
| Finished | Aug 25 09:40:58 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378593548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_streaming_out.1378593548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.252657675 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 3395950459 ps |
| CPU time | 36.95 seconds |
| Started | Aug 25 09:39:09 AM UTC 24 |
| Finished | Aug 25 09:39:48 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=252657675 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.252657675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.3791533896 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 639009673 ps |
| CPU time | 2.92 seconds |
| Started | Aug 25 09:39:21 AM UTC 24 |
| Finished | Aug 25 09:39:25 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3791533896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.3791533896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.2002930690 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 446013663 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:44:11 AM UTC 24 |
| Finished | Aug 25 09:44:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2002930690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_ tx_rx_disruption.2002930690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.901762646 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 489080203 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:44:11 AM UTC 24 |
| Finished | Aug 25 09:44:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=901762646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_t x_rx_disruption.901762646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.2725016605 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 593048194 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:44:12 AM UTC 24 |
| Finished | Aug 25 09:44:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2725016605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.2725016605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.3648389002 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 443273831 ps |
| CPU time | 2.03 seconds |
| Started | Aug 25 09:44:15 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 217836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3648389002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_ tx_rx_disruption.3648389002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.2416167660 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 547769761 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:44:15 AM UTC 24 |
| Finished | Aug 25 09:44:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2416167660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_ tx_rx_disruption.2416167660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.3709935988 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 472256533 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:44:17 AM UTC 24 |
| Finished | Aug 25 09:44:34 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3709935988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.3709935988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.3158590348 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 475904861 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:44:17 AM UTC 24 |
| Finished | Aug 25 09:44:34 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3158590348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.3158590348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.4193804423 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 550964139 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:44:17 AM UTC 24 |
| Finished | Aug 25 09:44:34 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4193804423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.4193804423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.661684916 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 552574051 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:44:17 AM UTC 24 |
| Finished | Aug 25 09:44:34 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=661684916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_t x_rx_disruption.661684916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.3768919107 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 527938654 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:44:17 AM UTC 24 |
| Finished | Aug 25 09:44:34 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3768919107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_ tx_rx_disruption.3768919107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.1071991969 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 44617086 ps |
| CPU time | 1.05 seconds |
| Started | Aug 25 09:39:40 AM UTC 24 |
| Finished | Aug 25 09:39:42 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1071991969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.1071991969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.3283991682 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 11064594409 ps |
| CPU time | 27.48 seconds |
| Started | Aug 25 09:39:22 AM UTC 24 |
| Finished | Aug 25 09:39:51 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283991682 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.3283991682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.92769850 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 20277613747 ps |
| CPU time | 46.66 seconds |
| Started | Aug 25 09:39:22 AM UTC 24 |
| Finished | Aug 25 09:40:11 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=92769850 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.92769850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.2879931031 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 29841405455 ps |
| CPU time | 66.69 seconds |
| Started | Aug 25 09:39:22 AM UTC 24 |
| Finished | Aug 25 09:40:31 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2879931031 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.2879931031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.306040143 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 147193195 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:39:22 AM UTC 24 |
| Finished | Aug 25 09:39:25 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=306040143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_av_buffer.306040143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.769832331 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 143778638 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:39:23 AM UTC 24 |
| Finished | Aug 25 09:39:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=769832331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_bitstuff_err.769832331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.1032341622 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 181891076 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:39:23 AM UTC 24 |
| Finished | Aug 25 09:39:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032341622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.1032341622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.2856206266 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 1185981450 ps |
| CPU time | 6.13 seconds |
| Started | Aug 25 09:39:23 AM UTC 24 |
| Finished | Aug 25 09:39:30 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856206266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.2856206266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.1474174744 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 28883801274 ps |
| CPU time | 81.71 seconds |
| Started | Aug 25 09:39:23 AM UTC 24 |
| Finished | Aug 25 09:40:47 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474174744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.1474174744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.1743273527 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 2476430824 ps |
| CPU time | 30.58 seconds |
| Started | Aug 25 09:39:23 AM UTC 24 |
| Finished | Aug 25 09:39:55 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1743273527 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.1743273527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.1470210916 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 825634021 ps |
| CPU time | 3.93 seconds |
| Started | Aug 25 09:39:24 AM UTC 24 |
| Finished | Aug 25 09:39:29 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470210916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.1470210916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.3693704371 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 157744809 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:39:24 AM UTC 24 |
| Finished | Aug 25 09:39:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3693704371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.3693704371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_enable.1055074822 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 38122369 ps |
| CPU time | 1.12 seconds |
| Started | Aug 25 09:39:24 AM UTC 24 |
| Finished | Aug 25 09:39:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055074822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_enable.1055074822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.925260100 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 741704036 ps |
| CPU time | 3.24 seconds |
| Started | Aug 25 09:39:24 AM UTC 24 |
| Finished | Aug 25 09:39:29 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=925260100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.925260100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.135400691 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 519053660 ps |
| CPU time | 2.34 seconds |
| Started | Aug 25 09:39:26 AM UTC 24 |
| Finished | Aug 25 09:39:29 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=135400691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.135400691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.952491823 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 244740255 ps |
| CPU time | 2.23 seconds |
| Started | Aug 25 09:39:26 AM UTC 24 |
| Finished | Aug 25 09:39:29 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=952491823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_fifo_rst.952491823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.528051160 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 277651178 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:39:26 AM UTC 24 |
| Finished | Aug 25 09:39:29 AM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=528051160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.528051160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.3295230640 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 209672962 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:39:26 AM UTC 24 |
| Finished | Aug 25 09:39:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295230640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_stall.3295230640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.1665772157 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 193740527 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:39:26 AM UTC 24 |
| Finished | Aug 25 09:39:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1665772157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.1665772157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.3331260038 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 4286911467 ps |
| CPU time | 133.28 seconds |
| Started | Aug 25 09:39:26 AM UTC 24 |
| Finished | Aug 25 09:41:42 AM UTC 24 |
| Peak memory | 235224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331260038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.3331260038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.832770864 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 11449506688 ps |
| CPU time | 112.84 seconds |
| Started | Aug 25 09:39:27 AM UTC 24 |
| Finished | Aug 25 09:41:23 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=832770864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.832770864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.360138571 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 210589744 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:39:28 AM UTC 24 |
| Finished | Aug 25 09:39:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=360138571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_link_in_err.360138571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.1105507738 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 32819675154 ps |
| CPU time | 87.47 seconds |
| Started | Aug 25 09:39:28 AM UTC 24 |
| Finished | Aug 25 09:40:57 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105507738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.1105507738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.1496893471 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 4475530724 ps |
| CPU time | 11.86 seconds |
| Started | Aug 25 09:39:28 AM UTC 24 |
| Finished | Aug 25 09:39:41 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496893471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.1496893471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.2100613788 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 3054402283 ps |
| CPU time | 28.55 seconds |
| Started | Aug 25 09:39:29 AM UTC 24 |
| Finished | Aug 25 09:39:59 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100613788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.2100613788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.2284563160 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 3326789116 ps |
| CPU time | 119.23 seconds |
| Started | Aug 25 09:39:29 AM UTC 24 |
| Finished | Aug 25 09:41:31 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284563160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.2284563160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.3991571539 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 238688555 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:39:29 AM UTC 24 |
| Finished | Aug 25 09:39:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3991571539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.3991571539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.1148110283 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 210486258 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:39:31 AM UTC 24 |
| Finished | Aug 25 09:39:33 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148110283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.1148110283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.1956817465 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 2222217473 ps |
| CPU time | 28.74 seconds |
| Started | Aug 25 09:39:31 AM UTC 24 |
| Finished | Aug 25 09:40:01 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956817465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.1956817465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.2040855887 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 153628777 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:39:31 AM UTC 24 |
| Finished | Aug 25 09:39:33 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040855887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.2040855887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.2382930980 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 162364098 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:39:31 AM UTC 24 |
| Finished | Aug 25 09:39:33 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382930980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.2382930980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.1822655660 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 173965718 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:39:31 AM UTC 24 |
| Finished | Aug 25 09:39:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822655660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.1822655660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.995228980 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 177559658 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:39:31 AM UTC 24 |
| Finished | Aug 25 09:39:34 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=995228980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_out_iso.995228980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.722558234 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 185924289 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:39:32 AM UTC 24 |
| Finished | Aug 25 09:39:35 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722558234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_out_stall.722558234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.2212333525 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 161431415 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:39:32 AM UTC 24 |
| Finished | Aug 25 09:39:35 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212333525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_out_trans_nak.2212333525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.918951382 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 234388543 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:39:33 AM UTC 24 |
| Finished | Aug 25 09:39:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=918951382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pending_in_trans.918951382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.1218018100 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 211861494 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:39:33 AM UTC 24 |
| Finished | Aug 25 09:39:35 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218018100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.1218018100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.901567589 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 168688868 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:39:33 AM UTC 24 |
| Finished | Aug 25 09:39:35 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901567589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.901567589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.1353706254 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 49552900 ps |
| CPU time | 1.01 seconds |
| Started | Aug 25 09:39:34 AM UTC 24 |
| Finished | Aug 25 09:39:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353706254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.1353706254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.2297858601 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 9310451036 ps |
| CPU time | 36.78 seconds |
| Started | Aug 25 09:39:34 AM UTC 24 |
| Finished | Aug 25 09:40:12 AM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297858601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_pkt_buffer.2297858601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.604821672 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 187859409 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:39:34 AM UTC 24 |
| Finished | Aug 25 09:39:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=604821672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_pkt_received.604821672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.3063668342 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 171789948 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:39:36 AM UTC 24 |
| Finished | Aug 25 09:39:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063668342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.3063668342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.141306684 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 179524898 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:39:36 AM UTC 24 |
| Finished | Aug 25 09:39:39 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=141306684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_random_length_in_transaction.141306684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.1864898572 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 196176183 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:39:36 AM UTC 24 |
| Finished | Aug 25 09:39:39 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864898572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.1864898572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.2466890241 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 138972053 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:39:36 AM UTC 24 |
| Finished | Aug 25 09:39:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2466890241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_rx_crc_err.2466890241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.2392492247 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 389150975 ps |
| CPU time | 1.99 seconds |
| Started | Aug 25 09:39:36 AM UTC 24 |
| Finished | Aug 25 09:39:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2392492247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.2392492247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.3461831371 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 150635685 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:39:36 AM UTC 24 |
| Finished | Aug 25 09:39:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461831371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_setup_stage.3461831371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.3039667399 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 208828892 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:39:38 AM UTC 24 |
| Finished | Aug 25 09:39:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039667399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.3039667399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.3583802089 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 280636772 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:39:38 AM UTC 24 |
| Finished | Aug 25 09:39:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3583802089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.3583802089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.1882610575 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 1536189889 ps |
| CPU time | 16.4 seconds |
| Started | Aug 25 09:39:38 AM UTC 24 |
| Finished | Aug 25 09:39:56 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882610575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.1882610575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.115761044 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 158452449 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:39:38 AM UTC 24 |
| Finished | Aug 25 09:39:40 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=115761044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.115761044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.583781383 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 231608830 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:39:38 AM UTC 24 |
| Finished | Aug 25 09:39:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=583781383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_stall_trans.583781383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.1181728263 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 822658172 ps |
| CPU time | 3.63 seconds |
| Started | Aug 25 09:39:39 AM UTC 24 |
| Finished | Aug 25 09:39:44 AM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181728263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.1181728263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.2047899209 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 3451561567 ps |
| CPU time | 120.22 seconds |
| Started | Aug 25 09:39:39 AM UTC 24 |
| Finished | Aug 25 09:41:42 AM UTC 24 |
| Peak memory | 230648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2047899209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_streaming_out.2047899209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.1803714853 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 1068224521 ps |
| CPU time | 12.75 seconds |
| Started | Aug 25 09:39:24 AM UTC 24 |
| Finished | Aug 25 09:39:38 AM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803714853 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.1803714853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.1103875633 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 595572382 ps |
| CPU time | 2.99 seconds |
| Started | Aug 25 09:39:40 AM UTC 24 |
| Finished | Aug 25 09:39:44 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1103875633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.1103875633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.4128047644 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 565353086 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:44:17 AM UTC 24 |
| Finished | Aug 25 09:44:34 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4128047644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.4128047644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.1892219884 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 518773913 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:44:18 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1892219884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_ tx_rx_disruption.1892219884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.4165601211 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 513776114 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:44:18 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 217876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4165601211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_ tx_rx_disruption.4165601211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.2770122580 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 524670697 ps |
| CPU time | 2.09 seconds |
| Started | Aug 25 09:44:18 AM UTC 24 |
| Finished | Aug 25 09:44:31 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2770122580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.2770122580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.2155402350 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 479021658 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:44:18 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2155402350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_ tx_rx_disruption.2155402350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.1187237154 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 638416098 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:44:18 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1187237154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_ tx_rx_disruption.1187237154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.1624352818 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 412149649 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:44:18 AM UTC 24 |
| Finished | Aug 25 09:44:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1624352818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.1624352818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.3205120377 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 510783739 ps |
| CPU time | 2.26 seconds |
| Started | Aug 25 09:44:18 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3205120377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.3205120377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.566240313 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 652038178 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:44:21 AM UTC 24 |
| Finished | Aug 25 09:44:34 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=566240313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_t x_rx_disruption.566240313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.3304683770 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 676848049 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:44:21 AM UTC 24 |
| Finished | Aug 25 09:44:34 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3304683770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.3304683770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.3590297761 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 39927693 ps |
| CPU time | 0.96 seconds |
| Started | Aug 25 09:39:59 AM UTC 24 |
| Finished | Aug 25 09:40:01 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590297761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.3590297761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.2888958681 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 5721354074 ps |
| CPU time | 16.69 seconds |
| Started | Aug 25 09:39:40 AM UTC 24 |
| Finished | Aug 25 09:39:58 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888958681 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.2888958681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.2717795526 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 21375482490 ps |
| CPU time | 48.84 seconds |
| Started | Aug 25 09:39:41 AM UTC 24 |
| Finished | Aug 25 09:40:32 AM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2717795526 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.2717795526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.1999245039 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 25845997043 ps |
| CPU time | 82.99 seconds |
| Started | Aug 25 09:39:41 AM UTC 24 |
| Finished | Aug 25 09:41:06 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999245039 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.1999245039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.3011162189 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 182576861 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:39:41 AM UTC 24 |
| Finished | Aug 25 09:39:44 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011162189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.3011162189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.890407282 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 149015363 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:39:41 AM UTC 24 |
| Finished | Aug 25 09:39:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=890407282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_bitstuff_err.890407282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.3162313492 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 532758050 ps |
| CPU time | 3.18 seconds |
| Started | Aug 25 09:39:41 AM UTC 24 |
| Finished | Aug 25 09:39:46 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162313492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 42.usbdev_data_toggle_clear.3162313492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.346443811 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 971316392 ps |
| CPU time | 3.74 seconds |
| Started | Aug 25 09:39:43 AM UTC 24 |
| Finished | Aug 25 09:39:48 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346443811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.346443811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.4255539204 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 49368074165 ps |
| CPU time | 124.06 seconds |
| Started | Aug 25 09:39:43 AM UTC 24 |
| Finished | Aug 25 09:41:49 AM UTC 24 |
| Peak memory | 218440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4255539204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.4255539204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.1248304229 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 1376254458 ps |
| CPU time | 12.29 seconds |
| Started | Aug 25 09:39:43 AM UTC 24 |
| Finished | Aug 25 09:39:56 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248304229 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.1248304229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.3763095525 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 737138942 ps |
| CPU time | 3.11 seconds |
| Started | Aug 25 09:39:43 AM UTC 24 |
| Finished | Aug 25 09:39:47 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763095525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.3763095525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.871256790 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 147910132 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:39:43 AM UTC 24 |
| Finished | Aug 25 09:39:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=871256790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_disconnected.871256790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_enable.1034598414 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 44361434 ps |
| CPU time | 1.18 seconds |
| Started | Aug 25 09:39:45 AM UTC 24 |
| Finished | Aug 25 09:39:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1034598414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_enable.1034598414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.219390331 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 811013562 ps |
| CPU time | 3.61 seconds |
| Started | Aug 25 09:39:45 AM UTC 24 |
| Finished | Aug 25 09:39:49 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=219390331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.219390331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.1780864868 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 175285666 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:39:45 AM UTC 24 |
| Finished | Aug 25 09:39:47 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1780864868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.1780864868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.3434725112 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 300264922 ps |
| CPU time | 3.18 seconds |
| Started | Aug 25 09:39:45 AM UTC 24 |
| Finished | Aug 25 09:39:49 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434725112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.3434725112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.991295787 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 168183537 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:39:46 AM UTC 24 |
| Finished | Aug 25 09:39:49 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=991295787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.991295787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.1967236899 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 137851586 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:39:46 AM UTC 24 |
| Finished | Aug 25 09:39:48 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967236899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.1967236899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.4223100153 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 246208699 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:39:46 AM UTC 24 |
| Finished | Aug 25 09:39:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223100153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.4223100153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.900760485 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 4305261287 ps |
| CPU time | 41.71 seconds |
| Started | Aug 25 09:39:46 AM UTC 24 |
| Finished | Aug 25 09:40:29 AM UTC 24 |
| Peak memory | 228460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=900760485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.900760485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.145004613 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 12263128738 ps |
| CPU time | 193.05 seconds |
| Started | Aug 25 09:39:48 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=145004613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.145004613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.1328695618 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 249168198 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:39:48 AM UTC 24 |
| Finished | Aug 25 09:39:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328695618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.1328695618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.2088398910 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 25465672986 ps |
| CPU time | 72.25 seconds |
| Started | Aug 25 09:39:48 AM UTC 24 |
| Finished | Aug 25 09:41:03 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2088398910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.2088398910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.3496955208 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 3758762673 ps |
| CPU time | 12.56 seconds |
| Started | Aug 25 09:39:48 AM UTC 24 |
| Finished | Aug 25 09:40:02 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3496955208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_link_suspend.3496955208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.284405860 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 4784119276 ps |
| CPU time | 171.63 seconds |
| Started | Aug 25 09:39:48 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=284405860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.284405860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.3025403847 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 3596372779 ps |
| CPU time | 128.19 seconds |
| Started | Aug 25 09:39:50 AM UTC 24 |
| Finished | Aug 25 09:42:02 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025403847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.3025403847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.1629120253 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 237549242 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:39:50 AM UTC 24 |
| Finished | Aug 25 09:39:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629120253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.1629120253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.369149242 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 196208261 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:39:51 AM UTC 24 |
| Finished | Aug 25 09:39:53 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=369149242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.369149242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.1214485390 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 2188265948 ps |
| CPU time | 75.45 seconds |
| Started | Aug 25 09:39:51 AM UTC 24 |
| Finished | Aug 25 09:41:08 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214485390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.1214485390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.1379486716 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 152497107 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:39:51 AM UTC 24 |
| Finished | Aug 25 09:39:53 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379486716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.1379486716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.2609175533 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 156689172 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:39:51 AM UTC 24 |
| Finished | Aug 25 09:39:53 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609175533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.2609175533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.765346262 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 212766349 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:39:51 AM UTC 24 |
| Finished | Aug 25 09:39:53 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=765346262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_nak_trans.765346262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.1739845136 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 196329249 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:39:51 AM UTC 24 |
| Finished | Aug 25 09:39:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1739845136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_iso.1739845136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.88759579 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 180763264 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:39:53 AM UTC 24 |
| Finished | Aug 25 09:39:55 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=88759579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_stall.88759579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.178852890 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 182109527 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:39:53 AM UTC 24 |
| Finished | Aug 25 09:39:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=178852890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_out_trans_nak.178852890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.2050878104 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 161879096 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:39:53 AM UTC 24 |
| Finished | Aug 25 09:39:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050878104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_pending_in_trans.2050878104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.4257996927 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 244181763 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:39:53 AM UTC 24 |
| Finished | Aug 25 09:39:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4257996927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.4257996927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.2639293024 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 186318965 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:39:53 AM UTC 24 |
| Finished | Aug 25 09:39:55 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2639293024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.2639293024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.198419663 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 33564804 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:39:53 AM UTC 24 |
| Finished | Aug 25 09:39:55 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=198419663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_phy_pins_sense.198419663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.762184929 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 17377106080 ps |
| CPU time | 64.8 seconds |
| Started | Aug 25 09:39:54 AM UTC 24 |
| Finished | Aug 25 09:41:01 AM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762184929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_pkt_buffer.762184929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.2285824505 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 220242590 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:39:54 AM UTC 24 |
| Finished | Aug 25 09:39:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285824505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.2285824505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.115969924 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 203217723 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:39:54 AM UTC 24 |
| Finished | Aug 25 09:39:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=115969924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_pkt_sent.115969924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.1763309461 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 221173260 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:39:54 AM UTC 24 |
| Finished | Aug 25 09:39:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763309461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_random_length_in_transaction.1763309461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.2606629318 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 194120418 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:39:54 AM UTC 24 |
| Finished | Aug 25 09:39:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2606629318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.2606629318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.846851102 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 151689156 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:39:54 AM UTC 24 |
| Finished | Aug 25 09:39:57 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=846851102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_rx_crc_err.846851102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.2231354825 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 250133162 ps |
| CPU time | 1.88 seconds |
| Started | Aug 25 09:39:56 AM UTC 24 |
| Finished | Aug 25 09:39:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231354825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_rx_full.2231354825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.1542756904 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 163264119 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:39:56 AM UTC 24 |
| Finished | Aug 25 09:39:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542756904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.1542756904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.2239200374 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 150215637 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:39:56 AM UTC 24 |
| Finished | Aug 25 09:39:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239200374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.2239200374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.2363997715 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 179363362 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:39:56 AM UTC 24 |
| Finished | Aug 25 09:39:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363997715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.2363997715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.3574046434 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 1806933546 ps |
| CPU time | 23.37 seconds |
| Started | Aug 25 09:39:56 AM UTC 24 |
| Finished | Aug 25 09:40:21 AM UTC 24 |
| Peak memory | 230416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574046434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.3574046434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.301752460 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 186842185 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:39:56 AM UTC 24 |
| Finished | Aug 25 09:39:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=301752460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.301752460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.2399243345 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 178697608 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:39:56 AM UTC 24 |
| Finished | Aug 25 09:39:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399243345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stall_trans.2399243345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.1586103185 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 1403083283 ps |
| CPU time | 5.8 seconds |
| Started | Aug 25 09:39:58 AM UTC 24 |
| Finished | Aug 25 09:40:05 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586103185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.1586103185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.3398571384 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 2762754604 ps |
| CPU time | 106.19 seconds |
| Started | Aug 25 09:39:57 AM UTC 24 |
| Finished | Aug 25 09:41:46 AM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398571384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.3398571384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.382909690 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 591538488 ps |
| CPU time | 14.62 seconds |
| Started | Aug 25 09:39:43 AM UTC 24 |
| Finished | Aug 25 09:39:59 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=382909690 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.382909690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.998241356 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 599789568 ps |
| CPU time | 3.02 seconds |
| Started | Aug 25 09:39:58 AM UTC 24 |
| Finished | Aug 25 09:40:03 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=998241356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_tx _rx_disruption.998241356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.2526872196 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 612353252 ps |
| CPU time | 1.83 seconds |
| Started | Aug 25 09:44:21 AM UTC 24 |
| Finished | Aug 25 09:44:34 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2526872196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_ tx_rx_disruption.2526872196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.1384908388 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 466476026 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:44:22 AM UTC 24 |
| Finished | Aug 25 09:44:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1384908388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_ tx_rx_disruption.1384908388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.1517072994 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 578679096 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:44:22 AM UTC 24 |
| Finished | Aug 25 09:44:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1517072994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.1517072994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.3284092612 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 548153745 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:44:22 AM UTC 24 |
| Finished | Aug 25 09:44:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3284092612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.3284092612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.3328904665 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 511043323 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:44:22 AM UTC 24 |
| Finished | Aug 25 09:44:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3328904665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.3328904665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.4280999540 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 643119380 ps |
| CPU time | 1.82 seconds |
| Started | Aug 25 09:44:22 AM UTC 24 |
| Finished | Aug 25 09:44:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4280999540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.4280999540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.2166383933 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 747244563 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:44:22 AM UTC 24 |
| Finished | Aug 25 09:44:27 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2166383933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_ tx_rx_disruption.2166383933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.569880111 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 485235815 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:44:22 AM UTC 24 |
| Finished | Aug 25 09:44:26 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=569880111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_t x_rx_disruption.569880111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.2801207085 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 524014437 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:44:22 AM UTC 24 |
| Finished | Aug 25 09:44:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2801207085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_ tx_rx_disruption.2801207085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.2815134955 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 475863497 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:44:22 AM UTC 24 |
| Finished | Aug 25 09:44:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2815134955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.2815134955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.113330118 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 75219639 ps |
| CPU time | 1.02 seconds |
| Started | Aug 25 09:40:16 AM UTC 24 |
| Finished | Aug 25 09:40:19 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=113330118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.113330118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.2465463581 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 9106112429 ps |
| CPU time | 22.7 seconds |
| Started | Aug 25 09:39:59 AM UTC 24 |
| Finished | Aug 25 09:40:23 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465463581 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.2465463581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.2245235553 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 20721819130 ps |
| CPU time | 53.51 seconds |
| Started | Aug 25 09:39:59 AM UTC 24 |
| Finished | Aug 25 09:40:54 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245235553 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.2245235553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.2445332542 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 31313752052 ps |
| CPU time | 77.37 seconds |
| Started | Aug 25 09:39:59 AM UTC 24 |
| Finished | Aug 25 09:41:18 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2445332542 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.2445332542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.2292501035 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 148713434 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:39:59 AM UTC 24 |
| Finished | Aug 25 09:40:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292501035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.2292501035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.553289220 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 158022169 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:39:59 AM UTC 24 |
| Finished | Aug 25 09:40:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=553289220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_bitstuff_err.553289220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.1982832968 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 420505870 ps |
| CPU time | 2.55 seconds |
| Started | Aug 25 09:39:59 AM UTC 24 |
| Finished | Aug 25 09:40:03 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1982832968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.1982832968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.2579705317 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 962909353 ps |
| CPU time | 4.96 seconds |
| Started | Aug 25 09:40:00 AM UTC 24 |
| Finished | Aug 25 09:40:06 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2579705317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.2579705317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.720320713 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 12404726668 ps |
| CPU time | 27.07 seconds |
| Started | Aug 25 09:40:00 AM UTC 24 |
| Finished | Aug 25 09:40:29 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=720320713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_device_address.720320713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.2865906870 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 6356015317 ps |
| CPU time | 55.49 seconds |
| Started | Aug 25 09:40:00 AM UTC 24 |
| Finished | Aug 25 09:40:58 AM UTC 24 |
| Peak memory | 218440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865906870 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.2865906870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.1273642791 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 864507103 ps |
| CPU time | 3.23 seconds |
| Started | Aug 25 09:40:01 AM UTC 24 |
| Finished | Aug 25 09:40:05 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1273642791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.1273642791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.3131993636 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 175026722 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:40:01 AM UTC 24 |
| Finished | Aug 25 09:40:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131993636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.3131993636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_enable.191554521 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 43143512 ps |
| CPU time | 1.13 seconds |
| Started | Aug 25 09:40:01 AM UTC 24 |
| Finished | Aug 25 09:40:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=191554521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_enable.191554521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.2484905292 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 917272470 ps |
| CPU time | 4.13 seconds |
| Started | Aug 25 09:40:01 AM UTC 24 |
| Finished | Aug 25 09:40:06 AM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484905292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.2484905292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.2488689432 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 340708712 ps |
| CPU time | 2.26 seconds |
| Started | Aug 25 09:40:02 AM UTC 24 |
| Finished | Aug 25 09:40:05 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2488689432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.2488689432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.758567925 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 185626408 ps |
| CPU time | 3.38 seconds |
| Started | Aug 25 09:40:02 AM UTC 24 |
| Finished | Aug 25 09:40:07 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=758567925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_fifo_rst.758567925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.747084797 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 181969101 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:40:02 AM UTC 24 |
| Finished | Aug 25 09:40:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=747084797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.747084797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.1265692199 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 150443036 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:40:02 AM UTC 24 |
| Finished | Aug 25 09:40:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265692199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_stall.1265692199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.2895578468 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 227010850 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:40:02 AM UTC 24 |
| Finished | Aug 25 09:40:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895578468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.2895578468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.92922051 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 4342260736 ps |
| CPU time | 150.52 seconds |
| Started | Aug 25 09:40:02 AM UTC 24 |
| Finished | Aug 25 09:42:36 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=92922051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.92922051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.514301134 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 10178802669 ps |
| CPU time | 162.35 seconds |
| Started | Aug 25 09:40:04 AM UTC 24 |
| Finished | Aug 25 09:42:49 AM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=514301134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.514301134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.1110905416 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 268257774 ps |
| CPU time | 2.1 seconds |
| Started | Aug 25 09:40:04 AM UTC 24 |
| Finished | Aug 25 09:40:07 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110905416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.1110905416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.2813589253 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 27052821698 ps |
| CPU time | 96.64 seconds |
| Started | Aug 25 09:40:04 AM UTC 24 |
| Finished | Aug 25 09:41:43 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2813589253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_resume.2813589253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.481425089 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 10019285016 ps |
| CPU time | 28.27 seconds |
| Started | Aug 25 09:40:04 AM UTC 24 |
| Finished | Aug 25 09:40:34 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=481425089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_suspend.481425089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.2379911408 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 2757639128 ps |
| CPU time | 36.72 seconds |
| Started | Aug 25 09:40:04 AM UTC 24 |
| Finished | Aug 25 09:40:42 AM UTC 24 |
| Peak memory | 230640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379911408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.2379911408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.2859447376 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 2398853414 ps |
| CPU time | 24.99 seconds |
| Started | Aug 25 09:40:04 AM UTC 24 |
| Finished | Aug 25 09:40:31 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859447376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.2859447376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.1219238332 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 239468731 ps |
| CPU time | 1.95 seconds |
| Started | Aug 25 09:40:05 AM UTC 24 |
| Finished | Aug 25 09:40:08 AM UTC 24 |
| Peak memory | 215464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1219238332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.1219238332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.1202040566 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 193571628 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:40:05 AM UTC 24 |
| Finished | Aug 25 09:40:08 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1202040566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.1202040566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.3597351777 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 1518540634 ps |
| CPU time | 20.84 seconds |
| Started | Aug 25 09:40:07 AM UTC 24 |
| Finished | Aug 25 09:40:29 AM UTC 24 |
| Peak memory | 235056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597351777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.3597351777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.2099087420 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 182694835 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:40:07 AM UTC 24 |
| Finished | Aug 25 09:40:10 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099087420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.2099087420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.2653070798 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 165299993 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:40:07 AM UTC 24 |
| Finished | Aug 25 09:40:10 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653070798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.2653070798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.4071833020 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 225225516 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:40:07 AM UTC 24 |
| Finished | Aug 25 09:40:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4071833020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.4071833020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.2086715176 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 199267094 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:40:07 AM UTC 24 |
| Finished | Aug 25 09:40:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086715176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_out_iso.2086715176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.2917144601 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 155269846 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:40:07 AM UTC 24 |
| Finished | Aug 25 09:40:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917144601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_out_stall.2917144601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.4138069179 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 171713265 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:40:08 AM UTC 24 |
| Finished | Aug 25 09:40:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138069179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.4138069179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.3763058718 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 154600694 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:40:09 AM UTC 24 |
| Finished | Aug 25 09:40:12 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763058718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_pending_in_trans.3763058718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.650726262 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 208775155 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:40:09 AM UTC 24 |
| Finished | Aug 25 09:40:12 AM UTC 24 |
| Peak memory | 216152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=650726262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.650726262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.3129962750 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 162098678 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:40:10 AM UTC 24 |
| Finished | Aug 25 09:40:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129962750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.3129962750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.1325826846 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 44573237 ps |
| CPU time | 1.18 seconds |
| Started | Aug 25 09:40:10 AM UTC 24 |
| Finished | Aug 25 09:40:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325826846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.1325826846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.4024288985 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 8441186523 ps |
| CPU time | 30.87 seconds |
| Started | Aug 25 09:40:10 AM UTC 24 |
| Finished | Aug 25 09:40:43 AM UTC 24 |
| Peak memory | 232596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024288985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.4024288985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.2048109300 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 158329985 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:40:12 AM UTC 24 |
| Finished | Aug 25 09:40:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048109300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.2048109300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.504197329 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 263833297 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:40:12 AM UTC 24 |
| Finished | Aug 25 09:40:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=504197329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_pkt_sent.504197329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.1854237927 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 167045215 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:40:12 AM UTC 24 |
| Finished | Aug 25 09:40:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854237927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_random_length_in_transaction.1854237927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.1783520856 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 211982576 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:40:12 AM UTC 24 |
| Finished | Aug 25 09:40:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783520856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.1783520856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.1093016912 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 142639752 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:40:12 AM UTC 24 |
| Finished | Aug 25 09:40:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1093016912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.1093016912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.318147298 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 253663619 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:40:12 AM UTC 24 |
| Finished | Aug 25 09:40:15 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=318147298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_rx_full.318147298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.1355043314 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 148455090 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:40:12 AM UTC 24 |
| Finished | Aug 25 09:40:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355043314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_setup_stage.1355043314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.3075742444 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 188015007 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:40:14 AM UTC 24 |
| Finished | Aug 25 09:40:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075742444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 43.usbdev_setup_trans_ignored.3075742444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.733718721 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 273400991 ps |
| CPU time | 1.87 seconds |
| Started | Aug 25 09:40:14 AM UTC 24 |
| Finished | Aug 25 09:40:18 AM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=733718721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.733718721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.1315495648 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 2459185762 ps |
| CPU time | 32.44 seconds |
| Started | Aug 25 09:40:14 AM UTC 24 |
| Finished | Aug 25 09:40:48 AM UTC 24 |
| Peak memory | 230384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315495648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.1315495648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.3311141718 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 151838368 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:40:14 AM UTC 24 |
| Finished | Aug 25 09:40:17 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3311141718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.3311141718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.2883009788 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 174877075 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:40:14 AM UTC 24 |
| Finished | Aug 25 09:40:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883009788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_stall_trans.2883009788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.2791259333 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 267977331 ps |
| CPU time | 1.87 seconds |
| Started | Aug 25 09:40:16 AM UTC 24 |
| Finished | Aug 25 09:40:19 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791259333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.2791259333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.2631506319 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 3015587122 ps |
| CPU time | 113.81 seconds |
| Started | Aug 25 09:40:14 AM UTC 24 |
| Finished | Aug 25 09:42:11 AM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2631506319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.2631506319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.2491132835 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 4271503131 ps |
| CPU time | 40.51 seconds |
| Started | Aug 25 09:40:01 AM UTC 24 |
| Finished | Aug 25 09:40:43 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491132835 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.2491132835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.1509385923 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 566009564 ps |
| CPU time | 3.14 seconds |
| Started | Aug 25 09:40:16 AM UTC 24 |
| Finished | Aug 25 09:40:21 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1509385923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_t x_rx_disruption.1509385923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.1252346162 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 453209212 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:44:23 AM UTC 24 |
| Finished | Aug 25 09:44:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1252346162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.1252346162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.3084452734 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 620029615 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:44:23 AM UTC 24 |
| Finished | Aug 25 09:44:34 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3084452734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_ tx_rx_disruption.3084452734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.777481388 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 449067369 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:44:23 AM UTC 24 |
| Finished | Aug 25 09:44:33 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=777481388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_t x_rx_disruption.777481388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.2971841834 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 457997096 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:44:23 AM UTC 24 |
| Finished | Aug 25 09:44:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2971841834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.2971841834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.4133833687 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 542801361 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 217936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4133833687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.4133833687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.2801518448 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 561549991 ps |
| CPU time | 2.71 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2801518448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_ tx_rx_disruption.2801518448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.3928561020 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 562025308 ps |
| CPU time | 2.25 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3928561020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.3928561020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.768767509 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 615008467 ps |
| CPU time | 2.07 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:31 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=768767509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_t x_rx_disruption.768767509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.2239031263 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 552281658 ps |
| CPU time | 2.3 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2239031263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.2239031263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.1855589871 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 87287497 ps |
| CPU time | 1.05 seconds |
| Started | Aug 25 09:40:37 AM UTC 24 |
| Finished | Aug 25 09:40:40 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855589871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.1855589871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.4105026056 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 11030012426 ps |
| CPU time | 28.97 seconds |
| Started | Aug 25 09:40:17 AM UTC 24 |
| Finished | Aug 25 09:40:47 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105026056 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.4105026056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.2330645164 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 21461914610 ps |
| CPU time | 38.6 seconds |
| Started | Aug 25 09:40:17 AM UTC 24 |
| Finished | Aug 25 09:40:57 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2330645164 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.2330645164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.3337876121 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 29613218728 ps |
| CPU time | 61.53 seconds |
| Started | Aug 25 09:40:17 AM UTC 24 |
| Finished | Aug 25 09:41:20 AM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337876121 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.3337876121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.1893558298 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 151701070 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:40:17 AM UTC 24 |
| Finished | Aug 25 09:40:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893558298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.1893558298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.2957504698 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 153458946 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:40:18 AM UTC 24 |
| Finished | Aug 25 09:40:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957504698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_bitstuff_err.2957504698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.4095203980 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 558414404 ps |
| CPU time | 3.01 seconds |
| Started | Aug 25 09:40:18 AM UTC 24 |
| Finished | Aug 25 09:40:23 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095203980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 44.usbdev_data_toggle_clear.4095203980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.3382144706 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 558983701 ps |
| CPU time | 3.17 seconds |
| Started | Aug 25 09:40:18 AM UTC 24 |
| Finished | Aug 25 09:40:23 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3382144706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.3382144706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.1454473097 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 17416952197 ps |
| CPU time | 52.76 seconds |
| Started | Aug 25 09:40:18 AM UTC 24 |
| Finished | Aug 25 09:41:13 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454473097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.1454473097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.4245774241 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 5630143530 ps |
| CPU time | 50.95 seconds |
| Started | Aug 25 09:40:19 AM UTC 24 |
| Finished | Aug 25 09:41:11 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245774241 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.4245774241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.2349958200 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 650888603 ps |
| CPU time | 3.29 seconds |
| Started | Aug 25 09:40:20 AM UTC 24 |
| Finished | Aug 25 09:40:24 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349958200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.2349958200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.2773057518 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 145914314 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:40:20 AM UTC 24 |
| Finished | Aug 25 09:40:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773057518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.2773057518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_enable.1778670617 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 35200287 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:40:22 AM UTC 24 |
| Finished | Aug 25 09:40:24 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778670617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_enable.1778670617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.814963774 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 861477690 ps |
| CPU time | 3.76 seconds |
| Started | Aug 25 09:40:22 AM UTC 24 |
| Finished | Aug 25 09:40:27 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=814963774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.814963774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.4657391 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 209199012 ps |
| CPU time | 3.98 seconds |
| Started | Aug 25 09:40:22 AM UTC 24 |
| Finished | Aug 25 09:40:27 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4657391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_fifo_rst.4657391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.3887079742 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 167902809 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:40:22 AM UTC 24 |
| Finished | Aug 25 09:40:25 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3887079742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.3887079742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.1972221212 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 159402080 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:40:23 AM UTC 24 |
| Finished | Aug 25 09:40:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1972221212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_stall.1972221212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.1535922370 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 251269426 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:40:23 AM UTC 24 |
| Finished | Aug 25 09:40:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535922370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.1535922370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.2278529681 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 4398623249 ps |
| CPU time | 153.77 seconds |
| Started | Aug 25 09:40:22 AM UTC 24 |
| Finished | Aug 25 09:42:59 AM UTC 24 |
| Peak memory | 235160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278529681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.2278529681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.1585199150 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 10187664904 ps |
| CPU time | 95.69 seconds |
| Started | Aug 25 09:40:23 AM UTC 24 |
| Finished | Aug 25 09:42:01 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1585199150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.1585199150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.3981063816 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 198818813 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:40:23 AM UTC 24 |
| Finished | Aug 25 09:40:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981063816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.3981063816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.3879061585 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 10343785935 ps |
| CPU time | 27.74 seconds |
| Started | Aug 25 09:40:25 AM UTC 24 |
| Finished | Aug 25 09:40:54 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3879061585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.3879061585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.543696306 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 4232582516 ps |
| CPU time | 13.08 seconds |
| Started | Aug 25 09:40:25 AM UTC 24 |
| Finished | Aug 25 09:40:39 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=543696306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_suspend.543696306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.64463667 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 3609292009 ps |
| CPU time | 42.09 seconds |
| Started | Aug 25 09:40:26 AM UTC 24 |
| Finished | Aug 25 09:41:10 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=64463667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.64463667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.1834595931 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 2786967557 ps |
| CPU time | 30.29 seconds |
| Started | Aug 25 09:40:26 AM UTC 24 |
| Finished | Aug 25 09:40:58 AM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834595931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.1834595931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.3714310808 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 237035074 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:40:26 AM UTC 24 |
| Finished | Aug 25 09:40:29 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3714310808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.3714310808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.1543923560 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 182470095 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:40:27 AM UTC 24 |
| Finished | Aug 25 09:40:30 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543923560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.1543923560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.2228700884 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 2860609479 ps |
| CPU time | 101.21 seconds |
| Started | Aug 25 09:40:27 AM UTC 24 |
| Finished | Aug 25 09:42:11 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2228700884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.2228700884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.4069840323 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 149625916 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:40:27 AM UTC 24 |
| Finished | Aug 25 09:40:30 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4069840323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.4069840323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.300766697 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 158956999 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:40:27 AM UTC 24 |
| Finished | Aug 25 09:40:30 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=300766697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.300766697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.3850373384 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 241023191 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:40:29 AM UTC 24 |
| Finished | Aug 25 09:40:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850373384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_nak_trans.3850373384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.756886904 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 195772478 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:40:29 AM UTC 24 |
| Finished | Aug 25 09:40:32 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=756886904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_out_iso.756886904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.1263620909 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 187735552 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:40:31 AM UTC 24 |
| Finished | Aug 25 09:40:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263620909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.1263620909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.2857290482 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 161279091 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:40:31 AM UTC 24 |
| Finished | Aug 25 09:40:34 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2857290482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.2857290482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.4025945837 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 181303540 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:40:31 AM UTC 24 |
| Finished | Aug 25 09:40:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4025945837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.4025945837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.707187747 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 247252502 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:40:31 AM UTC 24 |
| Finished | Aug 25 09:40:34 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=707187747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.707187747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.550779697 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 173830173 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:40:31 AM UTC 24 |
| Finished | Aug 25 09:40:33 AM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=550779697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.550779697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.1248041060 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 91838590 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:40:31 AM UTC 24 |
| Finished | Aug 25 09:40:33 AM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248041060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.1248041060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.3464394978 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 12199202255 ps |
| CPU time | 48.58 seconds |
| Started | Aug 25 09:40:32 AM UTC 24 |
| Finished | Aug 25 09:41:23 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464394978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.3464394978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.2307884106 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 225792393 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:40:33 AM UTC 24 |
| Finished | Aug 25 09:40:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2307884106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.2307884106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.2227750989 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 231896121 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:40:33 AM UTC 24 |
| Finished | Aug 25 09:40:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2227750989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.2227750989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.2394164954 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 178890073 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:40:33 AM UTC 24 |
| Finished | Aug 25 09:40:35 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394164954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_random_length_in_transaction.2394164954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.1434822454 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 238948986 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:40:33 AM UTC 24 |
| Finished | Aug 25 09:40:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434822454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.1434822454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.255525508 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 165790831 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:40:34 AM UTC 24 |
| Finished | Aug 25 09:40:37 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=255525508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_rx_crc_err.255525508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.2222050918 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 256192399 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:40:34 AM UTC 24 |
| Finished | Aug 25 09:40:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222050918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.2222050918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.3743789901 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 159823773 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:40:34 AM UTC 24 |
| Finished | Aug 25 09:40:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743789901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.3743789901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.2489183687 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 159452208 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:40:34 AM UTC 24 |
| Finished | Aug 25 09:40:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2489183687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.2489183687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.2614299953 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 210487208 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:40:36 AM UTC 24 |
| Finished | Aug 25 09:40:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614299953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.2614299953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.1768281215 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 2470335635 ps |
| CPU time | 84.72 seconds |
| Started | Aug 25 09:40:36 AM UTC 24 |
| Finished | Aug 25 09:42:03 AM UTC 24 |
| Peak memory | 228680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768281215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.1768281215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.2844097372 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 169683042 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:40:36 AM UTC 24 |
| Finished | Aug 25 09:40:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844097372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.2844097372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.1750677453 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 217307526 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:40:36 AM UTC 24 |
| Finished | Aug 25 09:40:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750677453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.1750677453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.2347578351 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 823109635 ps |
| CPU time | 3.6 seconds |
| Started | Aug 25 09:40:37 AM UTC 24 |
| Finished | Aug 25 09:40:42 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347578351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.2347578351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.3464514524 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 2929389315 ps |
| CPU time | 109.82 seconds |
| Started | Aug 25 09:40:36 AM UTC 24 |
| Finished | Aug 25 09:42:29 AM UTC 24 |
| Peak memory | 228520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464514524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.3464514524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.1818138968 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 2197316496 ps |
| CPU time | 19.6 seconds |
| Started | Aug 25 09:40:19 AM UTC 24 |
| Finished | Aug 25 09:40:40 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818138968 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.1818138968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.644590675 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 482859655 ps |
| CPU time | 2.46 seconds |
| Started | Aug 25 09:40:37 AM UTC 24 |
| Finished | Aug 25 09:40:41 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=644590675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_tx _rx_disruption.644590675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.4014625197 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 477269695 ps |
| CPU time | 2.38 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4014625197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.4014625197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.2325340305 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 587114166 ps |
| CPU time | 2.47 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2325340305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.2325340305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.3372409125 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 620951815 ps |
| CPU time | 2.25 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3372409125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_ tx_rx_disruption.3372409125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.2973181276 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 503033210 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:31 AM UTC 24 |
| Peak memory | 216000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2973181276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_ tx_rx_disruption.2973181276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.873793780 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 546248531 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=873793780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_t x_rx_disruption.873793780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.541578736 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 551221285 ps |
| CPU time | 2.62 seconds |
| Started | Aug 25 09:44:27 AM UTC 24 |
| Finished | Aug 25 09:44:32 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=541578736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_t x_rx_disruption.541578736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.2129343098 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 522936157 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:44:34 AM UTC 24 |
| Finished | Aug 25 09:44:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2129343098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.2129343098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.1175671417 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 434308289 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:44:34 AM UTC 24 |
| Finished | Aug 25 09:44:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1175671417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.1175671417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.1308292080 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 426231756 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:44:34 AM UTC 24 |
| Finished | Aug 25 09:44:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1308292080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_ tx_rx_disruption.1308292080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.1657889141 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 590626874 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:44:34 AM UTC 24 |
| Finished | Aug 25 09:44:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1657889141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.1657889141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.1923097317 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 35962879 ps |
| CPU time | 0.99 seconds |
| Started | Aug 25 09:41:00 AM UTC 24 |
| Finished | Aug 25 09:41:02 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923097317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.1923097317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.56164921 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 9566642797 ps |
| CPU time | 26.84 seconds |
| Started | Aug 25 09:40:39 AM UTC 24 |
| Finished | Aug 25 09:41:07 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56164921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.56164921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.2357055525 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 14233913877 ps |
| CPU time | 36.22 seconds |
| Started | Aug 25 09:40:39 AM UTC 24 |
| Finished | Aug 25 09:41:17 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357055525 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.2357055525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.1226072757 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 26355313320 ps |
| CPU time | 56.62 seconds |
| Started | Aug 25 09:40:39 AM UTC 24 |
| Finished | Aug 25 09:41:37 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226072757 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.1226072757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.3329691976 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 191249661 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:40:39 AM UTC 24 |
| Finished | Aug 25 09:40:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329691976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.3329691976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.3775625445 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 173191144 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:40:40 AM UTC 24 |
| Finished | Aug 25 09:40:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3775625445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.3775625445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.3299774262 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 338820922 ps |
| CPU time | 2.38 seconds |
| Started | Aug 25 09:40:40 AM UTC 24 |
| Finished | Aug 25 09:40:44 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299774262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.3299774262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.999877270 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 845636386 ps |
| CPU time | 4.32 seconds |
| Started | Aug 25 09:40:40 AM UTC 24 |
| Finished | Aug 25 09:40:46 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=999877270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.999877270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.1620302426 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 20664056241 ps |
| CPU time | 55.81 seconds |
| Started | Aug 25 09:40:40 AM UTC 24 |
| Finished | Aug 25 09:41:38 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620302426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_address.1620302426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.3412320089 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 428233952 ps |
| CPU time | 11.11 seconds |
| Started | Aug 25 09:40:40 AM UTC 24 |
| Finished | Aug 25 09:40:53 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3412320089 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.3412320089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.1222507003 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 724868976 ps |
| CPU time | 2.91 seconds |
| Started | Aug 25 09:40:42 AM UTC 24 |
| Finished | Aug 25 09:40:46 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222507003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.1222507003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.1386203744 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 138876389 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:40:42 AM UTC 24 |
| Finished | Aug 25 09:40:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386203744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_disconnected.1386203744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_enable.1515901904 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 53445812 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:40:43 AM UTC 24 |
| Finished | Aug 25 09:40:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515901904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_enable.1515901904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.1968818744 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 884925036 ps |
| CPU time | 4.43 seconds |
| Started | Aug 25 09:40:43 AM UTC 24 |
| Finished | Aug 25 09:40:49 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968818744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.1968818744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.1018722271 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 606668616 ps |
| CPU time | 2.61 seconds |
| Started | Aug 25 09:40:43 AM UTC 24 |
| Finished | Aug 25 09:40:47 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018722271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.1018722271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.567136660 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 204172954 ps |
| CPU time | 2.44 seconds |
| Started | Aug 25 09:40:43 AM UTC 24 |
| Finished | Aug 25 09:40:47 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567136660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_fifo_rst.567136660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.982847599 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 235789073 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:40:45 AM UTC 24 |
| Finished | Aug 25 09:40:48 AM UTC 24 |
| Peak memory | 226148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=982847599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.982847599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.3924493144 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 186598883 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:40:45 AM UTC 24 |
| Finished | Aug 25 09:40:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924493144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.3924493144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.3192033941 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 231195337 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:40:45 AM UTC 24 |
| Finished | Aug 25 09:40:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3192033941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.3192033941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.1567590481 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 3924328451 ps |
| CPU time | 130.58 seconds |
| Started | Aug 25 09:40:45 AM UTC 24 |
| Finished | Aug 25 09:42:58 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567590481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.1567590481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.168502314 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 6986063032 ps |
| CPU time | 121.88 seconds |
| Started | Aug 25 09:40:46 AM UTC 24 |
| Finished | Aug 25 09:42:51 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=168502314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.168502314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.1763690528 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 191828402 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:40:48 AM UTC 24 |
| Finished | Aug 25 09:40:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763690528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_in_err.1763690528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.127920273 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 8439077707 ps |
| CPU time | 26.26 seconds |
| Started | Aug 25 09:40:48 AM UTC 24 |
| Finished | Aug 25 09:41:16 AM UTC 24 |
| Peak memory | 228468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=127920273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_link_resume.127920273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.3431132364 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 5307166054 ps |
| CPU time | 11.96 seconds |
| Started | Aug 25 09:40:48 AM UTC 24 |
| Finished | Aug 25 09:41:01 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431132364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.3431132364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.393266693 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 3367746060 ps |
| CPU time | 113.06 seconds |
| Started | Aug 25 09:40:48 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=393266693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.393266693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.289502898 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 2924694397 ps |
| CPU time | 104.13 seconds |
| Started | Aug 25 09:40:48 AM UTC 24 |
| Finished | Aug 25 09:42:35 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=289502898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.289502898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.3394265178 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 273969577 ps |
| CPU time | 1.93 seconds |
| Started | Aug 25 09:40:48 AM UTC 24 |
| Finished | Aug 25 09:40:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394265178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.3394265178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.1807160573 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 196425435 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:40:48 AM UTC 24 |
| Finished | Aug 25 09:40:51 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807160573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.1807160573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.1230238060 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 2183721199 ps |
| CPU time | 21.17 seconds |
| Started | Aug 25 09:40:50 AM UTC 24 |
| Finished | Aug 25 09:41:12 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230238060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.1230238060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.2957365013 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 174386952 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:40:50 AM UTC 24 |
| Finished | Aug 25 09:40:52 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957365013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.2957365013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.601404370 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 141772537 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:40:50 AM UTC 24 |
| Finished | Aug 25 09:40:52 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=601404370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.601404370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.2139059592 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 268469627 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:40:50 AM UTC 24 |
| Finished | Aug 25 09:40:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139059592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_nak_trans.2139059592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.1923328088 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 163236602 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:40:51 AM UTC 24 |
| Finished | Aug 25 09:40:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923328088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.1923328088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.3708623351 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 206629712 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:40:52 AM UTC 24 |
| Finished | Aug 25 09:40:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708623351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_out_stall.3708623351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.3808710361 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 178131642 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:40:52 AM UTC 24 |
| Finished | Aug 25 09:40:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808710361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.3808710361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.3588946270 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 166395552 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:40:53 AM UTC 24 |
| Finished | Aug 25 09:40:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588946270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.3588946270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.3643554710 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 237955100 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:40:55 AM UTC 24 |
| Finished | Aug 25 09:40:57 AM UTC 24 |
| Peak memory | 215440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643554710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.3643554710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.4148235074 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 150998582 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:40:55 AM UTC 24 |
| Finished | Aug 25 09:40:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4148235074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.4148235074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.731740999 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 78831812 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:40:55 AM UTC 24 |
| Finished | Aug 25 09:40:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=731740999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_phy_pins_sense.731740999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.3958021960 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 6323642154 ps |
| CPU time | 26.03 seconds |
| Started | Aug 25 09:40:55 AM UTC 24 |
| Finished | Aug 25 09:41:22 AM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3958021960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_pkt_buffer.3958021960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.796862349 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 231807484 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:40:55 AM UTC 24 |
| Finished | Aug 25 09:40:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=796862349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_pkt_received.796862349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.4156755241 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 225848433 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:40:55 AM UTC 24 |
| Finished | Aug 25 09:40:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156755241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.4156755241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.2414866912 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 183862074 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:40:55 AM UTC 24 |
| Finished | Aug 25 09:40:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414866912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_random_length_in_transaction.2414866912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.3485614683 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 193967756 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:40:55 AM UTC 24 |
| Finished | Aug 25 09:40:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485614683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.3485614683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.456709838 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 144194746 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:40:56 AM UTC 24 |
| Finished | Aug 25 09:40:59 AM UTC 24 |
| Peak memory | 215932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=456709838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_rx_crc_err.456709838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.4128072433 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 263189052 ps |
| CPU time | 2.15 seconds |
| Started | Aug 25 09:40:56 AM UTC 24 |
| Finished | Aug 25 09:41:00 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128072433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.4128072433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.4119997157 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 149429775 ps |
| CPU time | 1.17 seconds |
| Started | Aug 25 09:40:56 AM UTC 24 |
| Finished | Aug 25 09:40:59 AM UTC 24 |
| Peak memory | 215988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4119997157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_setup_stage.4119997157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.3660173949 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 207845654 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:40:58 AM UTC 24 |
| Finished | Aug 25 09:41:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660173949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.3660173949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.1471694193 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 231316559 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:40:58 AM UTC 24 |
| Finished | Aug 25 09:41:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471694193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.1471694193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.2351361483 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 2585334483 ps |
| CPU time | 23.25 seconds |
| Started | Aug 25 09:40:58 AM UTC 24 |
| Finished | Aug 25 09:41:23 AM UTC 24 |
| Peak memory | 235192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351361483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.2351361483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.1109504130 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 173754142 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:40:58 AM UTC 24 |
| Finished | Aug 25 09:41:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109504130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.1109504130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.4157600026 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 189777372 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:40:58 AM UTC 24 |
| Finished | Aug 25 09:41:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157600026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_stall_trans.4157600026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.1273901641 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 1274032040 ps |
| CPU time | 4.89 seconds |
| Started | Aug 25 09:40:58 AM UTC 24 |
| Finished | Aug 25 09:41:05 AM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1273901641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.1273901641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.3829103490 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 3137447897 ps |
| CPU time | 34.2 seconds |
| Started | Aug 25 09:40:58 AM UTC 24 |
| Finished | Aug 25 09:41:34 AM UTC 24 |
| Peak memory | 230440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829103490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.3829103490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.3217801533 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 2237850075 ps |
| CPU time | 21.22 seconds |
| Started | Aug 25 09:40:40 AM UTC 24 |
| Finished | Aug 25 09:41:03 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217801533 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.3217801533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.492398833 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 499863135 ps |
| CPU time | 2.15 seconds |
| Started | Aug 25 09:40:58 AM UTC 24 |
| Finished | Aug 25 09:41:02 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=492398833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_tx _rx_disruption.492398833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.785242252 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 561127602 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:44:34 AM UTC 24 |
| Finished | Aug 25 09:44:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=785242252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_t x_rx_disruption.785242252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.1739212204 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 489111385 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:44:34 AM UTC 24 |
| Finished | Aug 25 09:44:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1739212204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.1739212204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.1435319151 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 456122894 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:44:34 AM UTC 24 |
| Finished | Aug 25 09:44:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1435319151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.1435319151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.2092940997 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 562137367 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2092940997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.2092940997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.3102322198 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 498409978 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3102322198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_ tx_rx_disruption.3102322198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.4057047251 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 588990410 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:47 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4057047251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.4057047251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.2727826146 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 514877465 ps |
| CPU time | 2.08 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2727826146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_ tx_rx_disruption.2727826146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.1134661869 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 502681441 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1134661869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.1134661869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.4163390503 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 470201398 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:40 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4163390503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_ tx_rx_disruption.4163390503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.4202239785 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 607325959 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4202239785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_ tx_rx_disruption.4202239785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.2141133305 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 42985163 ps |
| CPU time | 0.99 seconds |
| Started | Aug 25 09:41:17 AM UTC 24 |
| Finished | Aug 25 09:41:19 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2141133305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.2141133305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.1694927466 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 4653453100 ps |
| CPU time | 14.1 seconds |
| Started | Aug 25 09:41:00 AM UTC 24 |
| Finished | Aug 25 09:41:16 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694927466 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.1694927466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.3988430343 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 19784301142 ps |
| CPU time | 49.43 seconds |
| Started | Aug 25 09:41:00 AM UTC 24 |
| Finished | Aug 25 09:41:52 AM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988430343 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.3988430343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.3238292040 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 24733914986 ps |
| CPU time | 72.28 seconds |
| Started | Aug 25 09:41:00 AM UTC 24 |
| Finished | Aug 25 09:42:15 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3238292040 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.3238292040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.802486256 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 160192766 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:41:00 AM UTC 24 |
| Finished | Aug 25 09:41:03 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=802486256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_av_buffer.802486256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.219588989 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 139030862 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:41:01 AM UTC 24 |
| Finished | Aug 25 09:41:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=219588989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_bitstuff_err.219588989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.673117257 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 438075117 ps |
| CPU time | 2.71 seconds |
| Started | Aug 25 09:41:01 AM UTC 24 |
| Finished | Aug 25 09:41:04 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=673117257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_data_toggle_clear.673117257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.1444964966 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 572408424 ps |
| CPU time | 2.81 seconds |
| Started | Aug 25 09:41:03 AM UTC 24 |
| Finished | Aug 25 09:41:07 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444964966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.1444964966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.3806845713 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 30087919115 ps |
| CPU time | 67.9 seconds |
| Started | Aug 25 09:41:03 AM UTC 24 |
| Finished | Aug 25 09:42:12 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806845713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.3806845713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.3008497901 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 1124129859 ps |
| CPU time | 34.21 seconds |
| Started | Aug 25 09:41:03 AM UTC 24 |
| Finished | Aug 25 09:41:39 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008497901 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.3008497901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.3849880634 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 423343946 ps |
| CPU time | 2.42 seconds |
| Started | Aug 25 09:41:03 AM UTC 24 |
| Finished | Aug 25 09:41:06 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849880634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.3849880634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.744152043 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 145941563 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:41:03 AM UTC 24 |
| Finished | Aug 25 09:41:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744152043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_disconnected.744152043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_enable.2213975309 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 37138331 ps |
| CPU time | 1.03 seconds |
| Started | Aug 25 09:41:03 AM UTC 24 |
| Finished | Aug 25 09:41:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213975309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.2213975309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.4010792172 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 1010950342 ps |
| CPU time | 4.16 seconds |
| Started | Aug 25 09:41:03 AM UTC 24 |
| Finished | Aug 25 09:41:08 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010792172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.4010792172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.2055960045 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 151267176 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:41:04 AM UTC 24 |
| Finished | Aug 25 09:41:07 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055960045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.2055960045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.2519301208 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 498678469 ps |
| CPU time | 4.27 seconds |
| Started | Aug 25 09:41:04 AM UTC 24 |
| Finished | Aug 25 09:41:10 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519301208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.2519301208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.1099477082 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 203605076 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:41:04 AM UTC 24 |
| Finished | Aug 25 09:41:07 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099477082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.1099477082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.4052367905 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 141103562 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:41:05 AM UTC 24 |
| Finished | Aug 25 09:41:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052367905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_stall.4052367905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.139588363 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 190945900 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:41:06 AM UTC 24 |
| Finished | Aug 25 09:41:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=139588363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_in_trans.139588363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.49002456 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 4417974437 ps |
| CPU time | 46.55 seconds |
| Started | Aug 25 09:41:04 AM UTC 24 |
| Finished | Aug 25 09:41:53 AM UTC 24 |
| Peak memory | 235272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=49002456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.49002456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.4092325944 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 6393531356 ps |
| CPU time | 109.29 seconds |
| Started | Aug 25 09:41:06 AM UTC 24 |
| Finished | Aug 25 09:42:58 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4092325944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.4092325944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.3925936820 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 242720135 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:41:06 AM UTC 24 |
| Finished | Aug 25 09:41:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3925936820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.3925936820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.3118120134 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 23065540428 ps |
| CPU time | 82.9 seconds |
| Started | Aug 25 09:41:06 AM UTC 24 |
| Finished | Aug 25 09:42:31 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118120134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_resume.3118120134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.69002710 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 3397397919 ps |
| CPU time | 11.08 seconds |
| Started | Aug 25 09:41:07 AM UTC 24 |
| Finished | Aug 25 09:41:20 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=69002710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_link_suspend.69002710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.499851498 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 3657441629 ps |
| CPU time | 45.82 seconds |
| Started | Aug 25 09:41:08 AM UTC 24 |
| Finished | Aug 25 09:41:55 AM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=499851498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.499851498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.3203524276 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 4320482004 ps |
| CPU time | 141.35 seconds |
| Started | Aug 25 09:41:08 AM UTC 24 |
| Finished | Aug 25 09:43:32 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203524276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.3203524276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.3718299675 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 313631738 ps |
| CPU time | 1.93 seconds |
| Started | Aug 25 09:41:08 AM UTC 24 |
| Finished | Aug 25 09:41:11 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718299675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.3718299675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.2028000971 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 228983484 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:41:08 AM UTC 24 |
| Finished | Aug 25 09:41:10 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028000971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.2028000971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.4021958533 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 3563924799 ps |
| CPU time | 43.2 seconds |
| Started | Aug 25 09:41:09 AM UTC 24 |
| Finished | Aug 25 09:41:54 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021958533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.4021958533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.1516277318 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 248193934 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:41:09 AM UTC 24 |
| Finished | Aug 25 09:41:12 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1516277318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.1516277318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.646693809 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 147766443 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:41:10 AM UTC 24 |
| Finished | Aug 25 09:41:12 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=646693809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.646693809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.431001009 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 185050360 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:41:10 AM UTC 24 |
| Finished | Aug 25 09:41:12 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=431001009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_nak_trans.431001009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.3862026986 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 162107451 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:41:10 AM UTC 24 |
| Finished | Aug 25 09:41:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862026986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_iso.3862026986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.4221169401 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 207214625 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:41:10 AM UTC 24 |
| Finished | Aug 25 09:41:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221169401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.4221169401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.3708524266 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 169847845 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:41:11 AM UTC 24 |
| Finished | Aug 25 09:41:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708524266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.3708524266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.673478248 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 143928534 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:41:11 AM UTC 24 |
| Finished | Aug 25 09:41:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=673478248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_pending_in_trans.673478248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.4059909387 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 208770582 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:41:11 AM UTC 24 |
| Finished | Aug 25 09:41:14 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059909387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.4059909387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.3942488636 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 178366526 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:41:11 AM UTC 24 |
| Finished | Aug 25 09:41:14 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3942488636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.3942488636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.733024538 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 42211323 ps |
| CPU time | 1.07 seconds |
| Started | Aug 25 09:41:13 AM UTC 24 |
| Finished | Aug 25 09:41:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=733024538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_phy_pins_sense.733024538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.2996844929 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 10002789725 ps |
| CPU time | 41.88 seconds |
| Started | Aug 25 09:41:13 AM UTC 24 |
| Finished | Aug 25 09:41:56 AM UTC 24 |
| Peak memory | 235272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996844929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.2996844929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.2250925634 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 166751986 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:41:13 AM UTC 24 |
| Finished | Aug 25 09:41:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250925634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.2250925634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.1448264136 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 186465422 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:41:13 AM UTC 24 |
| Finished | Aug 25 09:41:15 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448264136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.1448264136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.3389687482 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 205737160 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:41:13 AM UTC 24 |
| Finished | Aug 25 09:41:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3389687482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.3389687482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.2197857729 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 195838260 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:41:15 AM UTC 24 |
| Finished | Aug 25 09:41:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2197857729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.2197857729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.1593025563 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 146480874 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:41:15 AM UTC 24 |
| Finished | Aug 25 09:41:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593025563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_rx_crc_err.1593025563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.2610347409 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 346858051 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:41:15 AM UTC 24 |
| Finished | Aug 25 09:41:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610347409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.2610347409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.1895330985 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 155737338 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:41:15 AM UTC 24 |
| Finished | Aug 25 09:41:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1895330985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.1895330985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.3759958655 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 158908986 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:41:15 AM UTC 24 |
| Finished | Aug 25 09:41:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759958655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.3759958655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.3251068122 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 191944907 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:41:15 AM UTC 24 |
| Finished | Aug 25 09:41:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251068122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.3251068122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.3914758115 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 2612780419 ps |
| CPU time | 33.98 seconds |
| Started | Aug 25 09:41:15 AM UTC 24 |
| Finished | Aug 25 09:41:50 AM UTC 24 |
| Peak memory | 235316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3914758115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.3914758115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.2862973742 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 177423965 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:41:15 AM UTC 24 |
| Finished | Aug 25 09:41:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2862973742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.2862973742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.3436026270 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 196381966 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:41:15 AM UTC 24 |
| Finished | Aug 25 09:41:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436026270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.3436026270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.728781710 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 1076575755 ps |
| CPU time | 4.85 seconds |
| Started | Aug 25 09:41:16 AM UTC 24 |
| Finished | Aug 25 09:41:22 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=728781710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_stream_len_max.728781710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.3971910102 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 2257544873 ps |
| CPU time | 28.86 seconds |
| Started | Aug 25 09:41:16 AM UTC 24 |
| Finished | Aug 25 09:41:47 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971910102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.3971910102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.2707220930 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 1018279481 ps |
| CPU time | 27.46 seconds |
| Started | Aug 25 09:41:03 AM UTC 24 |
| Finished | Aug 25 09:41:32 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2707220930 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.2707220930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.2109644901 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 436438816 ps |
| CPU time | 2.41 seconds |
| Started | Aug 25 09:41:17 AM UTC 24 |
| Finished | Aug 25 09:41:20 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2109644901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_t x_rx_disruption.2109644901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.2986804671 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 696679835 ps |
| CPU time | 1.88 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2986804671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.2986804671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.1389995537 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 559065821 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1389995537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.1389995537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.753701084 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 587314378 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=753701084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_t x_rx_disruption.753701084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.3508803885 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 559547444 ps |
| CPU time | 2.01 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3508803885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.3508803885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.3397275951 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 659753511 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3397275951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_ tx_rx_disruption.3397275951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.1253745193 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 538596608 ps |
| CPU time | 1.98 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1253745193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_ tx_rx_disruption.1253745193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.3049613056 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 571568771 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3049613056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_ tx_rx_disruption.3049613056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.4275506904 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 615745878 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4275506904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_ tx_rx_disruption.4275506904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.3254830234 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 623446141 ps |
| CPU time | 2.01 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3254830234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_ tx_rx_disruption.3254830234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.2045505132 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 437763482 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2045505132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.2045505132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.1512929772 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 56129053 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:41:36 AM UTC 24 |
| Finished | Aug 25 09:41:38 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1512929772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.1512929772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.1907737525 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 6728404160 ps |
| CPU time | 20.22 seconds |
| Started | Aug 25 09:41:17 AM UTC 24 |
| Finished | Aug 25 09:41:38 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907737525 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.1907737525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.1287689662 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 19316946821 ps |
| CPU time | 37.87 seconds |
| Started | Aug 25 09:41:18 AM UTC 24 |
| Finished | Aug 25 09:41:57 AM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287689662 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.1287689662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.4052547312 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 30898720466 ps |
| CPU time | 70.12 seconds |
| Started | Aug 25 09:41:18 AM UTC 24 |
| Finished | Aug 25 09:42:30 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052547312 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.4052547312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.2072630213 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 171193392 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:41:18 AM UTC 24 |
| Finished | Aug 25 09:41:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072630213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.2072630213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.935794270 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 176232240 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:41:18 AM UTC 24 |
| Finished | Aug 25 09:41:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=935794270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_bitstuff_err.935794270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.3570447698 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 274749932 ps |
| CPU time | 2.08 seconds |
| Started | Aug 25 09:41:18 AM UTC 24 |
| Finished | Aug 25 09:41:21 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570447698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 47.usbdev_data_toggle_clear.3570447698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.2872947655 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 885543182 ps |
| CPU time | 4.25 seconds |
| Started | Aug 25 09:41:18 AM UTC 24 |
| Finished | Aug 25 09:41:24 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2872947655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.2872947655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.3931780422 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 26575874813 ps |
| CPU time | 75.25 seconds |
| Started | Aug 25 09:41:20 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3931780422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.3931780422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.1725270685 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 1685902841 ps |
| CPU time | 52.95 seconds |
| Started | Aug 25 09:41:20 AM UTC 24 |
| Finished | Aug 25 09:42:15 AM UTC 24 |
| Peak memory | 217828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1725270685 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.1725270685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.3486895566 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 651223038 ps |
| CPU time | 2.71 seconds |
| Started | Aug 25 09:41:20 AM UTC 24 |
| Finished | Aug 25 09:41:24 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486895566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.3486895566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.1901774385 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 137752994 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:41:20 AM UTC 24 |
| Finished | Aug 25 09:41:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901774385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.1901774385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_enable.3651493935 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 42809949 ps |
| CPU time | 0.97 seconds |
| Started | Aug 25 09:41:20 AM UTC 24 |
| Finished | Aug 25 09:41:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651493935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_enable.3651493935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.3294751156 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 694260479 ps |
| CPU time | 3.52 seconds |
| Started | Aug 25 09:41:21 AM UTC 24 |
| Finished | Aug 25 09:41:26 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3294751156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.3294751156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.1436196551 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 216569061 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:41:21 AM UTC 24 |
| Finished | Aug 25 09:41:24 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436196551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.1436196551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.2190208746 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 163382954 ps |
| CPU time | 2.75 seconds |
| Started | Aug 25 09:41:21 AM UTC 24 |
| Finished | Aug 25 09:41:25 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2190208746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.2190208746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.4207113182 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 180409467 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:41:22 AM UTC 24 |
| Finished | Aug 25 09:41:24 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207113182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.4207113182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.2307712657 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 163681447 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:41:23 AM UTC 24 |
| Finished | Aug 25 09:41:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2307712657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.2307712657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.4053234788 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 159295060 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:41:23 AM UTC 24 |
| Finished | Aug 25 09:41:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053234788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_trans.4053234788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.69414979 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 4164451717 ps |
| CPU time | 45.44 seconds |
| Started | Aug 25 09:41:21 AM UTC 24 |
| Finished | Aug 25 09:42:09 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=69414979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.69414979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.2646379374 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 5634505822 ps |
| CPU time | 87.08 seconds |
| Started | Aug 25 09:41:23 AM UTC 24 |
| Finished | Aug 25 09:42:52 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2646379374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.2646379374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.4015007860 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 222119040 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:41:23 AM UTC 24 |
| Finished | Aug 25 09:41:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015007860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.4015007860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.2496154574 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 24092763529 ps |
| CPU time | 48.1 seconds |
| Started | Aug 25 09:41:23 AM UTC 24 |
| Finished | Aug 25 09:42:13 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496154574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_resume.2496154574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.1935068247 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 11246811485 ps |
| CPU time | 25.25 seconds |
| Started | Aug 25 09:41:25 AM UTC 24 |
| Finished | Aug 25 09:41:52 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1935068247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_link_suspend.1935068247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.1150076145 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 3714457780 ps |
| CPU time | 48.13 seconds |
| Started | Aug 25 09:41:25 AM UTC 24 |
| Finished | Aug 25 09:42:15 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150076145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.1150076145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.4244710597 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 2725292978 ps |
| CPU time | 94.22 seconds |
| Started | Aug 25 09:41:25 AM UTC 24 |
| Finished | Aug 25 09:43:02 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244710597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.4244710597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.753368403 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 245089194 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:41:25 AM UTC 24 |
| Finished | Aug 25 09:41:28 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=753368403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.753368403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.794662094 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 187668282 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:41:25 AM UTC 24 |
| Finished | Aug 25 09:41:28 AM UTC 24 |
| Peak memory | 216160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=794662094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.794662094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.2667525214 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 3116030130 ps |
| CPU time | 101.63 seconds |
| Started | Aug 25 09:41:26 AM UTC 24 |
| Finished | Aug 25 09:43:10 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667525214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.2667525214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.210854065 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 160194539 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:41:26 AM UTC 24 |
| Finished | Aug 25 09:41:28 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=210854065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.210854065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.3361918633 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 165668815 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:41:26 AM UTC 24 |
| Finished | Aug 25 09:41:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361918633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.3361918633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.713827267 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 188698081 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:41:27 AM UTC 24 |
| Finished | Aug 25 09:41:30 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=713827267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_nak_trans.713827267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.676904650 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 222048990 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:41:27 AM UTC 24 |
| Finished | Aug 25 09:41:30 AM UTC 24 |
| Peak memory | 216172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=676904650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_out_iso.676904650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.3833095742 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 170671011 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:41:27 AM UTC 24 |
| Finished | Aug 25 09:41:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833095742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_out_stall.3833095742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.995832291 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 159294486 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:41:27 AM UTC 24 |
| Finished | Aug 25 09:41:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=995832291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_out_trans_nak.995832291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.1689518534 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 151561600 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:41:27 AM UTC 24 |
| Finished | Aug 25 09:41:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689518534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.1689518534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.898486663 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 242658286 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:41:29 AM UTC 24 |
| Finished | Aug 25 09:41:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=898486663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.898486663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.2646692791 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 187247105 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:41:29 AM UTC 24 |
| Finished | Aug 25 09:41:32 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2646692791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.2646692791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.3941649193 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 91656610 ps |
| CPU time | 1.2 seconds |
| Started | Aug 25 09:41:30 AM UTC 24 |
| Finished | Aug 25 09:41:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941649193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.3941649193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.3821564309 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 5680147717 ps |
| CPU time | 22.28 seconds |
| Started | Aug 25 09:41:30 AM UTC 24 |
| Finished | Aug 25 09:41:53 AM UTC 24 |
| Peak memory | 235232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821564309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_pkt_buffer.3821564309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.3608701967 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 215391093 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:41:31 AM UTC 24 |
| Finished | Aug 25 09:41:34 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608701967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.3608701967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.1700598528 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 228040537 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:41:31 AM UTC 24 |
| Finished | Aug 25 09:41:34 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700598528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.1700598528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.1658857536 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 215849604 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:41:31 AM UTC 24 |
| Finished | Aug 25 09:41:34 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1658857536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_random_length_in_transaction.1658857536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.1660135857 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 202334804 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:41:31 AM UTC 24 |
| Finished | Aug 25 09:41:34 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660135857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.1660135857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.4279908401 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 217723318 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:41:31 AM UTC 24 |
| Finished | Aug 25 09:41:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279908401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_rx_crc_err.4279908401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.3283747873 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 457535961 ps |
| CPU time | 2.54 seconds |
| Started | Aug 25 09:41:32 AM UTC 24 |
| Finished | Aug 25 09:41:36 AM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283747873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.3283747873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.3783663972 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 166326260 ps |
| CPU time | 1.1 seconds |
| Started | Aug 25 09:41:32 AM UTC 24 |
| Finished | Aug 25 09:41:35 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783663972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_setup_stage.3783663972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.3289153456 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 165584197 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:41:33 AM UTC 24 |
| Finished | Aug 25 09:41:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3289153456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 47.usbdev_setup_trans_ignored.3289153456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.2266752621 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 218210908 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:41:34 AM UTC 24 |
| Finished | Aug 25 09:41:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266752621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.2266752621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.1107006787 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 2697480793 ps |
| CPU time | 37.43 seconds |
| Started | Aug 25 09:41:34 AM UTC 24 |
| Finished | Aug 25 09:42:13 AM UTC 24 |
| Peak memory | 228644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107006787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.1107006787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.2493483760 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 168939901 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:41:35 AM UTC 24 |
| Finished | Aug 25 09:41:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493483760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.2493483760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.3132398780 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 209425787 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:41:35 AM UTC 24 |
| Finished | Aug 25 09:41:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132398780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.3132398780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.759248840 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 443913882 ps |
| CPU time | 2.57 seconds |
| Started | Aug 25 09:41:36 AM UTC 24 |
| Finished | Aug 25 09:41:39 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759248840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_stream_len_max.759248840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.1832951844 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 2759246532 ps |
| CPU time | 89.15 seconds |
| Started | Aug 25 09:41:36 AM UTC 24 |
| Finished | Aug 25 09:43:07 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1832951844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.1832951844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.1810343102 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 148562404 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:41:20 AM UTC 24 |
| Finished | Aug 25 09:41:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810343102 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.1810343102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.740459520 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 478783358 ps |
| CPU time | 2.67 seconds |
| Started | Aug 25 09:41:36 AM UTC 24 |
| Finished | Aug 25 09:41:39 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=740459520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_tx _rx_disruption.740459520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.405207432 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 471999110 ps |
| CPU time | 1.93 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=405207432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_t x_rx_disruption.405207432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.3673222271 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 709935396 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3673222271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_ tx_rx_disruption.3673222271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.2699396003 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 469694044 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2699396003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_ tx_rx_disruption.2699396003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.1818963157 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 434913045 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1818963157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.1818963157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.787777344 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 525172880 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 216016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=787777344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_t x_rx_disruption.787777344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.3373082119 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 559868712 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 216020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3373082119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.3373082119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.513216535 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 559389184 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:52 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=513216535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_t x_rx_disruption.513216535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.133197797 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 400434340 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=133197797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_t x_rx_disruption.133197797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.2508782583 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 535059552 ps |
| CPU time | 2.15 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:52 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2508782583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.2508782583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.3462595175 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 587026235 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3462595175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_ tx_rx_disruption.3462595175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.293093294 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 44694843 ps |
| CPU time | 1 seconds |
| Started | Aug 25 09:41:57 AM UTC 24 |
| Finished | Aug 25 09:41:59 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=293093294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.293093294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.2766722048 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 6149231795 ps |
| CPU time | 14.73 seconds |
| Started | Aug 25 09:41:36 AM UTC 24 |
| Finished | Aug 25 09:41:52 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766722048 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.2766722048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.3997217709 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 18580486239 ps |
| CPU time | 35.88 seconds |
| Started | Aug 25 09:41:37 AM UTC 24 |
| Finished | Aug 25 09:42:14 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3997217709 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.3997217709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.2686819805 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 25526637075 ps |
| CPU time | 63.84 seconds |
| Started | Aug 25 09:41:37 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686819805 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.2686819805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.1560698757 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 159386767 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:41:37 AM UTC 24 |
| Finished | Aug 25 09:41:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1560698757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.1560698757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.1078519783 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 155125742 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:41:38 AM UTC 24 |
| Finished | Aug 25 09:41:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078519783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_bitstuff_err.1078519783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.2435560915 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 469643334 ps |
| CPU time | 2.51 seconds |
| Started | Aug 25 09:41:38 AM UTC 24 |
| Finished | Aug 25 09:41:42 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435560915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 48.usbdev_data_toggle_clear.2435560915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.1966962355 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 907755650 ps |
| CPU time | 4.62 seconds |
| Started | Aug 25 09:41:39 AM UTC 24 |
| Finished | Aug 25 09:41:44 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966962355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.1966962355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.3414288505 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 16637698276 ps |
| CPU time | 50.41 seconds |
| Started | Aug 25 09:41:39 AM UTC 24 |
| Finished | Aug 25 09:42:31 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3414288505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.3414288505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.176640048 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 1598880655 ps |
| CPU time | 17.9 seconds |
| Started | Aug 25 09:41:40 AM UTC 24 |
| Finished | Aug 25 09:42:00 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=176640048 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.176640048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.2557267010 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 861796876 ps |
| CPU time | 3.72 seconds |
| Started | Aug 25 09:41:40 AM UTC 24 |
| Finished | Aug 25 09:41:45 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2557267010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_disable_endpoint.2557267010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.210590230 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 144426928 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:41:41 AM UTC 24 |
| Finished | Aug 25 09:41:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=210590230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_disconnected.210590230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_enable.1368786402 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 90986083 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:41:41 AM UTC 24 |
| Finished | Aug 25 09:41:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1368786402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_enable.1368786402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.3058913795 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 786555386 ps |
| CPU time | 4 seconds |
| Started | Aug 25 09:41:41 AM UTC 24 |
| Finished | Aug 25 09:41:46 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3058913795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.3058913795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.2262191762 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 297507230 ps |
| CPU time | 2.07 seconds |
| Started | Aug 25 09:41:41 AM UTC 24 |
| Finished | Aug 25 09:41:44 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262191762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.2262191762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.409366974 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 200276985 ps |
| CPU time | 3.14 seconds |
| Started | Aug 25 09:41:42 AM UTC 24 |
| Finished | Aug 25 09:41:46 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=409366974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_fifo_rst.409366974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.527760467 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 257669568 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:41:43 AM UTC 24 |
| Finished | Aug 25 09:41:46 AM UTC 24 |
| Peak memory | 226344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=527760467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.527760467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.400289392 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 151644008 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:41:43 AM UTC 24 |
| Finished | Aug 25 09:41:46 AM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=400289392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_in_stall.400289392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.515793952 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 196393918 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:41:43 AM UTC 24 |
| Finished | Aug 25 09:41:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=515793952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_in_trans.515793952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.4107752436 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 2798821723 ps |
| CPU time | 29.01 seconds |
| Started | Aug 25 09:41:43 AM UTC 24 |
| Finished | Aug 25 09:42:14 AM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4107752436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.4107752436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.1040742132 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 6156269669 ps |
| CPU time | 64.97 seconds |
| Started | Aug 25 09:41:45 AM UTC 24 |
| Finished | Aug 25 09:42:52 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040742132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.1040742132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.3009510948 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 158857224 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:41:45 AM UTC 24 |
| Finished | Aug 25 09:41:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3009510948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_in_err.3009510948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.2391236162 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 8859620315 ps |
| CPU time | 26.33 seconds |
| Started | Aug 25 09:41:45 AM UTC 24 |
| Finished | Aug 25 09:42:12 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391236162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_resume.2391236162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.3156267398 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 9749892850 ps |
| CPU time | 27.95 seconds |
| Started | Aug 25 09:41:46 AM UTC 24 |
| Finished | Aug 25 09:42:15 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156267398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.3156267398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.1124895301 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 4799436874 ps |
| CPU time | 49.09 seconds |
| Started | Aug 25 09:41:46 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124895301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.1124895301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.3739542708 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 3262925518 ps |
| CPU time | 40.93 seconds |
| Started | Aug 25 09:41:48 AM UTC 24 |
| Finished | Aug 25 09:42:31 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739542708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.3739542708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.3573333579 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 239974215 ps |
| CPU time | 1.77 seconds |
| Started | Aug 25 09:41:48 AM UTC 24 |
| Finished | Aug 25 09:41:51 AM UTC 24 |
| Peak memory | 216016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573333579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.3573333579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.1536261245 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 197471267 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:41:48 AM UTC 24 |
| Finished | Aug 25 09:41:51 AM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536261245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.1536261245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.3695514204 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 3611633124 ps |
| CPU time | 38.2 seconds |
| Started | Aug 25 09:41:48 AM UTC 24 |
| Finished | Aug 25 09:42:28 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3695514204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.3695514204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.32500185 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 148195049 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:41:48 AM UTC 24 |
| Finished | Aug 25 09:41:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=32500185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.32500185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.2711787949 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 150086689 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:41:48 AM UTC 24 |
| Finished | Aug 25 09:41:51 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2711787949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.2711787949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.2501734679 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 208394697 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:41:48 AM UTC 24 |
| Finished | Aug 25 09:41:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2501734679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.2501734679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.2724779218 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 186659556 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:41:48 AM UTC 24 |
| Finished | Aug 25 09:41:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724779218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.2724779218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.4094200467 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 147094543 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:41:51 AM UTC 24 |
| Finished | Aug 25 09:41:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4094200467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.4094200467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.2002921486 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 172166399 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:41:51 AM UTC 24 |
| Finished | Aug 25 09:41:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002921486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.2002921486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.2126419982 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 172241856 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:41:51 AM UTC 24 |
| Finished | Aug 25 09:41:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126419982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.2126419982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.2716992757 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 233796730 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:41:51 AM UTC 24 |
| Finished | Aug 25 09:41:54 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716992757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.2716992757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.1641494901 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 181370856 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:41:51 AM UTC 24 |
| Finished | Aug 25 09:41:54 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1641494901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.1641494901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.2124560343 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 43831767 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:41:53 AM UTC 24 |
| Finished | Aug 25 09:41:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124560343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.2124560343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.3613219779 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 12641296709 ps |
| CPU time | 49.13 seconds |
| Started | Aug 25 09:41:53 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3613219779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.3613219779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.1985086465 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 202848091 ps |
| CPU time | 1.68 seconds |
| Started | Aug 25 09:41:53 AM UTC 24 |
| Finished | Aug 25 09:41:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985086465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_pkt_received.1985086465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.3752470532 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 194451427 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:41:53 AM UTC 24 |
| Finished | Aug 25 09:41:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752470532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_pkt_sent.3752470532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.3393321079 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 201095053 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:41:53 AM UTC 24 |
| Finished | Aug 25 09:41:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393321079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.3393321079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.3607443623 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 192059964 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:41:53 AM UTC 24 |
| Finished | Aug 25 09:41:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607443623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.3607443623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.3269727014 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 156154666 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:41:55 AM UTC 24 |
| Finished | Aug 25 09:41:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269727014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_rx_crc_err.3269727014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.3466392663 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 323803786 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:41:55 AM UTC 24 |
| Finished | Aug 25 09:41:58 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3466392663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.3466392663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.4016867777 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 224394618 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:41:55 AM UTC 24 |
| Finished | Aug 25 09:41:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016867777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_setup_stage.4016867777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.3340212930 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 158535531 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:41:55 AM UTC 24 |
| Finished | Aug 25 09:41:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3340212930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.3340212930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.2521518169 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 217065939 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:41:55 AM UTC 24 |
| Finished | Aug 25 09:41:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2521518169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.2521518169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.3535134773 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 2929346495 ps |
| CPU time | 36.24 seconds |
| Started | Aug 25 09:41:55 AM UTC 24 |
| Finished | Aug 25 09:42:33 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535134773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.3535134773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.758606941 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 207690856 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:41:55 AM UTC 24 |
| Finished | Aug 25 09:41:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=758606941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.758606941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.1788428821 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 146220541 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:41:57 AM UTC 24 |
| Finished | Aug 25 09:42:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788428821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stall_trans.1788428821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.3519874876 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 706364195 ps |
| CPU time | 3.04 seconds |
| Started | Aug 25 09:41:57 AM UTC 24 |
| Finished | Aug 25 09:42:01 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519874876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.3519874876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.23920925 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 1731801271 ps |
| CPU time | 57.77 seconds |
| Started | Aug 25 09:41:57 AM UTC 24 |
| Finished | Aug 25 09:42:57 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=23920925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_streaming_out.23920925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.3067894821 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 3849349450 ps |
| CPU time | 45.21 seconds |
| Started | Aug 25 09:41:40 AM UTC 24 |
| Finished | Aug 25 09:42:27 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067894821 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.3067894821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.2756097777 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 462888548 ps |
| CPU time | 2.18 seconds |
| Started | Aug 25 09:41:57 AM UTC 24 |
| Finished | Aug 25 09:42:01 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2756097777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.2756097777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.224904203 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 511049068 ps |
| CPU time | 2.52 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:53 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=224904203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_t x_rx_disruption.224904203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.3526547181 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 455507049 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3526547181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.3526547181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.2436037484 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 529819485 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:44:35 AM UTC 24 |
| Finished | Aug 25 09:44:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2436037484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.2436037484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.3057650191 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 595784640 ps |
| CPU time | 2.15 seconds |
| Started | Aug 25 09:44:36 AM UTC 24 |
| Finished | Aug 25 09:44:52 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3057650191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.3057650191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.1096955425 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 527006215 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:44:36 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 219608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1096955425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.1096955425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.222871863 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 610876936 ps |
| CPU time | 2.72 seconds |
| Started | Aug 25 09:44:36 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=222871863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_t x_rx_disruption.222871863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.1334721121 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 566632656 ps |
| CPU time | 2.37 seconds |
| Started | Aug 25 09:44:36 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1334721121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_ tx_rx_disruption.1334721121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.2305262823 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 485016543 ps |
| CPU time | 1.64 seconds |
| Started | Aug 25 09:44:36 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2305262823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_ tx_rx_disruption.2305262823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.4072721982 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 486104204 ps |
| CPU time | 1.94 seconds |
| Started | Aug 25 09:44:36 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4072721982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.4072721982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.2823363245 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 453002655 ps |
| CPU time | 2.32 seconds |
| Started | Aug 25 09:44:36 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2823363245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_ tx_rx_disruption.2823363245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.1568772772 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 51146656 ps |
| CPU time | 1.07 seconds |
| Started | Aug 25 09:42:17 AM UTC 24 |
| Finished | Aug 25 09:42:19 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1568772772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.1568772772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.3112372518 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 10778398199 ps |
| CPU time | 20.86 seconds |
| Started | Aug 25 09:41:57 AM UTC 24 |
| Finished | Aug 25 09:42:20 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3112372518 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.3112372518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3446849731 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 15597453064 ps |
| CPU time | 26.91 seconds |
| Started | Aug 25 09:41:57 AM UTC 24 |
| Finished | Aug 25 09:42:26 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446849731 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.3446849731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.2122445248 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 31296602161 ps |
| CPU time | 60.3 seconds |
| Started | Aug 25 09:41:59 AM UTC 24 |
| Finished | Aug 25 09:43:01 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122445248 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.2122445248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.1973112832 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 165638501 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:41:59 AM UTC 24 |
| Finished | Aug 25 09:42:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973112832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_av_buffer.1973112832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.2081875354 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 163351393 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:41:59 AM UTC 24 |
| Finished | Aug 25 09:42:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081875354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_bitstuff_err.2081875354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.673558911 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 288933295 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:41:59 AM UTC 24 |
| Finished | Aug 25 09:42:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=673558911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_data_toggle_clear.673558911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.3055245684 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 1048457683 ps |
| CPU time | 5.93 seconds |
| Started | Aug 25 09:41:59 AM UTC 24 |
| Finished | Aug 25 09:42:06 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055245684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.3055245684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.84882783 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 19249994043 ps |
| CPU time | 46.46 seconds |
| Started | Aug 25 09:41:59 AM UTC 24 |
| Finished | Aug 25 09:42:47 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84882783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_device_address.84882783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.480003892 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 332893137 ps |
| CPU time | 6.85 seconds |
| Started | Aug 25 09:42:00 AM UTC 24 |
| Finished | Aug 25 09:42:09 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=480003892 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.480003892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.3758403210 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 428700647 ps |
| CPU time | 2.64 seconds |
| Started | Aug 25 09:42:01 AM UTC 24 |
| Finished | Aug 25 09:42:04 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758403210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.3758403210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.3761843599 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 159468848 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:42:01 AM UTC 24 |
| Finished | Aug 25 09:42:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3761843599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.3761843599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_enable.2144189847 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 40650586 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:42:01 AM UTC 24 |
| Finished | Aug 25 09:42:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2144189847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.2144189847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.3705368034 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 827762562 ps |
| CPU time | 4.11 seconds |
| Started | Aug 25 09:42:02 AM UTC 24 |
| Finished | Aug 25 09:42:07 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705368034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.3705368034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.2743758259 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 282495997 ps |
| CPU time | 2.19 seconds |
| Started | Aug 25 09:42:02 AM UTC 24 |
| Finished | Aug 25 09:42:05 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2743758259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.2743758259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.1150054781 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 273882251 ps |
| CPU time | 3.37 seconds |
| Started | Aug 25 09:42:02 AM UTC 24 |
| Finished | Aug 25 09:42:07 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150054781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.1150054781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.1433622695 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 238984615 ps |
| CPU time | 1.93 seconds |
| Started | Aug 25 09:42:02 AM UTC 24 |
| Finished | Aug 25 09:42:05 AM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433622695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.1433622695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.859417593 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 137546760 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:42:04 AM UTC 24 |
| Finished | Aug 25 09:42:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=859417593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_in_stall.859417593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.4290053062 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 209512992 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:42:04 AM UTC 24 |
| Finished | Aug 25 09:42:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4290053062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.4290053062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.2525251027 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 5001010225 ps |
| CPU time | 134.37 seconds |
| Started | Aug 25 09:42:02 AM UTC 24 |
| Finished | Aug 25 09:44:19 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2525251027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.2525251027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.2473954518 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 11417995858 ps |
| CPU time | 137.2 seconds |
| Started | Aug 25 09:42:04 AM UTC 24 |
| Finished | Aug 25 09:44:24 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2473954518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.2473954518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.3760654644 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 223435154 ps |
| CPU time | 1.71 seconds |
| Started | Aug 25 09:42:04 AM UTC 24 |
| Finished | Aug 25 09:42:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760654644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.3760654644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.4277284487 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 6155207817 ps |
| CPU time | 16.84 seconds |
| Started | Aug 25 09:42:04 AM UTC 24 |
| Finished | Aug 25 09:42:22 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277284487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_resume.4277284487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.2722531969 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 5677461715 ps |
| CPU time | 18 seconds |
| Started | Aug 25 09:42:05 AM UTC 24 |
| Finished | Aug 25 09:42:25 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722531969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.2722531969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.2054918759 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 4127309445 ps |
| CPU time | 121.28 seconds |
| Started | Aug 25 09:42:07 AM UTC 24 |
| Finished | Aug 25 09:44:10 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2054918759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.2054918759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.2947573506 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 3568847876 ps |
| CPU time | 35.79 seconds |
| Started | Aug 25 09:42:07 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2947573506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.2947573506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.1938420302 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 245618089 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:42:08 AM UTC 24 |
| Finished | Aug 25 09:42:11 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1938420302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.1938420302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.3025388440 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 202229988 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:42:08 AM UTC 24 |
| Finished | Aug 25 09:42:11 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025388440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.3025388440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.2805813284 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 2104722390 ps |
| CPU time | 28.82 seconds |
| Started | Aug 25 09:42:08 AM UTC 24 |
| Finished | Aug 25 09:42:39 AM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805813284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.2805813284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.1704756822 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 157881557 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:42:08 AM UTC 24 |
| Finished | Aug 25 09:42:11 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704756822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.1704756822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.4121735557 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 158705153 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:42:08 AM UTC 24 |
| Finished | Aug 25 09:42:11 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121735557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.4121735557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.4102141001 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 182975673 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:42:08 AM UTC 24 |
| Finished | Aug 25 09:42:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102141001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_nak_trans.4102141001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.3456883989 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 182918107 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:42:10 AM UTC 24 |
| Finished | Aug 25 09:42:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3456883989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.3456883989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.1367846933 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 169466652 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:42:10 AM UTC 24 |
| Finished | Aug 25 09:42:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367846933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_out_stall.1367846933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.2157731070 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 163382245 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:42:12 AM UTC 24 |
| Finished | Aug 25 09:42:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157731070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.2157731070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.2188723442 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 147152227 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:42:12 AM UTC 24 |
| Finished | Aug 25 09:42:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188723442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.2188723442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.3787909293 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 233147005 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:42:12 AM UTC 24 |
| Finished | Aug 25 09:42:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787909293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.3787909293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.3674847965 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 170506781 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:42:12 AM UTC 24 |
| Finished | Aug 25 09:42:15 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674847965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.3674847965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.1815275191 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 48070906 ps |
| CPU time | 1.08 seconds |
| Started | Aug 25 09:42:12 AM UTC 24 |
| Finished | Aug 25 09:42:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815275191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.1815275191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.1991508600 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 20614762757 ps |
| CPU time | 61.27 seconds |
| Started | Aug 25 09:42:12 AM UTC 24 |
| Finished | Aug 25 09:43:16 AM UTC 24 |
| Peak memory | 228628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991508600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.1991508600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.4012813278 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 200605848 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:42:13 AM UTC 24 |
| Finished | Aug 25 09:42:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012813278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.4012813278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.3098701735 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 250647789 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:42:15 AM UTC 24 |
| Finished | Aug 25 09:42:18 AM UTC 24 |
| Peak memory | 216004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3098701735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.3098701735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.1310046307 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 227434039 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:42:15 AM UTC 24 |
| Finished | Aug 25 09:42:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310046307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.1310046307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.3035286465 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 185418638 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:42:15 AM UTC 24 |
| Finished | Aug 25 09:42:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3035286465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.3035286465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.2514785499 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 154745554 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:42:15 AM UTC 24 |
| Finished | Aug 25 09:42:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2514785499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.2514785499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.2575433283 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 240727939 ps |
| CPU time | 1.96 seconds |
| Started | Aug 25 09:42:15 AM UTC 24 |
| Finished | Aug 25 09:42:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575433283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.2575433283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.1108369066 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 144177817 ps |
| CPU time | 1.17 seconds |
| Started | Aug 25 09:42:15 AM UTC 24 |
| Finished | Aug 25 09:42:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108369066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.1108369066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.2730449987 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 167720745 ps |
| CPU time | 1.24 seconds |
| Started | Aug 25 09:42:15 AM UTC 24 |
| Finished | Aug 25 09:42:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730449987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.2730449987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.783183451 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 254432383 ps |
| CPU time | 1.88 seconds |
| Started | Aug 25 09:42:17 AM UTC 24 |
| Finished | Aug 25 09:42:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=783183451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.783183451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.158693681 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 4083342314 ps |
| CPU time | 46.39 seconds |
| Started | Aug 25 09:42:17 AM UTC 24 |
| Finished | Aug 25 09:43:05 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=158693681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.158693681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.1804064030 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 188809528 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:42:17 AM UTC 24 |
| Finished | Aug 25 09:42:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1804064030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.1804064030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.2605431428 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 182651469 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:42:17 AM UTC 24 |
| Finished | Aug 25 09:42:20 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605431428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.2605431428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.593855381 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 961381669 ps |
| CPU time | 3.72 seconds |
| Started | Aug 25 09:42:17 AM UTC 24 |
| Finished | Aug 25 09:42:22 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=593855381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_stream_len_max.593855381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.3479142114 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 2832988726 ps |
| CPU time | 26.58 seconds |
| Started | Aug 25 09:42:17 AM UTC 24 |
| Finished | Aug 25 09:42:45 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479142114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.3479142114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.3772027233 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 754276130 ps |
| CPU time | 18.87 seconds |
| Started | Aug 25 09:42:00 AM UTC 24 |
| Finished | Aug 25 09:42:21 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772027233 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.3772027233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.224922695 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 446485153 ps |
| CPU time | 2.62 seconds |
| Started | Aug 25 09:42:17 AM UTC 24 |
| Finished | Aug 25 09:42:21 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=224922695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_tx _rx_disruption.224922695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.3067096449 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 626091978 ps |
| CPU time | 2.5 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3067096449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.3067096449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.2242386489 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 567232851 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2242386489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.2242386489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.2017081436 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 546201852 ps |
| CPU time | 1.92 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2017081436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.2017081436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.2122504651 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 655836352 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2122504651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.2122504651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.161568924 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 636326785 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:45:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=161568924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_t x_rx_disruption.161568924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.1977870835 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 533205605 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1977870835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.1977870835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.3764912749 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 631632888 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3764912749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_ tx_rx_disruption.3764912749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.2481472574 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 701079247 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2481472574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.2481472574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.3007958775 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 515346241 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:44:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3007958775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.3007958775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.3980668977 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 590831284 ps |
| CPU time | 2.18 seconds |
| Started | Aug 25 09:44:38 AM UTC 24 |
| Finished | Aug 25 09:45:03 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3980668977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.3980668977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.2958198527 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 41093471 ps |
| CPU time | 0.94 seconds |
| Started | Aug 25 09:24:31 AM UTC 24 |
| Finished | Aug 25 09:24:33 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958198527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.2958198527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.1147482730 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 9136188978 ps |
| CPU time | 25.62 seconds |
| Started | Aug 25 09:23:27 AM UTC 24 |
| Finished | Aug 25 09:23:54 AM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1147482730 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.1147482730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.3054530352 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 14650812610 ps |
| CPU time | 39.99 seconds |
| Started | Aug 25 09:23:28 AM UTC 24 |
| Finished | Aug 25 09:24:10 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3054530352 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.3054530352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.563144635 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 25992889797 ps |
| CPU time | 61.77 seconds |
| Started | Aug 25 09:23:28 AM UTC 24 |
| Finished | Aug 25 09:24:32 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=563144635 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.563144635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.311658279 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 203223457 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:23:30 AM UTC 24 |
| Finished | Aug 25 09:23:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=311658279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_av_buffer.311658279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.1773518905 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 146988614 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:23:30 AM UTC 24 |
| Finished | Aug 25 09:23:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773518905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_bitstuff_err.1773518905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.3135097448 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 291499170 ps |
| CPU time | 2.02 seconds |
| Started | Aug 25 09:23:30 AM UTC 24 |
| Finished | Aug 25 09:23:33 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135097448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.3135097448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.1175975613 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 17958175548 ps |
| CPU time | 67.58 seconds |
| Started | Aug 25 09:23:33 AM UTC 24 |
| Finished | Aug 25 09:24:42 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175975613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.1175975613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.3811101873 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 997905718 ps |
| CPU time | 28.57 seconds |
| Started | Aug 25 09:23:33 AM UTC 24 |
| Finished | Aug 25 09:24:03 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811101873 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.3811101873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.3236698632 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 596615864 ps |
| CPU time | 3.31 seconds |
| Started | Aug 25 09:23:38 AM UTC 24 |
| Finished | Aug 25 09:23:42 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236698632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.3236698632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.3949733437 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 150884565 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:23:38 AM UTC 24 |
| Finished | Aug 25 09:23:40 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949733437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.3949733437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_enable.1022759760 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 88745730 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:23:39 AM UTC 24 |
| Finished | Aug 25 09:23:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022759760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_enable.1022759760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.424055079 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 801954020 ps |
| CPU time | 4.65 seconds |
| Started | Aug 25 09:23:39 AM UTC 24 |
| Finished | Aug 25 09:23:45 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=424055079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.424055079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.3114634464 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 625345866 ps |
| CPU time | 2.9 seconds |
| Started | Aug 25 09:23:41 AM UTC 24 |
| Finished | Aug 25 09:23:46 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114634464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.3114634464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.996655561 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 326050012 ps |
| CPU time | 2.93 seconds |
| Started | Aug 25 09:23:43 AM UTC 24 |
| Finished | Aug 25 09:23:47 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=996655561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_fifo_rst.996655561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.77821941 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 183480597 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:23:43 AM UTC 24 |
| Finished | Aug 25 09:23:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=77821941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.77821941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.1737401420 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 139537204 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:23:45 AM UTC 24 |
| Finished | Aug 25 09:23:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1737401420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_stall.1737401420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.2966240027 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 244031605 ps |
| CPU time | 1.89 seconds |
| Started | Aug 25 09:23:46 AM UTC 24 |
| Finished | Aug 25 09:23:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966240027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.2966240027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.2414142937 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 3328162931 ps |
| CPU time | 33.73 seconds |
| Started | Aug 25 09:23:43 AM UTC 24 |
| Finished | Aug 25 09:24:18 AM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414142937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.2414142937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.192403994 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 10869139081 ps |
| CPU time | 111.76 seconds |
| Started | Aug 25 09:23:46 AM UTC 24 |
| Finished | Aug 25 09:25:41 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192403994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.192403994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.2645320516 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 228651090 ps |
| CPU time | 1.69 seconds |
| Started | Aug 25 09:23:47 AM UTC 24 |
| Finished | Aug 25 09:23:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645320516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.2645320516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.3283584782 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 32536248145 ps |
| CPU time | 96.9 seconds |
| Started | Aug 25 09:23:47 AM UTC 24 |
| Finished | Aug 25 09:25:27 AM UTC 24 |
| Peak memory | 218196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283584782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.3283584782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.267124877 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 5199372416 ps |
| CPU time | 18.89 seconds |
| Started | Aug 25 09:23:49 AM UTC 24 |
| Finished | Aug 25 09:24:09 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=267124877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_suspend.267124877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.4108644690 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 2286076575 ps |
| CPU time | 22.37 seconds |
| Started | Aug 25 09:23:52 AM UTC 24 |
| Finished | Aug 25 09:24:16 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4108644690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.4108644690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.3174429347 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 243711108 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:23:52 AM UTC 24 |
| Finished | Aug 25 09:23:54 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174429347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.3174429347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.806790350 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 208801990 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:23:52 AM UTC 24 |
| Finished | Aug 25 09:23:55 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=806790350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.806790350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.20408481 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 2852844434 ps |
| CPU time | 28.86 seconds |
| Started | Aug 25 09:23:53 AM UTC 24 |
| Finished | Aug 25 09:24:24 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=20408481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.20408481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.1760349743 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 2318715871 ps |
| CPU time | 85.71 seconds |
| Started | Aug 25 09:23:54 AM UTC 24 |
| Finished | Aug 25 09:25:22 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760349743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.1760349743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.2778107834 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 2825442393 ps |
| CPU time | 33.72 seconds |
| Started | Aug 25 09:23:56 AM UTC 24 |
| Finished | Aug 25 09:24:31 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778107834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.2778107834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.3362775741 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 156973852 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:23:56 AM UTC 24 |
| Finished | Aug 25 09:23:58 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362775741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.3362775741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.2095391264 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 140094554 ps |
| CPU time | 1.12 seconds |
| Started | Aug 25 09:23:56 AM UTC 24 |
| Finished | Aug 25 09:23:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095391264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.2095391264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.2771874087 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 213043588 ps |
| CPU time | 1.73 seconds |
| Started | Aug 25 09:23:58 AM UTC 24 |
| Finished | Aug 25 09:24:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771874087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_nak_trans.2771874087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.2799468108 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 225022278 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:23:59 AM UTC 24 |
| Finished | Aug 25 09:24:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2799468108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.2799468108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.2065187067 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 181426395 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:23:59 AM UTC 24 |
| Finished | Aug 25 09:24:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065187067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_out_stall.2065187067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.4053744648 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 184920777 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:24:02 AM UTC 24 |
| Finished | Aug 25 09:24:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053744648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.4053744648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.3519838096 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 187506107 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:24:03 AM UTC 24 |
| Finished | Aug 25 09:24:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519838096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.3519838096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.3147378370 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 215520395 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:24:03 AM UTC 24 |
| Finished | Aug 25 09:24:06 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3147378370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.3147378370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.3788226063 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 149017738 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:24:19 AM UTC 24 |
| Finished | Aug 25 09:24:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3788226063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.3788226063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.3049747578 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 52129693 ps |
| CPU time | 1.01 seconds |
| Started | Aug 25 09:24:21 AM UTC 24 |
| Finished | Aug 25 09:24:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3049747578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.3049747578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.418535522 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 12476623781 ps |
| CPU time | 67.27 seconds |
| Started | Aug 25 09:24:21 AM UTC 24 |
| Finished | Aug 25 09:25:31 AM UTC 24 |
| Peak memory | 228504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=418535522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_pkt_buffer.418535522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.2627257580 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 182554737 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:24:21 AM UTC 24 |
| Finished | Aug 25 09:24:24 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2627257580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.2627257580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.495381278 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 164366950 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:24:21 AM UTC 24 |
| Finished | Aug 25 09:24:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=495381278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_pkt_sent.495381278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.3961880882 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 7522306070 ps |
| CPU time | 69.15 seconds |
| Started | Aug 25 09:24:22 AM UTC 24 |
| Finished | Aug 25 09:25:33 AM UTC 24 |
| Peak memory | 230608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961880882 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.3961880882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.3608369992 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 10886181923 ps |
| CPU time | 282.9 seconds |
| Started | Aug 25 09:24:22 AM UTC 24 |
| Finished | Aug 25 09:29:10 AM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608369992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.3608369992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.2653112484 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 13834088336 ps |
| CPU time | 391.76 seconds |
| Started | Aug 25 09:24:22 AM UTC 24 |
| Finished | Aug 25 09:31:01 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653112484 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.2653112484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.1609203613 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 221973382 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:24:21 AM UTC 24 |
| Finished | Aug 25 09:24:24 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609203613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.1609203613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.2347173405 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 153928031 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:24:22 AM UTC 24 |
| Finished | Aug 25 09:24:24 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347173405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.2347173405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.2290674266 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 20153353297 ps |
| CPU time | 55.13 seconds |
| Started | Aug 25 09:24:22 AM UTC 24 |
| Finished | Aug 25 09:25:19 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290674266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.2290674266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.4178389560 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 386255888 ps |
| CPU time | 2.04 seconds |
| Started | Aug 25 09:24:22 AM UTC 24 |
| Finished | Aug 25 09:24:25 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178389560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.4178389560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.1153063322 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 159361895 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:24:25 AM UTC 24 |
| Finished | Aug 25 09:24:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153063322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.1153063322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.1300909509 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 176067413 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:24:25 AM UTC 24 |
| Finished | Aug 25 09:24:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1300909509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 5.usbdev_setup_trans_ignored.1300909509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.1436458163 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 240440155 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:24:25 AM UTC 24 |
| Finished | Aug 25 09:24:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436458163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.1436458163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.3258842559 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 1913277956 ps |
| CPU time | 63.05 seconds |
| Started | Aug 25 09:24:25 AM UTC 24 |
| Finished | Aug 25 09:25:30 AM UTC 24 |
| Peak memory | 234988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258842559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.3258842559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.3625895625 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 153128647 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:24:25 AM UTC 24 |
| Finished | Aug 25 09:24:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3625895625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.3625895625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.1715545438 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 216481775 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:24:25 AM UTC 24 |
| Finished | Aug 25 09:24:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715545438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.1715545438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.1544711408 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 789550098 ps |
| CPU time | 3.04 seconds |
| Started | Aug 25 09:24:27 AM UTC 24 |
| Finished | Aug 25 09:24:31 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544711408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.1544711408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.2450878379 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 4154920489 ps |
| CPU time | 47.98 seconds |
| Started | Aug 25 09:24:25 AM UTC 24 |
| Finished | Aug 25 09:25:15 AM UTC 24 |
| Peak memory | 228668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450878379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.2450878379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.2130787614 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 6155702267 ps |
| CPU time | 69.72 seconds |
| Started | Aug 25 09:23:34 AM UTC 24 |
| Finished | Aug 25 09:24:46 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2130787614 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.2130787614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.1665314243 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 468170830 ps |
| CPU time | 2.63 seconds |
| Started | Aug 25 09:24:27 AM UTC 24 |
| Finished | Aug 25 09:24:31 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1665314243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.1665314243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.403794436 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 401298129 ps |
| CPU time | 2.55 seconds |
| Started | Aug 25 09:42:17 AM UTC 24 |
| Finished | Aug 25 09:42:21 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=403794436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.403794436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.2965434385 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 507513240 ps |
| CPU time | 2.34 seconds |
| Started | Aug 25 09:42:17 AM UTC 24 |
| Finished | Aug 25 09:42:21 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2965434385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.2965434385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1952539279 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 597500535 ps |
| CPU time | 3.43 seconds |
| Started | Aug 25 09:42:19 AM UTC 24 |
| Finished | Aug 25 09:42:24 AM UTC 24 |
| Peak memory | 217984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1952539279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.1952539279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.4126314229 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 241369969 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:42:19 AM UTC 24 |
| Finished | Aug 25 09:42:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126314229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.4126314229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.3163798581 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 672525782 ps |
| CPU time | 3.58 seconds |
| Started | Aug 25 09:42:19 AM UTC 24 |
| Finished | Aug 25 09:42:24 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3163798581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.3163798581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.930010560 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 478816910 ps |
| CPU time | 2.04 seconds |
| Started | Aug 25 09:42:19 AM UTC 24 |
| Finished | Aug 25 09:42:22 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=930010560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.930010560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.2918960822 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 505465174 ps |
| CPU time | 2.43 seconds |
| Started | Aug 25 09:42:19 AM UTC 24 |
| Finished | Aug 25 09:42:23 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2918960822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.2918960822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.2888900640 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 229838612 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:42:20 AM UTC 24 |
| Finished | Aug 25 09:42:23 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888900640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.2888900640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.3233183409 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 532612301 ps |
| CPU time | 2.88 seconds |
| Started | Aug 25 09:42:20 AM UTC 24 |
| Finished | Aug 25 09:42:24 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3233183409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.3233183409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.1933550606 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 610918946 ps |
| CPU time | 3.06 seconds |
| Started | Aug 25 09:42:20 AM UTC 24 |
| Finished | Aug 25 09:42:25 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1933550606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_t x_rx_disruption.1933550606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.3009553817 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 474541976 ps |
| CPU time | 2 seconds |
| Started | Aug 25 09:42:22 AM UTC 24 |
| Finished | Aug 25 09:42:25 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3009553817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.3009553817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.84446493 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 516022946 ps |
| CPU time | 2.96 seconds |
| Started | Aug 25 09:42:22 AM UTC 24 |
| Finished | Aug 25 09:42:26 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=84446493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_tx_ rx_disruption.84446493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.98277771 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 374984817 ps |
| CPU time | 2.21 seconds |
| Started | Aug 25 09:42:22 AM UTC 24 |
| Finished | Aug 25 09:42:25 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=98277771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.98277771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.3885100011 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 671378047 ps |
| CPU time | 2.69 seconds |
| Started | Aug 25 09:42:22 AM UTC 24 |
| Finished | Aug 25 09:42:26 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3885100011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.3885100011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.3021797691 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 231529429 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:42:22 AM UTC 24 |
| Finished | Aug 25 09:42:25 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021797691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.3021797691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.460766330 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 511462646 ps |
| CPU time | 2.53 seconds |
| Started | Aug 25 09:42:22 AM UTC 24 |
| Finished | Aug 25 09:42:26 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=460766330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_tx _rx_disruption.460766330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.3091905202 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 668896873 ps |
| CPU time | 2.94 seconds |
| Started | Aug 25 09:42:22 AM UTC 24 |
| Finished | Aug 25 09:42:26 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091905202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.3091905202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.2778960111 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 462985235 ps |
| CPU time | 2.53 seconds |
| Started | Aug 25 09:42:24 AM UTC 24 |
| Finished | Aug 25 09:42:27 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2778960111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.2778960111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.3471844263 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 43674157 ps |
| CPU time | 0.97 seconds |
| Started | Aug 25 09:25:16 AM UTC 24 |
| Finished | Aug 25 09:25:18 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3471844263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.3471844263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.3765092954 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 9717003656 ps |
| CPU time | 28.27 seconds |
| Started | Aug 25 09:24:31 AM UTC 24 |
| Finished | Aug 25 09:25:01 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3765092954 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.3765092954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.1289958951 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 14089480684 ps |
| CPU time | 29.38 seconds |
| Started | Aug 25 09:24:31 AM UTC 24 |
| Finished | Aug 25 09:25:02 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1289958951 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.1289958951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.654723820 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 28521303856 ps |
| CPU time | 60.68 seconds |
| Started | Aug 25 09:24:31 AM UTC 24 |
| Finished | Aug 25 09:25:34 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=654723820 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.654723820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.4117001645 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 165278504 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:24:31 AM UTC 24 |
| Finished | Aug 25 09:24:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117001645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.4117001645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.1906600084 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 154083376 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:24:31 AM UTC 24 |
| Finished | Aug 25 09:24:34 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906600084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.1906600084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.33918796 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 246434372 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:24:31 AM UTC 24 |
| Finished | Aug 25 09:24:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=33918796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_clear.33918796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.1868117457 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 588843052 ps |
| CPU time | 3.31 seconds |
| Started | Aug 25 09:24:34 AM UTC 24 |
| Finished | Aug 25 09:24:38 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1868117457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.1868117457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.442582231 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 43671517414 ps |
| CPU time | 127.95 seconds |
| Started | Aug 25 09:24:34 AM UTC 24 |
| Finished | Aug 25 09:26:45 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=442582231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_device_address.442582231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.2229727130 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 418901925 ps |
| CPU time | 9.34 seconds |
| Started | Aug 25 09:24:34 AM UTC 24 |
| Finished | Aug 25 09:24:45 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2229727130 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.2229727130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.489839744 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 1029128472 ps |
| CPU time | 3.77 seconds |
| Started | Aug 25 09:24:35 AM UTC 24 |
| Finished | Aug 25 09:24:40 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=489839744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disable_endpoint.489839744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.1564912017 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 146664303 ps |
| CPU time | 1.13 seconds |
| Started | Aug 25 09:24:35 AM UTC 24 |
| Finished | Aug 25 09:24:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564912017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.1564912017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_enable.734840499 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 45533374 ps |
| CPU time | 0.95 seconds |
| Started | Aug 25 09:24:35 AM UTC 24 |
| Finished | Aug 25 09:24:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=734840499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_enable.734840499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.1341559788 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 924152325 ps |
| CPU time | 3.91 seconds |
| Started | Aug 25 09:24:35 AM UTC 24 |
| Finished | Aug 25 09:24:41 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341559788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.1341559788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.3993556317 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 291247130 ps |
| CPU time | 3.33 seconds |
| Started | Aug 25 09:24:39 AM UTC 24 |
| Finished | Aug 25 09:24:43 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993556317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_fifo_rst.3993556317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.1293592817 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 223681168 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:24:39 AM UTC 24 |
| Finished | Aug 25 09:24:41 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1293592817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.1293592817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.3075640575 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 174302554 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:24:40 AM UTC 24 |
| Finished | Aug 25 09:24:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075640575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.3075640575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.1121243032 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 226052118 ps |
| CPU time | 1.87 seconds |
| Started | Aug 25 09:24:41 AM UTC 24 |
| Finished | Aug 25 09:24:44 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121243032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_trans.1121243032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.3258101880 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 5013085855 ps |
| CPU time | 188.51 seconds |
| Started | Aug 25 09:24:39 AM UTC 24 |
| Finished | Aug 25 09:27:51 AM UTC 24 |
| Peak memory | 228556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258101880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.3258101880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.3228551144 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 7962245300 ps |
| CPU time | 94.78 seconds |
| Started | Aug 25 09:24:41 AM UTC 24 |
| Finished | Aug 25 09:26:18 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228551144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.3228551144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.16900636 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 236751006 ps |
| CPU time | 1.81 seconds |
| Started | Aug 25 09:24:41 AM UTC 24 |
| Finished | Aug 25 09:24:44 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=16900636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_link_in_err.16900636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.4140809140 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 9113350336 ps |
| CPU time | 25.44 seconds |
| Started | Aug 25 09:24:43 AM UTC 24 |
| Finished | Aug 25 09:25:10 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4140809140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.4140809140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.4043186108 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 4705971003 ps |
| CPU time | 15.13 seconds |
| Started | Aug 25 09:24:43 AM UTC 24 |
| Finished | Aug 25 09:24:59 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043186108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.4043186108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.885569490 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 3186568798 ps |
| CPU time | 44.04 seconds |
| Started | Aug 25 09:24:43 AM UTC 24 |
| Finished | Aug 25 09:25:29 AM UTC 24 |
| Peak memory | 235264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=885569490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.885569490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.1594718428 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 1810862182 ps |
| CPU time | 16.44 seconds |
| Started | Aug 25 09:24:44 AM UTC 24 |
| Finished | Aug 25 09:25:02 AM UTC 24 |
| Peak memory | 235112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1594718428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.1594718428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.950358364 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 244844749 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:24:46 AM UTC 24 |
| Finished | Aug 25 09:24:49 AM UTC 24 |
| Peak memory | 216020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=950358364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.950358364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.1082349701 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 219696586 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:24:46 AM UTC 24 |
| Finished | Aug 25 09:24:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1082349701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.1082349701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.2191586156 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 2889816240 ps |
| CPU time | 104.78 seconds |
| Started | Aug 25 09:24:46 AM UTC 24 |
| Finished | Aug 25 09:26:33 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191586156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.2191586156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.2483546984 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 1639454683 ps |
| CPU time | 23.93 seconds |
| Started | Aug 25 09:24:46 AM UTC 24 |
| Finished | Aug 25 09:25:11 AM UTC 24 |
| Peak memory | 235148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2483546984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.2483546984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.4030259430 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 2844667468 ps |
| CPU time | 29.57 seconds |
| Started | Aug 25 09:24:48 AM UTC 24 |
| Finished | Aug 25 09:25:19 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4030259430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.4030259430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.2760446204 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 164769580 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:24:48 AM UTC 24 |
| Finished | Aug 25 09:24:50 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760446204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.2760446204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.3180901617 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 143969715 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:24:49 AM UTC 24 |
| Finished | Aug 25 09:24:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180901617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.3180901617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.226185101 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 264629330 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:24:50 AM UTC 24 |
| Finished | Aug 25 09:24:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=226185101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_nak_trans.226185101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.3215699970 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 182024726 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:24:50 AM UTC 24 |
| Finished | Aug 25 09:24:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215699970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.3215699970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.3873078303 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 178482667 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:24:51 AM UTC 24 |
| Finished | Aug 25 09:24:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873078303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.3873078303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.701919131 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 198265109 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:24:53 AM UTC 24 |
| Finished | Aug 25 09:24:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=701919131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_out_trans_nak.701919131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.1640269010 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 195019139 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:24:54 AM UTC 24 |
| Finished | Aug 25 09:24:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1640269010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_pending_in_trans.1640269010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.107902324 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 186374293 ps |
| CPU time | 1.31 seconds |
| Started | Aug 25 09:24:54 AM UTC 24 |
| Finished | Aug 25 09:24:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=107902324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.107902324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.2286830968 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 151292883 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:24:55 AM UTC 24 |
| Finished | Aug 25 09:24:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286830968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.2286830968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.227011172 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 38642623 ps |
| CPU time | 1.04 seconds |
| Started | Aug 25 09:24:56 AM UTC 24 |
| Finished | Aug 25 09:24:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227011172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_phy_pins_sense.227011172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.3428805456 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 7662531504 ps |
| CPU time | 32.37 seconds |
| Started | Aug 25 09:24:57 AM UTC 24 |
| Finished | Aug 25 09:25:31 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428805456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.3428805456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.2555415640 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 230941251 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:24:57 AM UTC 24 |
| Finished | Aug 25 09:25:00 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555415640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_pkt_received.2555415640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.766290268 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 153805806 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:24:59 AM UTC 24 |
| Finished | Aug 25 09:25:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=766290268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_pkt_sent.766290268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.1335201157 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 3500246353 ps |
| CPU time | 34.61 seconds |
| Started | Aug 25 09:25:01 AM UTC 24 |
| Finished | Aug 25 09:25:37 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1335201157 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.1335201157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.278217424 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 3064960284 ps |
| CPU time | 29.66 seconds |
| Started | Aug 25 09:25:02 AM UTC 24 |
| Finished | Aug 25 09:25:34 AM UTC 24 |
| Peak memory | 235316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=278217424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.278217424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.1051511318 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 5294201629 ps |
| CPU time | 29.62 seconds |
| Started | Aug 25 09:25:02 AM UTC 24 |
| Finished | Aug 25 09:25:34 AM UTC 24 |
| Peak memory | 235308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051511318 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.1051511318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.3535259409 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 265528474 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:24:59 AM UTC 24 |
| Finished | Aug 25 09:25:01 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535259409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_random_length_in_transaction.3535259409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.1876945428 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 157421914 ps |
| CPU time | 1.32 seconds |
| Started | Aug 25 09:25:00 AM UTC 24 |
| Finished | Aug 25 09:25:02 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1876945428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.1876945428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.2124328206 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 20164583854 ps |
| CPU time | 46.53 seconds |
| Started | Aug 25 09:25:03 AM UTC 24 |
| Finished | Aug 25 09:25:51 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124328206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.2124328206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.653903463 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 217095695 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:25:03 AM UTC 24 |
| Finished | Aug 25 09:25:05 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=653903463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_rx_crc_err.653903463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.10627376 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 384157602 ps |
| CPU time | 2.05 seconds |
| Started | Aug 25 09:25:04 AM UTC 24 |
| Finished | Aug 25 09:25:07 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=10627376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rx_full.10627376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.3027453602 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 164763906 ps |
| CPU time | 1.13 seconds |
| Started | Aug 25 09:25:04 AM UTC 24 |
| Finished | Aug 25 09:25:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3027453602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_setup_stage.3027453602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.994126977 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 165669407 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:25:06 AM UTC 24 |
| Finished | Aug 25 09:25:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=994126977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_setup_trans_ignored.994126977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.424445295 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 195973976 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:25:07 AM UTC 24 |
| Finished | Aug 25 09:25:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=424445295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.424445295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.1355712871 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 3424027930 ps |
| CPU time | 123.81 seconds |
| Started | Aug 25 09:25:08 AM UTC 24 |
| Finished | Aug 25 09:27:15 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355712871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.1355712871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.2638630128 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 191297990 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:25:10 AM UTC 24 |
| Finished | Aug 25 09:25:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638630128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.2638630128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.3906171588 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 183112220 ps |
| CPU time | 1.55 seconds |
| Started | Aug 25 09:25:11 AM UTC 24 |
| Finished | Aug 25 09:25:14 AM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906171588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_stall_trans.3906171588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.553687482 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 1140190228 ps |
| CPU time | 4.32 seconds |
| Started | Aug 25 09:25:11 AM UTC 24 |
| Finished | Aug 25 09:25:16 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=553687482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_stream_len_max.553687482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.3872949888 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 3239852216 ps |
| CPU time | 103.83 seconds |
| Started | Aug 25 09:25:11 AM UTC 24 |
| Finished | Aug 25 09:26:57 AM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872949888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.3872949888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.3881249827 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 4296358597 ps |
| CPU time | 34.43 seconds |
| Started | Aug 25 09:24:34 AM UTC 24 |
| Finished | Aug 25 09:25:10 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881249827 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.3881249827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.3137365698 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 511573401 ps |
| CPU time | 2.22 seconds |
| Started | Aug 25 09:25:13 AM UTC 24 |
| Finished | Aug 25 09:25:17 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3137365698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.3137365698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.2026662153 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 621365434 ps |
| CPU time | 3 seconds |
| Started | Aug 25 09:42:24 AM UTC 24 |
| Finished | Aug 25 09:42:28 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2026662153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.2026662153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.3401900847 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 523475395 ps |
| CPU time | 2.93 seconds |
| Started | Aug 25 09:42:24 AM UTC 24 |
| Finished | Aug 25 09:42:28 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3401900847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.3401900847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.1780182276 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 194879813 ps |
| CPU time | 1.35 seconds |
| Started | Aug 25 09:42:24 AM UTC 24 |
| Finished | Aug 25 09:42:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1780182276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.1780182276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.1040504180 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 667417599 ps |
| CPU time | 3.19 seconds |
| Started | Aug 25 09:42:24 AM UTC 24 |
| Finished | Aug 25 09:42:28 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1040504180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_t x_rx_disruption.1040504180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.3007934555 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 543099232 ps |
| CPU time | 2.54 seconds |
| Started | Aug 25 09:42:24 AM UTC 24 |
| Finished | Aug 25 09:42:28 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007934555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.3007934555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.487456428 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 635216043 ps |
| CPU time | 2.73 seconds |
| Started | Aug 25 09:42:24 AM UTC 24 |
| Finished | Aug 25 09:42:28 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=487456428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_tx _rx_disruption.487456428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.1689219231 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 170087229 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:42:26 AM UTC 24 |
| Finished | Aug 25 09:42:28 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689219231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.1689219231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1836035221 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 566420938 ps |
| CPU time | 2.89 seconds |
| Started | Aug 25 09:42:26 AM UTC 24 |
| Finished | Aug 25 09:42:30 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1836035221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.1836035221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.4254824714 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 412291344 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:42:26 AM UTC 24 |
| Finished | Aug 25 09:42:29 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254824714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.4254824714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.642092854 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 457353931 ps |
| CPU time | 2.24 seconds |
| Started | Aug 25 09:42:26 AM UTC 24 |
| Finished | Aug 25 09:42:29 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=642092854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_tx _rx_disruption.642092854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.74643521 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 602823965 ps |
| CPU time | 2.87 seconds |
| Started | Aug 25 09:42:26 AM UTC 24 |
| Finished | Aug 25 09:42:30 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=74643521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_tx_ rx_disruption.74643521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.300463873 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 370418074 ps |
| CPU time | 2.27 seconds |
| Started | Aug 25 09:42:26 AM UTC 24 |
| Finished | Aug 25 09:42:29 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=300463873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.300463873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.3166866445 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 556969622 ps |
| CPU time | 2.78 seconds |
| Started | Aug 25 09:42:26 AM UTC 24 |
| Finished | Aug 25 09:42:30 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3166866445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.3166866445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.3742984743 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 220592542 ps |
| CPU time | 1.45 seconds |
| Started | Aug 25 09:42:26 AM UTC 24 |
| Finished | Aug 25 09:42:29 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3742984743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.3742984743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.2311241079 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 683211341 ps |
| CPU time | 3.43 seconds |
| Started | Aug 25 09:42:28 AM UTC 24 |
| Finished | Aug 25 09:42:32 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2311241079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_t x_rx_disruption.2311241079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.1846355618 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 311447287 ps |
| CPU time | 1.9 seconds |
| Started | Aug 25 09:42:28 AM UTC 24 |
| Finished | Aug 25 09:42:31 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846355618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.1846355618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.2296452506 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 472251915 ps |
| CPU time | 2.6 seconds |
| Started | Aug 25 09:42:28 AM UTC 24 |
| Finished | Aug 25 09:42:31 AM UTC 24 |
| Peak memory | 217692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2296452506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_t x_rx_disruption.2296452506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.87420882 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 428020691 ps |
| CPU time | 1.88 seconds |
| Started | Aug 25 09:42:28 AM UTC 24 |
| Finished | Aug 25 09:42:31 AM UTC 24 |
| Peak memory | 215508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=87420882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.87420882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.1785590053 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 521860836 ps |
| CPU time | 2.83 seconds |
| Started | Aug 25 09:42:28 AM UTC 24 |
| Finished | Aug 25 09:42:32 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1785590053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.1785590053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.2068985191 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 91913200 ps |
| CPU time | 1.15 seconds |
| Started | Aug 25 09:25:54 AM UTC 24 |
| Finished | Aug 25 09:25:56 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068985191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.2068985191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.2747794205 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 12317360968 ps |
| CPU time | 30 seconds |
| Started | Aug 25 09:25:16 AM UTC 24 |
| Finished | Aug 25 09:25:47 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2747794205 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.2747794205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.2942882498 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 14724072559 ps |
| CPU time | 34.03 seconds |
| Started | Aug 25 09:25:17 AM UTC 24 |
| Finished | Aug 25 09:25:53 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942882498 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.2942882498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.59768239 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 24112617986 ps |
| CPU time | 45.08 seconds |
| Started | Aug 25 09:25:17 AM UTC 24 |
| Finished | Aug 25 09:26:04 AM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=59768239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.59768239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.4129621103 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 154266413 ps |
| CPU time | 1.21 seconds |
| Started | Aug 25 09:25:17 AM UTC 24 |
| Finished | Aug 25 09:25:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4129621103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.4129621103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.3881681582 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 151249364 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:25:19 AM UTC 24 |
| Finished | Aug 25 09:25:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881681582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.3881681582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.1520504745 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 163877634 ps |
| CPU time | 1.44 seconds |
| Started | Aug 25 09:25:19 AM UTC 24 |
| Finished | Aug 25 09:25:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520504745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_data_toggle_clear.1520504745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.154808343 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 879050291 ps |
| CPU time | 4.43 seconds |
| Started | Aug 25 09:25:20 AM UTC 24 |
| Finished | Aug 25 09:25:26 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=154808343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.154808343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.4185108883 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 38032617625 ps |
| CPU time | 121.79 seconds |
| Started | Aug 25 09:25:20 AM UTC 24 |
| Finished | Aug 25 09:27:25 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4185108883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.4185108883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.2240656003 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 1183532508 ps |
| CPU time | 34.78 seconds |
| Started | Aug 25 09:25:20 AM UTC 24 |
| Finished | Aug 25 09:25:56 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240656003 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.2240656003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.1527036782 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 841477494 ps |
| CPU time | 3.98 seconds |
| Started | Aug 25 09:25:23 AM UTC 24 |
| Finished | Aug 25 09:25:28 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527036782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.1527036782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.2602604710 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 149915619 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:25:24 AM UTC 24 |
| Finished | Aug 25 09:25:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2602604710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.2602604710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_enable.2503527965 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 36065210 ps |
| CPU time | 1.13 seconds |
| Started | Aug 25 09:25:25 AM UTC 24 |
| Finished | Aug 25 09:25:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503527965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_enable.2503527965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.1537730150 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 835385671 ps |
| CPU time | 3.8 seconds |
| Started | Aug 25 09:25:27 AM UTC 24 |
| Finished | Aug 25 09:25:33 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537730150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.1537730150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.2156980478 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 300293338 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:25:27 AM UTC 24 |
| Finished | Aug 25 09:25:30 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156980478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.2156980478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.3306108494 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 201259546 ps |
| CPU time | 2.21 seconds |
| Started | Aug 25 09:25:27 AM UTC 24 |
| Finished | Aug 25 09:25:31 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306108494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_fifo_rst.3306108494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.4058424440 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 198164390 ps |
| CPU time | 1.62 seconds |
| Started | Aug 25 09:25:29 AM UTC 24 |
| Finished | Aug 25 09:25:32 AM UTC 24 |
| Peak memory | 226280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4058424440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.4058424440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.4074573894 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 154006858 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:25:30 AM UTC 24 |
| Finished | Aug 25 09:25:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074573894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.4074573894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.2926714595 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 223265028 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:25:30 AM UTC 24 |
| Finished | Aug 25 09:25:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926714595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_trans.2926714595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.1163778989 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 4998914494 ps |
| CPU time | 54.74 seconds |
| Started | Aug 25 09:25:29 AM UTC 24 |
| Finished | Aug 25 09:26:26 AM UTC 24 |
| Peak memory | 235008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1163778989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.1163778989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.1808481339 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 8608531837 ps |
| CPU time | 145.72 seconds |
| Started | Aug 25 09:25:32 AM UTC 24 |
| Finished | Aug 25 09:28:01 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808481339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.1808481339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.4045368413 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 294273896 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:25:32 AM UTC 24 |
| Finished | Aug 25 09:25:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4045368413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.4045368413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.3579479474 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 11821831331 ps |
| CPU time | 39.2 seconds |
| Started | Aug 25 09:25:32 AM UTC 24 |
| Finished | Aug 25 09:26:13 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579479474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.3579479474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.3679479201 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 4117613259 ps |
| CPU time | 11.04 seconds |
| Started | Aug 25 09:25:32 AM UTC 24 |
| Finished | Aug 25 09:25:45 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679479201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_link_suspend.3679479201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.1655516416 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 2866832770 ps |
| CPU time | 42.39 seconds |
| Started | Aug 25 09:25:32 AM UTC 24 |
| Finished | Aug 25 09:26:17 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655516416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.1655516416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.2235167297 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 3402070665 ps |
| CPU time | 48.59 seconds |
| Started | Aug 25 09:25:34 AM UTC 24 |
| Finished | Aug 25 09:26:25 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235167297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.2235167297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.2995021968 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 286868904 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:25:34 AM UTC 24 |
| Finished | Aug 25 09:25:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995021968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.2995021968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.173851761 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 208416412 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:25:34 AM UTC 24 |
| Finished | Aug 25 09:25:37 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173851761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.173851761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.58075872 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 2743449262 ps |
| CPU time | 102.18 seconds |
| Started | Aug 25 09:25:34 AM UTC 24 |
| Finished | Aug 25 09:27:19 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=58075872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.58075872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.3128368025 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 2764218158 ps |
| CPU time | 99.63 seconds |
| Started | Aug 25 09:25:34 AM UTC 24 |
| Finished | Aug 25 09:27:17 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3128368025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.3128368025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.1608583636 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 1967433686 ps |
| CPU time | 69.04 seconds |
| Started | Aug 25 09:25:36 AM UTC 24 |
| Finished | Aug 25 09:26:47 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1608583636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.1608583636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.369081000 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 178831693 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:25:36 AM UTC 24 |
| Finished | Aug 25 09:25:38 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=369081000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.369081000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.3334508888 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 157777618 ps |
| CPU time | 1.16 seconds |
| Started | Aug 25 09:25:36 AM UTC 24 |
| Finished | Aug 25 09:25:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3334508888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.3334508888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.2265711826 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 260330729 ps |
| CPU time | 1.63 seconds |
| Started | Aug 25 09:25:37 AM UTC 24 |
| Finished | Aug 25 09:25:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265711826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_nak_trans.2265711826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.2804567519 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 163905083 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:25:38 AM UTC 24 |
| Finished | Aug 25 09:25:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804567519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.2804567519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.4104142524 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 239384678 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:25:38 AM UTC 24 |
| Finished | Aug 25 09:25:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104142524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.4104142524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.2717114663 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 164822710 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:25:38 AM UTC 24 |
| Finished | Aug 25 09:25:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2717114663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.2717114663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.2503957319 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 151961491 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:25:40 AM UTC 24 |
| Finished | Aug 25 09:25:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503957319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.2503957319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.334814515 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 184488418 ps |
| CPU time | 1.58 seconds |
| Started | Aug 25 09:25:40 AM UTC 24 |
| Finished | Aug 25 09:25:42 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=334814515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.334814515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.918420203 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 223112579 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:25:40 AM UTC 24 |
| Finished | Aug 25 09:25:43 AM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=918420203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.918420203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.1089041361 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 89513160 ps |
| CPU time | 1.14 seconds |
| Started | Aug 25 09:25:41 AM UTC 24 |
| Finished | Aug 25 09:25:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089041361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.1089041361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.2551884127 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 15398572235 ps |
| CPU time | 73.74 seconds |
| Started | Aug 25 09:25:42 AM UTC 24 |
| Finished | Aug 25 09:26:58 AM UTC 24 |
| Peak memory | 228560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551884127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.2551884127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.356530544 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 222884234 ps |
| CPU time | 1.42 seconds |
| Started | Aug 25 09:25:42 AM UTC 24 |
| Finished | Aug 25 09:25:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356530544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_pkt_received.356530544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.3664542461 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 218469591 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:25:42 AM UTC 24 |
| Finished | Aug 25 09:25:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664542461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.3664542461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.81607544 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 5766264281 ps |
| CPU time | 88.28 seconds |
| Started | Aug 25 09:25:44 AM UTC 24 |
| Finished | Aug 25 09:27:14 AM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=81607544 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.81607544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.1999196649 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 7902505076 ps |
| CPU time | 252.05 seconds |
| Started | Aug 25 09:25:44 AM UTC 24 |
| Finished | Aug 25 09:30:00 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999196649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.1999196649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.406663343 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 10243860636 ps |
| CPU time | 229.62 seconds |
| Started | Aug 25 09:25:44 AM UTC 24 |
| Finished | Aug 25 09:29:38 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=406663343 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.406663343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.77346773 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 221246073 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:25:42 AM UTC 24 |
| Finished | Aug 25 09:25:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=77346773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_random_length_in_transaction.77346773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.4197406681 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 206354986 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:25:44 AM UTC 24 |
| Finished | Aug 25 09:25:46 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197406681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.4197406681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.1885441406 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 20165399722 ps |
| CPU time | 45.56 seconds |
| Started | Aug 25 09:25:46 AM UTC 24 |
| Finished | Aug 25 09:26:34 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885441406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.1885441406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.219534269 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 192126447 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:25:46 AM UTC 24 |
| Finished | Aug 25 09:25:49 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=219534269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_rx_crc_err.219534269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.3460112374 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 378620584 ps |
| CPU time | 2.29 seconds |
| Started | Aug 25 09:25:46 AM UTC 24 |
| Finished | Aug 25 09:25:50 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460112374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_rx_full.3460112374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.733516363 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 162968325 ps |
| CPU time | 1.13 seconds |
| Started | Aug 25 09:25:46 AM UTC 24 |
| Finished | Aug 25 09:25:49 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=733516363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_setup_stage.733516363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.3658603680 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 212578680 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:25:47 AM UTC 24 |
| Finished | Aug 25 09:25:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3658603680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.3658603680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.3626023795 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 217619493 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:25:49 AM UTC 24 |
| Finished | Aug 25 09:25:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626023795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.3626023795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.2478065489 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 2641646291 ps |
| CPU time | 101.96 seconds |
| Started | Aug 25 09:25:50 AM UTC 24 |
| Finished | Aug 25 09:27:35 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2478065489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.2478065489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.1480489116 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 166214899 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:25:50 AM UTC 24 |
| Finished | Aug 25 09:25:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1480489116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.1480489116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.352603495 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 174396727 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:25:51 AM UTC 24 |
| Finished | Aug 25 09:25:54 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=352603495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_stall_trans.352603495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.3902449073 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 344058762 ps |
| CPU time | 2.26 seconds |
| Started | Aug 25 09:25:51 AM UTC 24 |
| Finished | Aug 25 09:25:55 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3902449073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.3902449073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.3701905621 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 2289135743 ps |
| CPU time | 27.53 seconds |
| Started | Aug 25 09:25:51 AM UTC 24 |
| Finished | Aug 25 09:26:21 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701905621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.3701905621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.686222612 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 7702613512 ps |
| CPU time | 66.95 seconds |
| Started | Aug 25 09:25:23 AM UTC 24 |
| Finished | Aug 25 09:26:32 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=686222612 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.686222612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.1785257746 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 545608825 ps |
| CPU time | 2.73 seconds |
| Started | Aug 25 09:25:53 AM UTC 24 |
| Finished | Aug 25 09:25:57 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1785257746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx _rx_disruption.1785257746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.2749821670 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 298066930 ps |
| CPU time | 1.23 seconds |
| Started | Aug 25 09:42:28 AM UTC 24 |
| Finished | Aug 25 09:42:30 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2749821670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.2749821670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.1482123388 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 573951525 ps |
| CPU time | 3.14 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:34 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1482123388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_t x_rx_disruption.1482123388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.68537304 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 453314305 ps |
| CPU time | 2.38 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:33 AM UTC 24 |
| Peak memory | 217912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=68537304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.68537304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.2892928128 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 528659215 ps |
| CPU time | 3.07 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:34 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2892928128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_t x_rx_disruption.2892928128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.3675515755 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 306588733 ps |
| CPU time | 2.06 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:33 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675515755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.3675515755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.1634062123 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 522173207 ps |
| CPU time | 2.59 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:34 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1634062123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_t x_rx_disruption.1634062123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.2024005210 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 150864096 ps |
| CPU time | 1.38 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:33 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2024005210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.2024005210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.1498759048 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 674416001 ps |
| CPU time | 3.06 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:34 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1498759048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.1498759048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.2256134874 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 488639532 ps |
| CPU time | 2.47 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:34 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256134874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.2256134874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.3652644532 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 453331049 ps |
| CPU time | 2.8 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:34 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3652644532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.3652644532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.2706621849 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 176433677 ps |
| CPU time | 1.36 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:33 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706621849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.2706621849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.915016775 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 454162107 ps |
| CPU time | 2.66 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:34 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=915016775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_tx _rx_disruption.915016775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.974273768 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 280460145 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:42:30 AM UTC 24 |
| Finished | Aug 25 09:42:33 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=974273768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.974273768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.884303484 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 543338577 ps |
| CPU time | 3.1 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=884303484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_tx _rx_disruption.884303484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.860539652 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 645404968 ps |
| CPU time | 2.73 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=860539652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.860539652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.1805645181 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 631350168 ps |
| CPU time | 2.46 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1805645181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_t x_rx_disruption.1805645181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.2249165538 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 295820147 ps |
| CPU time | 1.88 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:36 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249165538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.2249165538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.938115048 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 525064583 ps |
| CPU time | 2.52 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=938115048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_tx _rx_disruption.938115048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.1507016303 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 208511786 ps |
| CPU time | 1.53 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:36 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507016303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.1507016303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.1897810199 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 599022053 ps |
| CPU time | 3.11 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1897810199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_t x_rx_disruption.1897810199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.3983109172 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 49235055 ps |
| CPU time | 1.08 seconds |
| Started | Aug 25 09:26:39 AM UTC 24 |
| Finished | Aug 25 09:26:41 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3983109172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.3983109172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.3513663425 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 5552861781 ps |
| CPU time | 15.72 seconds |
| Started | Aug 25 09:25:55 AM UTC 24 |
| Finished | Aug 25 09:26:12 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3513663425 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.3513663425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.1402848566 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 18419083997 ps |
| CPU time | 41.14 seconds |
| Started | Aug 25 09:25:55 AM UTC 24 |
| Finished | Aug 25 09:26:38 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1402848566 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.1402848566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.2766161291 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 29107189214 ps |
| CPU time | 66.53 seconds |
| Started | Aug 25 09:25:57 AM UTC 24 |
| Finished | Aug 25 09:27:05 AM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766161291 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.2766161291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.1167171274 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 169866334 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:25:57 AM UTC 24 |
| Finished | Aug 25 09:25:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167171274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.1167171274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.678489175 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 136080757 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:25:58 AM UTC 24 |
| Finished | Aug 25 09:26:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=678489175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_bitstuff_err.678489175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.1458215244 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 281623245 ps |
| CPU time | 2.02 seconds |
| Started | Aug 25 09:25:58 AM UTC 24 |
| Finished | Aug 25 09:26:01 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458215244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.1458215244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.1988780010 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 1242488087 ps |
| CPU time | 5.35 seconds |
| Started | Aug 25 09:25:58 AM UTC 24 |
| Finished | Aug 25 09:26:04 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988780010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.1988780010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.2043851854 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 37205764482 ps |
| CPU time | 118.92 seconds |
| Started | Aug 25 09:26:00 AM UTC 24 |
| Finished | Aug 25 09:28:02 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2043851854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.2043851854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.1038372243 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 4311924282 ps |
| CPU time | 50.83 seconds |
| Started | Aug 25 09:26:01 AM UTC 24 |
| Finished | Aug 25 09:26:54 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038372243 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.1038372243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.2363573541 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 581449693 ps |
| CPU time | 3.04 seconds |
| Started | Aug 25 09:26:03 AM UTC 24 |
| Finished | Aug 25 09:26:07 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363573541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.2363573541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.2715062269 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 136924918 ps |
| CPU time | 1.11 seconds |
| Started | Aug 25 09:26:03 AM UTC 24 |
| Finished | Aug 25 09:26:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2715062269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_disconnected.2715062269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_enable.2350476421 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 60862334 ps |
| CPU time | 0.93 seconds |
| Started | Aug 25 09:26:04 AM UTC 24 |
| Finished | Aug 25 09:26:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350476421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.2350476421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.4052651098 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 743672572 ps |
| CPU time | 3.21 seconds |
| Started | Aug 25 09:26:06 AM UTC 24 |
| Finished | Aug 25 09:26:10 AM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052651098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.4052651098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.3872881931 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 330083870 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:26:07 AM UTC 24 |
| Finished | Aug 25 09:26:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872881931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.3872881931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.2498317011 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 249154567 ps |
| CPU time | 2.79 seconds |
| Started | Aug 25 09:26:07 AM UTC 24 |
| Finished | Aug 25 09:26:11 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2498317011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_fifo_rst.2498317011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.2201868134 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 233269469 ps |
| CPU time | 1.94 seconds |
| Started | Aug 25 09:26:10 AM UTC 24 |
| Finished | Aug 25 09:26:13 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2201868134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.2201868134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.3286725682 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 143592446 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:26:11 AM UTC 24 |
| Finished | Aug 25 09:26:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3286725682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.3286725682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.4209772221 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 250974700 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:26:11 AM UTC 24 |
| Finished | Aug 25 09:26:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4209772221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_trans.4209772221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.1116039108 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 4666366631 ps |
| CPU time | 62.32 seconds |
| Started | Aug 25 09:26:08 AM UTC 24 |
| Finished | Aug 25 09:27:12 AM UTC 24 |
| Peak memory | 235280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116039108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.1116039108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.4139322305 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 12807200930 ps |
| CPU time | 126.82 seconds |
| Started | Aug 25 09:26:14 AM UTC 24 |
| Finished | Aug 25 09:28:23 AM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139322305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.4139322305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.4137737490 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 267579925 ps |
| CPU time | 1.65 seconds |
| Started | Aug 25 09:26:14 AM UTC 24 |
| Finished | Aug 25 09:26:16 AM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4137737490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_in_err.4137737490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.282316959 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 28224315823 ps |
| CPU time | 100.14 seconds |
| Started | Aug 25 09:26:14 AM UTC 24 |
| Finished | Aug 25 09:27:56 AM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=282316959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_link_resume.282316959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.3782197130 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 3457634266 ps |
| CPU time | 11.62 seconds |
| Started | Aug 25 09:26:15 AM UTC 24 |
| Finished | Aug 25 09:26:28 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782197130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_link_suspend.3782197130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.1893664997 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 5005915119 ps |
| CPU time | 68.57 seconds |
| Started | Aug 25 09:26:15 AM UTC 24 |
| Finished | Aug 25 09:27:26 AM UTC 24 |
| Peak memory | 232584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893664997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.1893664997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.167571995 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 3408742242 ps |
| CPU time | 44.32 seconds |
| Started | Aug 25 09:26:15 AM UTC 24 |
| Finished | Aug 25 09:27:01 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=167571995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.167571995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.3661206524 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 243285019 ps |
| CPU time | 1.47 seconds |
| Started | Aug 25 09:26:18 AM UTC 24 |
| Finished | Aug 25 09:26:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661206524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.3661206524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.241970837 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 213585373 ps |
| CPU time | 1.84 seconds |
| Started | Aug 25 09:26:18 AM UTC 24 |
| Finished | Aug 25 09:26:21 AM UTC 24 |
| Peak memory | 216244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=241970837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.241970837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.1694977142 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 2751307349 ps |
| CPU time | 35.51 seconds |
| Started | Aug 25 09:26:18 AM UTC 24 |
| Finished | Aug 25 09:26:55 AM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694977142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.1694977142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.1454717461 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 2140193644 ps |
| CPU time | 17.82 seconds |
| Started | Aug 25 09:26:20 AM UTC 24 |
| Finished | Aug 25 09:26:39 AM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454717461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.1454717461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.1367551246 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 3226685111 ps |
| CPU time | 40.85 seconds |
| Started | Aug 25 09:26:20 AM UTC 24 |
| Finished | Aug 25 09:27:02 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367551246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.1367551246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.222310092 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 149380121 ps |
| CPU time | 1.5 seconds |
| Started | Aug 25 09:26:20 AM UTC 24 |
| Finished | Aug 25 09:26:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=222310092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.222310092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.3095809006 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 166345733 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:26:23 AM UTC 24 |
| Finished | Aug 25 09:26:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3095809006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.3095809006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.742680956 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 227204347 ps |
| CPU time | 1.86 seconds |
| Started | Aug 25 09:26:23 AM UTC 24 |
| Finished | Aug 25 09:26:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=742680956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_nak_trans.742680956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.1008354124 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 187952011 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:26:23 AM UTC 24 |
| Finished | Aug 25 09:26:26 AM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008354124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.1008354124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.1234943764 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 214285288 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:26:23 AM UTC 24 |
| Finished | Aug 25 09:26:26 AM UTC 24 |
| Peak memory | 216040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1234943764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_out_stall.1234943764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.1660134710 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 170481682 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:26:26 AM UTC 24 |
| Finished | Aug 25 09:26:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660134710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.1660134710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.1296921055 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 145580846 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:26:26 AM UTC 24 |
| Finished | Aug 25 09:26:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296921055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.1296921055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.4152870189 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 232678885 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:26:26 AM UTC 24 |
| Finished | Aug 25 09:26:29 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152870189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.4152870189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.2602011180 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 187399380 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:26:27 AM UTC 24 |
| Finished | Aug 25 09:26:30 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2602011180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.2602011180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.3897525196 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 55069577 ps |
| CPU time | 1.03 seconds |
| Started | Aug 25 09:26:27 AM UTC 24 |
| Finished | Aug 25 09:26:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897525196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.3897525196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.303266953 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 17343874765 ps |
| CPU time | 82.64 seconds |
| Started | Aug 25 09:26:27 AM UTC 24 |
| Finished | Aug 25 09:27:52 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=303266953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_pkt_buffer.303266953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.877222229 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 183158358 ps |
| CPU time | 1.59 seconds |
| Started | Aug 25 09:26:28 AM UTC 24 |
| Finished | Aug 25 09:26:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=877222229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_pkt_received.877222229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.3295674554 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 183588777 ps |
| CPU time | 1.25 seconds |
| Started | Aug 25 09:26:28 AM UTC 24 |
| Finished | Aug 25 09:26:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295674554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.3295674554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.510918796 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 3248489156 ps |
| CPU time | 31.32 seconds |
| Started | Aug 25 09:26:29 AM UTC 24 |
| Finished | Aug 25 09:27:02 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=510918796 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.510918796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.2816909779 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 7290108788 ps |
| CPU time | 54.24 seconds |
| Started | Aug 25 09:26:30 AM UTC 24 |
| Finished | Aug 25 09:27:26 AM UTC 24 |
| Peak memory | 235192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816909779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.2816909779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.4007955919 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 17964555906 ps |
| CPU time | 152.88 seconds |
| Started | Aug 25 09:26:30 AM UTC 24 |
| Finished | Aug 25 09:29:06 AM UTC 24 |
| Peak memory | 235252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4007955919 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.4007955919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.178848294 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 216384321 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:26:29 AM UTC 24 |
| Finished | Aug 25 09:26:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=178848294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_random_length_in_transaction.178848294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.3709732210 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 161726102 ps |
| CPU time | 1.27 seconds |
| Started | Aug 25 09:26:29 AM UTC 24 |
| Finished | Aug 25 09:26:31 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709732210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.3709732210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.2037383405 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 20154554163 ps |
| CPU time | 49.67 seconds |
| Started | Aug 25 09:26:31 AM UTC 24 |
| Finished | Aug 25 09:27:23 AM UTC 24 |
| Peak memory | 217884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037383405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.2037383405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.2688685521 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 152929106 ps |
| CPU time | 1.19 seconds |
| Started | Aug 25 09:26:32 AM UTC 24 |
| Finished | Aug 25 09:26:34 AM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688685521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.2688685521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.1108129754 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 295575755 ps |
| CPU time | 1.85 seconds |
| Started | Aug 25 09:26:32 AM UTC 24 |
| Finished | Aug 25 09:26:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108129754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_rx_full.1108129754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.3469388398 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 159095892 ps |
| CPU time | 1.3 seconds |
| Started | Aug 25 09:26:33 AM UTC 24 |
| Finished | Aug 25 09:26:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469388398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.3469388398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.1122560919 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 207670176 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:26:33 AM UTC 24 |
| Finished | Aug 25 09:26:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122560919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.1122560919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.1935694571 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 211886377 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:26:33 AM UTC 24 |
| Finished | Aug 25 09:26:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1935694571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.1935694571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.2386471263 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 2024583797 ps |
| CPU time | 27.57 seconds |
| Started | Aug 25 09:26:35 AM UTC 24 |
| Finished | Aug 25 09:27:04 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386471263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.2386471263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.3103909743 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 202564769 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:26:35 AM UTC 24 |
| Finished | Aug 25 09:26:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3103909743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.3103909743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.1016040540 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 175577097 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:26:35 AM UTC 24 |
| Finished | Aug 25 09:26:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016040540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.1016040540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.3084001136 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 325203894 ps |
| CPU time | 2.01 seconds |
| Started | Aug 25 09:26:35 AM UTC 24 |
| Finished | Aug 25 09:26:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084001136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.3084001136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.3076639852 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 3545568901 ps |
| CPU time | 123.76 seconds |
| Started | Aug 25 09:26:35 AM UTC 24 |
| Finished | Aug 25 09:28:42 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076639852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.3076639852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.4156407708 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 1450475813 ps |
| CPU time | 43.6 seconds |
| Started | Aug 25 09:26:02 AM UTC 24 |
| Finished | Aug 25 09:26:47 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156407708 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.4156407708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.3539788551 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 512146786 ps |
| CPU time | 2.47 seconds |
| Started | Aug 25 09:26:37 AM UTC 24 |
| Finished | Aug 25 09:26:40 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3539788551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.3539788551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.404856841 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 340143187 ps |
| CPU time | 2.2 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=404856841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.404856841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.1791293713 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 467355365 ps |
| CPU time | 2.66 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1791293713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_t x_rx_disruption.1791293713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.425284697 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 656725222 ps |
| CPU time | 2.84 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=425284697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.425284697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.2956367419 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 477836889 ps |
| CPU time | 2.05 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2956367419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_t x_rx_disruption.2956367419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.1474358228 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 417976163 ps |
| CPU time | 2.62 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474358228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.1474358228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.3376680351 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 480741478 ps |
| CPU time | 2.42 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:37 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3376680351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.3376680351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.3283741459 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 181784708 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:42:33 AM UTC 24 |
| Finished | Aug 25 09:42:36 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283741459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.3283741459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.4222743001 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 598759917 ps |
| CPU time | 2.99 seconds |
| Started | Aug 25 09:42:35 AM UTC 24 |
| Finished | Aug 25 09:42:40 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4222743001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.4222743001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.953428151 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 207122489 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:42:35 AM UTC 24 |
| Finished | Aug 25 09:42:38 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=953428151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.953428151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.709726156 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 567677910 ps |
| CPU time | 2.55 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:39 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=709726156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_tx _rx_disruption.709726156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.2286705447 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 310372171 ps |
| CPU time | 1.78 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:39 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286705447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.2286705447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.1943064293 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 547564191 ps |
| CPU time | 3.07 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:40 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1943064293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.1943064293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.3813057061 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 516571138 ps |
| CPU time | 1.75 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:39 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813057061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.3813057061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.2434761629 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 514909146 ps |
| CPU time | 2.72 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:40 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2434761629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_t x_rx_disruption.2434761629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.3431540382 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 231439387 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:39 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431540382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.3431540382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.1206512078 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 553012310 ps |
| CPU time | 2.55 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:40 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1206512078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.1206512078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.2795529107 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 507134719 ps |
| CPU time | 2.38 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:39 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2795529107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.2795529107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.453516093 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 494933690 ps |
| CPU time | 1.74 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=453516093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_tx _rx_disruption.453516093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.1596110457 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 413557480 ps |
| CPU time | 1.76 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:39 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1596110457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_t x_rx_disruption.1596110457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.1815303655 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 50212054 ps |
| CPU time | 1.09 seconds |
| Started | Aug 25 09:27:18 AM UTC 24 |
| Finished | Aug 25 09:27:20 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815303655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.1815303655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.2523325884 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 5997382979 ps |
| CPU time | 19.24 seconds |
| Started | Aug 25 09:26:39 AM UTC 24 |
| Finished | Aug 25 09:27:00 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2523325884 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.2523325884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.3398086774 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 14070386762 ps |
| CPU time | 35.4 seconds |
| Started | Aug 25 09:26:39 AM UTC 24 |
| Finished | Aug 25 09:27:16 AM UTC 24 |
| Peak memory | 228468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398086774 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.3398086774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.127110369 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 29742644083 ps |
| CPU time | 62.88 seconds |
| Started | Aug 25 09:26:39 AM UTC 24 |
| Finished | Aug 25 09:27:44 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=127110369 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.127110369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.453925838 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 237032315 ps |
| CPU time | 1.57 seconds |
| Started | Aug 25 09:26:39 AM UTC 24 |
| Finished | Aug 25 09:26:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=453925838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_av_buffer.453925838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.1671979894 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 158572292 ps |
| CPU time | 1.41 seconds |
| Started | Aug 25 09:26:39 AM UTC 24 |
| Finished | Aug 25 09:26:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671979894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.1671979894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.936309163 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 677829523 ps |
| CPU time | 3.84 seconds |
| Started | Aug 25 09:26:41 AM UTC 24 |
| Finished | Aug 25 09:26:46 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=936309163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_data_toggle_clear.936309163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.1684774072 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 374736743 ps |
| CPU time | 2.23 seconds |
| Started | Aug 25 09:26:41 AM UTC 24 |
| Finished | Aug 25 09:26:44 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684774072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.1684774072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.170209779 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 1193960358 ps |
| CPU time | 31.78 seconds |
| Started | Aug 25 09:26:42 AM UTC 24 |
| Finished | Aug 25 09:27:15 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=170209779 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.170209779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.4284919220 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 808391929 ps |
| CPU time | 3.55 seconds |
| Started | Aug 25 09:26:43 AM UTC 24 |
| Finished | Aug 25 09:26:48 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284919220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.4284919220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.261935639 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 144064337 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:26:44 AM UTC 24 |
| Finished | Aug 25 09:26:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=261935639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_disconnected.261935639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_enable.1621531851 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 46320798 ps |
| CPU time | 1.13 seconds |
| Started | Aug 25 09:26:46 AM UTC 24 |
| Finished | Aug 25 09:26:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621531851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_enable.1621531851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.3365711798 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 900924474 ps |
| CPU time | 4.59 seconds |
| Started | Aug 25 09:26:46 AM UTC 24 |
| Finished | Aug 25 09:26:52 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365711798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.3365711798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.2360972428 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 375968810 ps |
| CPU time | 2.18 seconds |
| Started | Aug 25 09:26:48 AM UTC 24 |
| Finished | Aug 25 09:26:51 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360972428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.2360972428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.3920605593 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 286846236 ps |
| CPU time | 3.03 seconds |
| Started | Aug 25 09:26:48 AM UTC 24 |
| Finished | Aug 25 09:26:52 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920605593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_fifo_rst.3920605593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.3802594245 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 184751649 ps |
| CPU time | 1.7 seconds |
| Started | Aug 25 09:26:49 AM UTC 24 |
| Finished | Aug 25 09:26:52 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802594245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.3802594245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.291215746 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 139810669 ps |
| CPU time | 1.28 seconds |
| Started | Aug 25 09:26:49 AM UTC 24 |
| Finished | Aug 25 09:26:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=291215746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_in_stall.291215746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.4057627417 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 217437486 ps |
| CPU time | 1.61 seconds |
| Started | Aug 25 09:26:50 AM UTC 24 |
| Finished | Aug 25 09:26:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057627417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_trans.4057627417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.2871392508 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 3277758042 ps |
| CPU time | 121.55 seconds |
| Started | Aug 25 09:26:48 AM UTC 24 |
| Finished | Aug 25 09:28:52 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871392508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.2871392508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.3235612789 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 8651261480 ps |
| CPU time | 151.59 seconds |
| Started | Aug 25 09:26:51 AM UTC 24 |
| Finished | Aug 25 09:29:26 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3235612789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.3235612789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.3428842634 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 186319354 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:26:53 AM UTC 24 |
| Finished | Aug 25 09:26:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428842634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_in_err.3428842634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.1144204212 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 9030841571 ps |
| CPU time | 23.75 seconds |
| Started | Aug 25 09:26:53 AM UTC 24 |
| Finished | Aug 25 09:27:18 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144204212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.1144204212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.2107046946 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 3797316898 ps |
| CPU time | 12.02 seconds |
| Started | Aug 25 09:26:53 AM UTC 24 |
| Finished | Aug 25 09:27:06 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107046946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.2107046946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.3630594846 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 4534246502 ps |
| CPU time | 172.59 seconds |
| Started | Aug 25 09:26:54 AM UTC 24 |
| Finished | Aug 25 09:29:50 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630594846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.3630594846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.2515354060 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 2465102012 ps |
| CPU time | 91.28 seconds |
| Started | Aug 25 09:26:54 AM UTC 24 |
| Finished | Aug 25 09:28:27 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515354060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.2515354060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.527707339 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 245036697 ps |
| CPU time | 1.79 seconds |
| Started | Aug 25 09:26:55 AM UTC 24 |
| Finished | Aug 25 09:26:58 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=527707339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.527707339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.1067066506 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 196332645 ps |
| CPU time | 1.43 seconds |
| Started | Aug 25 09:26:56 AM UTC 24 |
| Finished | Aug 25 09:26:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067066506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.1067066506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.824086908 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 2631796734 ps |
| CPU time | 34.56 seconds |
| Started | Aug 25 09:26:56 AM UTC 24 |
| Finished | Aug 25 09:27:32 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=824086908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.824086908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.1955760313 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 3307329105 ps |
| CPU time | 41.6 seconds |
| Started | Aug 25 09:26:58 AM UTC 24 |
| Finished | Aug 25 09:27:42 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1955760313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.1955760313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.4059056315 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 1589333743 ps |
| CPU time | 55.67 seconds |
| Started | Aug 25 09:26:58 AM UTC 24 |
| Finished | Aug 25 09:27:56 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059056315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.4059056315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.2066300340 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 164097711 ps |
| CPU time | 1.49 seconds |
| Started | Aug 25 09:27:00 AM UTC 24 |
| Finished | Aug 25 09:27:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066300340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.2066300340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.1996751256 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 207238122 ps |
| CPU time | 1.6 seconds |
| Started | Aug 25 09:27:00 AM UTC 24 |
| Finished | Aug 25 09:27:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1996751256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.1996751256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.3716352857 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 244365315 ps |
| CPU time | 1.8 seconds |
| Started | Aug 25 09:27:00 AM UTC 24 |
| Finished | Aug 25 09:27:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3716352857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.3716352857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.4002092070 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 167528452 ps |
| CPU time | 1.46 seconds |
| Started | Aug 25 09:27:03 AM UTC 24 |
| Finished | Aug 25 09:27:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002092070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_out_iso.4002092070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.1458373228 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 185581652 ps |
| CPU time | 1.66 seconds |
| Started | Aug 25 09:27:03 AM UTC 24 |
| Finished | Aug 25 09:27:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458373228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.1458373228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.127948623 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 183468444 ps |
| CPU time | 1.37 seconds |
| Started | Aug 25 09:27:03 AM UTC 24 |
| Finished | Aug 25 09:27:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=127948623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_out_trans_nak.127948623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.2234269716 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 226605741 ps |
| CPU time | 1.56 seconds |
| Started | Aug 25 09:27:04 AM UTC 24 |
| Finished | Aug 25 09:27:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234269716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.2234269716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.3834896283 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 232682043 ps |
| CPU time | 1.72 seconds |
| Started | Aug 25 09:27:04 AM UTC 24 |
| Finished | Aug 25 09:27:07 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834896283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.3834896283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.518295434 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 147136465 ps |
| CPU time | 1.26 seconds |
| Started | Aug 25 09:27:05 AM UTC 24 |
| Finished | Aug 25 09:27:07 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=518295434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.518295434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.2052232687 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 37297747 ps |
| CPU time | 0.96 seconds |
| Started | Aug 25 09:27:05 AM UTC 24 |
| Finished | Aug 25 09:27:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2052232687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.2052232687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.2881370603 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 18576041946 ps |
| CPU time | 88.51 seconds |
| Started | Aug 25 09:27:06 AM UTC 24 |
| Finished | Aug 25 09:28:38 AM UTC 24 |
| Peak memory | 227820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881370603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.2881370603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.3129602001 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 155981238 ps |
| CPU time | 1.34 seconds |
| Started | Aug 25 09:27:06 AM UTC 24 |
| Finished | Aug 25 09:27:09 AM UTC 24 |
| Peak memory | 215676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129602001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.3129602001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.3907831544 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 211833727 ps |
| CPU time | 1.48 seconds |
| Started | Aug 25 09:27:06 AM UTC 24 |
| Finished | Aug 25 09:27:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907831544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_pkt_sent.3907831544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.3176603655 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 2936605058 ps |
| CPU time | 90.57 seconds |
| Started | Aug 25 09:27:08 AM UTC 24 |
| Finished | Aug 25 09:28:41 AM UTC 24 |
| Peak memory | 230476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3176603655 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.3176603655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.4127760820 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 6890885873 ps |
| CPU time | 41 seconds |
| Started | Aug 25 09:27:08 AM UTC 24 |
| Finished | Aug 25 09:27:51 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4127760820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.4127760820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.1375775138 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 10001416331 ps |
| CPU time | 239.68 seconds |
| Started | Aug 25 09:27:08 AM UTC 24 |
| Finished | Aug 25 09:31:13 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375775138 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.1375775138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.595802582 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 211662892 ps |
| CPU time | 1.54 seconds |
| Started | Aug 25 09:27:07 AM UTC 24 |
| Finished | Aug 25 09:27:09 AM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=595802582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_random_length_in_transaction.595802582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.3626052973 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 164644917 ps |
| CPU time | 1.4 seconds |
| Started | Aug 25 09:27:07 AM UTC 24 |
| Finished | Aug 25 09:27:09 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626052973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.3626052973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.55238034 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 20159744919 ps |
| CPU time | 59.41 seconds |
| Started | Aug 25 09:27:08 AM UTC 24 |
| Finished | Aug 25 09:28:10 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=55238034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_resume_link_active.55238034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.1282167243 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 160878745 ps |
| CPU time | 1.52 seconds |
| Started | Aug 25 09:27:10 AM UTC 24 |
| Finished | Aug 25 09:27:13 AM UTC 24 |
| Peak memory | 216012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282167243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_rx_crc_err.1282167243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.1433678398 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 392769624 ps |
| CPU time | 2.72 seconds |
| Started | Aug 25 09:27:10 AM UTC 24 |
| Finished | Aug 25 09:27:14 AM UTC 24 |
| Peak memory | 217888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433678398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.1433678398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.3444117090 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 176050403 ps |
| CPU time | 1.51 seconds |
| Started | Aug 25 09:27:10 AM UTC 24 |
| Finished | Aug 25 09:27:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444117090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.3444117090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.1889172382 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 158449417 ps |
| CPU time | 1.29 seconds |
| Started | Aug 25 09:27:10 AM UTC 24 |
| Finished | Aug 25 09:27:13 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889172382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 9.usbdev_setup_trans_ignored.1889172382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.911514079 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 257503205 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:27:14 AM UTC 24 |
| Finished | Aug 25 09:27:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911514079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.911514079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.1809598401 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 2382044075 ps |
| CPU time | 83.51 seconds |
| Started | Aug 25 09:27:14 AM UTC 24 |
| Finished | Aug 25 09:28:40 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1809598401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.1809598401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.2977170822 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 171982710 ps |
| CPU time | 1.33 seconds |
| Started | Aug 25 09:27:14 AM UTC 24 |
| Finished | Aug 25 09:27:17 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977170822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.2977170822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.3453356602 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 175935326 ps |
| CPU time | 1.22 seconds |
| Started | Aug 25 09:27:14 AM UTC 24 |
| Finished | Aug 25 09:27:17 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453356602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_stall_trans.3453356602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.3960142988 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 842580781 ps |
| CPU time | 4.33 seconds |
| Started | Aug 25 09:27:15 AM UTC 24 |
| Finished | Aug 25 09:27:21 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960142988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.3960142988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1232023447 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 1779974507 ps |
| CPU time | 66.51 seconds |
| Started | Aug 25 09:27:15 AM UTC 24 |
| Finished | Aug 25 09:28:24 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232023447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.1232023447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3644282507 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 313079779 ps |
| CPU time | 5.56 seconds |
| Started | Aug 25 09:26:43 AM UTC 24 |
| Finished | Aug 25 09:26:50 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3644282507 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.3644282507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.3032876205 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 556236144 ps |
| CPU time | 3.01 seconds |
| Started | Aug 25 09:27:17 AM UTC 24 |
| Finished | Aug 25 09:27:21 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3032876205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.3032876205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.3152261703 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 287029319 ps |
| CPU time | 1.91 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:40 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152261703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.3152261703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3860112385 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 594292389 ps |
| CPU time | 2.96 seconds |
| Started | Aug 25 09:42:36 AM UTC 24 |
| Finished | Aug 25 09:42:40 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3860112385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.3860112385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.536899017 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 251440220 ps |
| CPU time | 1.67 seconds |
| Started | Aug 25 09:42:39 AM UTC 24 |
| Finished | Aug 25 09:42:42 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=536899017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.536899017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.3933805263 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 606947498 ps |
| CPU time | 3.04 seconds |
| Started | Aug 25 09:42:39 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3933805263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_t x_rx_disruption.3933805263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.1503052649 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 567361164 ps |
| CPU time | 2.79 seconds |
| Started | Aug 25 09:42:39 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503052649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.1503052649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1475377484 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 588238790 ps |
| CPU time | 2.63 seconds |
| Started | Aug 25 09:42:39 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1475377484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.1475377484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.2523969460 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 516006924 ps |
| CPU time | 2.14 seconds |
| Started | Aug 25 09:42:39 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2523969460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.2523969460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.4161443958 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 606158243 ps |
| CPU time | 2.99 seconds |
| Started | Aug 25 09:42:39 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4161443958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.4161443958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.2918764638 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 576801134 ps |
| CPU time | 2.87 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2918764638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_t x_rx_disruption.2918764638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1511371817 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 466625183 ps |
| CPU time | 2 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1511371817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.1511371817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.354147072 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 372551249 ps |
| CPU time | 2.43 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=354147072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.354147072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.79657321 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 532881000 ps |
| CPU time | 2.9 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=79657321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_tx_ rx_disruption.79657321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.691512824 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 160700683 ps |
| CPU time | 1.39 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=691512824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.691512824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.1919981154 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 490159602 ps |
| CPU time | 2.38 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1919981154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_t x_rx_disruption.1919981154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.972944344 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 368457494 ps |
| CPU time | 2.24 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 217920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=972944344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.972944344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.3499890873 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 491665163 ps |
| CPU time | 2.34 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3499890873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.3499890873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.207856651 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 395908751 ps |
| CPU time | 2.03 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:43 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=207856651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.207856651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.2355945599 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 610523303 ps |
| CPU time | 2.56 seconds |
| Started | Aug 25 09:42:40 AM UTC 24 |
| Finished | Aug 25 09:42:44 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2355945599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_t x_rx_disruption.2355945599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |