Total Coverage Summary 

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
96.82	98.16	96.01	97.44	96.61	98.38	98.17	92.94

Total tests in report: 3724

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Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
69.25	69.25	85.24	85.24	66.37	66.37	81.88	81.88	59.32	59.32	79.55	79.55	90.85	90.85	21.54	21.54	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.2726305060
79.16	9.91	91.15	5.91	84.98	18.61	86.57	4.69	61.02	1.69	94.57	15.01	93.29	2.44	42.53	21.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.2267039136
81.43	2.28	91.85	0.70	85.10	0.12	88.91	2.35	61.02	0.00	94.57	0.00	93.29	0.00	55.29	12.76	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.1984530413
83.42	1.98	95.21	3.35	86.45	1.35	90.19	1.28	64.41	3.39	95.64	1.08	93.29	0.00	58.73	3.44	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3188631660
84.88	1.46	95.43	0.23	88.57	2.12	90.62	0.43	69.49	5.08	95.94	0.29	93.29	0.00	60.81	2.08	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.1667879775
85.84	0.97	95.66	0.23	88.99	0.43	91.26	0.64	74.58	5.08	96.23	0.29	93.29	0.00	60.90	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.365921548
86.77	0.93	96.42	0.76	89.85	0.86	92.11	0.85	74.58	0.00	96.27	0.04	94.31	1.02	63.89	2.99	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.4259891971
87.42	0.64	96.44	0.02	89.92	0.07	95.74	3.62	74.58	0.00	96.31	0.04	94.51	0.20	64.43	0.54	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.2769620480
87.96	0.55	96.61	0.17	90.02	0.10	95.74	0.00	77.97	3.39	96.47	0.17	94.51	0.00	64.43	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.808248033
88.50	0.53	96.72	0.11	90.09	0.07	95.74	0.00	81.36	3.39	96.64	0.17	94.51	0.00	64.43	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.92734443
88.99	0.49	96.74	0.02	90.18	0.10	95.74	0.00	81.36	0.00	96.68	0.04	96.34	1.83	65.88	1.45	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.3830736460
89.47	0.48	96.74	0.00	90.18	0.00	95.74	0.00	84.75	3.39	96.68	0.00	96.34	0.00	65.88	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.786482545
89.91	0.43	97.48	0.74	91.32	1.14	95.74	0.00	84.75	0.00	97.84	1.16	96.34	0.00	65.88	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.3363974475
90.30	0.39	97.48	0.00	91.32	0.00	95.74	0.00	84.75	0.00	97.84	0.00	96.34	0.00	68.60	2.71	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3101944500
90.65	0.36	97.54	0.06	92.80	1.47	95.74	0.00	84.75	0.00	97.97	0.12	96.75	0.41	69.05	0.45	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.3303329607
90.99	0.34	97.56	0.02	92.85	0.05	95.95	0.21	86.44	1.69	98.01	0.04	96.75	0.00	69.41	0.36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.2241248259
91.27	0.27	97.56	0.00	92.85	0.00	96.16	0.21	88.14	1.69	98.01	0.00	96.75	0.00	69.41	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.2135016918
91.52	0.26	97.57	0.02	92.89	0.05	96.16	0.00	89.83	1.69	98.05	0.04	96.75	0.00	69.41	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.4229191324
91.78	0.25	97.59	0.02	92.92	0.02	96.16	0.00	91.53	1.69	98.09	0.04	96.75	0.00	69.41	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.2837690021
92.03	0.25	97.93	0.34	93.13	0.21	96.16	0.00	91.53	0.00	98.09	0.00	97.97	1.22	69.41	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.1928583026
92.28	0.25	97.95	0.02	93.13	0.00	96.16	0.00	93.22	1.69	98.13	0.04	97.97	0.00	69.41	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.1120628691
92.52	0.24	97.95	0.00	93.13	0.00	96.16	0.00	94.92	1.69	98.13	0.00	97.97	0.00	69.41	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.3691529728
92.77	0.24	97.95	0.00	93.13	0.00	96.16	0.00	96.61	1.69	98.13	0.00	97.97	0.00	69.41	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.1024589186
93.01	0.24	97.95	0.00	93.53	0.40	96.16	0.00	96.61	0.00	98.13	0.00	97.97	0.00	70.68	1.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.1100876018
93.19	0.18	97.95	0.00	93.53	0.00	96.16	0.00	96.61	0.00	98.13	0.00	97.97	0.00	71.95	1.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.666273320
93.34	0.16	97.95	0.00	93.75	0.21	96.38	0.21	96.61	0.00	98.18	0.04	97.97	0.00	72.58	0.63	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.12338396
93.47	0.13	97.95	0.00	93.75	0.00	96.38	0.00	96.61	0.00	98.18	0.00	97.97	0.00	73.48	0.90	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.1271307827
93.60	0.13	97.95	0.00	93.80	0.05	96.59	0.21	96.61	0.00	98.18	0.00	97.97	0.00	74.12	0.63	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.2048438175
93.72	0.12	97.95	0.00	93.82	0.02	96.59	0.00	96.61	0.00	98.18	0.00	97.97	0.00	74.93	0.81	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.2027010615
93.84	0.12	97.95	0.00	93.82	0.00	96.59	0.00	96.61	0.00	98.18	0.00	97.97	0.00	75.75	0.81	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3813312902
93.95	0.12	97.95	0.00	93.82	0.00	96.59	0.00	96.61	0.00	98.18	0.00	97.97	0.00	76.56	0.81	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.2956872147
94.06	0.10	97.95	0.00	93.82	0.00	96.59	0.00	96.61	0.00	98.18	0.00	97.97	0.00	77.29	0.72	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.601086824
94.16	0.10	97.95	0.00	93.87	0.05	96.80	0.21	96.61	0.00	98.18	0.00	97.97	0.00	77.74	0.45	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.3555447890
94.26	0.10	97.95	0.00	93.91	0.05	97.01	0.21	96.61	0.00	98.18	0.00	97.97	0.00	78.19	0.45	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.2939475853
94.35	0.09	97.95	0.00	93.91	0.00	97.01	0.00	96.61	0.00	98.18	0.00	97.97	0.00	78.82	0.63	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.1893733162
94.44	0.09	97.95	0.00	93.91	0.00	97.01	0.00	96.61	0.00	98.18	0.00	97.97	0.00	79.46	0.63	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.3582233262
94.53	0.09	97.95	0.00	93.91	0.00	97.01	0.00	96.61	0.00	98.18	0.00	97.97	0.00	80.09	0.63	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.2902844955
94.62	0.09	97.95	0.00	93.96	0.05	97.23	0.21	96.61	0.00	98.18	0.00	97.97	0.00	80.45	0.36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.926808767
94.70	0.08	97.99	0.04	94.06	0.10	97.23	0.00	96.61	0.00	98.26	0.08	97.97	0.00	80.81	0.36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.1013197087
94.78	0.08	97.99	0.00	94.06	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	81.36	0.54	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.836910654
94.86	0.08	97.99	0.00	94.06	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	81.90	0.54	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.499158837
94.92	0.06	97.99	0.00	94.06	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	82.35	0.45	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.3835938515
94.99	0.06	97.99	0.00	94.06	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	82.81	0.45	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.2429276911
95.05	0.06	97.99	0.00	94.06	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	83.26	0.45	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.634321304
95.12	0.06	97.99	0.00	94.06	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	83.71	0.45	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.2288084838
95.18	0.06	97.99	0.00	94.49	0.43	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	83.71	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2372488147
95.23	0.05	97.99	0.00	94.49	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	84.07	0.36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.693002480
95.28	0.05	97.99	0.00	94.49	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	84.43	0.36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.167704159
95.33	0.05	97.99	0.00	94.49	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	84.80	0.36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.2829613100
95.39	0.05	97.99	0.00	94.49	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	85.16	0.36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.213577704
95.44	0.05	97.99	0.00	94.49	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	85.52	0.36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.2867761451
95.49	0.05	97.99	0.00	94.49	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	85.88	0.36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.526201994
95.54	0.05	97.99	0.00	94.49	0.00	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	86.24	0.36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.3477453251
95.59	0.05	98.05	0.06	94.51	0.02	97.23	0.00	96.61	0.00	98.26	0.00	97.97	0.00	86.52	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.2897216808
95.64	0.05	98.11	0.06	94.58	0.07	97.44	0.21	96.61	0.00	98.26	0.00	97.97	0.00	86.52	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.3936878444
95.68	0.04	98.11	0.00	94.60	0.02	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	86.79	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.2266482504
95.72	0.04	98.11	0.00	94.63	0.02	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	87.06	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.2642947119
95.76	0.04	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	87.33	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.256127656
95.80	0.04	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	87.60	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.1058020293
95.84	0.04	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	87.87	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.2435690813
95.88	0.04	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	88.14	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.911560936
95.92	0.04	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	88.42	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.1511890515
95.96	0.04	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	88.69	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.1386674512
96.00	0.04	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	88.96	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.1789546185
96.03	0.04	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	89.23	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.1182255740
96.07	0.04	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	89.50	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.3244492666
96.11	0.04	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	97.97	0.00	89.77	0.27	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.3190735826
96.14	0.03	98.11	0.00	94.63	0.00	97.44	0.00	96.61	0.00	98.26	0.00	98.17	0.20	89.77	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.4101806693
96.17	0.03	98.11	0.00	94.82	0.19	97.44	0.00	96.61	0.00	98.26	0.00	98.17	0.00	89.77	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3463670707
96.19	0.03	98.11	0.00	94.82	0.00	97.44	0.00	96.61	0.00	98.26	0.00	98.17	0.00	89.95	0.18	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.2789497266
96.22	0.03	98.11	0.00	94.82	0.00	97.44	0.00	96.61	0.00	98.26	0.00	98.17	0.00	90.14	0.18	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.2337943865
96.25	0.03	98.11	0.00	94.82	0.00	97.44	0.00	96.61	0.00	98.26	0.00	98.17	0.00	90.32	0.18	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.2237529050
96.27	0.03	98.11	0.00	94.82	0.00	97.44	0.00	96.61	0.00	98.26	0.00	98.17	0.00	90.50	0.18	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.2007882563
96.30	0.03	98.11	0.00	94.82	0.00	97.44	0.00	96.61	0.00	98.26	0.00	98.17	0.00	90.68	0.18	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.1297221173
96.32	0.03	98.11	0.00	94.82	0.00	97.44	0.00	96.61	0.00	98.26	0.00	98.17	0.00	90.86	0.18	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.2801135078
96.35	0.03	98.11	0.00	94.82	0.00	97.44	0.00	96.61	0.00	98.26	0.00	98.17	0.00	91.04	0.18	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2753879754
96.37	0.02	98.12	0.02	94.84	0.02	97.44	0.00	96.61	0.00	98.30	0.04	98.17	0.00	91.13	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.1875378450
96.40	0.02	98.12	0.00	95.01	0.17	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.13	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.455030302
96.41	0.02	98.12	0.00	95.13	0.12	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.13	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.55950070
96.43	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.22	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.2747260344
96.44	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.31	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2872262034
96.45	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.40	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.3822872400
96.47	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.49	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.3191594176
96.48	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.58	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.3413552358
96.49	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.67	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.754567440
96.51	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.76	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.4256315394
96.52	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.86	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.255938638
96.53	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	91.95	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.1173206678
96.54	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.04	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.137297141
96.56	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.13	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.757956830
96.57	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.22	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.4027121474
96.58	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.31	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.3917558235
96.60	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.40	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.2317954546
96.61	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.49	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.1255257749
96.62	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.58	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.3744967112
96.63	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.67	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.409368820
96.65	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.76	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.1943505497
96.66	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.85	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.1790495162
96.67	0.01	98.12	0.00	95.13	0.00	97.44	0.00	96.61	0.00	98.30	0.00	98.17	0.00	92.94	0.09	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.4268983193
96.69	0.01	98.12	0.00	95.17	0.05	97.44	0.00	96.61	0.00	98.34	0.04	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.567389571
96.70	0.01	98.16	0.04	95.17	0.00	97.44	0.00	96.61	0.00	98.38	0.04	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.784713221
96.71	0.01	98.16	0.00	95.25	0.07	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.1590848656
96.72	0.01	98.16	0.00	95.32	0.07	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.1114448130
96.73	0.01	98.16	0.00	95.39	0.07	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.3565760498
96.73	0.01	98.16	0.00	95.44	0.05	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2151597048
96.74	0.01	98.16	0.00	95.48	0.05	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.4140049941
96.75	0.01	98.16	0.00	95.53	0.05	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.4164311585
96.76	0.01	98.16	0.00	95.58	0.05	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.285637610
96.76	0.01	98.16	0.00	95.63	0.05	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.4252983750
96.77	0.01	98.16	0.00	95.67	0.05	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.1771672036
96.77	0.01	98.16	0.00	95.70	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.1564745292
96.78	0.01	98.16	0.00	95.72	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.3500331252
96.78	0.01	98.16	0.00	95.75	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.3333128822
96.78	0.01	98.16	0.00	95.77	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.2900345137
96.79	0.01	98.16	0.00	95.79	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.568792198
96.79	0.01	98.16	0.00	95.82	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.4239943561
96.79	0.01	98.16	0.00	95.84	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.2357557762
96.80	0.01	98.16	0.00	95.86	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.3741564183
96.80	0.01	98.16	0.00	95.89	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.2838586702
96.80	0.01	98.16	0.00	95.91	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.1595819725
96.81	0.01	98.16	0.00	95.94	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.3295129803
96.81	0.01	98.16	0.00	95.96	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.3241216703
96.81	0.01	98.16	0.00	95.98	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.3114026270
96.82	0.01	98.16	0.00	96.01	0.02	97.44	0.00	96.61	0.00	98.38	0.00	98.17	0.00	92.94	0.00	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.1330502949

---

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.302378197
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2608581200
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.3507319093
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.2117442153
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.3502364853
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.4275271471
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.3084307290
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.3344347612
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.2372185984
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.537484886
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.2138100286
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2812810655
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.1745444429
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1747925163
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.3795734074
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.3484158341
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.3060334339
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3908789584
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.892950440
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.3013254626
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.1375034576
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.568745282
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1453075143
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3721995019
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.78843003
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.3185553454
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.3159440267
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/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.3295674554
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.510918796
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.2816909779
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.4007955919
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.178848294
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.3709732210
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.2037383405
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.2688685521
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.1108129754
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.3469388398
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.1122560919
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.1935694571
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.2386471263
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.3103909743
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.1016040540
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.3084001136
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.3076639852
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.4156407708
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.3539788551
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.404856841
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.1791293713
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.425284697
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.2956367419
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.1474358228
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.3376680351
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.3283741459
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.4222743001
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.953428151
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.709726156
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.2286705447
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.1943064293
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.3813057061
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.2434761629
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.3431540382
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.1206512078
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.2795529107
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.453516093
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.1596110457
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.1815303655
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.2523325884
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.3398086774
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.127110369
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.453925838
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.1671979894
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.936309163
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.1684774072
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.170209779
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.4284919220
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.261935639
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_enable.1621531851
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.3365711798
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.2360972428
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.3920605593
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.3802594245
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.291215746
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.4057627417
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.2871392508
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.3235612789
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.3428842634
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.1144204212
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.2107046946
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.3630594846
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.2515354060
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.527707339
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.1067066506
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.824086908
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.1955760313
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.4059056315
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.2066300340
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.1996751256
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.3716352857
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.4002092070
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.1458373228
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.127948623
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.2234269716
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.3834896283
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.518295434
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.2052232687
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.2881370603
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.3129602001
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.3907831544
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.3176603655
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.4127760820
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.1375775138
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.595802582
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.3626052973
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.55238034
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.1282167243
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.1433678398
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.3444117090
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.1889172382
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.911514079
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.1809598401
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.2977170822
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.3453356602
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.3960142988
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1232023447
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3644282507
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.3032876205
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.3152261703
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3860112385
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.536899017
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.3933805263
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.1503052649
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1475377484
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.2523969460
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.4161443958
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.2918764638
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1511371817
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.354147072
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.79657321
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.691512824
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.1919981154
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.972944344
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.3499890873
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.207856651
/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.2355945599

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Total test records in report: 3724

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TEST NO	TEST LOCATION	TEST NAME	STATUS	STARTED	FINISHED	SIMULATION TIME
T1	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.125534255			Aug 25 09:13:52 AM UTC 24	Aug 25 09:13:55 AM UTC 24	164179880 ps
T2	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.4140049941			Aug 25 09:13:53 AM UTC 24	Aug 25 09:13:56 AM UTC 24	215843857 ps
T3	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.3555447890			Aug 25 09:13:56 AM UTC 24	Aug 25 09:13:58 AM UTC 24	161250809 ps
T37	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3463670707			Aug 25 09:13:55 AM UTC 24	Aug 25 09:13:58 AM UTC 24	191165836 ps
T7	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.2726305060			Aug 25 09:13:28 AM UTC 24	Aug 25 09:14:00 AM UTC 24	11540194193 ps
T17	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.393700285			Aug 25 09:13:57 AM UTC 24	Aug 25 09:14:00 AM UTC 24	468002354 ps
T18	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3188631660			Aug 25 09:13:59 AM UTC 24	Aug 25 09:14:05 AM UTC 24	1031597975 ps
T8	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.365921548			Aug 25 09:13:29 AM UTC 24	Aug 25 09:14:06 AM UTC 24	14943504627 ps
T19	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.2939475853			Aug 25 09:14:06 AM UTC 24	Aug 25 09:14:08 AM UTC 24	146417609 ps
T20	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.3191594176			Aug 25 09:14:01 AM UTC 24	Aug 25 09:14:08 AM UTC 24	1295315685 ps
T21	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_enable.2281426716			Aug 25 09:14:09 AM UTC 24	Aug 25 09:14:11 AM UTC 24	34216195 ps
T22	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.1296730467			Aug 25 09:14:09 AM UTC 24	Aug 25 09:14:15 AM UTC 24	794766762 ps
T23	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.3500331252			Aug 25 09:14:13 AM UTC 24	Aug 25 09:14:17 AM UTC 24	162833556 ps
T24	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.4244319303			Aug 25 09:14:13 AM UTC 24	Aug 25 09:14:17 AM UTC 24	737882889 ps
T30	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.2418749578			Aug 25 09:14:01 AM UTC 24	Aug 25 09:14:27 AM UTC 24	836028774 ps
T31	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.1013197087			Aug 25 09:14:36 AM UTC 24	Aug 25 09:14:39 AM UTC 24	504906708 ps
T41	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.4164311585			Aug 25 09:14:34 AM UTC 24	Aug 25 09:14:51 AM UTC 24	4151926949 ps
T32	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.3635856726			Aug 25 09:14:52 AM UTC 24	Aug 25 09:14:55 AM UTC 24	247324821 ps
T33	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.3842028965			Aug 25 09:14:54 AM UTC 24	Aug 25 09:14:56 AM UTC 24	145440390 ps
T34	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.1465791013			Aug 25 09:14:01 AM UTC 24	Aug 25 09:14:57 AM UTC 24	4753656782 ps
T35	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.806083678			Aug 25 09:14:56 AM UTC 24	Aug 25 09:14:59 AM UTC 24	174196715 ps
T36	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.3579605472			Aug 25 09:14:57 AM UTC 24	Aug 25 09:15:00 AM UTC 24	185275483 ps
T9	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.4120537235			Aug 25 09:13:45 AM UTC 24	Aug 25 09:15:01 AM UTC 24	25112620707 ps
T66	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.821789097			Aug 25 09:14:59 AM UTC 24	Aug 25 09:15:02 AM UTC 24	387461668 ps
T42	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.285637610			Aug 25 09:15:00 AM UTC 24	Aug 25 09:15:03 AM UTC 24	169469801 ps
T106	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.3881399000			Aug 25 09:15:05 AM UTC 24	Aug 25 09:15:08 AM UTC 24	292490061 ps
T80	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.663282240			Aug 25 09:15:09 AM UTC 24	Aug 25 09:15:12 AM UTC 24	207110482 ps
T62	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.698931545			Aug 25 09:15:03 AM UTC 24	Aug 25 09:15:16 AM UTC 24	4234376283 ps
T61	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.2267039136			Aug 25 09:13:59 AM UTC 24	Aug 25 09:15:31 AM UTC 24	33312074043 ps
T63	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.818958327			Aug 25 09:15:02 AM UTC 24	Aug 25 09:15:39 AM UTC 24	11581920792 ps
T144	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.3017118557			Aug 25 09:15:40 AM UTC 24	Aug 25 09:15:43 AM UTC 24	152405230 ps
T4	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1456054879			Aug 25 09:15:12 AM UTC 24	Aug 25 09:15:44 AM UTC 24	3118857793 ps
T493	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.3122143174			Aug 25 09:15:43 AM UTC 24	Aug 25 09:15:46 AM UTC 24	140436192 ps
T5	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.1100876018			Aug 25 09:15:03 AM UTC 24	Aug 25 09:15:48 AM UTC 24	3949327645 ps
T67	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.3083419838			Aug 25 09:15:44 AM UTC 24	Aug 25 09:15:48 AM UTC 24	500546125 ps
T68	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.2897216808			Aug 25 09:15:47 AM UTC 24	Aug 25 09:15:49 AM UTC 24	191398210 ps
T81	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.3973527485			Aug 25 09:15:49 AM UTC 24	Aug 25 09:15:51 AM UTC 24	216819086 ps
T211	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.1558338146			Aug 25 09:15:49 AM UTC 24	Aug 25 09:15:52 AM UTC 24	161052022 ps
T473	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.4133690198			Aug 25 09:15:50 AM UTC 24	Aug 25 09:15:53 AM UTC 24	158929358 ps
T83	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.2534078089			Aug 25 09:15:52 AM UTC 24	Aug 25 09:15:54 AM UTC 24	161490338 ps
T82	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.1913153892			Aug 25 09:15:52 AM UTC 24	Aug 25 09:15:55 AM UTC 24	160166614 ps
T43	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.1353386075			Aug 25 09:15:53 AM UTC 24	Aug 25 09:15:56 AM UTC 24	272502151 ps
T44	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.747230147			Aug 25 09:15:55 AM UTC 24	Aug 25 09:15:58 AM UTC 24	202221652 ps
T45	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.1319593238			Aug 25 09:15:55 AM UTC 24	Aug 25 09:15:58 AM UTC 24	283812924 ps
T152	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.4203901991			Aug 25 09:15:57 AM UTC 24	Aug 25 09:15:59 AM UTC 24	230868398 ps
T203	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.808248033			Aug 25 09:15:57 AM UTC 24	Aug 25 09:16:00 AM UTC 24	348434710 ps
T25	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.1492478018			Aug 25 09:15:59 AM UTC 24	Aug 25 09:16:01 AM UTC 24	38363191 ps
T179	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.567389571			Aug 25 09:15:59 AM UTC 24	Aug 25 09:16:01 AM UTC 24	159732615 ps
T6	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.1667879775			Aug 25 09:15:16 AM UTC 24	Aug 25 09:16:02 AM UTC 24	3223979310 ps
T313	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.926808767			Aug 25 09:16:01 AM UTC 24	Aug 25 09:16:04 AM UTC 24	162208743 ps
T514	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.2388937471			Aug 25 09:16:02 AM UTC 24	Aug 25 09:16:05 AM UTC 24	194572525 ps
T515	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.980850824			Aug 25 09:16:02 AM UTC 24	Aug 25 09:16:05 AM UTC 24	198733109 ps
T516	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.1799476827			Aug 25 09:16:04 AM UTC 24	Aug 25 09:16:06 AM UTC 24	181833754 ps
T69	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3694165924			Aug 25 09:16:21 AM UTC 24	Aug 25 09:16:24 AM UTC 24	145529070 ps
T151	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.2095688092			Aug 25 09:15:32 AM UTC 24	Aug 25 09:16:26 AM UTC 24	2994679915 ps
T50	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.509002632			Aug 25 09:16:24 AM UTC 24	Aug 25 09:16:27 AM UTC 24	342057970 ps
T72	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.4252983750			Aug 25 09:16:27 AM UTC 24	Aug 25 09:16:29 AM UTC 24	179972281 ps
T47	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.2642947119			Aug 25 09:16:28 AM UTC 24	Aug 25 09:16:31 AM UTC 24	425938886 ps
T100	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.3138062727			Aug 25 09:16:30 AM UTC 24	Aug 25 09:16:32 AM UTC 24	232305884 ps
T107	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.2484919969			Aug 25 09:16:32 AM UTC 24	Aug 25 09:16:34 AM UTC 24	157208859 ps
T212	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.1094414066			Aug 25 09:16:33 AM UTC 24	Aug 25 09:16:35 AM UTC 24	164245610 ps
T149	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.1443728534			Aug 25 09:16:35 AM UTC 24	Aug 25 09:16:38 AM UTC 24	217974828 ps
T316	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.4101916661			Aug 25 09:16:38 AM UTC 24	Aug 25 09:16:41 AM UTC 24	150691827 ps
T146	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.204451828			Aug 25 09:16:06 AM UTC 24	Aug 25 09:16:41 AM UTC 24	5043311527 ps
T475	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.1003556830			Aug 25 09:16:41 AM UTC 24	Aug 25 09:16:44 AM UTC 24	151663825 ps
T233	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.1809945709			Aug 25 09:16:45 AM UTC 24	Aug 25 09:16:50 AM UTC 24	1261996651 ps
T85	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.202629689			Aug 25 09:16:00 AM UTC 24	Aug 25 09:16:58 AM UTC 24	13093432463 ps
T88	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.4229191324			Aug 25 09:16:07 AM UTC 24	Aug 25 09:17:03 AM UTC 24	20201547712 ps
T153	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.2382581402			Aug 25 09:16:59 AM UTC 24	Aug 25 09:17:04 AM UTC 24	524834784 ps
T182	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.1649110157			Aug 25 09:17:03 AM UTC 24	Aug 25 09:17:06 AM UTC 24	363086013 ps
T175	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.1188818277			Aug 25 09:17:04 AM UTC 24	Aug 25 09:17:06 AM UTC 24	82625839 ps
T169	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.2702564147			Aug 25 09:16:43 AM UTC 24	Aug 25 09:17:09 AM UTC 24	2360791411 ps
T202	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.491808339			Aug 25 09:17:07 AM UTC 24	Aug 25 09:17:10 AM UTC 24	199742431 ps
T150	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.1834161906			Aug 25 09:16:36 AM UTC 24	Aug 25 09:17:11 AM UTC 24	2204331051 ps
T54	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.1590848656			Aug 25 09:17:10 AM UTC 24	Aug 25 09:17:12 AM UTC 24	153084277 ps
T57	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.3658334112			Aug 25 09:17:11 AM UTC 24	Aug 25 09:17:13 AM UTC 24	152831207 ps
T78	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.3319606937			Aug 25 09:17:12 AM UTC 24	Aug 25 09:17:15 AM UTC 24	150457760 ps
T102	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.4214032194			Aug 25 09:17:13 AM UTC 24	Aug 25 09:17:16 AM UTC 24	489609633 ps
T101	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.2740422181			Aug 25 09:17:14 AM UTC 24	Aug 25 09:17:18 AM UTC 24	449036100 ps
T10	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.138916954			Aug 25 09:17:04 AM UTC 24	Aug 25 09:17:19 AM UTC 24	5549336584 ps
T363	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.804289443			Aug 25 09:17:20 AM UTC 24	Aug 25 09:17:23 AM UTC 24	580308775 ps
T234	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3578172806			Aug 25 09:17:24 AM UTC 24	Aug 25 09:17:26 AM UTC 24	59783784 ps
T59	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.1353705298			Aug 25 09:17:24 AM UTC 24	Aug 25 09:17:26 AM UTC 24	155111934 ps
T509	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2224979899			Aug 25 09:14:07 AM UTC 24	Aug 25 09:17:28 AM UTC 24	5107132187 ps
T216	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.3413552358			Aug 25 09:17:27 AM UTC 24	Aug 25 09:17:30 AM UTC 24	183933915 ps
T145	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.3304276125			Aug 25 09:17:27 AM UTC 24	Aug 25 09:17:32 AM UTC 24	910527812 ps
T173	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.2765461270			Aug 25 09:17:28 AM UTC 24	Aug 25 09:17:33 AM UTC 24	188454908 ps
T104	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.1454034068			Aug 25 09:14:40 AM UTC 24	Aug 25 09:17:34 AM UTC 24	4234819070 ps
T147	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.3372395024			Aug 25 09:16:05 AM UTC 24	Aug 25 09:17:37 AM UTC 24	10524030820 ps
T517	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.4147876513			Aug 25 09:17:34 AM UTC 24	Aug 25 09:17:37 AM UTC 24	228377748 ps
T518	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.3677516542			Aug 25 09:17:36 AM UTC 24	Aug 25 09:17:38 AM UTC 24	141102495 ps
T232	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.788835327			Aug 25 09:15:04 AM UTC 24	Aug 25 09:17:39 AM UTC 24	4373069973 ps
T519	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.2980422416			Aug 25 09:17:38 AM UTC 24	Aug 25 09:17:40 AM UTC 24	195452959 ps
T11	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.3030491887			Aug 25 09:17:05 AM UTC 24	Aug 25 09:17:42 AM UTC 24	19208240036 ps
T520	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.3213771354			Aug 25 09:17:39 AM UTC 24	Aug 25 09:17:42 AM UTC 24	240594902 ps
T521	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.1468641019			Aug 25 09:17:43 AM UTC 24	Aug 25 09:17:45 AM UTC 24	243224901 ps
T507	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.2536474674			Aug 25 09:14:18 AM UTC 24	Aug 25 09:17:47 AM UTC 24	81104924809 ps
T522	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.2988719009			Aug 25 09:17:46 AM UTC 24	Aug 25 09:17:48 AM UTC 24	193532183 ps
T523	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.3355873474			Aug 25 09:17:17 AM UTC 24	Aug 25 09:17:55 AM UTC 24	3764275425 ps
T524	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.2095695998			Aug 25 09:17:41 AM UTC 24	Aug 25 09:17:56 AM UTC 24	5389054487 ps
T525	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.4240550654			Aug 25 09:17:56 AM UTC 24	Aug 25 09:17:58 AM UTC 24	181682906 ps
T98	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.2027010615			Aug 25 09:17:15 AM UTC 24	Aug 25 09:17:58 AM UTC 24	13673715060 ps
T526	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.3684267136			Aug 25 09:17:57 AM UTC 24	Aug 25 09:17:59 AM UTC 24	176873925 ps
T113	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.2900345137			Aug 25 09:17:59 AM UTC 24	Aug 25 09:18:02 AM UTC 24	198565877 ps
T527	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.725922574			Aug 25 09:17:59 AM UTC 24	Aug 25 09:18:02 AM UTC 24	188218521 ps
T528	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.2435430540			Aug 25 09:18:00 AM UTC 24	Aug 25 09:18:03 AM UTC 24	203585631 ps
T529	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.4089560492			Aug 25 09:17:18 AM UTC 24	Aug 25 09:18:04 AM UTC 24	3964624981 ps
T148	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.1978099613			Aug 25 09:18:02 AM UTC 24	Aug 25 09:18:05 AM UTC 24	169142706 ps
T530	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.214957418			Aug 25 09:18:02 AM UTC 24	Aug 25 09:18:05 AM UTC 24	239739141 ps
T531	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.3439882203			Aug 25 09:18:03 AM UTC 24	Aug 25 09:18:06 AM UTC 24	244632486 ps
T28	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.1114448130			Aug 25 09:18:06 AM UTC 24	Aug 25 09:18:08 AM UTC 24	39416756 ps
T180	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.2143177972			Aug 25 09:18:06 AM UTC 24	Aug 25 09:18:08 AM UTC 24	167107456 ps
T532	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.506367557			Aug 25 09:18:06 AM UTC 24	Aug 25 09:18:08 AM UTC 24	277284545 ps
T314	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.3272291226			Aug 25 09:18:09 AM UTC 24	Aug 25 09:18:11 AM UTC 24	147024944 ps
T533	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2501040602			Aug 25 09:18:09 AM UTC 24	Aug 25 09:18:12 AM UTC 24	184051308 ps
T534	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.1452922089			Aug 25 09:18:09 AM UTC 24	Aug 25 09:18:12 AM UTC 24	214553989 ps
T86	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.3333128822			Aug 25 09:14:57 AM UTC 24	Aug 25 09:18:12 AM UTC 24	12851823768 ps
T535	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.2613748176			Aug 25 09:18:12 AM UTC 24	Aug 25 09:18:15 AM UTC 24	213902170 ps
T213	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2833711105			Aug 25 09:17:41 AM UTC 24	Aug 25 09:18:16 AM UTC 24	3106624699 ps
T508	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.3300865781			Aug 25 09:14:29 AM UTC 24	Aug 25 09:18:17 AM UTC 24	82172767945 ps
T70	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.575181510			Aug 25 09:18:17 AM UTC 24	Aug 25 09:18:19 AM UTC 24	159826023 ps
T536	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.2207016621			Aug 25 09:14:28 AM UTC 24	Aug 25 09:18:20 AM UTC 24	87057007375 ps
T537	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.3391973184			Aug 25 09:17:33 AM UTC 24	Aug 25 09:18:21 AM UTC 24	4479933909 ps
T48	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.12338396			Aug 25 09:18:18 AM UTC 24	Aug 25 09:18:21 AM UTC 24	240742019 ps
T73	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.3590550443			Aug 25 09:18:20 AM UTC 24	Aug 25 09:18:23 AM UTC 24	175254354 ps
T538	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.663465473			Aug 25 09:18:22 AM UTC 24	Aug 25 09:18:25 AM UTC 24	211497801 ps
T168	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.2497556176			Aug 25 09:18:22 AM UTC 24	Aug 25 09:18:25 AM UTC 24	301625675 ps
T49	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.52065297			Aug 25 09:18:22 AM UTC 24	Aug 25 09:18:25 AM UTC 24	396778687 ps
T289	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.1636731628			Aug 25 09:18:23 AM UTC 24	Aug 25 09:18:26 AM UTC 24	214802746 ps
T156	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.3435412331			Aug 25 09:16:06 AM UTC 24	Aug 25 09:18:28 AM UTC 24	7337710001 ps
T539	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.1165464819			Aug 25 09:18:26 AM UTC 24	Aug 25 09:18:28 AM UTC 24	219969186 ps
T476	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.105572609			Aug 25 09:18:27 AM UTC 24	Aug 25 09:18:29 AM UTC 24	178685206 ps
T540	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.1981638489			Aug 25 09:18:27 AM UTC 24	Aug 25 09:18:29 AM UTC 24	228653303 ps
T541	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.461758930			Aug 25 09:18:29 AM UTC 24	Aug 25 09:18:34 AM UTC 24	967402361 ps
T183	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.1443769228			Aug 25 09:18:33 AM UTC 24	Aug 25 09:18:37 AM UTC 24	483382531 ps
T12	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.1120628691			Aug 25 09:17:07 AM UTC 24	Aug 25 09:18:38 AM UTC 24	30632677317 ps
T176	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.3936878444			Aug 25 09:18:39 AM UTC 24	Aug 25 09:18:41 AM UTC 24	85737271 ps
T187	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.2769620480			Aug 25 09:18:38 AM UTC 24	Aug 25 09:18:41 AM UTC 24	769349720 ps
T74	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.1615151844			Aug 25 09:16:54 AM UTC 24	Aug 25 09:18:43 AM UTC 24	7069706615 ps
T242	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.693002480			Aug 25 09:18:07 AM UTC 24	Aug 25 09:18:47 AM UTC 24	8929006351 ps
T245	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.1881751629			Aug 25 09:18:44 AM UTC 24	Aug 25 09:18:47 AM UTC 24	148613908 ps
T159	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.1159616632			Aug 25 09:18:26 AM UTC 24	Aug 25 09:18:47 AM UTC 24	2121197869 ps
T246	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.3081609816			Aug 25 09:14:16 AM UTC 24	Aug 25 09:18:49 AM UTC 24	105188121617 ps
T55	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.2204966550			Aug 25 09:18:48 AM UTC 24	Aug 25 09:18:51 AM UTC 24	160467084 ps
T79	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.1050351688			Aug 25 09:18:49 AM UTC 24	Aug 25 09:18:51 AM UTC 24	146471024 ps
T58	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.2903464891			Aug 25 09:18:49 AM UTC 24	Aug 25 09:18:51 AM UTC 24	174793238 ps
T247	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.1197219622			Aug 25 09:18:50 AM UTC 24	Aug 25 09:18:55 AM UTC 24	627165091 ps
T13	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.911068547			Aug 25 09:18:39 AM UTC 24	Aug 25 09:18:56 AM UTC 24	6595887334 ps
T248	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.533282373			Aug 25 09:17:51 AM UTC 24	Aug 25 09:18:57 AM UTC 24	1785354386 ps
T103	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.3795955206			Aug 25 09:18:51 AM UTC 24	Aug 25 09:18:58 AM UTC 24	1147499431 ps
T60	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.1816192872			Aug 25 09:18:58 AM UTC 24	Aug 25 09:19:00 AM UTC 24	144267875 ps
T542	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_enable.3172738910			Aug 25 09:18:59 AM UTC 24	Aug 25 09:19:01 AM UTC 24	67281235 ps
T317	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.986861251			Aug 25 09:18:57 AM UTC 24	Aug 25 09:19:01 AM UTC 24	714129196 ps
T321	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.1503750729			Aug 25 09:19:02 AM UTC 24	Aug 25 09:19:05 AM UTC 24	328617408 ps
T174	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.1436785233			Aug 25 09:19:02 AM UTC 24	Aug 25 09:19:06 AM UTC 24	254519415 ps
T543	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.1562762178			Aug 25 09:19:01 AM UTC 24	Aug 25 09:19:06 AM UTC 24	885869000 ps
T544	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.1520760878			Aug 25 09:18:56 AM UTC 24	Aug 25 09:19:06 AM UTC 24	479224873 ps
T64	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.4002304151			Aug 25 09:17:40 AM UTC 24	Aug 25 09:19:09 AM UTC 24	29234184126 ps
T89	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.633287102			Aug 25 09:18:16 AM UTC 24	Aug 25 09:19:12 AM UTC 24	20162720343 ps
T76	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.3303329607			Aug 25 09:18:30 AM UTC 24	Aug 25 09:19:21 AM UTC 24	7729766591 ps
T545	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.55950070			Aug 25 09:17:49 AM UTC 24	Aug 25 09:19:25 AM UTC 24	2829870333 ps
T546	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.1131763175			Aug 25 09:19:22 AM UTC 24	Aug 25 09:19:25 AM UTC 24	192002112 ps
T547	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.683491731			Aug 25 09:19:25 AM UTC 24	Aug 25 09:19:28 AM UTC 24	154144343 ps
T548	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.3338147867			Aug 25 09:19:26 AM UTC 24	Aug 25 09:19:29 AM UTC 24	172112397 ps
T14	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.1105326125			Aug 25 09:18:42 AM UTC 24	Aug 25 09:19:31 AM UTC 24	19980346932 ps
T15	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.3709516601			Aug 25 09:18:42 AM UTC 24	Aug 25 09:19:32 AM UTC 24	24992285817 ps
T549	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.2389658797			Aug 25 09:17:38 AM UTC 24	Aug 25 09:19:32 AM UTC 24	6414127133 ps
T550	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.2414264553			Aug 25 09:19:31 AM UTC 24	Aug 25 09:19:34 AM UTC 24	184543740 ps
T551	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.933152253			Aug 25 09:17:43 AM UTC 24	Aug 25 09:19:36 AM UTC 24	2945605725 ps
T552	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.3884295303			Aug 25 09:18:14 AM UTC 24	Aug 25 09:19:40 AM UTC 24	9056754170 ps
T553	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.996896327			Aug 25 09:19:37 AM UTC 24	Aug 25 09:19:40 AM UTC 24	248899104 ps
T554	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.3074657497			Aug 25 09:18:29 AM UTC 24	Aug 25 09:19:42 AM UTC 24	1800144323 ps
T555	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.303501428			Aug 25 09:19:40 AM UTC 24	Aug 25 09:19:43 AM UTC 24	196506650 ps
T556	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.1751288661			Aug 25 09:18:12 AM UTC 24	Aug 25 09:19:45 AM UTC 24	5796083271 ps
T557	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.1261222356			Aug 25 09:19:46 AM UTC 24	Aug 25 09:19:48 AM UTC 24	193625976 ps
T558	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.510464711			Aug 25 09:19:33 AM UTC 24	Aug 25 09:19:51 AM UTC 24	6341624453 ps
T559	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.577288355			Aug 25 09:19:49 AM UTC 24	Aug 25 09:19:51 AM UTC 24	158866354 ps
T560	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.2015128946			Aug 25 09:19:52 AM UTC 24	Aug 25 09:19:54 AM UTC 24	179060780 ps
T114	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.3295129803			Aug 25 09:19:52 AM UTC 24	Aug 25 09:19:54 AM UTC 24	193749985 ps
T561	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.135587425			Aug 25 09:19:55 AM UTC 24	Aug 25 09:19:58 AM UTC 24	151298692 ps
T562	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.3139403052			Aug 25 09:19:55 AM UTC 24	Aug 25 09:19:58 AM UTC 24	188927698 ps
T563	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.3436816210			Aug 25 09:18:53 AM UTC 24	Aug 25 09:20:00 AM UTC 24	6347386452 ps
T167	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.686984098			Aug 25 09:19:59 AM UTC 24	Aug 25 09:20:01 AM UTC 24	152042308 ps
T564	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.2024290873			Aug 25 09:19:59 AM UTC 24	Aug 25 09:20:01 AM UTC 24	212083226 ps
T214	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.3414213832			Aug 25 09:17:49 AM UTC 24	Aug 25 09:20:02 AM UTC 24	3283362442 ps
T565	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.9517213			Aug 25 09:19:35 AM UTC 24	Aug 25 09:20:02 AM UTC 24	1773194496 ps
T191	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.630207199			Aug 25 09:20:01 AM UTC 24	Aug 25 09:20:03 AM UTC 24	268513865 ps
T566	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.3622242810			Aug 25 09:19:44 AM UTC 24	Aug 25 09:20:04 AM UTC 24	1809341554 ps
T29	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.2059734620			Aug 25 09:20:02 AM UTC 24	Aug 25 09:20:04 AM UTC 24	63723635 ps
T181	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.2506660633			Aug 25 09:20:02 AM UTC 24	Aug 25 09:20:04 AM UTC 24	135392802 ps
T315	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.4020190977			Aug 25 09:20:03 AM UTC 24	Aug 25 09:20:05 AM UTC 24	159047443 ps
T567	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.3136458817			Aug 25 09:20:04 AM UTC 24	Aug 25 09:20:07 AM UTC 24	224138257 ps
T568	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.3672050210			Aug 25 09:20:04 AM UTC 24	Aug 25 09:20:07 AM UTC 24	251219508 ps
T569	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.3295810799			Aug 25 09:20:04 AM UTC 24	Aug 25 09:20:07 AM UTC 24	213616087 ps
T71	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.4101697354			Aug 25 09:20:08 AM UTC 24	Aug 25 09:20:11 AM UTC 24	173801630 ps
T570	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.3919631724			Aug 25 09:19:40 AM UTC 24	Aug 25 09:20:12 AM UTC 24	2067921661 ps
T51	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.962662896			Aug 25 09:20:11 AM UTC 24	Aug 25 09:20:14 AM UTC 24	249948235 ps
T571	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.3775012640			Aug 25 09:19:13 AM UTC 24	Aug 25 09:20:14 AM UTC 24	4196330908 ps
T75	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.4162704638			Aug 25 09:20:12 AM UTC 24	Aug 25 09:20:15 AM UTC 24	187791469 ps
T157	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.1037152077			Aug 25 09:20:15 AM UTC 24	Aug 25 09:20:17 AM UTC 24	211396141 ps
T52	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.1804313595			Aug 25 09:20:15 AM UTC 24	Aug 25 09:20:18 AM UTC 24	435425679 ps
T572	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.1530859705			Aug 25 09:20:16 AM UTC 24	Aug 25 09:20:18 AM UTC 24	155013884 ps
T290	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1620062901			Aug 25 09:20:18 AM UTC 24	Aug 25 09:20:20 AM UTC 24	174877790 ps
T573	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.565559971			Aug 25 09:19:28 AM UTC 24	Aug 25 09:20:21 AM UTC 24	4090315439 ps
T574	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.3467573857			Aug 25 09:20:19 AM UTC 24	Aug 25 09:20:22 AM UTC 24	220578313 ps
T575	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.2023703562			Aug 25 09:20:21 AM UTC 24	Aug 25 09:20:24 AM UTC 24	170032887 ps
T576	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.665274003			Aug 25 09:19:43 AM UTC 24	Aug 25 09:20:25 AM UTC 24	2810847008 ps
T577	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.4267860534			Aug 25 09:20:23 AM UTC 24	Aug 25 09:20:25 AM UTC 24	181680169 ps
T578	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.897430989			Aug 25 09:20:25 AM UTC 24	Aug 25 09:20:32 AM UTC 24	1245856728 ps
T318	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.2689420634			Aug 25 09:19:34 AM UTC 24	Aug 25 09:20:32 AM UTC 24	3698296286 ps
T192	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.1875378450			Aug 25 09:20:29 AM UTC 24	Aug 25 09:20:33 AM UTC 24	592888371 ps
T199	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.1805845302			Aug 25 09:20:34 AM UTC 24	Aug 25 09:20:37 AM UTC 24	361529340 ps
T177	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.1089522426			Aug 25 09:20:35 AM UTC 24	Aug 25 09:20:37 AM UTC 24	101311210 ps
T579	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.1521217836			Aug 25 09:20:08 AM UTC 24	Aug 25 09:20:38 AM UTC 24	5952997279 ps
T105	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.718061762			Aug 25 09:18:51 AM UTC 24	Aug 25 09:20:38 AM UTC 24	39047728881 ps
T580	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.2045095756			Aug 25 09:20:38 AM UTC 24	Aug 25 09:20:41 AM UTC 24	167113931 ps
T510	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.3054731617			Aug 25 09:14:18 AM UTC 24	Aug 25 09:20:41 AM UTC 24	107131484744 ps
T46	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.3457844358			Aug 25 09:20:40 AM UTC 24	Aug 25 09:20:43 AM UTC 24	184643130 ps
T154	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.3576093452			Aug 25 09:18:12 AM UTC 24	Aug 25 09:20:43 AM UTC 24	7533628827 ps
T84	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.3565760498			Aug 25 09:20:41 AM UTC 24	Aug 25 09:20:43 AM UTC 24	172386215 ps
T581	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.2808272352			Aug 25 09:20:43 AM UTC 24	Aug 25 09:20:45 AM UTC 24	149363793 ps
T296	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.2943346687			Aug 25 09:20:44 AM UTC 24	Aug 25 09:20:47 AM UTC 24	458623451 ps
T582	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.786873309			Aug 25 09:20:44 AM UTC 24	Aug 25 09:20:48 AM UTC 24	518730532 ps
T583	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.2067799855			Aug 25 09:20:49 AM UTC 24	Aug 25 09:20:51 AM UTC 24	143248680 ps
T415	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.1680440696			Aug 25 09:20:49 AM UTC 24	Aug 25 09:20:52 AM UTC 24	762160618 ps
T584	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_enable.1016145273			Aug 25 09:20:52 AM UTC 24	Aug 25 09:20:54 AM UTC 24	31555313 ps
T585	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.3769409303			Aug 25 09:20:53 AM UTC 24	Aug 25 09:20:58 AM UTC 24	983000596 ps
T452	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.669920414			Aug 25 09:20:55 AM UTC 24	Aug 25 09:20:58 AM UTC 24	230070125 ps
T586	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.3948783926			Aug 25 09:20:59 AM UTC 24	Aug 25 09:21:03 AM UTC 24	260349557 ps
T16	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.2761084255			Aug 25 09:20:36 AM UTC 24	Aug 25 09:21:05 AM UTC 24	10466597609 ps
T158	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.455030302			Aug 25 09:20:07 AM UTC 24	Aug 25 09:21:09 AM UTC 24	6803446326 ps
T65	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.2241248259			Aug 25 09:19:33 AM UTC 24	Aug 25 09:21:09 AM UTC 24	29278411843 ps
T90	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.2240053000			Aug 25 09:20:08 AM UTC 24	Aug 25 09:21:09 AM UTC 24	20222975299 ps
T587	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.904118931			Aug 25 09:20:19 AM UTC 24	Aug 25 09:21:10 AM UTC 24	3527585269 ps
T249	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.2755561002			Aug 25 09:20:03 AM UTC 24	Aug 25 09:21:11 AM UTC 24	15794724525 ps
T588	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.3286593774			Aug 25 09:21:10 AM UTC 24	Aug 25 09:21:13 AM UTC 24	147950252 ps
T589	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.3455552260			Aug 25 09:21:10 AM UTC 24	Aug 25 09:21:13 AM UTC 24	156355291 ps
T590	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.678074514			Aug 25 09:21:10 AM UTC 24	Aug 25 09:21:13 AM UTC 24	220373381 ps
T591	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1201331068			Aug 25 09:21:13 AM UTC 24	Aug 25 09:21:16 AM UTC 24	248119406 ps
T592	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.2106211722			Aug 25 09:20:46 AM UTC 24	Aug 25 09:21:17 AM UTC 24	2438489154 ps
T593	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.3591832250			Aug 25 09:20:37 AM UTC 24	Aug 25 09:21:18 AM UTC 24	14416773913 ps
T594	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.4026027988			Aug 25 09:21:17 AM UTC 24	Aug 25 09:21:20 AM UTC 24	241751067 ps
T595	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.3170009832			Aug 25 09:21:19 AM UTC 24	Aug 25 09:21:21 AM UTC 24	184247906 ps
T596	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.811038821			Aug 25 09:20:45 AM UTC 24	Aug 25 09:21:22 AM UTC 24	3456511511 ps
T597	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.2622129209			Aug 25 09:21:23 AM UTC 24	Aug 25 09:21:26 AM UTC 24	177914342 ps
T598	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.3688332552			Aug 25 09:21:24 AM UTC 24	Aug 25 09:21:27 AM UTC 24	145356658 ps
T599	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.2918320805			Aug 25 09:21:26 AM UTC 24	Aug 25 09:21:29 AM UTC 24	157623846 ps
T133	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.1382760482			Aug 25 09:21:26 AM UTC 24	Aug 25 09:21:29 AM UTC 24	189895199 ps
T600	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.1856365143			Aug 25 09:21:28 AM UTC 24	Aug 25 09:21:30 AM UTC 24	167075432 ps
T601	/workspaces/repo/scratch/os_regression_2024_08_24/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.186227574			Aug 25 09:21:30 AM UTC 24	Aug 25 09:21:33 AM UTC 24	158784342 ps