| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 97.39 | 98.22 | 96.08 | 97.44 | 94.92 | 98.38 | 98.17 | 98.55 |
| T248 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.3375376581 | Sep 01 12:28:49 PM UTC 24 | Sep 01 12:28:53 PM UTC 24 | 112730140 ps | ||
| T3797 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.1951799938 | Sep 01 12:28:45 PM UTC 24 | Sep 01 12:28:53 PM UTC 24 | 528170158 ps | ||
| T272 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3423780437 | Sep 01 12:28:51 PM UTC 24 | Sep 01 12:28:53 PM UTC 24 | 91810159 ps | ||
| T290 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.3593406292 | Sep 01 12:28:51 PM UTC 24 | Sep 01 12:28:53 PM UTC 24 | 93262034 ps | ||
| T273 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.582883201 | Sep 01 12:28:46 PM UTC 24 | Sep 01 12:28:53 PM UTC 24 | 281074870 ps | ||
| T3798 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.2896951987 | Sep 01 12:28:50 PM UTC 24 | Sep 01 12:28:54 PM UTC 24 | 108415470 ps | ||
| T274 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.858048116 | Sep 01 12:28:51 PM UTC 24 | Sep 01 12:28:54 PM UTC 24 | 89814380 ps | ||
| T291 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.1203908971 | Sep 01 12:28:53 PM UTC 24 | Sep 01 12:28:55 PM UTC 24 | 39557396 ps | ||
| T246 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.3281172392 | Sep 01 12:28:50 PM UTC 24 | Sep 01 12:28:55 PM UTC 24 | 740031688 ps | ||
| T258 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.1592659839 | Sep 01 12:28:52 PM UTC 24 | Sep 01 12:28:55 PM UTC 24 | 115434868 ps | ||
| T280 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.1471141609 | Sep 01 12:28:52 PM UTC 24 | Sep 01 12:28:56 PM UTC 24 | 146442399 ps | ||
| T281 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.3912636066 | Sep 01 12:28:54 PM UTC 24 | Sep 01 12:28:56 PM UTC 24 | 54397215 ps | ||
| T3799 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.2128437817 | Sep 01 12:28:52 PM UTC 24 | Sep 01 12:28:56 PM UTC 24 | 129397561 ps | ||
| T288 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.259163254 | Sep 01 12:28:54 PM UTC 24 | Sep 01 12:28:56 PM UTC 24 | 104086160 ps | ||
| T282 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3692373170 | Sep 01 12:28:54 PM UTC 24 | Sep 01 12:28:57 PM UTC 24 | 120146686 ps | ||
| T275 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.1494392942 | Sep 01 12:28:53 PM UTC 24 | Sep 01 12:28:57 PM UTC 24 | 195075572 ps | ||
| T259 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.3861316404 | Sep 01 12:28:54 PM UTC 24 | Sep 01 12:28:57 PM UTC 24 | 120885734 ps | ||
| T3800 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.3605873861 | Sep 01 12:28:53 PM UTC 24 | Sep 01 12:28:57 PM UTC 24 | 298460939 ps | ||
| T297 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2388261030 | Sep 01 12:28:55 PM UTC 24 | Sep 01 12:28:58 PM UTC 24 | 75731738 ps | ||
| T252 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.4140002320 | Sep 01 12:28:53 PM UTC 24 | Sep 01 12:28:58 PM UTC 24 | 308668904 ps | ||
| T276 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.988718202 | Sep 01 12:28:51 PM UTC 24 | Sep 01 12:28:58 PM UTC 24 | 961488745 ps | ||
| T260 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.700267385 | Sep 01 12:28:53 PM UTC 24 | Sep 01 12:28:58 PM UTC 24 | 445904393 ps | ||
| T253 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.1537192367 | Sep 01 12:28:54 PM UTC 24 | Sep 01 12:28:59 PM UTC 24 | 290472607 ps | ||
| T277 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.1277547406 | Sep 01 12:28:56 PM UTC 24 | Sep 01 12:28:59 PM UTC 24 | 130700254 ps | ||
| T555 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3343576920 | Sep 01 12:28:54 PM UTC 24 | Sep 01 12:28:59 PM UTC 24 | 341561516 ps | ||
| T289 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.1697782495 | Sep 01 12:28:57 PM UTC 24 | Sep 01 12:28:59 PM UTC 24 | 79807652 ps | ||
| T3801 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.1900943003 | Sep 01 12:28:57 PM UTC 24 | Sep 01 12:28:59 PM UTC 24 | 123249069 ps | ||
| T3802 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.152866369 | Sep 01 12:28:57 PM UTC 24 | Sep 01 12:28:59 PM UTC 24 | 105054335 ps | ||
| T278 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.2266457567 | Sep 01 12:28:54 PM UTC 24 | Sep 01 12:29:00 PM UTC 24 | 131913224 ps | ||
| T292 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.2676588285 | Sep 01 12:28:58 PM UTC 24 | Sep 01 12:29:00 PM UTC 24 | 52768878 ps | ||
| T3803 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.4189693833 | Sep 01 12:28:57 PM UTC 24 | Sep 01 12:29:01 PM UTC 24 | 287054893 ps | ||
| T3804 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.808224557 | Sep 01 12:28:57 PM UTC 24 | Sep 01 12:29:01 PM UTC 24 | 94699959 ps | ||
| T3805 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.533874639 | Sep 01 12:28:58 PM UTC 24 | Sep 01 12:29:01 PM UTC 24 | 59136544 ps | ||
| T3806 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.693613695 | Sep 01 12:28:48 PM UTC 24 | Sep 01 12:29:01 PM UTC 24 | 3502432608 ps | ||
| T3807 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.3197625881 | Sep 01 12:28:54 PM UTC 24 | Sep 01 12:29:05 PM UTC 24 | 1094164497 ps | ||
| T3808 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.1316429321 | Sep 01 12:28:58 PM UTC 24 | Sep 01 12:29:01 PM UTC 24 | 195139077 ps | ||
| T300 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3452918854 | Sep 01 12:29:00 PM UTC 24 | Sep 01 12:29:02 PM UTC 24 | 38972313 ps | ||
| T3809 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.3329091609 | Sep 01 12:29:00 PM UTC 24 | Sep 01 12:29:02 PM UTC 24 | 52233880 ps | ||
| T3810 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1470317173 | Sep 01 12:29:00 PM UTC 24 | Sep 01 12:29:02 PM UTC 24 | 99554145 ps | ||
| T3811 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.3868855128 | Sep 01 12:28:55 PM UTC 24 | Sep 01 12:29:02 PM UTC 24 | 166224537 ps | ||
| T3812 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.1255445097 | Sep 01 12:29:00 PM UTC 24 | Sep 01 12:29:03 PM UTC 24 | 349392728 ps | ||
| T3813 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.2757229356 | Sep 01 12:29:01 PM UTC 24 | Sep 01 12:29:03 PM UTC 24 | 65306931 ps | ||
| T294 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.749499835 | Sep 01 12:29:01 PM UTC 24 | Sep 01 12:29:03 PM UTC 24 | 102322121 ps | ||
| T556 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.3296062773 | Sep 01 12:28:58 PM UTC 24 | Sep 01 12:29:03 PM UTC 24 | 417373763 ps | ||
| T254 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.687912014 | Sep 01 12:28:59 PM UTC 24 | Sep 01 12:29:03 PM UTC 24 | 167504634 ps | ||
| T255 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.2916486809 | Sep 01 12:28:58 PM UTC 24 | Sep 01 12:29:04 PM UTC 24 | 302511401 ps | ||
| T3814 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1223254565 | Sep 01 12:28:59 PM UTC 24 | Sep 01 12:29:04 PM UTC 24 | 131887005 ps | ||
| T298 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.252136503 | Sep 01 12:29:02 PM UTC 24 | Sep 01 12:29:05 PM UTC 24 | 56773312 ps | ||
| T3815 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.1771916156 | Sep 01 12:29:02 PM UTC 24 | Sep 01 12:29:05 PM UTC 24 | 35393592 ps | ||
| T3816 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.3545303502 | Sep 01 12:29:02 PM UTC 24 | Sep 01 12:29:06 PM UTC 24 | 67713444 ps | ||
| T3817 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2218879878 | Sep 01 12:29:02 PM UTC 24 | Sep 01 12:29:06 PM UTC 24 | 164316525 ps | ||
| T257 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.4065920281 | Sep 01 12:29:01 PM UTC 24 | Sep 01 12:29:06 PM UTC 24 | 445218599 ps | ||
| T301 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.3527791970 | Sep 01 12:29:04 PM UTC 24 | Sep 01 12:29:06 PM UTC 24 | 61121514 ps | ||
| T256 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.2258285362 | Sep 01 12:29:02 PM UTC 24 | Sep 01 12:29:06 PM UTC 24 | 81747247 ps | ||
| T3818 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.690802409 | Sep 01 12:29:04 PM UTC 24 | Sep 01 12:29:06 PM UTC 24 | 55202187 ps | ||
| T3819 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.242118866 | Sep 01 12:29:01 PM UTC 24 | Sep 01 12:29:06 PM UTC 24 | 238181641 ps | ||
| T3820 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.3736279248 | Sep 01 12:29:02 PM UTC 24 | Sep 01 12:29:06 PM UTC 24 | 384327388 ps | ||
| T3821 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2686704052 | Sep 01 12:29:04 PM UTC 24 | Sep 01 12:29:07 PM UTC 24 | 61154409 ps | ||
| T299 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.2708235148 | Sep 01 12:29:05 PM UTC 24 | Sep 01 12:29:08 PM UTC 24 | 94799176 ps | ||
| T559 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.2758689724 | Sep 01 12:29:02 PM UTC 24 | Sep 01 12:29:08 PM UTC 24 | 631159038 ps | ||
| T3822 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1064082847 | Sep 01 12:28:57 PM UTC 24 | Sep 01 12:29:08 PM UTC 24 | 648005496 ps | ||
| T557 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1559207743 | Sep 01 12:29:00 PM UTC 24 | Sep 01 12:29:08 PM UTC 24 | 693477580 ps | ||
| T3823 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.374302825 | Sep 01 12:29:05 PM UTC 24 | Sep 01 12:29:08 PM UTC 24 | 121115567 ps | ||
| T3824 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.565351635 | Sep 01 12:29:05 PM UTC 24 | Sep 01 12:29:08 PM UTC 24 | 104000553 ps | ||
| T3825 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.3059690802 | Sep 01 12:29:04 PM UTC 24 | Sep 01 12:29:08 PM UTC 24 | 100102699 ps | ||
| T3826 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.3507895150 | Sep 01 12:29:07 PM UTC 24 | Sep 01 12:29:09 PM UTC 24 | 64025767 ps | ||
| T3827 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.1667431192 | Sep 01 12:29:05 PM UTC 24 | Sep 01 12:29:09 PM UTC 24 | 131815409 ps | ||
| T293 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.4103191679 | Sep 01 12:29:07 PM UTC 24 | Sep 01 12:29:09 PM UTC 24 | 93458901 ps | ||
| T3828 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.1294403370 | Sep 01 12:29:05 PM UTC 24 | Sep 01 12:29:09 PM UTC 24 | 173776102 ps | ||
| T3829 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.1881941011 | Sep 01 12:29:05 PM UTC 24 | Sep 01 12:29:09 PM UTC 24 | 387414157 ps | ||
| T3830 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.190564101 | Sep 01 12:29:06 PM UTC 24 | Sep 01 12:29:09 PM UTC 24 | 90703939 ps | ||
| T295 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3013723457 | Sep 01 12:29:21 PM UTC 24 | Sep 01 12:29:23 PM UTC 24 | 59441349 ps | ||
| T3831 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.368080478 | Sep 01 12:29:07 PM UTC 24 | Sep 01 12:29:09 PM UTC 24 | 91502071 ps | ||
| T3832 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1856674946 | Sep 01 12:29:06 PM UTC 24 | Sep 01 12:29:10 PM UTC 24 | 85891980 ps | ||
| T296 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.1990627338 | Sep 01 12:29:09 PM UTC 24 | Sep 01 12:29:11 PM UTC 24 | 58370343 ps | ||
| T3833 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.3082864102 | Sep 01 12:29:08 PM UTC 24 | Sep 01 12:29:11 PM UTC 24 | 87712937 ps | ||
| T3834 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.840803133 | Sep 01 12:29:09 PM UTC 24 | Sep 01 12:29:12 PM UTC 24 | 105348081 ps | ||
| T3835 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.1617068670 | Sep 01 12:29:09 PM UTC 24 | Sep 01 12:29:12 PM UTC 24 | 89673543 ps | ||
| T3836 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.672399090 | Sep 01 12:29:07 PM UTC 24 | Sep 01 12:29:12 PM UTC 24 | 124431314 ps | ||
| T560 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.326075219 | Sep 01 12:29:07 PM UTC 24 | Sep 01 12:29:12 PM UTC 24 | 718825546 ps | ||
| T3837 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.109020917 | Sep 01 12:29:09 PM UTC 24 | Sep 01 12:29:12 PM UTC 24 | 71588191 ps | ||
| T558 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.3345027400 | Sep 01 12:29:04 PM UTC 24 | Sep 01 12:29:12 PM UTC 24 | 2520880113 ps | ||
| T3838 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.872970658 | Sep 01 12:29:09 PM UTC 24 | Sep 01 12:29:13 PM UTC 24 | 154937766 ps | ||
| T3839 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.1939321847 | Sep 01 12:29:11 PM UTC 24 | Sep 01 12:29:13 PM UTC 24 | 77131807 ps | ||
| T3840 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3387491423 | Sep 01 12:29:11 PM UTC 24 | Sep 01 12:29:13 PM UTC 24 | 60836188 ps | ||
| T3841 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1492951099 | Sep 01 12:29:08 PM UTC 24 | Sep 01 12:29:13 PM UTC 24 | 270642123 ps | ||
| T3842 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2058047866 | Sep 01 12:29:11 PM UTC 24 | Sep 01 12:29:13 PM UTC 24 | 88757055 ps | ||
| T3843 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.4084883788 | Sep 01 12:29:11 PM UTC 24 | Sep 01 12:29:14 PM UTC 24 | 74060883 ps | ||
| T3844 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.518973130 | Sep 01 12:29:11 PM UTC 24 | Sep 01 12:29:14 PM UTC 24 | 122971561 ps | ||
| T3845 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.1304788816 | Sep 01 12:29:09 PM UTC 24 | Sep 01 12:29:14 PM UTC 24 | 219864625 ps | ||
| T564 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.551140912 | Sep 01 12:29:09 PM UTC 24 | Sep 01 12:29:14 PM UTC 24 | 458668992 ps | ||
| T3846 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.328434192 | Sep 01 12:29:11 PM UTC 24 | Sep 01 12:29:14 PM UTC 24 | 308493149 ps | ||
| T3847 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.2406626183 | Sep 01 12:29:12 PM UTC 24 | Sep 01 12:29:14 PM UTC 24 | 45932163 ps | ||
| T3848 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.3869191622 | Sep 01 12:29:12 PM UTC 24 | Sep 01 12:29:15 PM UTC 24 | 61144939 ps | ||
| T3849 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.524235802 | Sep 01 12:29:11 PM UTC 24 | Sep 01 12:29:15 PM UTC 24 | 89483063 ps | ||
| T3850 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.3154010828 | Sep 01 12:29:13 PM UTC 24 | Sep 01 12:29:15 PM UTC 24 | 99079564 ps | ||
| T563 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.2023875701 | Sep 01 12:29:08 PM UTC 24 | Sep 01 12:29:15 PM UTC 24 | 1111804026 ps | ||
| T3851 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.367311978 | Sep 01 12:29:12 PM UTC 24 | Sep 01 12:29:15 PM UTC 24 | 61626729 ps | ||
| T3852 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.880751508 | Sep 01 12:29:12 PM UTC 24 | Sep 01 12:29:16 PM UTC 24 | 145460914 ps | ||
| T3853 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.2021372868 | Sep 01 12:29:14 PM UTC 24 | Sep 01 12:29:16 PM UTC 24 | 41612098 ps | ||
| T3854 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.1722756756 | Sep 01 12:29:14 PM UTC 24 | Sep 01 12:29:16 PM UTC 24 | 63411019 ps | ||
| T3855 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.2566857537 | Sep 01 12:29:14 PM UTC 24 | Sep 01 12:29:16 PM UTC 24 | 76293188 ps | ||
| T3856 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.3592266981 | Sep 01 12:29:14 PM UTC 24 | Sep 01 12:29:16 PM UTC 24 | 58322604 ps | ||
| T565 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.4134648441 | Sep 01 12:29:12 PM UTC 24 | Sep 01 12:29:17 PM UTC 24 | 365982614 ps | ||
| T3857 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.3892348966 | Sep 01 12:29:11 PM UTC 24 | Sep 01 12:29:17 PM UTC 24 | 658454645 ps | ||
| T3858 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.2496327997 | Sep 01 12:29:14 PM UTC 24 | Sep 01 12:29:17 PM UTC 24 | 195562325 ps | ||
| T3859 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.1225664373 | Sep 01 12:29:15 PM UTC 24 | Sep 01 12:29:17 PM UTC 24 | 55482576 ps | ||
| T3860 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.377820862 | Sep 01 12:29:15 PM UTC 24 | Sep 01 12:29:18 PM UTC 24 | 54995441 ps | ||
| T3861 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.4209706897 | Sep 01 12:29:16 PM UTC 24 | Sep 01 12:29:18 PM UTC 24 | 47081619 ps | ||
| T3862 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.4237727176 | Sep 01 12:29:14 PM UTC 24 | Sep 01 12:29:18 PM UTC 24 | 162122029 ps | ||
| T3863 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1096297874 | Sep 01 12:29:15 PM UTC 24 | Sep 01 12:29:18 PM UTC 24 | 234962568 ps | ||
| T3864 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.2226329371 | Sep 01 12:29:17 PM UTC 24 | Sep 01 12:29:19 PM UTC 24 | 49591989 ps | ||
| T3865 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.517630079 | Sep 01 12:29:15 PM UTC 24 | Sep 01 12:29:19 PM UTC 24 | 201251590 ps | ||
| T3866 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.413670575 | Sep 01 12:29:15 PM UTC 24 | Sep 01 12:29:19 PM UTC 24 | 100455367 ps | ||
| T3867 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3509401750 | Sep 01 12:29:17 PM UTC 24 | Sep 01 12:29:19 PM UTC 24 | 48116041 ps | ||
| T3868 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.731117959 | Sep 01 12:29:15 PM UTC 24 | Sep 01 12:29:19 PM UTC 24 | 154198430 ps | ||
| T3869 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.1977451468 | Sep 01 12:29:17 PM UTC 24 | Sep 01 12:29:19 PM UTC 24 | 65243163 ps | ||
| T3870 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.1933041375 | Sep 01 12:29:17 PM UTC 24 | Sep 01 12:29:20 PM UTC 24 | 80410940 ps | ||
| T3871 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.2932630605 | Sep 01 12:29:17 PM UTC 24 | Sep 01 12:29:20 PM UTC 24 | 87814443 ps | ||
| T3872 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.2987152405 | Sep 01 12:29:17 PM UTC 24 | Sep 01 12:29:20 PM UTC 24 | 123776157 ps | ||
| T561 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.1511193548 | Sep 01 12:29:14 PM UTC 24 | Sep 01 12:29:20 PM UTC 24 | 1073493348 ps | ||
| T3873 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.456789512 | Sep 01 12:29:18 PM UTC 24 | Sep 01 12:29:20 PM UTC 24 | 51669875 ps | ||
| T3874 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.1901479682 | Sep 01 12:29:18 PM UTC 24 | Sep 01 12:29:20 PM UTC 24 | 50155099 ps | ||
| T3875 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.3259318138 | Sep 01 12:29:18 PM UTC 24 | Sep 01 12:29:21 PM UTC 24 | 57149364 ps | ||
| T3876 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.2339349094 | Sep 01 12:29:19 PM UTC 24 | Sep 01 12:29:21 PM UTC 24 | 90256373 ps | ||
| T3877 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2799828431 | Sep 01 12:29:16 PM UTC 24 | Sep 01 12:29:21 PM UTC 24 | 1323049172 ps | ||
| T3878 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.278323036 | Sep 01 12:29:18 PM UTC 24 | Sep 01 12:29:21 PM UTC 24 | 103924381 ps | ||
| T3879 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.3888177267 | Sep 01 12:29:19 PM UTC 24 | Sep 01 12:29:21 PM UTC 24 | 87611278 ps | ||
| T3880 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.1511496168 | Sep 01 12:29:19 PM UTC 24 | Sep 01 12:29:21 PM UTC 24 | 61412779 ps | ||
| T3881 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.1966829313 | Sep 01 12:29:20 PM UTC 24 | Sep 01 12:29:22 PM UTC 24 | 84394135 ps | ||
| T3882 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.2711450328 | Sep 01 12:29:20 PM UTC 24 | Sep 01 12:29:22 PM UTC 24 | 39314468 ps | ||
| T3883 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.2728800838 | Sep 01 12:29:20 PM UTC 24 | Sep 01 12:29:22 PM UTC 24 | 68201597 ps | ||
| T3884 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.47603896 | Sep 01 12:29:17 PM UTC 24 | Sep 01 12:29:22 PM UTC 24 | 314339840 ps | ||
| T3885 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.1253834103 | Sep 01 12:29:20 PM UTC 24 | Sep 01 12:29:22 PM UTC 24 | 54982656 ps | ||
| T3886 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1972576490 | Sep 01 12:29:20 PM UTC 24 | Sep 01 12:29:22 PM UTC 24 | 31912688 ps | ||
| T3887 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.3729581615 | Sep 01 12:29:20 PM UTC 24 | Sep 01 12:29:22 PM UTC 24 | 40571187 ps | ||
| T3888 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.1819393070 | Sep 01 12:29:15 PM UTC 24 | Sep 01 12:29:23 PM UTC 24 | 898779883 ps | ||
| T3889 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.882289695 | Sep 01 12:29:21 PM UTC 24 | Sep 01 12:29:23 PM UTC 24 | 51594818 ps | ||
| T3890 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3420289697 | Sep 01 12:29:21 PM UTC 24 | Sep 01 12:29:23 PM UTC 24 | 44218301 ps | ||
| T3891 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.4215551883 | Sep 01 12:29:21 PM UTC 24 | Sep 01 12:29:23 PM UTC 24 | 41480390 ps | ||
| T3892 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1718404243 | Sep 01 12:29:21 PM UTC 24 | Sep 01 12:29:23 PM UTC 24 | 61824681 ps | ||
| T3893 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.3091721727 | Sep 01 12:29:22 PM UTC 24 | Sep 01 12:29:24 PM UTC 24 | 101864323 ps | ||
| T3894 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.1479905710 | Sep 01 12:29:22 PM UTC 24 | Sep 01 12:29:24 PM UTC 24 | 46834318 ps | ||
| T3895 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.1528878164 | Sep 01 12:29:22 PM UTC 24 | Sep 01 12:29:24 PM UTC 24 | 83472292 ps | ||
| T3896 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3695380829 | Sep 01 12:29:22 PM UTC 24 | Sep 01 12:29:24 PM UTC 24 | 32831797 ps | ||
| T3897 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1153562794 | Sep 01 12:29:22 PM UTC 24 | Sep 01 12:29:24 PM UTC 24 | 80813132 ps | ||
| T3898 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.2491397142 | Sep 01 12:29:22 PM UTC 24 | Sep 01 12:29:24 PM UTC 24 | 55846167 ps | ||
| T3899 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.1155005813 | Sep 01 12:29:22 PM UTC 24 | Sep 01 12:29:24 PM UTC 24 | 82765061 ps | ||
| T3900 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.3263386887 | Sep 01 12:29:22 PM UTC 24 | Sep 01 12:29:24 PM UTC 24 | 37493021 ps | ||
| T562 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.534344075 | Sep 01 12:29:17 PM UTC 24 | Sep 01 12:29:25 PM UTC 24 | 1149889336 ps | ||
| T3901 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.2498754604 | Sep 01 12:29:23 PM UTC 24 | Sep 01 12:29:25 PM UTC 24 | 41138476 ps | ||
| T3902 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.4044100188 | Sep 01 12:29:23 PM UTC 24 | Sep 01 12:29:25 PM UTC 24 | 42217510 ps | ||
| T3903 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.4211325916 | Sep 01 12:29:23 PM UTC 24 | Sep 01 12:29:25 PM UTC 24 | 75688134 ps | ||
| T3904 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.4111455083 | Sep 01 12:29:23 PM UTC 24 | Sep 01 12:29:25 PM UTC 24 | 38865946 ps | ||
| T3905 | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.1746931980 | Sep 01 12:29:23 PM UTC 24 | Sep 01 12:29:25 PM UTC 24 | 44069159 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.3881319653 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 399680401 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:44:05 PM UTC 24 |
| Finished | Sep 01 12:44:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881319653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_data_toggle_clear.3881319653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.403264552 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 1146465750 ps |
| CPU time | 2.61 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:44:09 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=403264552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_disable_endpoint.403264552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.1960198952 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 10226149271 ps |
| CPU time | 20.34 seconds |
| Started | Sep 01 12:44:03 PM UTC 24 |
| Finished | Sep 01 12:44:24 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1960198952 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.1960198952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.3806302233 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 2443315347 ps |
| CPU time | 35.31 seconds |
| Started | Sep 01 12:44:11 PM UTC 24 |
| Finished | Sep 01 12:44:48 PM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806302233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.3806302233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.3159437493 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 43947949 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:28:45 PM UTC 24 |
| Finished | Sep 01 12:28:47 PM UTC 24 |
| Peak memory | 216592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159437493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.3159437493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.2040826768 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 750564567 ps |
| CPU time | 3.89 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:44:11 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040826768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.2040826768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.3559971300 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 8465342721 ps |
| CPU time | 14.74 seconds |
| Started | Sep 01 12:44:09 PM UTC 24 |
| Finished | Sep 01 12:44:25 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559971300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_resume.3559971300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.680905513 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 21048599909 ps |
| CPU time | 52.99 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:45:00 PM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=680905513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_device_address.680905513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2980454673 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 185254990 ps |
| CPU time | 3.02 seconds |
| Started | Sep 01 12:28:47 PM UTC 24 |
| Finished | Sep 01 12:28:51 PM UTC 24 |
| Peak memory | 217472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980454673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.2980454673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.1111222305 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 738421102 ps |
| CPU time | 3.77 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:44:10 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1111222305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.1111222305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.1279451067 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 16356187904 ps |
| CPU time | 26.77 seconds |
| Started | Sep 01 12:45:20 PM UTC 24 |
| Finished | Sep 01 12:45:48 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279451067 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.1279451067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.2935406743 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 499367355 ps |
| CPU time | 2.54 seconds |
| Started | Sep 01 12:44:29 PM UTC 24 |
| Finished | Sep 01 12:44:32 PM UTC 24 |
| Peak memory | 251552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935406743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.2935406743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.2157063687 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 332994588 ps |
| CPU time | 2.06 seconds |
| Started | Sep 01 12:44:17 PM UTC 24 |
| Finished | Sep 01 12:44:20 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157063687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test _mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.2157063687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.1455710115 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 485513121 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1455710115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_t x_rx_disruption.1455710115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.2946406223 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 365741872 ps |
| CPU time | 3.92 seconds |
| Started | Sep 01 12:28:47 PM UTC 24 |
| Finished | Sep 01 12:28:51 PM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2946406223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.2946406223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.1913671664 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 37923929 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:44:19 PM UTC 24 |
| Finished | Sep 01 12:44:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913671664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.1913671664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.3452918854 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 38972313 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:29:00 PM UTC 24 |
| Finished | Sep 01 12:29:02 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452918854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.3452918854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.3848979322 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 245068691 ps |
| CPU time | 1.92 seconds |
| Started | Sep 01 12:44:22 PM UTC 24 |
| Finished | Sep 01 12:44:25 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848979322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_rx_full.3848979322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.974365043 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 138006658 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:44:08 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=974365043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_disconnected.974365043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.1975355314 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 6077317909 ps |
| CPU time | 107.21 seconds |
| Started | Sep 01 12:44:27 PM UTC 24 |
| Finished | Sep 01 12:46:17 PM UTC 24 |
| Peak memory | 229748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1975355314 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.1975355314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.2246870686 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 7704894288 ps |
| CPU time | 34.37 seconds |
| Started | Sep 01 12:50:51 PM UTC 24 |
| Finished | Sep 01 12:51:27 PM UTC 24 |
| Peak memory | 227748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246870686 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.2246870686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.2623081646 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 14375471416 ps |
| CPU time | 18.43 seconds |
| Started | Sep 01 12:44:03 PM UTC 24 |
| Finished | Sep 01 12:44:23 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2623081646 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.2623081646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.2309614 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 20192741351 ps |
| CPU time | 51.67 seconds |
| Started | Sep 01 12:44:21 PM UTC 24 |
| Finished | Sep 01 12:45:14 PM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_resume_link_active.2309614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.3281172392 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 740031688 ps |
| CPU time | 4.49 seconds |
| Started | Sep 01 12:28:50 PM UTC 24 |
| Finished | Sep 01 12:28:55 PM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3281172392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.3281172392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.1689122852 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 23194240622 ps |
| CPU time | 48.22 seconds |
| Started | Sep 01 12:46:34 PM UTC 24 |
| Finished | Sep 01 12:47:24 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689122852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.1689122852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.2544564527 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 496348404 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2544564527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.2544564527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.2285171685 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 553646121 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2285171685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.2285171685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.952648368 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 9201344456 ps |
| CPU time | 39.15 seconds |
| Started | Sep 01 12:44:19 PM UTC 24 |
| Finished | Sep 01 12:44:59 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=952648368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_pkt_buffer.952648368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.2672639484 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 481531676 ps |
| CPU time | 2.84 seconds |
| Started | Sep 01 12:44:28 PM UTC 24 |
| Finished | Sep 01 12:44:32 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2672639484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.2672639484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.801264495 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 600142455 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=801264495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.801264495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.410788197 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 51852379579 ps |
| CPU time | 93.88 seconds |
| Started | Sep 01 12:51:20 PM UTC 24 |
| Finished | Sep 01 12:52:56 PM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=410788197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_device_address.410788197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.1118922503 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 620610494 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 12:52:59 PM UTC 24 |
| Finished | Sep 01 12:53:02 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118922503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.1118922503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.2708235148 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 94799176 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:29:05 PM UTC 24 |
| Finished | Sep 01 12:29:08 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2708235148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.2708235148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.1256933852 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 559571109 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1256933852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.1256933852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.634542294 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 683436761 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:37 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=634542294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.634542294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.4124185787 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 176754548 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:44:03 PM UTC 24 |
| Finished | Sep 01 12:44:05 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124185787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.4124185787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3051580359 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 215727018 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 12:44:22 PM UTC 24 |
| Finished | Sep 01 12:44:25 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051580359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_crc_err.3051580359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.491486305 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 510814516 ps |
| CPU time | 2.85 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:44:12 PM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=491486305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.491486305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.3128328413 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 575574523 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3128328413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.3128328413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.3489554924 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 724808525 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489554924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.3489554924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.201874752 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 585263244 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=201874752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.201874752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.3823758255 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 787808362 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823758255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.3823758255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.412586455 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 551840511 ps |
| CPU time | 2.17 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=412586455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.412586455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.4250688392 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 574758044 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250688392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.4250688392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.2437405314 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 1152834807 ps |
| CPU time | 5.91 seconds |
| Started | Sep 01 12:49:23 PM UTC 24 |
| Finished | Sep 01 12:49:30 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437405314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.2437405314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.1345215680 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 262026779 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 12:52:59 PM UTC 24 |
| Finished | Sep 01 12:53:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1345215680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_fifo_levels.1345215680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.21889475 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 477462081 ps |
| CPU time | 2.31 seconds |
| Started | Sep 01 12:51:50 PM UTC 24 |
| Finished | Sep 01 12:51:54 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=21889475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.21889475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.1020160152 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 640027876 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020160152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.1020160152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.3897912728 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 497589923 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897912728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.3897912728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.2253427460 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 182252094 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:44:59 PM UTC 24 |
| Finished | Sep 01 12:45:02 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253427460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.2253427460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.3561422686 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 4065679573 ps |
| CPU time | 117.58 seconds |
| Started | Sep 01 12:44:21 PM UTC 24 |
| Finished | Sep 01 12:46:21 PM UTC 24 |
| Peak memory | 234188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561422686 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.3561422686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.2504573942 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 418548931 ps |
| CPU time | 2.9 seconds |
| Started | Sep 01 12:44:24 PM UTC 24 |
| Finished | Sep 01 12:44:27 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504573942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.2504573942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.2416781294 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 34198984047 ps |
| CPU time | 61.32 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:52:50 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416781294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.2416781294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.1826580576 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 495687707 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1826580576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.1826580576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.4193499275 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 824803941 ps |
| CPU time | 1.96 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4193499275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.4193499275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.4052608569 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 829664034 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:39 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052608569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.4052608569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.4172228530 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 377934581 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172228530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.4172228530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.3070311032 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 44982935 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:44:30 PM UTC 24 |
| Finished | Sep 01 12:44:32 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070311032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.3070311032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.2450353260 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 3807857749 ps |
| CPU time | 44.52 seconds |
| Started | Sep 01 12:44:21 PM UTC 24 |
| Finished | Sep 01 12:45:07 PM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450353260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.2450353260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.534344075 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 1149889336 ps |
| CPU time | 6.78 seconds |
| Started | Sep 01 12:29:17 PM UTC 24 |
| Finished | Sep 01 12:29:25 PM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=534344075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.534344075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.1670098675 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 199948572 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 12:44:19 PM UTC 24 |
| Finished | Sep 01 12:44:21 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670098675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.1670098675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.3629367545 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 409384040 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3629367545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.3629367545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.3281330014 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 634332071 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:22:17 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3281330014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.3281330014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.3084717427 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 398760822 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084717427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.3084717427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.1494158985 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 402483108 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494158985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.1494158985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.1848862337 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 262839523 ps |
| CPU time | 1.99 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:44:09 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848862337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_fifo_levels.1848862337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.4106274858 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 80511089 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 12:28:46 PM UTC 24 |
| Finished | Sep 01 12:28:49 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106274858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.4106274858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.1911541507 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 148726636 ps |
| CPU time | 2.95 seconds |
| Started | Sep 01 12:28:45 PM UTC 24 |
| Finished | Sep 01 12:28:49 PM UTC 24 |
| Peak memory | 231768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1911541507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.1911541507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3938366580 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 131530157 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:44:03 PM UTC 24 |
| Finished | Sep 01 12:44:05 PM UTC 24 |
| Peak memory | 216432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3938366580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.3938366580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.1990627338 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 58370343 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:29:09 PM UTC 24 |
| Finished | Sep 01 12:29:11 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1990627338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.1990627338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.1229915021 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 5112645604 ps |
| CPU time | 157.83 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:46:47 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1229915021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.1229915021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.420098204 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 1186573861 ps |
| CPU time | 5.54 seconds |
| Started | Sep 01 12:44:33 PM UTC 24 |
| Finished | Sep 01 12:44:40 PM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=420098204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.420098204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1732929584 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 276900059 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1732929584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.1732929584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.1149089408 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 657370528 ps |
| CPU time | 1.9 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149089408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.1149089408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.2155217350 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 260947707 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155217350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_rx_full.2155217350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.130627516 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 523744205 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:05:16 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=130627516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.130627516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.8407449 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 666888884 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=8407449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.8407449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.3334191063 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 188449176 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 12:44:26 PM UTC 24 |
| Finished | Sep 01 12:44:29 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3334191063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.3334191063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.149585403 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 4898306595 ps |
| CPU time | 107.25 seconds |
| Started | Sep 01 12:47:59 PM UTC 24 |
| Finished | Sep 01 12:49:49 PM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=149585403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.149585403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.996693290 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 4355765156 ps |
| CPU time | 149.45 seconds |
| Started | Sep 01 12:44:49 PM UTC 24 |
| Finished | Sep 01 12:47:22 PM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=996693290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.996693290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.1194317030 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 60794984 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:02 PM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194317030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.1194317030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.3345027400 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 2520880113 ps |
| CPU time | 7.62 seconds |
| Started | Sep 01 12:29:04 PM UTC 24 |
| Finished | Sep 01 12:29:12 PM UTC 24 |
| Peak memory | 217676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3345027400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.3345027400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.2638264009 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 245452949 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 12:54:02 PM UTC 24 |
| Finished | Sep 01 12:54:05 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638264009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_nak_trans.2638264009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.3642493374 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 225575887 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3642493374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.3642493374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.3001613775 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 496891037 ps |
| CPU time | 2.85 seconds |
| Started | Sep 01 12:45:16 PM UTC 24 |
| Finished | Sep 01 12:45:20 PM UTC 24 |
| Peak memory | 216724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3001613775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.3001613775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.816765499 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 330107528 ps |
| CPU time | 3.2 seconds |
| Started | Sep 01 12:28:47 PM UTC 24 |
| Finished | Sep 01 12:28:51 PM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816765499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.816765499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.2023875701 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 1111804026 ps |
| CPU time | 6.2 seconds |
| Started | Sep 01 12:29:08 PM UTC 24 |
| Finished | Sep 01 12:29:15 PM UTC 24 |
| Peak memory | 217492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2023875701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.2023875701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.4097761107 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 146106469 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:44:25 PM UTC 24 |
| Finished | Sep 01 12:44:27 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097761107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_setup_trans_ignored.4097761107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.3584520648 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 326425029 ps |
| CPU time | 1.86 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:18 PM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584520648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_rx_full.3584520648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.1943992550 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 319250871 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943992550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 100.usbdev_fifo_levels.1943992550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.3182220242 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 279366677 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182220242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 102.usbdev_fifo_levels.3182220242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.4165295150 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 261272529 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165295150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 103.usbdev_fifo_levels.4165295150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.2266280720 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 265061275 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266280720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 104.usbdev_fifo_levels.2266280720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.3795061822 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 254302377 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:19:44 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795061822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 106.usbdev_fifo_levels.3795061822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.4121085216 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 256580013 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 214804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121085216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 108.usbdev_fifo_levels.4121085216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.1407392933 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 288534496 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 12:51:26 PM UTC 24 |
| Finished | Sep 01 12:51:28 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407392933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.1407392933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.3709548774 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 315848504 ps |
| CPU time | 2.06 seconds |
| Started | Sep 01 12:51:26 PM UTC 24 |
| Finished | Sep 01 12:51:29 PM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709548774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_fifo_levels.3709548774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.3659788798 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 196428481 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 216664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3659788798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 110.usbdev_fifo_levels.3659788798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/110.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.4163371875 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 245024762 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163371875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 112.usbdev_fifo_levels.4163371875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.2778513202 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 400991524 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778513202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.2778513202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.3598284205 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 153921982 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598284205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 115.usbdev_fifo_levels.3598284205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/115.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.1041389584 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 169904228 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:51:50 PM UTC 24 |
| Finished | Sep 01 12:51:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1041389584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_fifo_levels.1041389584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.142184683 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 288978396 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=142184683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 120.usbdev_fifo_levels.142184683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/120.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.959142437 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 269426814 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959142437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 122.usbdev_fifo_levels.959142437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/122.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.4231949736 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 250478867 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231949736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 123.usbdev_fifo_levels.4231949736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.3562453348 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 289512642 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562453348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 124.usbdev_fifo_levels.3562453348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/124.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.3158423113 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 267778783 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3158423113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 125.usbdev_fifo_levels.3158423113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.3661053724 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 166402481 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 214564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661053724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 126.usbdev_fifo_levels.3661053724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.3580224467 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 251657544 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580224467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 128.usbdev_fifo_levels.3580224467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.2217919993 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 348758428 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:20:59 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217919993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 129.usbdev_fifo_levels.2217919993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.2355957137 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 179900892 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355957137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 131.usbdev_fifo_levels.2355957137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/131.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.3508546375 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 280970581 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508546375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 133.usbdev_fifo_levels.3508546375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.2660228315 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 199991469 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660228315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.2660228315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.52278284 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 300001996 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=52278284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 135.usbdev_fifo_levels.52278284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/135.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.1620216935 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 243788943 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620216935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 138.usbdev_fifo_levels.1620216935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/138.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.765664177 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 301479342 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:52:34 PM UTC 24 |
| Finished | Sep 01 12:52:36 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=765664177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_fifo_levels.765664177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/144.usbdev_fifo_levels.1052192396 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 282863322 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052192396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 144.usbdev_fifo_levels.1052192396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/144.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.998420144 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 326848293 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=998420144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.998420144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.3134933779 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 258074610 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134933779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.3134933779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.2224105111 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 330081946 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224105111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.2224105111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.3299826123 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 290317455 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299826123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 151.usbdev_fifo_levels.3299826123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/151.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/159.usbdev_fifo_levels.743101732 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 266059981 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743101732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 159.usbdev_fifo_levels.743101732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/159.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.3941253343 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 467469177 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941253343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.3941253343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.570818025 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 778178292 ps |
| CPU time | 1.97 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=570818025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.570818025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.1266223170 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 241764381 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:54:00 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266223170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.1266223170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.3700949808 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 550880209 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700949808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.3700949808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.2716071104 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 323308503 ps |
| CPU time | 1.95 seconds |
| Started | Sep 01 12:45:29 PM UTC 24 |
| Finished | Sep 01 12:45:32 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716071104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.2716071104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.3522466139 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 103122220228 ps |
| CPU time | 243.49 seconds |
| Started | Sep 01 12:45:35 PM UTC 24 |
| Finished | Sep 01 12:49:42 PM UTC 24 |
| Peak memory | 217668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3522466139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.3522466139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.3441577097 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 162115315 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441577097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_fifo_levels.3441577097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.3926094892 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 305665428 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:58:48 PM UTC 24 |
| Finished | Sep 01 12:58:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926094892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_fifo_levels.3926094892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.1361633661 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 1046699427 ps |
| CPU time | 4.31 seconds |
| Started | Sep 01 12:46:33 PM UTC 24 |
| Finished | Sep 01 12:46:39 PM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361633661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.1361633661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.2746067641 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 107099756210 ps |
| CPU time | 226.84 seconds |
| Started | Sep 01 12:46:48 PM UTC 24 |
| Finished | Sep 01 12:50:38 PM UTC 24 |
| Peak memory | 217516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746067641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.2746067641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.1178886083 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 2149048203 ps |
| CPU time | 49.01 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:04:39 PM UTC 24 |
| Peak memory | 234420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1178886083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.1178886083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.57858425 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 325506954 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57858425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_fifo_levels.57858425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.101185896 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 344962031 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=101185896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_fifo_levels.101185896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.1495995652 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 278823300 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1495995652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 57.usbdev_fifo_levels.1495995652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.1356951403 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 275614154 ps |
| CPU time | 1.96 seconds |
| Started | Sep 01 12:48:52 PM UTC 24 |
| Finished | Sep 01 12:48:55 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356951403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_fifo_levels.1356951403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.3160453726 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 2713072779 ps |
| CPU time | 28.28 seconds |
| Started | Sep 01 12:49:50 PM UTC 24 |
| Finished | Sep 01 12:50:20 PM UTC 24 |
| Peak memory | 229768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160453726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.3160453726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.1933455995 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 259011368 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933455995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.1933455995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.3609466326 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 394394570 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609466326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.3609466326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.1006030912 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 284236073 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 12:49:58 PM UTC 24 |
| Finished | Sep 01 12:50:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1006030912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_fifo_levels.1006030912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.1243490997 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 141842820 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:44:17 PM UTC 24 |
| Finished | Sep 01 12:44:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243490997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.1243490997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.1806114276 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 12601889700 ps |
| CPU time | 17.53 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:37 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806114276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.1806114276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.3863506553 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 141137534 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:44:32 PM UTC 24 |
| Finished | Sep 01 12:44:35 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863506553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.3863506553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.487774550 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 175723987 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:44:03 PM UTC 24 |
| Finished | Sep 01 12:44:06 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487774550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_av_empty.487774550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.2408150913 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 4215917097 ps |
| CPU time | 17.91 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:44:27 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408150913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.2408150913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.2618868847 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 186396637 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:44:09 PM UTC 24 |
| Finished | Sep 01 12:44:12 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2618868847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_reset.2618868847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.3039673073 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 1852936018 ps |
| CPU time | 48.69 seconds |
| Started | Sep 01 12:44:12 PM UTC 24 |
| Finished | Sep 01 12:45:02 PM UTC 24 |
| Peak memory | 229548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039673073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.3039673073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.4250076105 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 194246276 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:44:24 PM UTC 24 |
| Finished | Sep 01 12:44:26 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250076105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_pid_err.4250076105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.3197342535 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 152528567 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:45:20 PM UTC 24 |
| Finished | Sep 01 12:45:23 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197342535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.3197342535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.3204272176 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 3347326486 ps |
| CPU time | 30.65 seconds |
| Started | Sep 01 12:48:35 PM UTC 24 |
| Finished | Sep 01 12:49:07 PM UTC 24 |
| Peak memory | 229780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204272176 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.3204272176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.4065920281 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 445218599 ps |
| CPU time | 3.69 seconds |
| Started | Sep 01 12:29:01 PM UTC 24 |
| Finished | Sep 01 12:29:06 PM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065920281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.4065920281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.2974083878 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 176638359 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:44:13 PM UTC 24 |
| Finished | Sep 01 12:44:15 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2974083878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.2974083878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.647520714 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 237813859 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 12:51:06 PM UTC 24 |
| Finished | Sep 01 12:51:09 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=647520714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_nak_trans.647520714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.1801459229 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 11867394946 ps |
| CPU time | 75.37 seconds |
| Started | Sep 01 12:51:28 PM UTC 24 |
| Finished | Sep 01 12:52:45 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801459229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.1801459229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.3623001464 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 226648204 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:51:33 PM UTC 24 |
| Finished | Sep 01 12:51:36 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3623001464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.3623001464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.652164239 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 196498070 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:52:46 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=652164239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_nak_trans.652164239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.2776318648 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 186594744 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776318648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_nak_trans.2776318648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.1209218077 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 241009978 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:53:44 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209218077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.1209218077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.2741589145 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 622879411 ps |
| CPU time | 1.94 seconds |
| Started | Sep 01 01:26:15 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2741589145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.2741589145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.3080653671 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 196582267 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080653671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.3080653671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.810710049 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 243172540 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=810710049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_nak_trans.810710049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.487042303 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 239626505 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 12:49:01 PM UTC 24 |
| Finished | Sep 01 12:49:04 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487042303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_nak_trans.487042303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.3301552544 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 7648704030 ps |
| CPU time | 74.8 seconds |
| Started | Sep 01 12:49:15 PM UTC 24 |
| Finished | Sep 01 12:50:32 PM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301552544 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.3301552544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.582883201 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 281074870 ps |
| CPU time | 5.74 seconds |
| Started | Sep 01 12:28:46 PM UTC 24 |
| Finished | Sep 01 12:28:53 PM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=582883201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.582883201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.3505532425 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 88505668 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:28:45 PM UTC 24 |
| Finished | Sep 01 12:28:48 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505532425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.3505532425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.891630681 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 95077357 ps |
| CPU time | 1.95 seconds |
| Started | Sep 01 12:28:47 PM UTC 24 |
| Finished | Sep 01 12:28:50 PM UTC 24 |
| Peak memory | 233676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=891630681 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.891630681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.38803703 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 109719462 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 12:28:45 PM UTC 24 |
| Finished | Sep 01 12:28:48 PM UTC 24 |
| Peak memory | 226884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=38803703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs /coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.38803703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.1951799938 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 528170158 ps |
| CPU time | 6.61 seconds |
| Started | Sep 01 12:28:45 PM UTC 24 |
| Finished | Sep 01 12:28:53 PM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1951799938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.1951799938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.1882059782 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 213075190 ps |
| CPU time | 2.61 seconds |
| Started | Sep 01 12:28:47 PM UTC 24 |
| Finished | Sep 01 12:28:50 PM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882059782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.1882059782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.2461395658 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 1230158953 ps |
| CPU time | 6.31 seconds |
| Started | Sep 01 12:28:45 PM UTC 24 |
| Finished | Sep 01 12:28:52 PM UTC 24 |
| Peak memory | 217512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2461395658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.2461395658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.2826272382 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 78980393 ps |
| CPU time | 2.9 seconds |
| Started | Sep 01 12:28:48 PM UTC 24 |
| Finished | Sep 01 12:28:52 PM UTC 24 |
| Peak memory | 217568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826272382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.2826272382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.693613695 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 3502432608 ps |
| CPU time | 11.7 seconds |
| Started | Sep 01 12:28:48 PM UTC 24 |
| Finished | Sep 01 12:29:01 PM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=693613695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.693613695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.1314407543 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 79736679 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:28:47 PM UTC 24 |
| Finished | Sep 01 12:28:49 PM UTC 24 |
| Peak memory | 216460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1314407543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.1314407543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2011681898 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 94144446 ps |
| CPU time | 2.09 seconds |
| Started | Sep 01 12:28:49 PM UTC 24 |
| Finished | Sep 01 12:28:52 PM UTC 24 |
| Peak memory | 227856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2011681898 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.2011681898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.3030610736 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 107775395 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:28:48 PM UTC 24 |
| Finished | Sep 01 12:28:51 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3030610736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.3030610736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.1605009574 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 36523226 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:28:47 PM UTC 24 |
| Finished | Sep 01 12:28:49 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605009574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.1605009574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.2135794605 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 104036669 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:28:47 PM UTC 24 |
| Finished | Sep 01 12:28:50 PM UTC 24 |
| Peak memory | 226520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135794605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.2135794605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3663247728 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 259609390 ps |
| CPU time | 2.88 seconds |
| Started | Sep 01 12:28:47 PM UTC 24 |
| Finished | Sep 01 12:28:51 PM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3663247728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.3663247728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.3034039251 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 297110854 ps |
| CPU time | 2.48 seconds |
| Started | Sep 01 12:28:48 PM UTC 24 |
| Finished | Sep 01 12:28:52 PM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034039251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.3034039251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.190564101 |
| Short name | T3830 |
| Test name | |
| Test status | |
| Simulation time | 90703939 ps |
| CPU time | 1.96 seconds |
| Started | Sep 01 12:29:06 PM UTC 24 |
| Finished | Sep 01 12:29:09 PM UTC 24 |
| Peak memory | 226888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=190564101 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.190564101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.374302825 |
| Short name | T3823 |
| Test name | |
| Test status | |
| Simulation time | 121115567 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 12:29:05 PM UTC 24 |
| Finished | Sep 01 12:29:08 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=374302825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.374302825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1856674946 |
| Short name | T3832 |
| Test name | |
| Test status | |
| Simulation time | 85891980 ps |
| CPU time | 2.22 seconds |
| Started | Sep 01 12:29:06 PM UTC 24 |
| Finished | Sep 01 12:29:10 PM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856674946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.1856674946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.1294403370 |
| Short name | T3828 |
| Test name | |
| Test status | |
| Simulation time | 173776102 ps |
| CPU time | 2.8 seconds |
| Started | Sep 01 12:29:05 PM UTC 24 |
| Finished | Sep 01 12:29:09 PM UTC 24 |
| Peak memory | 217504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1294403370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.1294403370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.1881941011 |
| Short name | T3829 |
| Test name | |
| Test status | |
| Simulation time | 387414157 ps |
| CPU time | 2.84 seconds |
| Started | Sep 01 12:29:05 PM UTC 24 |
| Finished | Sep 01 12:29:09 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881941011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.1881941011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.3082864102 |
| Short name | T3833 |
| Test name | |
| Test status | |
| Simulation time | 87712937 ps |
| CPU time | 2.68 seconds |
| Started | Sep 01 12:29:08 PM UTC 24 |
| Finished | Sep 01 12:29:11 PM UTC 24 |
| Peak memory | 227792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082864102 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.3082864102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.3507895150 |
| Short name | T3826 |
| Test name | |
| Test status | |
| Simulation time | 64025767 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:29:07 PM UTC 24 |
| Finished | Sep 01 12:29:09 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507895150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.3507895150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.4103191679 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 93458901 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:29:07 PM UTC 24 |
| Finished | Sep 01 12:29:09 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103191679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.4103191679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.368080478 |
| Short name | T3831 |
| Test name | |
| Test status | |
| Simulation time | 91502071 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 12:29:07 PM UTC 24 |
| Finished | Sep 01 12:29:09 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=368080478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.368080478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.672399090 |
| Short name | T3836 |
| Test name | |
| Test status | |
| Simulation time | 124431314 ps |
| CPU time | 4.22 seconds |
| Started | Sep 01 12:29:07 PM UTC 24 |
| Finished | Sep 01 12:29:12 PM UTC 24 |
| Peak memory | 227724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=672399090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.672399090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.326075219 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 718825546 ps |
| CPU time | 4.37 seconds |
| Started | Sep 01 12:29:07 PM UTC 24 |
| Finished | Sep 01 12:29:12 PM UTC 24 |
| Peak memory | 217616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=326075219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.326075219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.109020917 |
| Short name | T3837 |
| Test name | |
| Test status | |
| Simulation time | 71588191 ps |
| CPU time | 1.9 seconds |
| Started | Sep 01 12:29:09 PM UTC 24 |
| Finished | Sep 01 12:29:12 PM UTC 24 |
| Peak memory | 226824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=109020917 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.109020917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.840803133 |
| Short name | T3834 |
| Test name | |
| Test status | |
| Simulation time | 105348081 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 12:29:09 PM UTC 24 |
| Finished | Sep 01 12:29:12 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=840803133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.840803133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.872970658 |
| Short name | T3838 |
| Test name | |
| Test status | |
| Simulation time | 154937766 ps |
| CPU time | 2.45 seconds |
| Started | Sep 01 12:29:09 PM UTC 24 |
| Finished | Sep 01 12:29:13 PM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=872970658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.872970658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.1492951099 |
| Short name | T3841 |
| Test name | |
| Test status | |
| Simulation time | 270642123 ps |
| CPU time | 4.3 seconds |
| Started | Sep 01 12:29:08 PM UTC 24 |
| Finished | Sep 01 12:29:13 PM UTC 24 |
| Peak memory | 234880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492951099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.1492951099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.524235802 |
| Short name | T3849 |
| Test name | |
| Test status | |
| Simulation time | 89483063 ps |
| CPU time | 2.98 seconds |
| Started | Sep 01 12:29:11 PM UTC 24 |
| Finished | Sep 01 12:29:15 PM UTC 24 |
| Peak memory | 227980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=524235802 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.524235802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.1939321847 |
| Short name | T3839 |
| Test name | |
| Test status | |
| Simulation time | 77131807 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:29:11 PM UTC 24 |
| Finished | Sep 01 12:29:13 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939321847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.1939321847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.1617068670 |
| Short name | T3835 |
| Test name | |
| Test status | |
| Simulation time | 89673543 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:29:09 PM UTC 24 |
| Finished | Sep 01 12:29:12 PM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1617068670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.1617068670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.328434192 |
| Short name | T3846 |
| Test name | |
| Test status | |
| Simulation time | 308493149 ps |
| CPU time | 2.71 seconds |
| Started | Sep 01 12:29:11 PM UTC 24 |
| Finished | Sep 01 12:29:14 PM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=328434192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.328434192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.1304788816 |
| Short name | T3845 |
| Test name | |
| Test status | |
| Simulation time | 219864625 ps |
| CPU time | 3.37 seconds |
| Started | Sep 01 12:29:09 PM UTC 24 |
| Finished | Sep 01 12:29:14 PM UTC 24 |
| Peak memory | 231760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304788816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.1304788816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.551140912 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 458668992 ps |
| CPU time | 3.94 seconds |
| Started | Sep 01 12:29:09 PM UTC 24 |
| Finished | Sep 01 12:29:14 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=551140912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.551140912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.880751508 |
| Short name | T3852 |
| Test name | |
| Test status | |
| Simulation time | 145460914 ps |
| CPU time | 2.43 seconds |
| Started | Sep 01 12:29:12 PM UTC 24 |
| Finished | Sep 01 12:29:16 PM UTC 24 |
| Peak memory | 227788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=880751508 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.880751508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2058047866 |
| Short name | T3842 |
| Test name | |
| Test status | |
| Simulation time | 88757055 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:29:11 PM UTC 24 |
| Finished | Sep 01 12:29:13 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058047866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.2058047866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3387491423 |
| Short name | T3840 |
| Test name | |
| Test status | |
| Simulation time | 60836188 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:29:11 PM UTC 24 |
| Finished | Sep 01 12:29:13 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3387491423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.3387491423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.518973130 |
| Short name | T3844 |
| Test name | |
| Test status | |
| Simulation time | 122971561 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 12:29:11 PM UTC 24 |
| Finished | Sep 01 12:29:14 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=518973130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.518973130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.4084883788 |
| Short name | T3843 |
| Test name | |
| Test status | |
| Simulation time | 74060883 ps |
| CPU time | 1.77 seconds |
| Started | Sep 01 12:29:11 PM UTC 24 |
| Finished | Sep 01 12:29:14 PM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084883788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.4084883788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.3892348966 |
| Short name | T3857 |
| Test name | |
| Test status | |
| Simulation time | 658454645 ps |
| CPU time | 4.88 seconds |
| Started | Sep 01 12:29:11 PM UTC 24 |
| Finished | Sep 01 12:29:17 PM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892348966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.3892348966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.2496327997 |
| Short name | T3858 |
| Test name | |
| Test status | |
| Simulation time | 195562325 ps |
| CPU time | 2.29 seconds |
| Started | Sep 01 12:29:14 PM UTC 24 |
| Finished | Sep 01 12:29:17 PM UTC 24 |
| Peak memory | 227740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496327997 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.2496327997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.3869191622 |
| Short name | T3848 |
| Test name | |
| Test status | |
| Simulation time | 61144939 ps |
| CPU time | 1.23 seconds |
| Started | Sep 01 12:29:12 PM UTC 24 |
| Finished | Sep 01 12:29:15 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3869191622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.3869191622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.2406626183 |
| Short name | T3847 |
| Test name | |
| Test status | |
| Simulation time | 45932163 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 12:29:12 PM UTC 24 |
| Finished | Sep 01 12:29:14 PM UTC 24 |
| Peak memory | 216688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2406626183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.2406626183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.3154010828 |
| Short name | T3850 |
| Test name | |
| Test status | |
| Simulation time | 99079564 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:29:13 PM UTC 24 |
| Finished | Sep 01 12:29:15 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154010828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.3154010828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.367311978 |
| Short name | T3851 |
| Test name | |
| Test status | |
| Simulation time | 61626729 ps |
| CPU time | 1.94 seconds |
| Started | Sep 01 12:29:12 PM UTC 24 |
| Finished | Sep 01 12:29:15 PM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=367311978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.367311978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.4134648441 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 365982614 ps |
| CPU time | 3.14 seconds |
| Started | Sep 01 12:29:12 PM UTC 24 |
| Finished | Sep 01 12:29:17 PM UTC 24 |
| Peak memory | 217492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134648441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.4134648441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.4237727176 |
| Short name | T3862 |
| Test name | |
| Test status | |
| Simulation time | 162122029 ps |
| CPU time | 2.98 seconds |
| Started | Sep 01 12:29:14 PM UTC 24 |
| Finished | Sep 01 12:29:18 PM UTC 24 |
| Peak memory | 227744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237727176 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.4237727176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.2566857537 |
| Short name | T3855 |
| Test name | |
| Test status | |
| Simulation time | 76293188 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:29:14 PM UTC 24 |
| Finished | Sep 01 12:29:16 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566857537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.2566857537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.2021372868 |
| Short name | T3853 |
| Test name | |
| Test status | |
| Simulation time | 41612098 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 12:29:14 PM UTC 24 |
| Finished | Sep 01 12:29:16 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021372868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.2021372868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.3592266981 |
| Short name | T3856 |
| Test name | |
| Test status | |
| Simulation time | 58322604 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:29:14 PM UTC 24 |
| Finished | Sep 01 12:29:16 PM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592266981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.3592266981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.1722756756 |
| Short name | T3854 |
| Test name | |
| Test status | |
| Simulation time | 63411019 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 12:29:14 PM UTC 24 |
| Finished | Sep 01 12:29:16 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722756756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.1722756756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.1511193548 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 1073493348 ps |
| CPU time | 5.52 seconds |
| Started | Sep 01 12:29:14 PM UTC 24 |
| Finished | Sep 01 12:29:20 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511193548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.1511193548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.731117959 |
| Short name | T3868 |
| Test name | |
| Test status | |
| Simulation time | 154198430 ps |
| CPU time | 2.78 seconds |
| Started | Sep 01 12:29:15 PM UTC 24 |
| Finished | Sep 01 12:29:19 PM UTC 24 |
| Peak memory | 227648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=731117959 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.731117959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.377820862 |
| Short name | T3860 |
| Test name | |
| Test status | |
| Simulation time | 54995441 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:29:15 PM UTC 24 |
| Finished | Sep 01 12:29:18 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=377820862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.377820862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.1225664373 |
| Short name | T3859 |
| Test name | |
| Test status | |
| Simulation time | 55482576 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 12:29:15 PM UTC 24 |
| Finished | Sep 01 12:29:17 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225664373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.1225664373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1096297874 |
| Short name | T3863 |
| Test name | |
| Test status | |
| Simulation time | 234962568 ps |
| CPU time | 1.87 seconds |
| Started | Sep 01 12:29:15 PM UTC 24 |
| Finished | Sep 01 12:29:18 PM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096297874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.1096297874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.413670575 |
| Short name | T3866 |
| Test name | |
| Test status | |
| Simulation time | 100455367 ps |
| CPU time | 2.81 seconds |
| Started | Sep 01 12:29:15 PM UTC 24 |
| Finished | Sep 01 12:29:19 PM UTC 24 |
| Peak memory | 234760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=413670575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.413670575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.1819393070 |
| Short name | T3888 |
| Test name | |
| Test status | |
| Simulation time | 898779883 ps |
| CPU time | 6.76 seconds |
| Started | Sep 01 12:29:15 PM UTC 24 |
| Finished | Sep 01 12:29:23 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819393070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.1819393070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.2932630605 |
| Short name | T3871 |
| Test name | |
| Test status | |
| Simulation time | 87814443 ps |
| CPU time | 2.13 seconds |
| Started | Sep 01 12:29:17 PM UTC 24 |
| Finished | Sep 01 12:29:20 PM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932630605 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.2932630605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.2226329371 |
| Short name | T3864 |
| Test name | |
| Test status | |
| Simulation time | 49591989 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:29:17 PM UTC 24 |
| Finished | Sep 01 12:29:19 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2226329371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.2226329371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.4209706897 |
| Short name | T3861 |
| Test name | |
| Test status | |
| Simulation time | 47081619 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:29:16 PM UTC 24 |
| Finished | Sep 01 12:29:18 PM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4209706897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.4209706897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.2987152405 |
| Short name | T3872 |
| Test name | |
| Test status | |
| Simulation time | 123776157 ps |
| CPU time | 2.1 seconds |
| Started | Sep 01 12:29:17 PM UTC 24 |
| Finished | Sep 01 12:29:20 PM UTC 24 |
| Peak memory | 217404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987152405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.2987152405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.517630079 |
| Short name | T3865 |
| Test name | |
| Test status | |
| Simulation time | 201251590 ps |
| CPU time | 2.27 seconds |
| Started | Sep 01 12:29:15 PM UTC 24 |
| Finished | Sep 01 12:29:19 PM UTC 24 |
| Peak memory | 217488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=517630079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.517630079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2799828431 |
| Short name | T3877 |
| Test name | |
| Test status | |
| Simulation time | 1323049172 ps |
| CPU time | 4.14 seconds |
| Started | Sep 01 12:29:16 PM UTC 24 |
| Finished | Sep 01 12:29:21 PM UTC 24 |
| Peak memory | 217620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2799828431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.2799828431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.278323036 |
| Short name | T3878 |
| Test name | |
| Test status | |
| Simulation time | 103924381 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:29:18 PM UTC 24 |
| Finished | Sep 01 12:29:21 PM UTC 24 |
| Peak memory | 226764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=278323036 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.278323036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.1977451468 |
| Short name | T3869 |
| Test name | |
| Test status | |
| Simulation time | 65243163 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:29:17 PM UTC 24 |
| Finished | Sep 01 12:29:19 PM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977451468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.1977451468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3509401750 |
| Short name | T3867 |
| Test name | |
| Test status | |
| Simulation time | 48116041 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 12:29:17 PM UTC 24 |
| Finished | Sep 01 12:29:19 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509401750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.3509401750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.1933041375 |
| Short name | T3870 |
| Test name | |
| Test status | |
| Simulation time | 80410940 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:29:17 PM UTC 24 |
| Finished | Sep 01 12:29:20 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933041375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.1933041375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.47603896 |
| Short name | T3884 |
| Test name | |
| Test status | |
| Simulation time | 314339840 ps |
| CPU time | 4.03 seconds |
| Started | Sep 01 12:29:17 PM UTC 24 |
| Finished | Sep 01 12:29:22 PM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=47603896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.47603896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.2128437817 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 129397561 ps |
| CPU time | 2.9 seconds |
| Started | Sep 01 12:28:52 PM UTC 24 |
| Finished | Sep 01 12:28:56 PM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2128437817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.2128437817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.988718202 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 961488745 ps |
| CPU time | 6.01 seconds |
| Started | Sep 01 12:28:51 PM UTC 24 |
| Finished | Sep 01 12:28:58 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=988718202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.988718202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.3593406292 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 93262034 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:28:51 PM UTC 24 |
| Finished | Sep 01 12:28:53 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593406292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.3593406292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.1592659839 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 115434868 ps |
| CPU time | 1.78 seconds |
| Started | Sep 01 12:28:52 PM UTC 24 |
| Finished | Sep 01 12:28:55 PM UTC 24 |
| Peak memory | 233680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1592659839 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.1592659839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3423780437 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 91810159 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:28:51 PM UTC 24 |
| Finished | Sep 01 12:28:53 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423780437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.3423780437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.687388321 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 49081553 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:28:50 PM UTC 24 |
| Finished | Sep 01 12:28:52 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=687388321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.687388321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.858048116 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 89814380 ps |
| CPU time | 1.98 seconds |
| Started | Sep 01 12:28:51 PM UTC 24 |
| Finished | Sep 01 12:28:54 PM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=858048116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.858048116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.2896951987 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 108415470 ps |
| CPU time | 2.87 seconds |
| Started | Sep 01 12:28:50 PM UTC 24 |
| Finished | Sep 01 12:28:54 PM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896951987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.2896951987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.1471141609 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 146442399 ps |
| CPU time | 2.19 seconds |
| Started | Sep 01 12:28:52 PM UTC 24 |
| Finished | Sep 01 12:28:56 PM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471141609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.1471141609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.3375376581 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 112730140 ps |
| CPU time | 2.22 seconds |
| Started | Sep 01 12:28:49 PM UTC 24 |
| Finished | Sep 01 12:28:53 PM UTC 24 |
| Peak memory | 234588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3375376581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.3375376581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.1901479682 |
| Short name | T3874 |
| Test name | |
| Test status | |
| Simulation time | 50155099 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:29:18 PM UTC 24 |
| Finished | Sep 01 12:29:20 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901479682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.1901479682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.456789512 |
| Short name | T3873 |
| Test name | |
| Test status | |
| Simulation time | 51669875 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 12:29:18 PM UTC 24 |
| Finished | Sep 01 12:29:20 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=456789512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.456789512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.3259318138 |
| Short name | T3875 |
| Test name | |
| Test status | |
| Simulation time | 57149364 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:29:18 PM UTC 24 |
| Finished | Sep 01 12:29:21 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259318138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.3259318138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.3888177267 |
| Short name | T3879 |
| Test name | |
| Test status | |
| Simulation time | 87611278 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 12:29:19 PM UTC 24 |
| Finished | Sep 01 12:29:21 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3888177267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.3888177267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.2339349094 |
| Short name | T3876 |
| Test name | |
| Test status | |
| Simulation time | 90256373 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:29:19 PM UTC 24 |
| Finished | Sep 01 12:29:21 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339349094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.2339349094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.1511496168 |
| Short name | T3880 |
| Test name | |
| Test status | |
| Simulation time | 61412779 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:29:19 PM UTC 24 |
| Finished | Sep 01 12:29:21 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511496168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.1511496168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.1966829313 |
| Short name | T3881 |
| Test name | |
| Test status | |
| Simulation time | 84394135 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:29:20 PM UTC 24 |
| Finished | Sep 01 12:29:22 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966829313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.1966829313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.2711450328 |
| Short name | T3882 |
| Test name | |
| Test status | |
| Simulation time | 39314468 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:29:20 PM UTC 24 |
| Finished | Sep 01 12:29:22 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2711450328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.2711450328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.2728800838 |
| Short name | T3883 |
| Test name | |
| Test status | |
| Simulation time | 68201597 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:29:20 PM UTC 24 |
| Finished | Sep 01 12:29:22 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728800838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.2728800838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1972576490 |
| Short name | T3886 |
| Test name | |
| Test status | |
| Simulation time | 31912688 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:29:20 PM UTC 24 |
| Finished | Sep 01 12:29:22 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1972576490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.1972576490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.2266457567 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 131913224 ps |
| CPU time | 4.54 seconds |
| Started | Sep 01 12:28:54 PM UTC 24 |
| Finished | Sep 01 12:29:00 PM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266457567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.2266457567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.3197625881 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 1094164497 ps |
| CPU time | 10.11 seconds |
| Started | Sep 01 12:28:54 PM UTC 24 |
| Finished | Sep 01 12:29:05 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197625881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.3197625881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.259163254 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 104086160 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:28:54 PM UTC 24 |
| Finished | Sep 01 12:28:56 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=259163254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.259163254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.3861316404 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 120885734 ps |
| CPU time | 2.11 seconds |
| Started | Sep 01 12:28:54 PM UTC 24 |
| Finished | Sep 01 12:28:57 PM UTC 24 |
| Peak memory | 227792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861316404 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.3861316404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.3912636066 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 54397215 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:28:54 PM UTC 24 |
| Finished | Sep 01 12:28:56 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912636066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.3912636066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.1203908971 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 39557396 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 12:28:53 PM UTC 24 |
| Finished | Sep 01 12:28:55 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1203908971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.1203908971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.1494392942 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 195075572 ps |
| CPU time | 3.54 seconds |
| Started | Sep 01 12:28:53 PM UTC 24 |
| Finished | Sep 01 12:28:57 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494392942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.1494392942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.3605873861 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 298460939 ps |
| CPU time | 3.75 seconds |
| Started | Sep 01 12:28:53 PM UTC 24 |
| Finished | Sep 01 12:28:57 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605873861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.3605873861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3692373170 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 120146686 ps |
| CPU time | 1.91 seconds |
| Started | Sep 01 12:28:54 PM UTC 24 |
| Finished | Sep 01 12:28:57 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3692373170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.3692373170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.4140002320 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 308668904 ps |
| CPU time | 4.2 seconds |
| Started | Sep 01 12:28:53 PM UTC 24 |
| Finished | Sep 01 12:28:58 PM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4140002320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.4140002320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.700267385 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 445904393 ps |
| CPU time | 4.67 seconds |
| Started | Sep 01 12:28:53 PM UTC 24 |
| Finished | Sep 01 12:28:58 PM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=700267385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.700267385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.3729581615 |
| Short name | T3887 |
| Test name | |
| Test status | |
| Simulation time | 40571187 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:29:20 PM UTC 24 |
| Finished | Sep 01 12:29:22 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729581615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.3729581615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.1253834103 |
| Short name | T3885 |
| Test name | |
| Test status | |
| Simulation time | 54982656 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:29:20 PM UTC 24 |
| Finished | Sep 01 12:29:22 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253834103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.1253834103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3420289697 |
| Short name | T3890 |
| Test name | |
| Test status | |
| Simulation time | 44218301 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:29:21 PM UTC 24 |
| Finished | Sep 01 12:29:23 PM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420289697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.3420289697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1718404243 |
| Short name | T3892 |
| Test name | |
| Test status | |
| Simulation time | 61824681 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 12:29:21 PM UTC 24 |
| Finished | Sep 01 12:29:23 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1718404243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.1718404243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.882289695 |
| Short name | T3889 |
| Test name | |
| Test status | |
| Simulation time | 51594818 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 12:29:21 PM UTC 24 |
| Finished | Sep 01 12:29:23 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=882289695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.882289695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3013723457 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 59441349 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 12:29:21 PM UTC 24 |
| Finished | Sep 01 12:29:23 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013723457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.3013723457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.4215551883 |
| Short name | T3891 |
| Test name | |
| Test status | |
| Simulation time | 41480390 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 12:29:21 PM UTC 24 |
| Finished | Sep 01 12:29:23 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4215551883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.4215551883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.3091721727 |
| Short name | T3893 |
| Test name | |
| Test status | |
| Simulation time | 101864323 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:29:22 PM UTC 24 |
| Finished | Sep 01 12:29:24 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091721727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.3091721727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1153562794 |
| Short name | T3897 |
| Test name | |
| Test status | |
| Simulation time | 80813132 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:29:22 PM UTC 24 |
| Finished | Sep 01 12:29:24 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153562794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.1153562794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.1528878164 |
| Short name | T3895 |
| Test name | |
| Test status | |
| Simulation time | 83472292 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 12:29:22 PM UTC 24 |
| Finished | Sep 01 12:29:24 PM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528878164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.1528878164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.808224557 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 94699959 ps |
| CPU time | 2.86 seconds |
| Started | Sep 01 12:28:57 PM UTC 24 |
| Finished | Sep 01 12:29:01 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=808224557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.808224557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1064082847 |
| Short name | T3822 |
| Test name | |
| Test status | |
| Simulation time | 648005496 ps |
| CPU time | 9.86 seconds |
| Started | Sep 01 12:28:57 PM UTC 24 |
| Finished | Sep 01 12:29:08 PM UTC 24 |
| Peak memory | 217540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064082847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.1064082847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.1900943003 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 123249069 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:28:57 PM UTC 24 |
| Finished | Sep 01 12:28:59 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1900943003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.1900943003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.152866369 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 105054335 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:28:57 PM UTC 24 |
| Finished | Sep 01 12:28:59 PM UTC 24 |
| Peak memory | 226812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=152866369 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.152866369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.1697782495 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 79807652 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:28:57 PM UTC 24 |
| Finished | Sep 01 12:28:59 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697782495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.1697782495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2388261030 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 75731738 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 12:28:55 PM UTC 24 |
| Finished | Sep 01 12:28:58 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388261030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.2388261030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.1277547406 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 130700254 ps |
| CPU time | 2.31 seconds |
| Started | Sep 01 12:28:56 PM UTC 24 |
| Finished | Sep 01 12:28:59 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1277547406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.1277547406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.3868855128 |
| Short name | T3811 |
| Test name | |
| Test status | |
| Simulation time | 166224537 ps |
| CPU time | 5.81 seconds |
| Started | Sep 01 12:28:55 PM UTC 24 |
| Finished | Sep 01 12:29:02 PM UTC 24 |
| Peak memory | 217488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3868855128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.3868855128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.4189693833 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 287054893 ps |
| CPU time | 2.78 seconds |
| Started | Sep 01 12:28:57 PM UTC 24 |
| Finished | Sep 01 12:29:01 PM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189693833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.4189693833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.1537192367 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 290472607 ps |
| CPU time | 3.52 seconds |
| Started | Sep 01 12:28:54 PM UTC 24 |
| Finished | Sep 01 12:28:59 PM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537192367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.1537192367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3343576920 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 341561516 ps |
| CPU time | 3.62 seconds |
| Started | Sep 01 12:28:54 PM UTC 24 |
| Finished | Sep 01 12:28:59 PM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343576920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.3343576920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.1479905710 |
| Short name | T3894 |
| Test name | |
| Test status | |
| Simulation time | 46834318 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:29:22 PM UTC 24 |
| Finished | Sep 01 12:29:24 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479905710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.1479905710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3695380829 |
| Short name | T3896 |
| Test name | |
| Test status | |
| Simulation time | 32831797 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:29:22 PM UTC 24 |
| Finished | Sep 01 12:29:24 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3695380829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.3695380829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.3263386887 |
| Short name | T3900 |
| Test name | |
| Test status | |
| Simulation time | 37493021 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:29:22 PM UTC 24 |
| Finished | Sep 01 12:29:24 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263386887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.3263386887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.1155005813 |
| Short name | T3899 |
| Test name | |
| Test status | |
| Simulation time | 82765061 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:29:22 PM UTC 24 |
| Finished | Sep 01 12:29:24 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155005813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.1155005813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.2491397142 |
| Short name | T3898 |
| Test name | |
| Test status | |
| Simulation time | 55846167 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:29:22 PM UTC 24 |
| Finished | Sep 01 12:29:24 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491397142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.2491397142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.2498754604 |
| Short name | T3901 |
| Test name | |
| Test status | |
| Simulation time | 41138476 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 12:29:23 PM UTC 24 |
| Finished | Sep 01 12:29:25 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2498754604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.2498754604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.4044100188 |
| Short name | T3902 |
| Test name | |
| Test status | |
| Simulation time | 42217510 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:29:23 PM UTC 24 |
| Finished | Sep 01 12:29:25 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044100188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.4044100188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.4211325916 |
| Short name | T3903 |
| Test name | |
| Test status | |
| Simulation time | 75688134 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:29:23 PM UTC 24 |
| Finished | Sep 01 12:29:25 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211325916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.4211325916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.4111455083 |
| Short name | T3904 |
| Test name | |
| Test status | |
| Simulation time | 38865946 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 12:29:23 PM UTC 24 |
| Finished | Sep 01 12:29:25 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111455083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.4111455083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.1746931980 |
| Short name | T3905 |
| Test name | |
| Test status | |
| Simulation time | 44069159 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:29:23 PM UTC 24 |
| Finished | Sep 01 12:29:25 PM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1746931980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.1746931980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1223254565 |
| Short name | T3814 |
| Test name | |
| Test status | |
| Simulation time | 131887005 ps |
| CPU time | 3.59 seconds |
| Started | Sep 01 12:28:59 PM UTC 24 |
| Finished | Sep 01 12:29:04 PM UTC 24 |
| Peak memory | 227728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223254565 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.1223254565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.533874639 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 59136544 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:28:58 PM UTC 24 |
| Finished | Sep 01 12:29:01 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=533874639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.533874639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.2676588285 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 52768878 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 12:28:58 PM UTC 24 |
| Finished | Sep 01 12:29:00 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676588285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.2676588285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.1316429321 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 195139077 ps |
| CPU time | 2.12 seconds |
| Started | Sep 01 12:28:58 PM UTC 24 |
| Finished | Sep 01 12:29:01 PM UTC 24 |
| Peak memory | 217512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316429321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.1316429321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.2916486809 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 302511401 ps |
| CPU time | 4.49 seconds |
| Started | Sep 01 12:28:58 PM UTC 24 |
| Finished | Sep 01 12:29:04 PM UTC 24 |
| Peak memory | 227724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2916486809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.2916486809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.3296062773 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 417373763 ps |
| CPU time | 4.2 seconds |
| Started | Sep 01 12:28:58 PM UTC 24 |
| Finished | Sep 01 12:29:03 PM UTC 24 |
| Peak memory | 217548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3296062773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.3296062773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1470317173 |
| Short name | T3810 |
| Test name | |
| Test status | |
| Simulation time | 99554145 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:29:00 PM UTC 24 |
| Finished | Sep 01 12:29:02 PM UTC 24 |
| Peak memory | 226816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470317173 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.1470317173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.3329091609 |
| Short name | T3809 |
| Test name | |
| Test status | |
| Simulation time | 52233880 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:29:00 PM UTC 24 |
| Finished | Sep 01 12:29:02 PM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329091609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.3329091609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.1255445097 |
| Short name | T3812 |
| Test name | |
| Test status | |
| Simulation time | 349392728 ps |
| CPU time | 2.11 seconds |
| Started | Sep 01 12:29:00 PM UTC 24 |
| Finished | Sep 01 12:29:03 PM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255445097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.1255445097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.687912014 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 167504634 ps |
| CPU time | 2.89 seconds |
| Started | Sep 01 12:28:59 PM UTC 24 |
| Finished | Sep 01 12:29:03 PM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=687912014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.687912014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1559207743 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 693477580 ps |
| CPU time | 7.45 seconds |
| Started | Sep 01 12:29:00 PM UTC 24 |
| Finished | Sep 01 12:29:08 PM UTC 24 |
| Peak memory | 217500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559207743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.1559207743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.3545303502 |
| Short name | T3816 |
| Test name | |
| Test status | |
| Simulation time | 67713444 ps |
| CPU time | 2.31 seconds |
| Started | Sep 01 12:29:02 PM UTC 24 |
| Finished | Sep 01 12:29:06 PM UTC 24 |
| Peak memory | 227792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3545303502 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.3545303502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.2757229356 |
| Short name | T3813 |
| Test name | |
| Test status | |
| Simulation time | 65306931 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:29:01 PM UTC 24 |
| Finished | Sep 01 12:29:03 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2757229356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.2757229356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.749499835 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 102322121 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 12:29:01 PM UTC 24 |
| Finished | Sep 01 12:29:03 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=749499835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.749499835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2218879878 |
| Short name | T3817 |
| Test name | |
| Test status | |
| Simulation time | 164316525 ps |
| CPU time | 2.38 seconds |
| Started | Sep 01 12:29:02 PM UTC 24 |
| Finished | Sep 01 12:29:06 PM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218879878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.2218879878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.242118866 |
| Short name | T3819 |
| Test name | |
| Test status | |
| Simulation time | 238181641 ps |
| CPU time | 4.26 seconds |
| Started | Sep 01 12:29:01 PM UTC 24 |
| Finished | Sep 01 12:29:06 PM UTC 24 |
| Peak memory | 227740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=242118866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.242118866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2686704052 |
| Short name | T3821 |
| Test name | |
| Test status | |
| Simulation time | 61154409 ps |
| CPU time | 2.43 seconds |
| Started | Sep 01 12:29:04 PM UTC 24 |
| Finished | Sep 01 12:29:07 PM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686704052 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.2686704052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.1771916156 |
| Short name | T3815 |
| Test name | |
| Test status | |
| Simulation time | 35393592 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:29:02 PM UTC 24 |
| Finished | Sep 01 12:29:05 PM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1771916156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.1771916156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.252136503 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 56773312 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 12:29:02 PM UTC 24 |
| Finished | Sep 01 12:29:05 PM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=252136503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.252136503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.3736279248 |
| Short name | T3820 |
| Test name | |
| Test status | |
| Simulation time | 384327388 ps |
| CPU time | 2.88 seconds |
| Started | Sep 01 12:29:02 PM UTC 24 |
| Finished | Sep 01 12:29:06 PM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736279248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.3736279248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.2258285362 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 81747247 ps |
| CPU time | 2.58 seconds |
| Started | Sep 01 12:29:02 PM UTC 24 |
| Finished | Sep 01 12:29:06 PM UTC 24 |
| Peak memory | 227712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258285362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.2258285362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.2758689724 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 631159038 ps |
| CPU time | 4.29 seconds |
| Started | Sep 01 12:29:02 PM UTC 24 |
| Finished | Sep 01 12:29:08 PM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758689724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.2758689724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.1667431192 |
| Short name | T3827 |
| Test name | |
| Test status | |
| Simulation time | 131815409 ps |
| CPU time | 2.82 seconds |
| Started | Sep 01 12:29:05 PM UTC 24 |
| Finished | Sep 01 12:29:09 PM UTC 24 |
| Peak memory | 227728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1667431192 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.1667431192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.690802409 |
| Short name | T3818 |
| Test name | |
| Test status | |
| Simulation time | 55202187 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:29:04 PM UTC 24 |
| Finished | Sep 01 12:29:06 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=690802409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.690802409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.3527791970 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 61121514 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 12:29:04 PM UTC 24 |
| Finished | Sep 01 12:29:06 PM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527791970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.3527791970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.565351635 |
| Short name | T3824 |
| Test name | |
| Test status | |
| Simulation time | 104000553 ps |
| CPU time | 2.08 seconds |
| Started | Sep 01 12:29:05 PM UTC 24 |
| Finished | Sep 01 12:29:08 PM UTC 24 |
| Peak memory | 217628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=565351635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.565351635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.3059690802 |
| Short name | T3825 |
| Test name | |
| Test status | |
| Simulation time | 100102699 ps |
| CPU time | 3.81 seconds |
| Started | Sep 01 12:29:04 PM UTC 24 |
| Finished | Sep 01 12:29:08 PM UTC 24 |
| Peak memory | 233912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059690802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.3059690802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.990024938 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 28461606481 ps |
| CPU time | 47.26 seconds |
| Started | Sep 01 12:44:03 PM UTC 24 |
| Finished | Sep 01 12:44:52 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=990024938 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.990024938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.2716416385 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 212932677 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:44:03 PM UTC 24 |
| Finished | Sep 01 12:44:06 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716416385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.2716416385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.2150837217 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 2524295127 ps |
| CPU time | 19.85 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:44:27 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150837217 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.2150837217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_enable.2057674776 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 48980345 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:44:08 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057674776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.2057674776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.2985571148 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 343372422 ps |
| CPU time | 2.1 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:44:09 PM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2985571148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.2985571148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.2027411509 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 454211800 ps |
| CPU time | 5.02 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:44:12 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2027411509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.2027411509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.1140472807 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 88187489854 ps |
| CPU time | 293.22 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:49:04 PM UTC 24 |
| Peak memory | 219952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140472807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.1140472807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.1123040672 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 89262625741 ps |
| CPU time | 176.25 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:47:06 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1123040672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.1123040672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.1423498082 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 112101666043 ps |
| CPU time | 207.3 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:47:38 PM UTC 24 |
| Peak memory | 217516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1423498082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.1423498082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.576906414 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 102955412268 ps |
| CPU time | 216.39 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:47:47 PM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=576906414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 0.usbdev_freq_loclk_max.576906414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.1537885318 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 95159979635 ps |
| CPU time | 219.43 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:47:51 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537885318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.1537885318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.1815658371 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 206586735 ps |
| CPU time | 1.85 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:44:11 PM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815658371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.1815658371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.1508221608 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 184518961 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:44:10 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508221608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_stall.1508221608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.2534486089 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 186192849 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:44:11 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534486089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_trans.2534486089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.380091388 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 2399935964 ps |
| CPU time | 21.78 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:44:31 PM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=380091388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.380091388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.2524073557 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 4023627240 ps |
| CPU time | 29.07 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:44:39 PM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524073557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.2524073557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.1795155610 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 250750674 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:44:08 PM UTC 24 |
| Finished | Sep 01 12:44:11 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1795155610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.1795155610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.1660987224 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 497541207 ps |
| CPU time | 2.66 seconds |
| Started | Sep 01 12:44:09 PM UTC 24 |
| Finished | Sep 01 12:44:13 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660987224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.1660987224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.3592712263 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 4339043649 ps |
| CPU time | 13.72 seconds |
| Started | Sep 01 12:44:10 PM UTC 24 |
| Finished | Sep 01 12:44:24 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592712263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_suspend.3592712263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.848826903 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 3172484513 ps |
| CPU time | 28.28 seconds |
| Started | Sep 01 12:44:11 PM UTC 24 |
| Finished | Sep 01 12:44:40 PM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=848826903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.848826903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.203099450 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 240969040 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 12:44:11 PM UTC 24 |
| Finished | Sep 01 12:44:14 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=203099450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.203099450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.815230694 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 199470567 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:44:11 PM UTC 24 |
| Finished | Sep 01 12:44:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=815230694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.815230694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.2825107384 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 1941399177 ps |
| CPU time | 21.15 seconds |
| Started | Sep 01 12:44:11 PM UTC 24 |
| Finished | Sep 01 12:44:33 PM UTC 24 |
| Peak memory | 234128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2825107384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.2825107384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.4085693850 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 1628222832 ps |
| CPU time | 18.76 seconds |
| Started | Sep 01 12:44:12 PM UTC 24 |
| Finished | Sep 01 12:44:32 PM UTC 24 |
| Peak memory | 229448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085693850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.4085693850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.825362094 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 151789257 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:44:12 PM UTC 24 |
| Finished | Sep 01 12:44:15 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=825362094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.825362094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.3814077690 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 138135304 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:44:12 PM UTC 24 |
| Finished | Sep 01 12:44:15 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814077690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.3814077690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1402357469 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 486108065 ps |
| CPU time | 3.02 seconds |
| Started | Sep 01 12:44:12 PM UTC 24 |
| Finished | Sep 01 12:44:17 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1402357469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1402357469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.3963385126 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 176041870 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:44:14 PM UTC 24 |
| Finished | Sep 01 12:44:16 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963385126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_out_iso.3963385126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.3467780679 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 185886559 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:44:14 PM UTC 24 |
| Finished | Sep 01 12:44:16 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467780679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_out_stall.3467780679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.475217303 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 198429301 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:44:15 PM UTC 24 |
| Finished | Sep 01 12:44:17 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=475217303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_out_trans_nak.475217303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.3859111282 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 159954519 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:44:15 PM UTC 24 |
| Finished | Sep 01 12:44:17 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859111282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.3859111282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.3491499187 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 152980442 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:44:16 PM UTC 24 |
| Finished | Sep 01 12:44:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3491499187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.3491499187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.2009659352 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 240159835 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 12:44:16 PM UTC 24 |
| Finished | Sep 01 12:44:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009659352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.2009659352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.468295486 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 245766191 ps |
| CPU time | 1.86 seconds |
| Started | Sep 01 12:44:16 PM UTC 24 |
| Finished | Sep 01 12:44:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=468295486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.468295486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.1598013650 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 205414158 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 12:44:16 PM UTC 24 |
| Finished | Sep 01 12:44:19 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598013650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.1598013650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.2696715239 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 200391169 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:44:17 PM UTC 24 |
| Finished | Sep 01 12:44:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696715239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.2696715239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.3382546166 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 246141384 ps |
| CPU time | 1.87 seconds |
| Started | Sep 01 12:44:20 PM UTC 24 |
| Finished | Sep 01 12:44:23 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3382546166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_sent.3382546166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.1534348050 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 9902653848 ps |
| CPU time | 153.91 seconds |
| Started | Sep 01 12:44:21 PM UTC 24 |
| Finished | Sep 01 12:46:58 PM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1534348050 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.1534348050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.4176990577 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 226595755 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:44:20 PM UTC 24 |
| Finished | Sep 01 12:44:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4176990577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_random_length_in_transaction.4176990577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.2183139330 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 190385573 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:44:20 PM UTC 24 |
| Finished | Sep 01 12:44:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183139330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.2183139330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.3847179759 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 317186424 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 12:44:24 PM UTC 24 |
| Finished | Sep 01 12:44:26 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847179759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.3847179759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.4044808620 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 156681419 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:44:24 PM UTC 24 |
| Finished | Sep 01 12:44:26 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044808620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.4044808620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.4070670025 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 221396136 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 12:44:26 PM UTC 24 |
| Finished | Sep 01 12:44:29 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4070670025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.4070670025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.1169449212 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 1762231135 ps |
| CPU time | 20.83 seconds |
| Started | Sep 01 12:44:26 PM UTC 24 |
| Finished | Sep 01 12:44:48 PM UTC 24 |
| Peak memory | 227488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1169449212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.1169449212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.788527040 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 156830320 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:44:26 PM UTC 24 |
| Finished | Sep 01 12:44:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=788527040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_stall_trans.788527040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.1466497508 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 769428570 ps |
| CPU time | 3.31 seconds |
| Started | Sep 01 12:44:27 PM UTC 24 |
| Finished | Sep 01 12:44:31 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1466497508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.1466497508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.2788608611 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 2054248486 ps |
| CPU time | 15.29 seconds |
| Started | Sep 01 12:44:27 PM UTC 24 |
| Finished | Sep 01 12:44:44 PM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788608611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.2788608611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.2577675591 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 3431920614 ps |
| CPU time | 36.49 seconds |
| Started | Sep 01 12:44:06 PM UTC 24 |
| Finished | Sep 01 12:44:44 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2577675591 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.2577675591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.3781560399 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 95986295 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 12:45:17 PM UTC 24 |
| Finished | Sep 01 12:45:19 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781560399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.3781560399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.2759630003 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 11096990328 ps |
| CPU time | 28.88 seconds |
| Started | Sep 01 12:44:30 PM UTC 24 |
| Finished | Sep 01 12:45:00 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2759630003 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.2759630003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.1523709387 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 18940118581 ps |
| CPU time | 28.07 seconds |
| Started | Sep 01 12:44:30 PM UTC 24 |
| Finished | Sep 01 12:44:59 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523709387 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.1523709387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.3542888563 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 28771971300 ps |
| CPU time | 51.1 seconds |
| Started | Sep 01 12:44:30 PM UTC 24 |
| Finished | Sep 01 12:45:22 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542888563 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.3542888563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.3192957970 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 159860201 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:44:31 PM UTC 24 |
| Finished | Sep 01 12:44:33 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3192957970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_av_buffer.3192957970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.3714628118 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 179176850 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:44:32 PM UTC 24 |
| Finished | Sep 01 12:44:34 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3714628118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.3714628118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.2717090454 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 221796399 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 12:44:32 PM UTC 24 |
| Finished | Sep 01 12:44:35 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2717090454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.2717090454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.3069865073 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 618176537 ps |
| CPU time | 2.47 seconds |
| Started | Sep 01 12:44:33 PM UTC 24 |
| Finished | Sep 01 12:44:37 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069865073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.3069865073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.1690417609 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 37338984652 ps |
| CPU time | 71.67 seconds |
| Started | Sep 01 12:44:33 PM UTC 24 |
| Finished | Sep 01 12:45:47 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1690417609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.1690417609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.3808234246 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 1409073216 ps |
| CPU time | 29.54 seconds |
| Started | Sep 01 12:44:35 PM UTC 24 |
| Finished | Sep 01 12:45:05 PM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808234246 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.3808234246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.1574817764 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 1080611349 ps |
| CPU time | 4.65 seconds |
| Started | Sep 01 12:44:36 PM UTC 24 |
| Finished | Sep 01 12:44:42 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574817764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_disable_endpoint.1574817764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.2130163742 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 136750682 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:44:36 PM UTC 24 |
| Finished | Sep 01 12:44:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2130163742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.2130163742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3181134681 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 31920306 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:44:36 PM UTC 24 |
| Finished | Sep 01 12:44:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181134681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.3181134681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.873141901 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 694987899 ps |
| CPU time | 3.77 seconds |
| Started | Sep 01 12:44:36 PM UTC 24 |
| Finished | Sep 01 12:44:41 PM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873141901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.873141901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.4291199 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 335606537 ps |
| CPU time | 2.07 seconds |
| Started | Sep 01 12:44:38 PM UTC 24 |
| Finished | Sep 01 12:44:42 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverag e/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.4291199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.25856971 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 250351566 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:44:39 PM UTC 24 |
| Finished | Sep 01 12:44:42 PM UTC 24 |
| Peak memory | 214752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=25856971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_fifo_levels.25856971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.874575640 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 271261454 ps |
| CPU time | 3.14 seconds |
| Started | Sep 01 12:44:39 PM UTC 24 |
| Finished | Sep 01 12:44:43 PM UTC 24 |
| Peak memory | 216872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=874575640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_fifo_rst.874575640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.3909066369 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 106181508225 ps |
| CPU time | 241.83 seconds |
| Started | Sep 01 12:44:39 PM UTC 24 |
| Finished | Sep 01 12:48:45 PM UTC 24 |
| Peak memory | 220156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909066369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.3909066369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.2031041400 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 92113230540 ps |
| CPU time | 154.25 seconds |
| Started | Sep 01 12:44:40 PM UTC 24 |
| Finished | Sep 01 12:47:17 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2031041400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.2031041400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.3690711043 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 101144270385 ps |
| CPU time | 184.73 seconds |
| Started | Sep 01 12:44:42 PM UTC 24 |
| Finished | Sep 01 12:47:49 PM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690711043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.3690711043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.3771018076 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 106192523420 ps |
| CPU time | 226.11 seconds |
| Started | Sep 01 12:44:42 PM UTC 24 |
| Finished | Sep 01 12:48:31 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3771018076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_loclk_max.3771018076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.3131597192 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 89135962155 ps |
| CPU time | 176.26 seconds |
| Started | Sep 01 12:44:43 PM UTC 24 |
| Finished | Sep 01 12:47:42 PM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131597192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.3131597192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.1745892636 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 222808190 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 12:44:43 PM UTC 24 |
| Finished | Sep 01 12:44:46 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1745892636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.1745892636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.533793799 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 179113921 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:44:44 PM UTC 24 |
| Finished | Sep 01 12:44:47 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=533793799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_in_stall.533793799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.4064605505 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 210379446 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 12:44:45 PM UTC 24 |
| Finished | Sep 01 12:44:48 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4064605505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_trans.4064605505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.316733674 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 3898244274 ps |
| CPU time | 112.93 seconds |
| Started | Sep 01 12:44:43 PM UTC 24 |
| Finished | Sep 01 12:46:38 PM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=316733674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.316733674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.1170432813 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 7888824647 ps |
| CPU time | 127.58 seconds |
| Started | Sep 01 12:44:45 PM UTC 24 |
| Finished | Sep 01 12:46:57 PM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170432813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.1170432813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.133852892 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 186437699 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:44:47 PM UTC 24 |
| Finished | Sep 01 12:44:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=133852892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_link_in_err.133852892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.1980605264 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 14361976790 ps |
| CPU time | 26.98 seconds |
| Started | Sep 01 12:44:48 PM UTC 24 |
| Finished | Sep 01 12:45:16 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980605264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.1980605264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.549130840 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 4270622013 ps |
| CPU time | 11.17 seconds |
| Started | Sep 01 12:44:48 PM UTC 24 |
| Finished | Sep 01 12:45:00 PM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=549130840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_suspend.549130840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.3203563740 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 3250382007 ps |
| CPU time | 35.24 seconds |
| Started | Sep 01 12:44:49 PM UTC 24 |
| Finished | Sep 01 12:45:26 PM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203563740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.3203563740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.3980708765 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 258608650 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 12:44:49 PM UTC 24 |
| Finished | Sep 01 12:44:52 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980708765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.3980708765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.1814246252 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 191534680 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:44:49 PM UTC 24 |
| Finished | Sep 01 12:44:52 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814246252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.1814246252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.924957336 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 1920887389 ps |
| CPU time | 72.52 seconds |
| Started | Sep 01 12:44:51 PM UTC 24 |
| Finished | Sep 01 12:46:05 PM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924957336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.924957336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.1819531513 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 2297939169 ps |
| CPU time | 25.08 seconds |
| Started | Sep 01 12:44:53 PM UTC 24 |
| Finished | Sep 01 12:45:19 PM UTC 24 |
| Peak memory | 229540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819531513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.1819531513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.2198460640 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 2869211826 ps |
| CPU time | 32.37 seconds |
| Started | Sep 01 12:44:53 PM UTC 24 |
| Finished | Sep 01 12:45:27 PM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198460640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.2198460640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.2393762890 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 169739423 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:44:53 PM UTC 24 |
| Finished | Sep 01 12:44:55 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393762890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.2393762890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.2753051682 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 148085606 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:44:56 PM UTC 24 |
| Finished | Sep 01 12:44:59 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2753051682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.2753051682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.3757141019 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 169104676 ps |
| CPU time | 1.23 seconds |
| Started | Sep 01 12:45:00 PM UTC 24 |
| Finished | Sep 01 12:45:03 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757141019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.3757141019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.2837176827 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 169210551 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:45:00 PM UTC 24 |
| Finished | Sep 01 12:45:03 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2837176827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.2837176827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.680693010 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 200328624 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:45:00 PM UTC 24 |
| Finished | Sep 01 12:45:03 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=680693010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_out_trans_nak.680693010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.745080350 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 144729823 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:45:02 PM UTC 24 |
| Finished | Sep 01 12:45:04 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=745080350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pending_in_trans.745080350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.3620267039 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 250219809 ps |
| CPU time | 1.95 seconds |
| Started | Sep 01 12:45:02 PM UTC 24 |
| Finished | Sep 01 12:45:05 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620267039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.3620267039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.1098192734 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 241016700 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 12:45:03 PM UTC 24 |
| Finished | Sep 01 12:45:06 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098192734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.1098192734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.2744105944 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 136992170 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:45:03 PM UTC 24 |
| Finished | Sep 01 12:45:06 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744105944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.2744105944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.708780776 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 35650754 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 12:45:03 PM UTC 24 |
| Finished | Sep 01 12:45:05 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=708780776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_phy_pins_sense.708780776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.441753154 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 17155589585 ps |
| CPU time | 46.82 seconds |
| Started | Sep 01 12:45:04 PM UTC 24 |
| Finished | Sep 01 12:45:53 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=441753154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_pkt_buffer.441753154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.2139982877 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 215575984 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 12:45:04 PM UTC 24 |
| Finished | Sep 01 12:45:07 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139982877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_pkt_received.2139982877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2166443020 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 211602259 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:45:06 PM UTC 24 |
| Finished | Sep 01 12:45:09 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166443020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.2166443020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.2197872935 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 3586295185 ps |
| CPU time | 87.53 seconds |
| Started | Sep 01 12:45:06 PM UTC 24 |
| Finished | Sep 01 12:46:36 PM UTC 24 |
| Peak memory | 229640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2197872935 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.2197872935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.3316318104 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 2681702187 ps |
| CPU time | 60.89 seconds |
| Started | Sep 01 12:45:06 PM UTC 24 |
| Finished | Sep 01 12:46:09 PM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316318104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.3316318104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.1699529301 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 5763725150 ps |
| CPU time | 30.84 seconds |
| Started | Sep 01 12:45:06 PM UTC 24 |
| Finished | Sep 01 12:45:39 PM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699529301 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.1699529301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.4065903722 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 164394289 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:45:06 PM UTC 24 |
| Finished | Sep 01 12:45:09 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065903722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_random_length_in_transaction.4065903722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.3428239804 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 146210676 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:45:06 PM UTC 24 |
| Finished | Sep 01 12:45:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428239804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.3428239804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.1189282883 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 20170447174 ps |
| CPU time | 43.91 seconds |
| Started | Sep 01 12:45:06 PM UTC 24 |
| Finished | Sep 01 12:45:52 PM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1189282883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.1189282883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.3581357600 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 162623013 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:45:08 PM UTC 24 |
| Finished | Sep 01 12:45:10 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581357600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_crc_err.3581357600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.2007839129 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 252802581 ps |
| CPU time | 1.95 seconds |
| Started | Sep 01 12:45:08 PM UTC 24 |
| Finished | Sep 01 12:45:11 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007839129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.2007839129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.543828385 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 185986404 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:45:08 PM UTC 24 |
| Finished | Sep 01 12:45:10 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=543828385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_rx_pid_err.543828385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.1247800850 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 318755719 ps |
| CPU time | 2.03 seconds |
| Started | Sep 01 12:45:17 PM UTC 24 |
| Finished | Sep 01 12:45:20 PM UTC 24 |
| Peak memory | 251604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247800850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.1247800850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.2304217807 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 391378371 ps |
| CPU time | 2.51 seconds |
| Started | Sep 01 12:45:09 PM UTC 24 |
| Finished | Sep 01 12:45:12 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2304217807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.2304217807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.833872402 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 208992118 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 12:45:09 PM UTC 24 |
| Finished | Sep 01 12:45:12 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=833872402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.833872402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.2662084193 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 165560272 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:45:10 PM UTC 24 |
| Finished | Sep 01 12:45:12 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2662084193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_setup_stage.2662084193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.3795708820 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 174012954 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:45:11 PM UTC 24 |
| Finished | Sep 01 12:45:14 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795708820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.3795708820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.1003729528 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 286393782 ps |
| CPU time | 1.87 seconds |
| Started | Sep 01 12:45:11 PM UTC 24 |
| Finished | Sep 01 12:45:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003729528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.1003729528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.2338153716 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 3056635406 ps |
| CPU time | 101.1 seconds |
| Started | Sep 01 12:45:11 PM UTC 24 |
| Finished | Sep 01 12:46:54 PM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2338153716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.2338153716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.621075475 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 166083983 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:45:12 PM UTC 24 |
| Finished | Sep 01 12:45:15 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=621075475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.621075475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.3487047339 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 188979692 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:45:13 PM UTC 24 |
| Finished | Sep 01 12:45:16 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487047339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.3487047339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.91729819 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 664921438 ps |
| CPU time | 2.94 seconds |
| Started | Sep 01 12:45:15 PM UTC 24 |
| Finished | Sep 01 12:45:19 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=91729819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_stream_len_max.91729819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.2558272844 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 2211784399 ps |
| CPU time | 66.45 seconds |
| Started | Sep 01 12:45:14 PM UTC 24 |
| Finished | Sep 01 12:46:22 PM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2558272844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_streaming_out.2558272844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.2892862626 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 9702244808 ps |
| CPU time | 177.03 seconds |
| Started | Sep 01 12:45:16 PM UTC 24 |
| Finished | Sep 01 12:48:16 PM UTC 24 |
| Peak memory | 227252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2892862626 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.2892862626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.3084394238 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 1010844969 ps |
| CPU time | 28.2 seconds |
| Started | Sep 01 12:44:35 PM UTC 24 |
| Finished | Sep 01 12:45:04 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084394238 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.3084394238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.2730949576 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 41386087 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:51:20 PM UTC 24 |
| Finished | Sep 01 12:51:22 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730949576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.2730949576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.372317121 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 4874221997 ps |
| CPU time | 9.5 seconds |
| Started | Sep 01 12:50:51 PM UTC 24 |
| Finished | Sep 01 12:51:02 PM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=372317121 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.372317121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.3441235631 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 13566958944 ps |
| CPU time | 28.65 seconds |
| Started | Sep 01 12:50:51 PM UTC 24 |
| Finished | Sep 01 12:51:21 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441235631 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.3441235631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.3679364984 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 31358864543 ps |
| CPU time | 65.23 seconds |
| Started | Sep 01 12:50:51 PM UTC 24 |
| Finished | Sep 01 12:51:59 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679364984 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.3679364984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.4208994229 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 161096974 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:50:51 PM UTC 24 |
| Finished | Sep 01 12:50:54 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208994229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.4208994229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.813341008 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 150549707 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:50:52 PM UTC 24 |
| Finished | Sep 01 12:50:54 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=813341008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_bitstuff_err.813341008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.2966025786 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 306583778 ps |
| CPU time | 1.9 seconds |
| Started | Sep 01 12:50:55 PM UTC 24 |
| Finished | Sep 01 12:50:58 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966025786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_data_toggle_clear.2966025786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.3965984310 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 1161451994 ps |
| CPU time | 5.31 seconds |
| Started | Sep 01 12:50:55 PM UTC 24 |
| Finished | Sep 01 12:51:01 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3965984310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.3965984310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.2770153400 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 38280737298 ps |
| CPU time | 97.38 seconds |
| Started | Sep 01 12:50:55 PM UTC 24 |
| Finished | Sep 01 12:52:35 PM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770153400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.2770153400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.728324708 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 437049642 ps |
| CPU time | 9.92 seconds |
| Started | Sep 01 12:50:55 PM UTC 24 |
| Finished | Sep 01 12:51:06 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=728324708 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.728324708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.3607620965 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 637159578 ps |
| CPU time | 3.12 seconds |
| Started | Sep 01 12:50:55 PM UTC 24 |
| Finished | Sep 01 12:51:00 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607620965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_disable_endpoint.3607620965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.3464261605 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 142944136 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:50:55 PM UTC 24 |
| Finished | Sep 01 12:50:58 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464261605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.3464261605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_enable.4103009357 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 40697436 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 12:50:55 PM UTC 24 |
| Finished | Sep 01 12:50:58 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103009357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.4103009357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.76437944 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 914110195 ps |
| CPU time | 3.77 seconds |
| Started | Sep 01 12:50:55 PM UTC 24 |
| Finished | Sep 01 12:51:00 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=76437944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_endpoint_access.76437944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.3496736520 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 392693131 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:50:56 PM UTC 24 |
| Finished | Sep 01 12:50:58 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3496736520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.3496736520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.1506966340 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 286262434 ps |
| CPU time | 2.03 seconds |
| Started | Sep 01 12:50:58 PM UTC 24 |
| Finished | Sep 01 12:51:01 PM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506966340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_fifo_levels.1506966340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.744304764 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 456403047 ps |
| CPU time | 4.31 seconds |
| Started | Sep 01 12:50:58 PM UTC 24 |
| Finished | Sep 01 12:51:03 PM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744304764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_fifo_rst.744304764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.3264787847 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 209913699 ps |
| CPU time | 1.93 seconds |
| Started | Sep 01 12:50:58 PM UTC 24 |
| Finished | Sep 01 12:51:01 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3264787847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.3264787847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.1109462029 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 158348173 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:51:01 PM UTC 24 |
| Finished | Sep 01 12:51:04 PM UTC 24 |
| Peak memory | 214664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109462029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.1109462029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.2861991267 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 284217159 ps |
| CPU time | 2.03 seconds |
| Started | Sep 01 12:51:01 PM UTC 24 |
| Finished | Sep 01 12:51:05 PM UTC 24 |
| Peak memory | 216860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861991267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.2861991267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.1699957634 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 3353741665 ps |
| CPU time | 97 seconds |
| Started | Sep 01 12:50:58 PM UTC 24 |
| Finished | Sep 01 12:52:37 PM UTC 24 |
| Peak memory | 234268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699957634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.1699957634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.2039969184 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 11580974672 ps |
| CPU time | 78.26 seconds |
| Started | Sep 01 12:51:01 PM UTC 24 |
| Finished | Sep 01 12:52:22 PM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039969184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.2039969184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.3065383756 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 221531610 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 12:51:01 PM UTC 24 |
| Finished | Sep 01 12:51:04 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3065383756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.3065383756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.3845443622 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 25064667200 ps |
| CPU time | 45.14 seconds |
| Started | Sep 01 12:51:01 PM UTC 24 |
| Finished | Sep 01 12:51:48 PM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845443622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.3845443622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.4277106078 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 8977621081 ps |
| CPU time | 19.4 seconds |
| Started | Sep 01 12:51:01 PM UTC 24 |
| Finished | Sep 01 12:51:22 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277106078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_link_suspend.4277106078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.2749538003 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 3327740828 ps |
| CPU time | 27.82 seconds |
| Started | Sep 01 12:51:02 PM UTC 24 |
| Finished | Sep 01 12:51:31 PM UTC 24 |
| Peak memory | 227740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2749538003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.2749538003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.2659848503 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 4009815877 ps |
| CPU time | 48.22 seconds |
| Started | Sep 01 12:51:02 PM UTC 24 |
| Finished | Sep 01 12:51:52 PM UTC 24 |
| Peak memory | 227620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2659848503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.2659848503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.2596226669 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 245717901 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 12:51:05 PM UTC 24 |
| Finished | Sep 01 12:51:09 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596226669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.2596226669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.21577774 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 187471762 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 12:51:05 PM UTC 24 |
| Finished | Sep 01 12:51:08 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21577774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.21577774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.1524504488 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 2583844251 ps |
| CPU time | 36.59 seconds |
| Started | Sep 01 12:51:06 PM UTC 24 |
| Finished | Sep 01 12:51:44 PM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1524504488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.1524504488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.2017284551 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 3663264683 ps |
| CPU time | 38.46 seconds |
| Started | Sep 01 12:51:06 PM UTC 24 |
| Finished | Sep 01 12:51:46 PM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2017284551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.2017284551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.771858170 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 1630244246 ps |
| CPU time | 50.33 seconds |
| Started | Sep 01 12:51:06 PM UTC 24 |
| Finished | Sep 01 12:51:58 PM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=771858170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.771858170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.1596286281 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 173721847 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:51:06 PM UTC 24 |
| Finished | Sep 01 12:51:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1596286281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.1596286281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.1719086416 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 145835827 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 12:51:06 PM UTC 24 |
| Finished | Sep 01 12:51:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719086416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.1719086416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.1276676483 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 182848448 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:51:06 PM UTC 24 |
| Finished | Sep 01 12:51:09 PM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1276676483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.1276676483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.671825611 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 204623287 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:51:06 PM UTC 24 |
| Finished | Sep 01 12:51:09 PM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=671825611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_out_stall.671825611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.231861793 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 170730896 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:51:06 PM UTC 24 |
| Finished | Sep 01 12:51:09 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231861793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_out_trans_nak.231861793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.2552221742 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 183792463 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:51:09 PM UTC 24 |
| Finished | Sep 01 12:51:11 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2552221742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.2552221742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.364877247 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 208374130 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:51:09 PM UTC 24 |
| Finished | Sep 01 12:51:11 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=364877247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.364877247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.2095426755 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 151993441 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 12:51:09 PM UTC 24 |
| Finished | Sep 01 12:51:11 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095426755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.2095426755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.1855291002 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 39547147 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:51:09 PM UTC 24 |
| Finished | Sep 01 12:51:11 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855291002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.1855291002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.2357236779 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 12249923599 ps |
| CPU time | 47.6 seconds |
| Started | Sep 01 12:51:13 PM UTC 24 |
| Finished | Sep 01 12:52:03 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357236779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_pkt_buffer.2357236779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.870287751 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 149775170 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:16 PM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=870287751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_pkt_received.870287751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.270820269 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 236375337 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:16 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270820269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_pkt_sent.270820269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.3650663867 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 190822882 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:16 PM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3650663867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.3650663867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.2234035226 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 170671728 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:16 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234035226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.2234035226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.3688557564 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 20184754556 ps |
| CPU time | 32.43 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:48 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688557564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 10.usbdev_resume_link_active.3688557564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.2119124994 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 178909413 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:16 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2119124994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_rx_crc_err.2119124994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.3551266780 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 222478115 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:17 PM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3551266780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_setup_stage.3551266780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.1523312082 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 147536583 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:17 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523312082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.1523312082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.2162743347 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 243162682 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:17 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162743347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.2162743347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.431125951 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 2670911271 ps |
| CPU time | 32.08 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:48 PM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=431125951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.431125951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.4090261860 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 233833915 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:17 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090261860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.4090261860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.1424124310 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 174746003 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:51:14 PM UTC 24 |
| Finished | Sep 01 12:51:17 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1424124310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_stall_trans.1424124310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.3426138780 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 1153155063 ps |
| CPU time | 4.74 seconds |
| Started | Sep 01 12:51:16 PM UTC 24 |
| Finished | Sep 01 12:51:22 PM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3426138780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.3426138780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.3921971973 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 2584067316 ps |
| CPU time | 23.01 seconds |
| Started | Sep 01 12:51:16 PM UTC 24 |
| Finished | Sep 01 12:51:40 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921971973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.3921971973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.1939516527 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 4315764813 ps |
| CPU time | 34.2 seconds |
| Started | Sep 01 12:50:55 PM UTC 24 |
| Finished | Sep 01 12:51:31 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939516527 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.1939516527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.1254623531 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 548801941 ps |
| CPU time | 2.64 seconds |
| Started | Sep 01 12:51:19 PM UTC 24 |
| Finished | Sep 01 12:51:23 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1254623531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.1254623531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.895724764 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 318327340 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=895724764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.895724764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.3384659301 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 681532731 ps |
| CPU time | 1.78 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3384659301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.3384659301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.1586099252 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 195713644 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586099252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 101.usbdev_fifo_levels.1586099252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.2693098610 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 631503797 ps |
| CPU time | 1.91 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:47 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2693098610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.2693098610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.1230103241 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 305868476 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230103241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.1230103241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.3008383755 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 512862247 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3008383755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_ tx_rx_disruption.3008383755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.3343650421 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 411253022 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343650421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.3343650421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.3129339296 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 549876768 ps |
| CPU time | 1.89 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:47 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3129339296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_ tx_rx_disruption.3129339296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.3919403205 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 478384044 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3919403205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.3919403205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.1905477452 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 594791699 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 01:19:44 PM UTC 24 |
| Finished | Sep 01 01:19:47 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1905477452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.1905477452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.443932467 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 305727168 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 01:19:44 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=443932467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.443932467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.4066530445 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 294065476 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 01:19:44 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066530445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 105.usbdev_fifo_levels.4066530445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.1625702121 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 568794277 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:19:44 PM UTC 24 |
| Finished | Sep 01 01:19:47 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1625702121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_ tx_rx_disruption.1625702121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.3138483894 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 479192948 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 01:19:44 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138483894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.3138483894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.416141156 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 623042843 ps |
| CPU time | 1.81 seconds |
| Started | Sep 01 01:19:44 PM UTC 24 |
| Finished | Sep 01 01:19:47 PM UTC 24 |
| Peak memory | 215400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=416141156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_t x_rx_disruption.416141156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.3917721582 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 258388030 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:19:44 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3917721582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.3917721582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.1218522837 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 282451473 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218522837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 107.usbdev_fifo_levels.1218522837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3589357818 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 560684215 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3589357818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.3589357818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.3130303365 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 501152847 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3130303365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_ tx_rx_disruption.3130303365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.593754118 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 718207880 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=593754118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.593754118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.3635227829 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 262503957 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635227829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 109.usbdev_fifo_levels.3635227829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.1335368090 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 538012288 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1335368090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.1335368090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.3265806032 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 40770369 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:51:48 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265806032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.3265806032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.1724800212 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 10660748948 ps |
| CPU time | 21.02 seconds |
| Started | Sep 01 12:51:20 PM UTC 24 |
| Finished | Sep 01 12:51:42 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724800212 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.1724800212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.2968646985 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 15305856529 ps |
| CPU time | 35.48 seconds |
| Started | Sep 01 12:51:20 PM UTC 24 |
| Finished | Sep 01 12:51:57 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968646985 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.2968646985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.2407602031 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 28647850858 ps |
| CPU time | 57.94 seconds |
| Started | Sep 01 12:51:20 PM UTC 24 |
| Finished | Sep 01 12:52:19 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407602031 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.2407602031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.3620186980 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 164228995 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:51:20 PM UTC 24 |
| Finished | Sep 01 12:51:22 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620186980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.3620186980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.576395004 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 154432724 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:51:20 PM UTC 24 |
| Finished | Sep 01 12:51:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=576395004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_bitstuff_err.576395004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.4183545402 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 395168976 ps |
| CPU time | 1.93 seconds |
| Started | Sep 01 12:51:20 PM UTC 24 |
| Finished | Sep 01 12:51:23 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183545402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_data_toggle_clear.4183545402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.2718760660 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 287403538 ps |
| CPU time | 1.97 seconds |
| Started | Sep 01 12:51:20 PM UTC 24 |
| Finished | Sep 01 12:51:23 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718760660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.2718760660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.1059597304 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 3893216628 ps |
| CPU time | 38.54 seconds |
| Started | Sep 01 12:51:20 PM UTC 24 |
| Finished | Sep 01 12:52:00 PM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059597304 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.1059597304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.1434493962 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 585164294 ps |
| CPU time | 2.95 seconds |
| Started | Sep 01 12:51:25 PM UTC 24 |
| Finished | Sep 01 12:51:29 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434493962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.1434493962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.3184497586 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 144416504 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:51:25 PM UTC 24 |
| Finished | Sep 01 12:51:28 PM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184497586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.3184497586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_enable.2670805457 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 51843987 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:51:25 PM UTC 24 |
| Finished | Sep 01 12:51:28 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670805457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.2670805457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.2843637151 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 941578941 ps |
| CPU time | 4.63 seconds |
| Started | Sep 01 12:51:26 PM UTC 24 |
| Finished | Sep 01 12:51:31 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843637151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.2843637151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.594642988 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 283583976 ps |
| CPU time | 2.78 seconds |
| Started | Sep 01 12:51:26 PM UTC 24 |
| Finished | Sep 01 12:51:30 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=594642988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_fifo_rst.594642988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.2525250209 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 159076555 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:51:26 PM UTC 24 |
| Finished | Sep 01 12:51:28 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2525250209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.2525250209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.2244511598 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 163522691 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:51:26 PM UTC 24 |
| Finished | Sep 01 12:51:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2244511598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_stall.2244511598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.241120979 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 211578063 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 12:51:26 PM UTC 24 |
| Finished | Sep 01 12:51:29 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=241120979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_in_trans.241120979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.3912469257 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 3960357015 ps |
| CPU time | 105.24 seconds |
| Started | Sep 01 12:51:26 PM UTC 24 |
| Finished | Sep 01 12:53:13 PM UTC 24 |
| Peak memory | 234188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912469257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.3912469257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.1512565173 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 248045908 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 12:51:28 PM UTC 24 |
| Finished | Sep 01 12:51:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1512565173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.1512565173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.1487097944 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 7042396842 ps |
| CPU time | 15.7 seconds |
| Started | Sep 01 12:51:30 PM UTC 24 |
| Finished | Sep 01 12:51:48 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487097944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_resume.1487097944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.3571925385 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 11036551364 ps |
| CPU time | 17.12 seconds |
| Started | Sep 01 12:51:30 PM UTC 24 |
| Finished | Sep 01 12:51:49 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571925385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.3571925385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.3921310727 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 3480217850 ps |
| CPU time | 34.45 seconds |
| Started | Sep 01 12:51:30 PM UTC 24 |
| Finished | Sep 01 12:52:07 PM UTC 24 |
| Peak memory | 227676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921310727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.3921310727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.2758124775 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 3430894789 ps |
| CPU time | 93.32 seconds |
| Started | Sep 01 12:51:31 PM UTC 24 |
| Finished | Sep 01 12:53:06 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758124775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.2758124775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.3416646498 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 239510604 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:51:31 PM UTC 24 |
| Finished | Sep 01 12:51:34 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416646498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.3416646498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.3202460293 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 190098185 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 12:51:31 PM UTC 24 |
| Finished | Sep 01 12:51:34 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202460293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.3202460293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.215493413 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 2682687876 ps |
| CPU time | 27.12 seconds |
| Started | Sep 01 12:51:31 PM UTC 24 |
| Finished | Sep 01 12:52:00 PM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=215493413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.215493413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.2152772863 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 2158948484 ps |
| CPU time | 23.42 seconds |
| Started | Sep 01 12:51:31 PM UTC 24 |
| Finished | Sep 01 12:51:56 PM UTC 24 |
| Peak memory | 234204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152772863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.2152772863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.3142979341 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 3116482764 ps |
| CPU time | 32.12 seconds |
| Started | Sep 01 12:51:33 PM UTC 24 |
| Finished | Sep 01 12:52:07 PM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142979341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.3142979341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.2430646374 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 154493498 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:51:33 PM UTC 24 |
| Finished | Sep 01 12:51:36 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2430646374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.2430646374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.2220748039 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 148485582 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 12:51:33 PM UTC 24 |
| Finished | Sep 01 12:51:36 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220748039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.2220748039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.2954407540 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 167433958 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:51:33 PM UTC 24 |
| Finished | Sep 01 12:51:36 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2954407540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_out_iso.2954407540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.2596712525 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 170291803 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:51:33 PM UTC 24 |
| Finished | Sep 01 12:51:36 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596712525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.2596712525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.4184817270 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 181989301 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:51:33 PM UTC 24 |
| Finished | Sep 01 12:51:36 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4184817270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.4184817270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.1197686784 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 149545379 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:51:35 PM UTC 24 |
| Finished | Sep 01 12:51:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197686784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.1197686784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.2491508785 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 259088842 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 12:51:35 PM UTC 24 |
| Finished | Sep 01 12:51:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491508785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.2491508785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.1149298218 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 155873427 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:51:35 PM UTC 24 |
| Finished | Sep 01 12:51:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149298218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.1149298218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.1808465332 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 130066792 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:51:39 PM UTC 24 |
| Finished | Sep 01 12:51:41 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808465332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.1808465332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.3241160639 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 19460358489 ps |
| CPU time | 55.04 seconds |
| Started | Sep 01 12:51:39 PM UTC 24 |
| Finished | Sep 01 12:52:36 PM UTC 24 |
| Peak memory | 231648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241160639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.3241160639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.318619406 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 197048197 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:51:39 PM UTC 24 |
| Finished | Sep 01 12:51:42 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=318619406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_pkt_received.318619406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.3338016058 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 237385632 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:51:39 PM UTC 24 |
| Finished | Sep 01 12:51:42 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3338016058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.3338016058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.789846571 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 219275246 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 12:51:39 PM UTC 24 |
| Finished | Sep 01 12:51:42 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=789846571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_random_length_in_transaction.789846571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.924641577 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 156949086 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:51:39 PM UTC 24 |
| Finished | Sep 01 12:51:42 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924641577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.924641577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.4055827821 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 20177826175 ps |
| CPU time | 31.57 seconds |
| Started | Sep 01 12:51:39 PM UTC 24 |
| Finished | Sep 01 12:52:12 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055827821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_resume_link_active.4055827821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.2031376329 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 159610102 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:51:40 PM UTC 24 |
| Finished | Sep 01 12:51:42 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031376329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.2031376329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.1722239913 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 249403893 ps |
| CPU time | 1.86 seconds |
| Started | Sep 01 12:51:40 PM UTC 24 |
| Finished | Sep 01 12:51:43 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722239913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.1722239913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.1650201403 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 144196272 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:51:42 PM UTC 24 |
| Finished | Sep 01 12:51:45 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650201403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.1650201403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.2190630817 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 154168127 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:51:42 PM UTC 24 |
| Finished | Sep 01 12:51:44 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2190630817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.2190630817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.2439351885 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 219269439 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:51:42 PM UTC 24 |
| Finished | Sep 01 12:51:45 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2439351885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.2439351885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.1546896295 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 3923119784 ps |
| CPU time | 100.42 seconds |
| Started | Sep 01 12:51:42 PM UTC 24 |
| Finished | Sep 01 12:53:25 PM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546896295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.1546896295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.533858753 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 197543688 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:51:42 PM UTC 24 |
| Finished | Sep 01 12:51:45 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=533858753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.533858753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.4172884429 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 173589255 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:51:48 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172884429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.4172884429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.71845701 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 1147983712 ps |
| CPU time | 4.39 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:51:51 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=71845701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_stream_len_max.71845701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.28787714 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 1943831713 ps |
| CPU time | 51.43 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:52:39 PM UTC 24 |
| Peak memory | 227400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=28787714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_streaming_out.28787714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.1966312440 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 715952807 ps |
| CPU time | 15.46 seconds |
| Started | Sep 01 12:51:21 PM UTC 24 |
| Finished | Sep 01 12:51:38 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966312440 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.1966312440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.2437051429 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 548614030 ps |
| CPU time | 2.35 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:51:49 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2437051429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_t x_rx_disruption.2437051429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.2639958872 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 179289256 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2639958872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.2639958872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.2737729963 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 515822126 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2737729963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.2737729963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.371123781 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 271934058 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=371123781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 111.usbdev_fifo_levels.371123781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/111.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.1575358269 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 599371941 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1575358269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_ tx_rx_disruption.1575358269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.927025585 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 274233120 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 216592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=927025585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.927025585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.2672744252 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 568914700 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2672744252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.2672744252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.2426116661 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 253055272 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426116661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 113.usbdev_fifo_levels.2426116661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.3996726605 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 676388667 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3996726605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_ tx_rx_disruption.3996726605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.3606365356 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 611042530 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3606365356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.3606365356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.707229399 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 270541317 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:00 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=707229399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 114.usbdev_fifo_levels.707229399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.337977705 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 610448162 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=337977705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_t x_rx_disruption.337977705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.2044179817 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 763612435 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2044179817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.2044179817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.3184068046 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 504123544 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:20:57 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3184068046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_ tx_rx_disruption.3184068046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.3410114332 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 501142334 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410114332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.3410114332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.144754011 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 156042130 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144754011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 116.usbdev_fifo_levels.144754011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.1511515961 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 609540898 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1511515961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.1511515961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.2654592883 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 255563493 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654592883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.2654592883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.3915857820 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 278433065 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915857820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 117.usbdev_fifo_levels.3915857820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.3197032290 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 569301219 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3197032290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.3197032290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.109736306 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 226781624 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=109736306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.109736306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.2487926369 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 256115364 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2487926369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 118.usbdev_fifo_levels.2487926369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.1302132644 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 600050335 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1302132644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.1302132644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.312382716 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 405907770 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=312382716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.312382716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.2382429077 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 310668201 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382429077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 119.usbdev_fifo_levels.2382429077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.3616202473 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 628844480 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3616202473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_ tx_rx_disruption.3616202473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.3747442497 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 46277677 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:09 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3747442497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.3747442497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.509484528 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 10332661921 ps |
| CPU time | 18.71 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:52:06 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=509484528 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.509484528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.1130071611 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 18981125783 ps |
| CPU time | 24.93 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:52:12 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130071611 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.1130071611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.2369964230 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 24042900209 ps |
| CPU time | 39.36 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:52:27 PM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369964230 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.2369964230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.736743683 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 166346440 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:51:48 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=736743683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_av_buffer.736743683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.2245275965 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 143950385 ps |
| CPU time | 1.23 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:51:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245275965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.2245275965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.3136347696 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 254674010 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:51:49 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136347696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_data_toggle_clear.3136347696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.3270486302 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 382407482 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 12:51:46 PM UTC 24 |
| Finished | Sep 01 12:51:49 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270486302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.3270486302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.4128669813 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 764036088 ps |
| CPU time | 15.58 seconds |
| Started | Sep 01 12:51:50 PM UTC 24 |
| Finished | Sep 01 12:52:07 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128669813 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.4128669813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.270025947 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 1139922270 ps |
| CPU time | 2.53 seconds |
| Started | Sep 01 12:51:50 PM UTC 24 |
| Finished | Sep 01 12:51:54 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270025947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_disable_endpoint.270025947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.3764812581 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 137405968 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:51:50 PM UTC 24 |
| Finished | Sep 01 12:51:53 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764812581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.3764812581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_enable.102998086 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 58070925 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 12:51:50 PM UTC 24 |
| Finished | Sep 01 12:51:52 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=102998086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_enable.102998086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.3465911933 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 989588213 ps |
| CPU time | 2.81 seconds |
| Started | Sep 01 12:51:50 PM UTC 24 |
| Finished | Sep 01 12:51:54 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465911933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.3465911933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.1633411869 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 378880874 ps |
| CPU time | 3.6 seconds |
| Started | Sep 01 12:51:50 PM UTC 24 |
| Finished | Sep 01 12:51:55 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633411869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_fifo_rst.1633411869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.2689604191 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 198342702 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:51:51 PM UTC 24 |
| Finished | Sep 01 12:51:53 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689604191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.2689604191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.229517357 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 180941646 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:51:57 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=229517357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_stall.229517357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.337485414 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 180325544 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:51:57 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=337485414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_trans.337485414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.3202805549 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 4132603413 ps |
| CPU time | 30.41 seconds |
| Started | Sep 01 12:51:51 PM UTC 24 |
| Finished | Sep 01 12:52:22 PM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202805549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.3202805549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.1075259553 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 8249665047 ps |
| CPU time | 64.76 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:53:01 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075259553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.1075259553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.621196368 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 179415491 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:51:58 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=621196368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_link_in_err.621196368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.1848173381 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 31874154106 ps |
| CPU time | 54.21 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:52:51 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848173381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.1848173381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.1095445154 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 5629096871 ps |
| CPU time | 16.59 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:52:13 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1095445154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_link_suspend.1095445154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.4057845214 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 3149278151 ps |
| CPU time | 28.28 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:52:25 PM UTC 24 |
| Peak memory | 234112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057845214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.4057845214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.269516605 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 2916461746 ps |
| CPU time | 28.29 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:52:25 PM UTC 24 |
| Peak memory | 229780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=269516605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.269516605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.4010456677 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 272241031 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:51:58 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010456677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.4010456677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.3236371802 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 204378746 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:51:58 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236371802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.3236371802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.2861133139 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 3497861730 ps |
| CPU time | 36.12 seconds |
| Started | Sep 01 12:51:55 PM UTC 24 |
| Finished | Sep 01 12:52:33 PM UTC 24 |
| Peak memory | 229780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861133139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.2861133139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.2752739446 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 3270177279 ps |
| CPU time | 24.35 seconds |
| Started | Sep 01 12:51:56 PM UTC 24 |
| Finished | Sep 01 12:52:21 PM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752739446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.2752739446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.2420837778 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 3267096589 ps |
| CPU time | 86.49 seconds |
| Started | Sep 01 12:51:56 PM UTC 24 |
| Finished | Sep 01 12:53:24 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2420837778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.2420837778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.2339774016 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 152239042 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:51:56 PM UTC 24 |
| Finished | Sep 01 12:51:58 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339774016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.2339774016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.2494858409 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 149344886 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 12:51:56 PM UTC 24 |
| Finished | Sep 01 12:51:58 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2494858409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.2494858409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.1525529538 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 218744082 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1525529538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_nak_trans.1525529538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.2152116692 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 244791066 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152116692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.2152116692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.1776487144 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 161314056 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776487144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_out_stall.1776487144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.3177303810 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 238081523 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:02 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177303810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.3177303810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.2488379198 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 189632247 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:02 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2488379198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_pending_in_trans.2488379198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.1214106149 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 250350742 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:02 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214106149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.1214106149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.1304586843 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 153561918 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:02 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304586843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.1304586843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.542531376 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 8959178606 ps |
| CPU time | 26.39 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:27 PM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=542531376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_pkt_buffer.542531376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.1334383779 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 165560779 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:02 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334383779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.1334383779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.2844971285 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 246664570 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:51:59 PM UTC 24 |
| Finished | Sep 01 12:52:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844971285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_pkt_sent.2844971285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.4029503319 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 168810524 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:52:02 PM UTC 24 |
| Finished | Sep 01 12:52:05 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4029503319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.4029503319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.145929297 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 203427748 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:52:02 PM UTC 24 |
| Finished | Sep 01 12:52:05 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=145929297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.145929297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.2865522855 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 20204602271 ps |
| CPU time | 41.93 seconds |
| Started | Sep 01 12:52:02 PM UTC 24 |
| Finished | Sep 01 12:52:46 PM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865522855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.2865522855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.2121459251 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 137817609 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:52:02 PM UTC 24 |
| Finished | Sep 01 12:52:05 PM UTC 24 |
| Peak memory | 214828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121459251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_rx_crc_err.2121459251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.873371832 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 299969139 ps |
| CPU time | 2.1 seconds |
| Started | Sep 01 12:52:02 PM UTC 24 |
| Finished | Sep 01 12:52:06 PM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873371832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_rx_full.873371832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.992640790 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 163379060 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:52:02 PM UTC 24 |
| Finished | Sep 01 12:52:05 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=992640790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_setup_stage.992640790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.2064697236 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 148078496 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:52:02 PM UTC 24 |
| Finished | Sep 01 12:52:05 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064697236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.2064697236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.2159705656 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 219035174 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:52:02 PM UTC 24 |
| Finished | Sep 01 12:52:05 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159705656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.2159705656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.1386689590 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 3201291268 ps |
| CPU time | 87.26 seconds |
| Started | Sep 01 12:52:06 PM UTC 24 |
| Finished | Sep 01 12:53:36 PM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386689590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.1386689590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.2683784940 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 187518389 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:52:06 PM UTC 24 |
| Finished | Sep 01 12:52:09 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2683784940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.2683784940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.1080564963 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 157265400 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:09 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080564963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_stall_trans.1080564963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.1636552211 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 750260996 ps |
| CPU time | 3.68 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:12 PM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636552211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.1636552211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.389197161 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 1833424700 ps |
| CPU time | 17.7 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:26 PM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=389197161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_streaming_out.389197161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.1431741049 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 180880335 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:51:50 PM UTC 24 |
| Finished | Sep 01 12:51:53 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431741049 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.1431741049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.3738783206 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 474717428 ps |
| CPU time | 2.29 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:10 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3738783206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_t x_rx_disruption.3738783206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.2351397306 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 178729800 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351397306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.2351397306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.599661914 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 632819270 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=599661914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_t x_rx_disruption.599661914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.2725930240 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 344276703 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725930240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.2725930240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.560010846 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 185245713 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=560010846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 121.usbdev_fifo_levels.560010846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/121.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.800542856 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 483962794 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=800542856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_t x_rx_disruption.800542856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.4154277000 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 606930781 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154277000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.4154277000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.3372668791 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 667810988 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3372668791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_ tx_rx_disruption.3372668791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.133645487 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 252295197 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:01 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=133645487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.133645487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.1759548476 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 472187240 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1759548476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_ tx_rx_disruption.1759548476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.3661398555 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 341282287 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661398555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.3661398555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.2785919925 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 575222565 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:03 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2785919925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_ tx_rx_disruption.2785919925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.3845424053 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 171813082 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 216688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845424053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.3845424053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.501285222 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 548908202 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=501285222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_t x_rx_disruption.501285222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.2348171899 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 349833292 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348171899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.2348171899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.3718213793 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 550248170 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:03 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3718213793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_ tx_rx_disruption.3718213793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.461522744 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 524147282 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=461522744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.461522744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.1786445413 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 253265759 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786445413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 127.usbdev_fifo_levels.1786445413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/127.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.965644014 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 597106882 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 214560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=965644014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_t x_rx_disruption.965644014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.3795650603 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 176322298 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:20:58 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795650603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.3795650603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.3766805161 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 467321999 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:20:59 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3766805161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_ tx_rx_disruption.3766805161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.1009018422 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 495647808 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 01:20:59 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009018422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.1009018422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.1859464535 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 487072009 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 01:20:59 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 216596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1859464535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.1859464535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.1817784077 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 62103718 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 12:52:28 PM UTC 24 |
| Finished | Sep 01 12:52:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1817784077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.1817784077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.2689187900 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 6572522355 ps |
| CPU time | 11.73 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:20 PM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689187900 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.2689187900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.3177765132 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 16073880296 ps |
| CPU time | 32.47 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:41 PM UTC 24 |
| Peak memory | 227388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177765132 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.3177765132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.807678535 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 26280310100 ps |
| CPU time | 50.99 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:53:00 PM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=807678535 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.807678535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.2467534617 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 158009375 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:10 PM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467534617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.2467534617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.140649482 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 176926355 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=140649482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_bitstuff_err.140649482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.2320148167 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 325901933 ps |
| CPU time | 2 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:10 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320148167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_data_toggle_clear.2320148167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.780675314 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 923518360 ps |
| CPU time | 4.12 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:13 PM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=780675314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.780675314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.1496366259 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 19350949896 ps |
| CPU time | 34.95 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:44 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496366259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_address.1496366259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.814169147 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 1541575206 ps |
| CPU time | 10.61 seconds |
| Started | Sep 01 12:52:07 PM UTC 24 |
| Finished | Sep 01 12:52:19 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=814169147 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.814169147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.1305522382 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 672490293 ps |
| CPU time | 2.69 seconds |
| Started | Sep 01 12:52:11 PM UTC 24 |
| Finished | Sep 01 12:52:15 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1305522382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.1305522382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.1494598968 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 150724106 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 12:52:11 PM UTC 24 |
| Finished | Sep 01 12:52:14 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494598968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_disconnected.1494598968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_enable.2059344494 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 60093676 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:52:12 PM UTC 24 |
| Finished | Sep 01 12:52:14 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059344494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_enable.2059344494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.312485298 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 734153802 ps |
| CPU time | 3.78 seconds |
| Started | Sep 01 12:52:12 PM UTC 24 |
| Finished | Sep 01 12:52:16 PM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312485298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.312485298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.1820032298 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 475369633 ps |
| CPU time | 2.57 seconds |
| Started | Sep 01 12:52:12 PM UTC 24 |
| Finished | Sep 01 12:52:15 PM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1820032298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.1820032298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.3629638700 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 172900529 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:52:12 PM UTC 24 |
| Finished | Sep 01 12:52:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3629638700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_fifo_levels.3629638700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.2715670571 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 290932622 ps |
| CPU time | 3.77 seconds |
| Started | Sep 01 12:52:12 PM UTC 24 |
| Finished | Sep 01 12:52:17 PM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2715670571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.2715670571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.2517381809 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 260239880 ps |
| CPU time | 2.17 seconds |
| Started | Sep 01 12:52:12 PM UTC 24 |
| Finished | Sep 01 12:52:15 PM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2517381809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.2517381809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.215327117 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 212289034 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 12:52:12 PM UTC 24 |
| Finished | Sep 01 12:52:15 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=215327117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_in_stall.215327117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.2349389407 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 198012720 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:52:12 PM UTC 24 |
| Finished | Sep 01 12:52:14 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349389407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.2349389407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.817714670 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 4876608388 ps |
| CPU time | 44.48 seconds |
| Started | Sep 01 12:52:12 PM UTC 24 |
| Finished | Sep 01 12:52:58 PM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=817714670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.817714670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.1375750388 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 10322369993 ps |
| CPU time | 118.09 seconds |
| Started | Sep 01 12:52:15 PM UTC 24 |
| Finished | Sep 01 12:54:16 PM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375750388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.1375750388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.4157665980 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 173698775 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:52:15 PM UTC 24 |
| Finished | Sep 01 12:52:18 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157665980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_in_err.4157665980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.3267644901 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 5529227246 ps |
| CPU time | 12.39 seconds |
| Started | Sep 01 12:52:15 PM UTC 24 |
| Finished | Sep 01 12:52:29 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267644901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.3267644901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.387740784 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 8543777821 ps |
| CPU time | 16.83 seconds |
| Started | Sep 01 12:52:15 PM UTC 24 |
| Finished | Sep 01 12:52:34 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=387740784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_suspend.387740784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.827183767 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 4215102411 ps |
| CPU time | 114.92 seconds |
| Started | Sep 01 12:52:15 PM UTC 24 |
| Finished | Sep 01 12:54:13 PM UTC 24 |
| Peak memory | 229684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=827183767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.827183767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.2897001194 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 2364343288 ps |
| CPU time | 16.28 seconds |
| Started | Sep 01 12:52:16 PM UTC 24 |
| Finished | Sep 01 12:52:33 PM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2897001194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.2897001194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.3423124141 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 268957621 ps |
| CPU time | 1.92 seconds |
| Started | Sep 01 12:52:16 PM UTC 24 |
| Finished | Sep 01 12:52:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423124141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.3423124141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.4171074861 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 220585198 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:52:16 PM UTC 24 |
| Finished | Sep 01 12:52:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4171074861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.4171074861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.2680160208 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 2942316501 ps |
| CPU time | 32.85 seconds |
| Started | Sep 01 12:52:16 PM UTC 24 |
| Finished | Sep 01 12:52:50 PM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680160208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.2680160208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.2296711020 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 2786175743 ps |
| CPU time | 77.08 seconds |
| Started | Sep 01 12:52:16 PM UTC 24 |
| Finished | Sep 01 12:53:35 PM UTC 24 |
| Peak memory | 234136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296711020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.2296711020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.832477382 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 2085946858 ps |
| CPU time | 16.66 seconds |
| Started | Sep 01 12:52:16 PM UTC 24 |
| Finished | Sep 01 12:52:34 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=832477382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.832477382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.2159206571 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 158724092 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:52:16 PM UTC 24 |
| Finished | Sep 01 12:52:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159206571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.2159206571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.3398065526 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 148771993 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:52:19 PM UTC 24 |
| Finished | Sep 01 12:52:22 PM UTC 24 |
| Peak memory | 214840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398065526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.3398065526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.1987417437 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 190662759 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:52:19 PM UTC 24 |
| Finished | Sep 01 12:52:22 PM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987417437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.1987417437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.2610109804 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 157660443 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:52:19 PM UTC 24 |
| Finished | Sep 01 12:52:22 PM UTC 24 |
| Peak memory | 214824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610109804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_out_iso.2610109804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.3573335534 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 172500244 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:52:19 PM UTC 24 |
| Finished | Sep 01 12:52:22 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573335534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_out_stall.3573335534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.1161418326 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 145620083 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:52:19 PM UTC 24 |
| Finished | Sep 01 12:52:22 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1161418326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.1161418326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.115004183 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 151780470 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:52:19 PM UTC 24 |
| Finished | Sep 01 12:52:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=115004183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pending_in_trans.115004183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.2366071333 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 220067174 ps |
| CPU time | 1.77 seconds |
| Started | Sep 01 12:52:20 PM UTC 24 |
| Finished | Sep 01 12:52:23 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366071333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.2366071333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.1434905322 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 164122300 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:52:20 PM UTC 24 |
| Finished | Sep 01 12:52:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434905322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.1434905322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.2659626464 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 38637185 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 12:52:20 PM UTC 24 |
| Finished | Sep 01 12:52:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2659626464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.2659626464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.1027489574 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 18855518133 ps |
| CPU time | 46.85 seconds |
| Started | Sep 01 12:52:22 PM UTC 24 |
| Finished | Sep 01 12:53:10 PM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027489574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.1027489574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.1579298401 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 186095976 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:52:22 PM UTC 24 |
| Finished | Sep 01 12:52:24 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579298401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_pkt_received.1579298401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.1248709023 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 222973069 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:52:22 PM UTC 24 |
| Finished | Sep 01 12:52:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248709023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_pkt_sent.1248709023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.4239229262 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 224322255 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 12:52:22 PM UTC 24 |
| Finished | Sep 01 12:52:25 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239229262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.4239229262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.383099478 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 198139675 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:52:27 PM UTC 24 |
| Finished | Sep 01 12:52:29 PM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383099478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.383099478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.1888410175 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 20167282994 ps |
| CPU time | 30.73 seconds |
| Started | Sep 01 12:52:27 PM UTC 24 |
| Finished | Sep 01 12:52:59 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888410175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.1888410175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.3542805414 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 144566955 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:52:27 PM UTC 24 |
| Finished | Sep 01 12:52:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542805414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.3542805414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.3326871608 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 339193181 ps |
| CPU time | 2.1 seconds |
| Started | Sep 01 12:52:27 PM UTC 24 |
| Finished | Sep 01 12:52:31 PM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326871608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_rx_full.3326871608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.1621485032 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 150524701 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:52:27 PM UTC 24 |
| Finished | Sep 01 12:52:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621485032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.1621485032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.680177957 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 220312799 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 12:52:27 PM UTC 24 |
| Finished | Sep 01 12:52:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=680177957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_setup_trans_ignored.680177957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.3446460041 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 270355819 ps |
| CPU time | 1.97 seconds |
| Started | Sep 01 12:52:27 PM UTC 24 |
| Finished | Sep 01 12:52:31 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446460041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.3446460041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.2957777899 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 1823994761 ps |
| CPU time | 12.46 seconds |
| Started | Sep 01 12:52:27 PM UTC 24 |
| Finished | Sep 01 12:52:41 PM UTC 24 |
| Peak memory | 217328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957777899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.2957777899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.823253184 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 180540609 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:52:28 PM UTC 24 |
| Finished | Sep 01 12:52:30 PM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=823253184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.823253184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.4011853382 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 185972335 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:52:28 PM UTC 24 |
| Finished | Sep 01 12:52:30 PM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011853382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.4011853382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.3944076614 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 869614198 ps |
| CPU time | 3.89 seconds |
| Started | Sep 01 12:52:28 PM UTC 24 |
| Finished | Sep 01 12:52:33 PM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3944076614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.3944076614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.1767930626 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 3050843103 ps |
| CPU time | 30.28 seconds |
| Started | Sep 01 12:52:28 PM UTC 24 |
| Finished | Sep 01 12:53:00 PM UTC 24 |
| Peak memory | 229800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767930626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.1767930626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.1413410763 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 6296365476 ps |
| CPU time | 41.7 seconds |
| Started | Sep 01 12:52:11 PM UTC 24 |
| Finished | Sep 01 12:52:55 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1413410763 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.1413410763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.346755802 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 548583408 ps |
| CPU time | 2.23 seconds |
| Started | Sep 01 12:52:28 PM UTC 24 |
| Finished | Sep 01 12:52:31 PM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=346755802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_tx _rx_disruption.346755802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.181708357 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 308192165 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:20:59 PM UTC 24 |
| Finished | Sep 01 01:21:02 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=181708357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.181708357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.2391706808 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 166017574 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391706808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.2391706808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.1858112526 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 632083049 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1858112526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.1858112526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.1443621945 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 145687816 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1443621945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.1443621945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.1960486741 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 533299776 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1960486741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_ tx_rx_disruption.1960486741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.4235399444 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 191789752 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4235399444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.4235399444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.2454595241 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 244833612 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2454595241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.2454595241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.3959426884 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 575200529 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3959426884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_ tx_rx_disruption.3959426884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.835945163 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 682885471 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=835945163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.835945163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.974165506 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 524420284 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=974165506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_t x_rx_disruption.974165506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.3464813325 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 315648942 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464813325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.3464813325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.3980426880 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 270480714 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980426880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 134.usbdev_fifo_levels.3980426880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.3689072985 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 524441205 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3689072985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.3689072985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.1630436217 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 649900864 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1630436217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.1630436217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.1143683944 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 290258745 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143683944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 136.usbdev_fifo_levels.1143683944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/136.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.598513956 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 479756517 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 214952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=598513956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_t x_rx_disruption.598513956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.1698312911 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 889819505 ps |
| CPU time | 1.98 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 214468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698312911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.1698312911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.1969687976 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 166911945 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:17 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969687976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 137.usbdev_fifo_levels.1969687976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.1309011992 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 647380340 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 214572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1309011992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_ tx_rx_disruption.1309011992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.3702762999 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 332232639 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702762999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.3702762999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.3407653657 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 502678544 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3407653657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.3407653657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.2943514148 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 281097302 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 01:22:15 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943514148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 139.usbdev_fifo_levels.2943514148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/139.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.3797492712 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 521799992 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3797492712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.3797492712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.1611424090 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 32729826 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:52:53 PM UTC 24 |
| Finished | Sep 01 12:52:55 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611424090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.1611424090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.3924112378 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 10548850403 ps |
| CPU time | 17.96 seconds |
| Started | Sep 01 12:52:31 PM UTC 24 |
| Finished | Sep 01 12:52:51 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924112378 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.3924112378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.3083153985 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 14859898098 ps |
| CPU time | 20.45 seconds |
| Started | Sep 01 12:52:31 PM UTC 24 |
| Finished | Sep 01 12:52:53 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083153985 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.3083153985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.958468830 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 29096977723 ps |
| CPU time | 42.68 seconds |
| Started | Sep 01 12:52:31 PM UTC 24 |
| Finished | Sep 01 12:53:16 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=958468830 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.958468830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.4206153081 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 196754676 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:52:31 PM UTC 24 |
| Finished | Sep 01 12:52:34 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206153081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_av_buffer.4206153081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.1302627723 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 161388013 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:52:31 PM UTC 24 |
| Finished | Sep 01 12:52:34 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302627723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.1302627723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.884046175 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 238762432 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 12:52:31 PM UTC 24 |
| Finished | Sep 01 12:52:34 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=884046175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_data_toggle_clear.884046175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.2992442268 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 890093645 ps |
| CPU time | 4.06 seconds |
| Started | Sep 01 12:52:32 PM UTC 24 |
| Finished | Sep 01 12:52:37 PM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992442268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.2992442268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.2505042023 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 39063530131 ps |
| CPU time | 72.13 seconds |
| Started | Sep 01 12:52:32 PM UTC 24 |
| Finished | Sep 01 12:53:46 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505042023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.2505042023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.2709142549 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 5664393230 ps |
| CPU time | 34.12 seconds |
| Started | Sep 01 12:52:32 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709142549 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.2709142549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.222646519 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 594973191 ps |
| CPU time | 2.99 seconds |
| Started | Sep 01 12:52:32 PM UTC 24 |
| Finished | Sep 01 12:52:36 PM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=222646519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_disable_endpoint.222646519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.1427484928 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 141487400 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:52:32 PM UTC 24 |
| Finished | Sep 01 12:52:34 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427484928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.1427484928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_enable.1945128378 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 44013431 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:52:32 PM UTC 24 |
| Finished | Sep 01 12:52:34 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1945128378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.1945128378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.3719490402 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 656817517 ps |
| CPU time | 3.33 seconds |
| Started | Sep 01 12:52:32 PM UTC 24 |
| Finished | Sep 01 12:52:36 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719490402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.3719490402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.1759748059 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 425491100 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:52:32 PM UTC 24 |
| Finished | Sep 01 12:52:34 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759748059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.1759748059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.2269927284 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 321172423 ps |
| CPU time | 3.5 seconds |
| Started | Sep 01 12:52:34 PM UTC 24 |
| Finished | Sep 01 12:52:38 PM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269927284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.2269927284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.1308135885 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 177436014 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:52:34 PM UTC 24 |
| Finished | Sep 01 12:52:36 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308135885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.1308135885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.1390785075 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 140369138 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:52:40 PM UTC 24 |
| Finished | Sep 01 12:52:42 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390785075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.1390785075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.4090206214 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 153715594 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:52:40 PM UTC 24 |
| Finished | Sep 01 12:52:43 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090206214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_trans.4090206214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.1172163722 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 4886928964 ps |
| CPU time | 45.24 seconds |
| Started | Sep 01 12:52:34 PM UTC 24 |
| Finished | Sep 01 12:53:20 PM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172163722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.1172163722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.2464012147 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 5173558532 ps |
| CPU time | 57.57 seconds |
| Started | Sep 01 12:52:40 PM UTC 24 |
| Finished | Sep 01 12:53:39 PM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464012147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.2464012147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.3019073185 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 214822136 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:52:40 PM UTC 24 |
| Finished | Sep 01 12:52:43 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3019073185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.3019073185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.3691434799 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 10485766450 ps |
| CPU time | 14.17 seconds |
| Started | Sep 01 12:52:40 PM UTC 24 |
| Finished | Sep 01 12:52:56 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3691434799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.3691434799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.2962594678 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 8888917903 ps |
| CPU time | 13.98 seconds |
| Started | Sep 01 12:52:40 PM UTC 24 |
| Finished | Sep 01 12:52:56 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2962594678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.2962594678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.335012353 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 4011370520 ps |
| CPU time | 35.27 seconds |
| Started | Sep 01 12:52:40 PM UTC 24 |
| Finished | Sep 01 12:53:17 PM UTC 24 |
| Peak memory | 234308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=335012353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.335012353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.4135322093 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 2202165601 ps |
| CPU time | 23.18 seconds |
| Started | Sep 01 12:52:40 PM UTC 24 |
| Finished | Sep 01 12:53:05 PM UTC 24 |
| Peak memory | 234164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135322093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.4135322093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.385696136 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 250525501 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:52:41 PM UTC 24 |
| Finished | Sep 01 12:52:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=385696136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.385696136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.4269239006 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 203262152 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:52:41 PM UTC 24 |
| Finished | Sep 01 12:52:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269239006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.4269239006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.1768009254 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 2175512820 ps |
| CPU time | 16.89 seconds |
| Started | Sep 01 12:52:41 PM UTC 24 |
| Finished | Sep 01 12:52:59 PM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768009254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.1768009254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.4027339130 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 3702573094 ps |
| CPU time | 28.59 seconds |
| Started | Sep 01 12:52:41 PM UTC 24 |
| Finished | Sep 01 12:53:11 PM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027339130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.4027339130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.748143346 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 1628065381 ps |
| CPU time | 16.4 seconds |
| Started | Sep 01 12:52:41 PM UTC 24 |
| Finished | Sep 01 12:52:58 PM UTC 24 |
| Peak memory | 227340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=748143346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.748143346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.2506902595 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 172337916 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:52:41 PM UTC 24 |
| Finished | Sep 01 12:52:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2506902595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.2506902595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.3156128512 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 188290574 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:52:41 PM UTC 24 |
| Finished | Sep 01 12:52:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156128512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.3156128512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.3816208656 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 182657575 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:52:46 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816208656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.3816208656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.2941876447 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 195953813 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:52:46 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941876447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_out_stall.2941876447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.215352908 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 182741215 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:52:46 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=215352908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_out_trans_nak.215352908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.158421569 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 154772864 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:52:46 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158421569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pending_in_trans.158421569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.2657763297 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 267199937 ps |
| CPU time | 1.88 seconds |
| Started | Sep 01 12:52:46 PM UTC 24 |
| Finished | Sep 01 12:52:50 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657763297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.2657763297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.3277471477 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 173543405 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277471477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.3277471477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.763617023 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 29393976 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=763617023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_phy_pins_sense.763617023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.754952789 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 9356348785 ps |
| CPU time | 25.06 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:53:13 PM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754952789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_pkt_buffer.754952789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.1987697123 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 173517756 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987697123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.1987697123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.1310011258 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 209975904 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310011258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.1310011258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.2624693998 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 207860164 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2624693998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_random_length_in_transaction.2624693998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.3452218441 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 195902305 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452218441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.3452218441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.1473814437 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 20151582490 ps |
| CPU time | 33.46 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:53:22 PM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1473814437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.1473814437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.554090643 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 152621689 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=554090643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_rx_crc_err.554090643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.939002471 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 291565095 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:52:50 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=939002471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_rx_full.939002471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.1913400800 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 155078559 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:52:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913400800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.1913400800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.4033742991 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 166830418 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 12:52:47 PM UTC 24 |
| Finished | Sep 01 12:52:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4033742991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 14.usbdev_setup_trans_ignored.4033742991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.1541340042 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 203732058 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 12:52:49 PM UTC 24 |
| Finished | Sep 01 12:52:51 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541340042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.1541340042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.1726676824 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 2134736532 ps |
| CPU time | 55.02 seconds |
| Started | Sep 01 12:52:49 PM UTC 24 |
| Finished | Sep 01 12:53:45 PM UTC 24 |
| Peak memory | 229396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726676824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.1726676824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.291133744 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 167079758 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:52:53 PM UTC 24 |
| Finished | Sep 01 12:52:56 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=291133744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.291133744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.1461309629 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 198292139 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:52:53 PM UTC 24 |
| Finished | Sep 01 12:52:56 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461309629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.1461309629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.1699805414 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 527834570 ps |
| CPU time | 1.98 seconds |
| Started | Sep 01 12:52:53 PM UTC 24 |
| Finished | Sep 01 12:52:56 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699805414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.1699805414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.3992148026 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 3956235792 ps |
| CPU time | 34.03 seconds |
| Started | Sep 01 12:52:53 PM UTC 24 |
| Finished | Sep 01 12:53:28 PM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992148026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.3992148026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.1718341739 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 1117055021 ps |
| CPU time | 9.33 seconds |
| Started | Sep 01 12:52:32 PM UTC 24 |
| Finished | Sep 01 12:52:42 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1718341739 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.1718341739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.2444212800 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 569192963 ps |
| CPU time | 3.22 seconds |
| Started | Sep 01 12:52:53 PM UTC 24 |
| Finished | Sep 01 12:52:57 PM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2444212800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.2444212800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.395616792 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 177006368 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=395616792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 140.usbdev_fifo_levels.395616792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.3159506166 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 435099876 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3159506166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.3159506166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.1094147320 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 639580186 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094147320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.1094147320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.3188104149 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 270464256 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 214708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188104149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 141.usbdev_fifo_levels.3188104149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.4055960614 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 506151085 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4055960614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_ tx_rx_disruption.4055960614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.1832419687 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 556921869 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1832419687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.1832419687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.1683926986 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 263430236 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683926986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 142.usbdev_fifo_levels.1683926986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/142.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.718986682 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 577473937 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=718986682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_t x_rx_disruption.718986682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.4095549665 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 358185823 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095549665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.4095549665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.1567361294 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 152691957 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567361294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 143.usbdev_fifo_levels.1567361294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/143.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.2584361606 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 509118487 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2584361606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.2584361606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.4091697911 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 532222268 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4091697911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_ tx_rx_disruption.4091697911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/145.usbdev_fifo_levels.63944648 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 292489043 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=63944648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 145.usbdev_fifo_levels.63944648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/145.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.1119925823 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 531385259 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1119925823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.1119925823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.15334565 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 245411887 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:18 PM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=15334565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.15334565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.3447607558 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 261342285 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 214904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447607558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 146.usbdev_fifo_levels.3447607558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.3374780827 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 502776607 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3374780827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.3374780827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.1869493438 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 710530361 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869493438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.1869493438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.591393893 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 290161507 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=591393893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 147.usbdev_fifo_levels.591393893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.2980549613 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 515108862 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2980549613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.2980549613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.3273854929 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 190317207 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3273854929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 148.usbdev_fifo_levels.3273854929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/148.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.2640322706 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 598550282 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2640322706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.2640322706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.1964613516 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 290866542 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1964613516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 149.usbdev_fifo_levels.1964613516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.1742532908 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 615393017 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:20 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1742532908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.1742532908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.3239847405 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 39174038 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:14 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239847405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.3239847405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.636388221 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 5348531120 ps |
| CPU time | 9.34 seconds |
| Started | Sep 01 12:52:53 PM UTC 24 |
| Finished | Sep 01 12:53:04 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=636388221 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.636388221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.504992871 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 15801279241 ps |
| CPU time | 23.6 seconds |
| Started | Sep 01 12:52:53 PM UTC 24 |
| Finished | Sep 01 12:53:18 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=504992871 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.504992871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.2040895927 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 25713706743 ps |
| CPU time | 35.68 seconds |
| Started | Sep 01 12:52:53 PM UTC 24 |
| Finished | Sep 01 12:53:30 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040895927 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.2040895927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.762396415 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 156974664 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:52:53 PM UTC 24 |
| Finished | Sep 01 12:52:56 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762396415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_av_buffer.762396415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.917225458 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 205297361 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 12:52:54 PM UTC 24 |
| Finished | Sep 01 12:52:56 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917225458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_bitstuff_err.917225458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.2702227529 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 490377697 ps |
| CPU time | 2.1 seconds |
| Started | Sep 01 12:52:54 PM UTC 24 |
| Finished | Sep 01 12:52:57 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2702227529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.2702227529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.3870354479 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 1170836762 ps |
| CPU time | 3.55 seconds |
| Started | Sep 01 12:52:54 PM UTC 24 |
| Finished | Sep 01 12:52:58 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3870354479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.3870354479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.1484262336 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 48702379478 ps |
| CPU time | 91.2 seconds |
| Started | Sep 01 12:52:54 PM UTC 24 |
| Finished | Sep 01 12:54:27 PM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1484262336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.1484262336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.2410335536 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 5660864905 ps |
| CPU time | 35.19 seconds |
| Started | Sep 01 12:52:54 PM UTC 24 |
| Finished | Sep 01 12:53:30 PM UTC 24 |
| Peak memory | 217504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2410335536 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.2410335536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.4066428663 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 369207648 ps |
| CPU time | 2.23 seconds |
| Started | Sep 01 12:52:54 PM UTC 24 |
| Finished | Sep 01 12:52:57 PM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066428663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.4066428663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.2836270267 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 150155735 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:52:54 PM UTC 24 |
| Finished | Sep 01 12:52:56 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836270267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.2836270267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_enable.3031042656 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 40267045 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 12:52:59 PM UTC 24 |
| Finished | Sep 01 12:53:01 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3031042656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_enable.3031042656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.331922549 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 954139468 ps |
| CPU time | 4.39 seconds |
| Started | Sep 01 12:52:59 PM UTC 24 |
| Finished | Sep 01 12:53:05 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=331922549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.331922549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.906225467 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 347524864 ps |
| CPU time | 2.51 seconds |
| Started | Sep 01 12:52:59 PM UTC 24 |
| Finished | Sep 01 12:53:03 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=906225467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_fifo_rst.906225467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.1773635943 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 166794099 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:53:00 PM UTC 24 |
| Finished | Sep 01 12:53:02 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773635943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.1773635943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.3462449521 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 149744697 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:53:00 PM UTC 24 |
| Finished | Sep 01 12:53:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462449521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.3462449521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.1406337441 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 262691818 ps |
| CPU time | 1.78 seconds |
| Started | Sep 01 12:53:00 PM UTC 24 |
| Finished | Sep 01 12:53:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406337441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_trans.1406337441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.2072242772 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 3374758011 ps |
| CPU time | 30.66 seconds |
| Started | Sep 01 12:52:59 PM UTC 24 |
| Finished | Sep 01 12:53:31 PM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072242772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.2072242772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.1941348393 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 10291962213 ps |
| CPU time | 69.79 seconds |
| Started | Sep 01 12:53:00 PM UTC 24 |
| Finished | Sep 01 12:54:11 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941348393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.1941348393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.195585455 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 205312885 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:53:00 PM UTC 24 |
| Finished | Sep 01 12:53:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=195585455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_link_in_err.195585455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.1429389859 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 32300744036 ps |
| CPU time | 57.26 seconds |
| Started | Sep 01 12:53:00 PM UTC 24 |
| Finished | Sep 01 12:53:59 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429389859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_resume.1429389859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.2900566279 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 9096909812 ps |
| CPU time | 13.41 seconds |
| Started | Sep 01 12:53:00 PM UTC 24 |
| Finished | Sep 01 12:53:14 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2900566279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.2900566279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.1024070198 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 2759993866 ps |
| CPU time | 26.85 seconds |
| Started | Sep 01 12:53:00 PM UTC 24 |
| Finished | Sep 01 12:53:28 PM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024070198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.1024070198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.2400268585 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 3253231353 ps |
| CPU time | 85.71 seconds |
| Started | Sep 01 12:53:00 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 229732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400268585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.2400268585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.2838310877 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 234914307 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:53:00 PM UTC 24 |
| Finished | Sep 01 12:53:03 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838310877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.2838310877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.1571061839 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 185214076 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:53:04 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571061839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.1571061839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.4246674294 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 2835413593 ps |
| CPU time | 22.72 seconds |
| Started | Sep 01 12:53:04 PM UTC 24 |
| Finished | Sep 01 12:53:28 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246674294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.4246674294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.2740143067 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 1766237106 ps |
| CPU time | 47.14 seconds |
| Started | Sep 01 12:53:04 PM UTC 24 |
| Finished | Sep 01 12:53:53 PM UTC 24 |
| Peak memory | 227492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740143067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.2740143067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.1658150859 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 153301068 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:53:04 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1658150859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.1658150859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.2740234571 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 149983877 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:53:04 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740234571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.2740234571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.3897011363 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 183259582 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897011363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.3897011363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.1960721875 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 161858279 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1960721875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.1960721875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.1504509641 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 150396646 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1504509641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_out_trans_nak.1504509641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.2352202015 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 152154250 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352202015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.2352202015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.428846136 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 229356347 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=428846136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.428846136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.342023511 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 151621415 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=342023511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.342023511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.2862144656 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 32469937 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2862144656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.2862144656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.1954435137 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 13103410200 ps |
| CPU time | 34.99 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:41 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954435137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.1954435137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.3293006667 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 212223455 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:07 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293006667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_pkt_received.3293006667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.514376962 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 223122033 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:08 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=514376962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_pkt_sent.514376962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.3100064969 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 230071730 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100064969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.3100064969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.2192240949 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 179078998 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:53:05 PM UTC 24 |
| Finished | Sep 01 12:53:08 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192240949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.2192240949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.304393424 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 20165756077 ps |
| CPU time | 30.85 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:43 PM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=304393424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_resume_link_active.304393424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.2422323815 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 161110590 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:13 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422323815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.2422323815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.2170523443 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 432442948 ps |
| CPU time | 2.53 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:14 PM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2170523443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.2170523443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.415014506 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 163899624 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:13 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415014506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_setup_stage.415014506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.3164539423 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 176451917 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:13 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164539423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.3164539423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.2285261737 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 249558939 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285261737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.2285261737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.3365171811 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 3271265285 ps |
| CPU time | 31.19 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:44 PM UTC 24 |
| Peak memory | 227696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365171811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.3365171811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.2057401603 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 182294910 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:14 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057401603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.2057401603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.2446312561 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 183454591 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:13 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446312561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_stall_trans.2446312561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.169585219 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 913602634 ps |
| CPU time | 2.65 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:15 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=169585219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_stream_len_max.169585219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.2410741568 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 3276945704 ps |
| CPU time | 25.99 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:39 PM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2410741568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_streaming_out.2410741568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.96946886 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 1037304024 ps |
| CPU time | 21.72 seconds |
| Started | Sep 01 12:52:54 PM UTC 24 |
| Finished | Sep 01 12:53:17 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=96946886 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.96946886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.3045207915 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 628468946 ps |
| CPU time | 2.81 seconds |
| Started | Sep 01 12:53:11 PM UTC 24 |
| Finished | Sep 01 12:53:15 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3045207915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.3045207915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.1618943248 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 287049397 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 216516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1618943248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.1618943248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/150.usbdev_fifo_levels.1702448235 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 252863452 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 216344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1702448235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 150.usbdev_fifo_levels.1702448235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/150.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.1495874801 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 471295831 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1495874801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.1495874801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.4095201648 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 302394829 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095201648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.4095201648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.1446856182 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 449722294 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:22:16 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1446856182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_ tx_rx_disruption.1446856182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.1089701910 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 245366145 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:22:17 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089701910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 152.usbdev_fifo_levels.1089701910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.341870293 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 467617400 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 01:22:17 PM UTC 24 |
| Finished | Sep 01 01:22:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=341870293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_t x_rx_disruption.341870293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.3778527138 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 307534598 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778527138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 153.usbdev_fifo_levels.3778527138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.23080421 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 537304990 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=23080421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_tx _rx_disruption.23080421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.1714673963 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 330951166 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1714673963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.1714673963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.3527612220 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 195717886 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527612220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 154.usbdev_fifo_levels.3527612220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.616497017 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 549744323 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=616497017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_t x_rx_disruption.616497017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.2635160324 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 366152130 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635160324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.2635160324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/155.usbdev_fifo_levels.1195720460 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 244274156 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195720460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 155.usbdev_fifo_levels.1195720460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/155.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.1754649318 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 546628688 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1754649318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_ tx_rx_disruption.1754649318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.2706452410 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 159178769 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706452410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.2706452410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.1265696410 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 299278655 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265696410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 156.usbdev_fifo_levels.1265696410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/156.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.381522300 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 536295747 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=381522300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_t x_rx_disruption.381522300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.2742827040 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 163292937 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 216056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742827040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.2742827040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/157.usbdev_fifo_levels.2338391544 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 192352823 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2338391544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 157.usbdev_fifo_levels.2338391544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/157.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.1206534094 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 627950378 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1206534094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_ tx_rx_disruption.1206534094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.1786895673 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 658961721 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786895673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.1786895673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.2670015418 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 282725737 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670015418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 158.usbdev_fifo_levels.2670015418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/158.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.3745211015 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 528504556 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3745211015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.3745211015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.1771388762 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 601061141 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1771388762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.1771388762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.499747909 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 505650153 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=499747909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_t x_rx_disruption.499747909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.2667577570 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 35647659 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 12:53:30 PM UTC 24 |
| Finished | Sep 01 12:53:32 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667577570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.2667577570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.4095297897 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 10454898604 ps |
| CPU time | 15.3 seconds |
| Started | Sep 01 12:53:12 PM UTC 24 |
| Finished | Sep 01 12:53:28 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095297897 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.4095297897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.1669621036 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 20604310866 ps |
| CPU time | 28.23 seconds |
| Started | Sep 01 12:53:12 PM UTC 24 |
| Finished | Sep 01 12:53:41 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669621036 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.1669621036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.110226649 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 23874312534 ps |
| CPU time | 48.9 seconds |
| Started | Sep 01 12:53:12 PM UTC 24 |
| Finished | Sep 01 12:54:02 PM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=110226649 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.110226649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.3043505067 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 182140444 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:53:12 PM UTC 24 |
| Finished | Sep 01 12:53:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3043505067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.3043505067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.2847584952 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 181881572 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:53:12 PM UTC 24 |
| Finished | Sep 01 12:53:14 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847584952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_bitstuff_err.2847584952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.783922275 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 412303250 ps |
| CPU time | 2.26 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:19 PM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=783922275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_data_toggle_clear.783922275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.2075352617 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 1008809121 ps |
| CPU time | 3.41 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:20 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075352617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.2075352617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.3609589993 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 25192285482 ps |
| CPU time | 45.68 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:54:03 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609589993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.3609589993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.2268817739 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 435962089 ps |
| CPU time | 9.08 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:26 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268817739 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.2268817739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.3228985191 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 893213137 ps |
| CPU time | 3.49 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:20 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228985191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.3228985191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.3174365886 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 166053358 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174365886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_disconnected.3174365886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_enable.1230631257 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 78013053 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230631257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.1230631257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.3367678484 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 929332386 ps |
| CPU time | 3.02 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:20 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367678484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.3367678484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.243122371 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 183849277 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:18 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=243122371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.243122371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.3920921213 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 249368236 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920921213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_fifo_levels.3920921213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.2907009792 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 318121559 ps |
| CPU time | 2.63 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:20 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907009792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.2907009792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.490063276 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 178112665 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=490063276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.490063276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.30718408 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 144208396 ps |
| CPU time | 1 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:53:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=30718408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_in_stall.30718408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.2198355766 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 215407937 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 12:53:19 PM UTC 24 |
| Finished | Sep 01 12:53:22 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198355766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.2198355766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.1975613586 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 4225297332 ps |
| CPU time | 112.05 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:55:10 PM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1975613586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.1975613586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.803061734 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 4953646927 ps |
| CPU time | 55.82 seconds |
| Started | Sep 01 12:53:19 PM UTC 24 |
| Finished | Sep 01 12:54:17 PM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=803061734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.803061734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.6037077 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 213755843 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:53:19 PM UTC 24 |
| Finished | Sep 01 12:53:22 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6037077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_link_in_err.6037077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.1337265641 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 29175911746 ps |
| CPU time | 50.18 seconds |
| Started | Sep 01 12:53:20 PM UTC 24 |
| Finished | Sep 01 12:54:11 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337265641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_resume.1337265641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.537612497 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 9844246772 ps |
| CPU time | 12.95 seconds |
| Started | Sep 01 12:53:20 PM UTC 24 |
| Finished | Sep 01 12:53:34 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=537612497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_suspend.537612497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.1399489537 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 3532597402 ps |
| CPU time | 37.12 seconds |
| Started | Sep 01 12:53:20 PM UTC 24 |
| Finished | Sep 01 12:53:58 PM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399489537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.1399489537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.2768109835 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 2413383033 ps |
| CPU time | 23.05 seconds |
| Started | Sep 01 12:53:20 PM UTC 24 |
| Finished | Sep 01 12:53:44 PM UTC 24 |
| Peak memory | 234280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768109835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.2768109835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.3544936279 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 244300677 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 12:53:20 PM UTC 24 |
| Finished | Sep 01 12:53:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544936279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.3544936279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.2482869816 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 201807409 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 12:53:20 PM UTC 24 |
| Finished | Sep 01 12:53:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2482869816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.2482869816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.855700384 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 1365839360 ps |
| CPU time | 33.19 seconds |
| Started | Sep 01 12:53:20 PM UTC 24 |
| Finished | Sep 01 12:53:54 PM UTC 24 |
| Peak memory | 227492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=855700384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.855700384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.134995060 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 2847168754 ps |
| CPU time | 70.96 seconds |
| Started | Sep 01 12:53:20 PM UTC 24 |
| Finished | Sep 01 12:54:33 PM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=134995060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.134995060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.2061485344 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 165912590 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:53:20 PM UTC 24 |
| Finished | Sep 01 12:53:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061485344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.2061485344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.3690225618 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 144952154 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:53:20 PM UTC 24 |
| Finished | Sep 01 12:53:23 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690225618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.3690225618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.2953596989 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 201361653 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:53:26 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953596989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_nak_trans.2953596989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.4107535218 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 197445186 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:53:26 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4107535218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_out_iso.4107535218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.2293773319 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 212742027 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:53:26 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2293773319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.2293773319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.265985208 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 151744584 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:53:26 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=265985208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_out_trans_nak.265985208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.537217116 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 171694805 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:53:26 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=537217116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pending_in_trans.537217116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.2107273846 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 185139832 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:53:26 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107273846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.2107273846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.3315852260 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 179695066 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:53:26 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315852260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.3315852260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.1996139062 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 61478543 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:53:25 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1996139062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.1996139062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.1083015549 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 21730103266 ps |
| CPU time | 57.8 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:54:23 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1083015549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.1083015549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.1738002842 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 270290334 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:53:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738002842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_pkt_received.1738002842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.3321617586 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 170294631 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:53:23 PM UTC 24 |
| Finished | Sep 01 12:53:26 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321617586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.3321617586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.878415620 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 238187673 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 12:53:25 PM UTC 24 |
| Finished | Sep 01 12:53:28 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878415620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_random_length_in_transaction.878415620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.1690467887 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 164767679 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:53:25 PM UTC 24 |
| Finished | Sep 01 12:53:28 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1690467887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.1690467887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.3772526401 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 20182673652 ps |
| CPU time | 35.18 seconds |
| Started | Sep 01 12:53:25 PM UTC 24 |
| Finished | Sep 01 12:54:02 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772526401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.3772526401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.2845213767 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 149221158 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:53:25 PM UTC 24 |
| Finished | Sep 01 12:53:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845213767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.2845213767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.1892375850 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 384097801 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:53:29 PM UTC 24 |
| Finished | Sep 01 12:53:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1892375850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.1892375850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.162115509 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 161930247 ps |
| CPU time | 1.23 seconds |
| Started | Sep 01 12:53:29 PM UTC 24 |
| Finished | Sep 01 12:53:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=162115509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_setup_stage.162115509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.689119322 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 173321124 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:53:29 PM UTC 24 |
| Finished | Sep 01 12:53:32 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=689119322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_setup_trans_ignored.689119322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.2362803028 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 230186862 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:53:29 PM UTC 24 |
| Finished | Sep 01 12:53:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2362803028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.2362803028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.1904831962 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 2465078942 ps |
| CPU time | 67.84 seconds |
| Started | Sep 01 12:53:29 PM UTC 24 |
| Finished | Sep 01 12:54:39 PM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1904831962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.1904831962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.2386280557 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 244308179 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 12:53:29 PM UTC 24 |
| Finished | Sep 01 12:53:32 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386280557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.2386280557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.761860491 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 166297917 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 12:53:29 PM UTC 24 |
| Finished | Sep 01 12:53:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761860491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_stall_trans.761860491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.3234944635 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 1005317434 ps |
| CPU time | 4.69 seconds |
| Started | Sep 01 12:53:30 PM UTC 24 |
| Finished | Sep 01 12:53:35 PM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234944635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.3234944635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.2432283834 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 3494393645 ps |
| CPU time | 87.9 seconds |
| Started | Sep 01 12:53:30 PM UTC 24 |
| Finished | Sep 01 12:54:59 PM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432283834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.2432283834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.3537502248 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 7713421917 ps |
| CPU time | 45.74 seconds |
| Started | Sep 01 12:53:16 PM UTC 24 |
| Finished | Sep 01 12:54:03 PM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537502248 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.3537502248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.82735792 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 428766671 ps |
| CPU time | 2.39 seconds |
| Started | Sep 01 12:53:30 PM UTC 24 |
| Finished | Sep 01 12:53:33 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=82735792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_tx_ rx_disruption.82735792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.2056265310 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 273004601 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:36 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056265310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.2056265310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.2852777961 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 608366769 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2852777961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_ tx_rx_disruption.2852777961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.3912925642 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 507318586 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912925642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.3912925642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.3230917622 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 627243634 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 214244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3230917622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_ tx_rx_disruption.3230917622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.1050410158 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 346691898 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 214748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1050410158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.1050410158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.948470364 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 547712301 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=948470364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_t x_rx_disruption.948470364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.3581514082 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 652230675 ps |
| CPU time | 2.16 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3581514082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_ tx_rx_disruption.3581514082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.3839337417 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 282895353 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 216268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3839337417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.3839337417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.1260333490 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 522299943 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1260333490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.1260333490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.3445300215 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 394608650 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 216008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445300215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.3445300215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.342849625 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 464985710 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=342849625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_t x_rx_disruption.342849625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.1528216600 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 544032377 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528216600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.1528216600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.1154694905 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 590034632 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 01:23:34 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1154694905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.1154694905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.3777376604 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 615503154 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3777376604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.3777376604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.3666617470 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 642857290 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666617470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.3666617470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.1374419819 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 588258265 ps |
| CPU time | 1.87 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 214784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1374419819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.1374419819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.3350816247 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 621350188 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3350816247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.3350816247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.2570336699 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 64638249 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:53:54 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570336699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.2570336699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.2941032895 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 9312431420 ps |
| CPU time | 12.37 seconds |
| Started | Sep 01 12:53:30 PM UTC 24 |
| Finished | Sep 01 12:53:43 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941032895 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.2941032895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.2604354737 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 20221868824 ps |
| CPU time | 25.13 seconds |
| Started | Sep 01 12:53:30 PM UTC 24 |
| Finished | Sep 01 12:53:56 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604354737 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.2604354737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.2638534631 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 23818245064 ps |
| CPU time | 40.97 seconds |
| Started | Sep 01 12:53:30 PM UTC 24 |
| Finished | Sep 01 12:54:12 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638534631 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.2638534631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.598982126 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 173516303 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 12:53:30 PM UTC 24 |
| Finished | Sep 01 12:53:32 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598982126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_av_buffer.598982126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.540360624 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 165483436 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:53:33 PM UTC 24 |
| Finished | Sep 01 12:53:36 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=540360624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_bitstuff_err.540360624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.3202995515 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 430948900 ps |
| CPU time | 2.54 seconds |
| Started | Sep 01 12:53:33 PM UTC 24 |
| Finished | Sep 01 12:53:37 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202995515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.3202995515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.3307490395 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 970683594 ps |
| CPU time | 4.72 seconds |
| Started | Sep 01 12:53:33 PM UTC 24 |
| Finished | Sep 01 12:53:39 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307490395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.3307490395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.36824285 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 32743770780 ps |
| CPU time | 62.68 seconds |
| Started | Sep 01 12:53:33 PM UTC 24 |
| Finished | Sep 01 12:54:38 PM UTC 24 |
| Peak memory | 217460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=36824285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_device_address.36824285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.3321474257 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 6349154710 ps |
| CPU time | 39.85 seconds |
| Started | Sep 01 12:53:33 PM UTC 24 |
| Finished | Sep 01 12:54:15 PM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321474257 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.3321474257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.3453271157 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 364692251 ps |
| CPU time | 2.28 seconds |
| Started | Sep 01 12:53:33 PM UTC 24 |
| Finished | Sep 01 12:53:37 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453271157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.3453271157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.1933827542 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 148618423 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:53:34 PM UTC 24 |
| Finished | Sep 01 12:53:36 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933827542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_disconnected.1933827542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_enable.2554194232 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 59965059 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:53:34 PM UTC 24 |
| Finished | Sep 01 12:53:36 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554194232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.2554194232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.2518288961 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 935712539 ps |
| CPU time | 4.44 seconds |
| Started | Sep 01 12:53:34 PM UTC 24 |
| Finished | Sep 01 12:53:39 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518288961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.2518288961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.3749526166 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 658303200 ps |
| CPU time | 2.75 seconds |
| Started | Sep 01 12:53:34 PM UTC 24 |
| Finished | Sep 01 12:53:38 PM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749526166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.3749526166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.1329003538 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 264244940 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:53:34 PM UTC 24 |
| Finished | Sep 01 12:53:37 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329003538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_fifo_levels.1329003538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.1249820278 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 402351947 ps |
| CPU time | 2.25 seconds |
| Started | Sep 01 12:53:34 PM UTC 24 |
| Finished | Sep 01 12:53:37 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249820278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.1249820278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.2373859604 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 194767531 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:53:34 PM UTC 24 |
| Finished | Sep 01 12:53:37 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373859604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.2373859604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.360493740 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 147012376 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:53:36 PM UTC 24 |
| Finished | Sep 01 12:53:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=360493740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_in_stall.360493740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.60887229 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 181718434 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 12:53:36 PM UTC 24 |
| Finished | Sep 01 12:53:39 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=60887229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_in_trans.60887229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.2091052976 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 4581490624 ps |
| CPU time | 51.02 seconds |
| Started | Sep 01 12:53:34 PM UTC 24 |
| Finished | Sep 01 12:54:26 PM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2091052976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.2091052976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.2948480726 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 9487923182 ps |
| CPU time | 76.73 seconds |
| Started | Sep 01 12:53:36 PM UTC 24 |
| Finished | Sep 01 12:54:55 PM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2948480726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.2948480726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.3635325257 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 188828091 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:53:43 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635325257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.3635325257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.197680447 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 11118322099 ps |
| CPU time | 14.82 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:53:57 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197680447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_link_resume.197680447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.589043594 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 9811279105 ps |
| CPU time | 14.35 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:53:56 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=589043594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_suspend.589043594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.1469221515 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 5363280609 ps |
| CPU time | 139.98 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:56:03 PM UTC 24 |
| Peak memory | 229168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1469221515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.1469221515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.2729619185 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 2877502102 ps |
| CPU time | 70.66 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:54:53 PM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729619185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.2729619185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.61800042 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 246558089 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:53:44 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=61800042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.61800042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.231866218 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 208356653 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:53:44 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231866218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.231866218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.1267540879 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 3362161982 ps |
| CPU time | 88.03 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:55:11 PM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267540879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.1267540879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.3017466193 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 3322068142 ps |
| CPU time | 24.92 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:54:07 PM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017466193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.3017466193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.2039049932 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 170828938 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:53:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039049932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.2039049932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.3859639490 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 216400642 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:53:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859639490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.3859639490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.208344609 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 272177845 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:53:44 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208344609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_out_iso.208344609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.240855036 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 146250402 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:53:41 PM UTC 24 |
| Finished | Sep 01 12:53:44 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=240855036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_out_stall.240855036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.1036679500 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 151637460 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:53:46 PM UTC 24 |
| Finished | Sep 01 12:53:49 PM UTC 24 |
| Peak memory | 214760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036679500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.1036679500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.2284030076 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 204042893 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:53:46 PM UTC 24 |
| Finished | Sep 01 12:53:49 PM UTC 24 |
| Peak memory | 214768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284030076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.2284030076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.3275463883 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 262946670 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 12:53:46 PM UTC 24 |
| Finished | Sep 01 12:53:49 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275463883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.3275463883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.508411863 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 132070411 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:53:46 PM UTC 24 |
| Finished | Sep 01 12:53:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=508411863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.508411863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.3015503205 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 65478600 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:53:49 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015503205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.3015503205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.418533515 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 22780927803 ps |
| CPU time | 64.17 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:54:52 PM UTC 24 |
| Peak memory | 234124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=418533515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_pkt_buffer.418533515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.2219948514 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 163949443 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:53:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219948514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.2219948514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.506588331 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 233507226 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:53:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506588331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_pkt_sent.506588331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.3204172255 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 227965722 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:53:49 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204172255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_random_length_in_transaction.3204172255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.3344000796 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 153750560 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:53:49 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344000796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.3344000796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.3833854883 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 20152290108 ps |
| CPU time | 28.84 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:54:17 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833854883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.3833854883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.3388719087 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 193537230 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:53:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3388719087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.3388719087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.3267010439 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 300020008 ps |
| CPU time | 2.16 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:53:50 PM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267010439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.3267010439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.1305785567 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 153463441 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:53:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1305785567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.1305785567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.3906547883 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 162222969 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:53:47 PM UTC 24 |
| Finished | Sep 01 12:53:50 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906547883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.3906547883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.1183362227 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 229930092 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:53:54 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1183362227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.1183362227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.496550598 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 1851158148 ps |
| CPU time | 47.52 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:54:41 PM UTC 24 |
| Peak memory | 227504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=496550598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.496550598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.3813950468 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 191472276 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:53:54 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813950468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.3813950468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.3265063153 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 159278920 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:53:54 PM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265063153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.3265063153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.1283886685 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 628694187 ps |
| CPU time | 3.07 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:53:56 PM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283886685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.1283886685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.3107136990 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 2480037825 ps |
| CPU time | 22.61 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:54:16 PM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107136990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_streaming_out.3107136990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.4101135128 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 1428172007 ps |
| CPU time | 33.97 seconds |
| Started | Sep 01 12:53:33 PM UTC 24 |
| Finished | Sep 01 12:54:09 PM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101135128 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.4101135128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.840468984 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 516062566 ps |
| CPU time | 2.12 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:53:55 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=840468984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_tx _rx_disruption.840468984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.3239359283 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 424183800 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239359283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.3239359283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.573730140 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 519109356 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=573730140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_t x_rx_disruption.573730140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.2367720216 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 465981759 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:37 PM UTC 24 |
| Peak memory | 216032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367720216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.2367720216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.2374614104 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 471294220 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2374614104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_ tx_rx_disruption.2374614104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.3749875580 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 562593558 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3749875580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_ tx_rx_disruption.3749875580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.2036515558 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 493704743 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2036515558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_ tx_rx_disruption.2036515558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.3598431514 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 465158540 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598431514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.3598431514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.1991450959 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 580092448 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1991450959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.1991450959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.2291411186 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 316353089 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291411186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.2291411186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.2324201311 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 634916022 ps |
| CPU time | 1.9 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2324201311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.2324201311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.518721733 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 447654171 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=518721733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.518721733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.2496015378 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 689538487 ps |
| CPU time | 1.78 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2496015378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.2496015378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.1422007293 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 277599639 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422007293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.1422007293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.261640761 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 541210091 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=261640761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_t x_rx_disruption.261640761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.2379318517 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 338486896 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379318517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.2379318517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.2656498249 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 686420616 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2656498249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_ tx_rx_disruption.2656498249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.1232339191 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 158110731 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232339191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.1232339191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.1083156097 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 420580974 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1083156097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.1083156097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.1315244483 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 45197978 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 12:54:11 PM UTC 24 |
| Finished | Sep 01 12:54:13 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315244483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.1315244483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.198555742 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 5072510942 ps |
| CPU time | 8.66 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:54:02 PM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=198555742 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.198555742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.4254888639 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 14402693379 ps |
| CPU time | 24.23 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:54:18 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254888639 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.4254888639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.463770290 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 29216944989 ps |
| CPU time | 55.87 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:54:50 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=463770290 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.463770290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.2277915988 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 164685880 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:53:55 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277915988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.2277915988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.122624164 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 151038937 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:53:55 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=122624164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_bitstuff_err.122624164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.2961909842 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 209609025 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:53:55 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961909842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.2961909842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.1788285046 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 802410320 ps |
| CPU time | 2.77 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:53:56 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788285046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.1788285046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.2855835022 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 33441357572 ps |
| CPU time | 61.72 seconds |
| Started | Sep 01 12:53:52 PM UTC 24 |
| Finished | Sep 01 12:54:56 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855835022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.2855835022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.2650774327 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 4361727674 ps |
| CPU time | 27.81 seconds |
| Started | Sep 01 12:53:53 PM UTC 24 |
| Finished | Sep 01 12:54:22 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2650774327 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.2650774327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.2382928317 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 784618056 ps |
| CPU time | 2.45 seconds |
| Started | Sep 01 12:53:54 PM UTC 24 |
| Finished | Sep 01 12:53:57 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382928317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.2382928317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.3207874831 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 148285339 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:53:59 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3207874831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.3207874831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_enable.3886106142 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 59401752 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:53:59 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886106142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.3886106142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.390998792 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 816506884 ps |
| CPU time | 3.33 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:54:01 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=390998792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.390998792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.4249106224 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 276193610 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:54:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249106224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_fifo_levels.4249106224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.1854501216 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 293414034 ps |
| CPU time | 3.52 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:54:02 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854501216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_fifo_rst.1854501216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.1235758142 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 215390691 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:54:00 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1235758142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.1235758142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.1314162410 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 159193926 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:53:59 PM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1314162410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.1314162410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.2550641781 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 168070179 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:54:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550641781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_trans.2550641781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.2233484280 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 3534742361 ps |
| CPU time | 28.07 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:54:26 PM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2233484280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.2233484280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.625998762 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 11921579294 ps |
| CPU time | 70.31 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:55:09 PM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=625998762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.625998762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.227593943 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 171909582 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:53:57 PM UTC 24 |
| Finished | Sep 01 12:53:59 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227593943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_link_in_err.227593943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.2705245229 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 27384557239 ps |
| CPU time | 47.87 seconds |
| Started | Sep 01 12:53:59 PM UTC 24 |
| Finished | Sep 01 12:54:48 PM UTC 24 |
| Peak memory | 227588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2705245229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.2705245229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.3120330392 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 3536279931 ps |
| CPU time | 5.75 seconds |
| Started | Sep 01 12:53:59 PM UTC 24 |
| Finished | Sep 01 12:54:06 PM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3120330392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.3120330392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.3414641086 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 3580741128 ps |
| CPU time | 25.16 seconds |
| Started | Sep 01 12:53:59 PM UTC 24 |
| Finished | Sep 01 12:54:25 PM UTC 24 |
| Peak memory | 234188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3414641086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.3414641086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.2375975943 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 2247457196 ps |
| CPU time | 63.27 seconds |
| Started | Sep 01 12:53:59 PM UTC 24 |
| Finished | Sep 01 12:55:04 PM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375975943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.2375975943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.3031774984 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 301352524 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:53:59 PM UTC 24 |
| Finished | Sep 01 12:54:02 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3031774984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.3031774984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.122560415 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 193568871 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:54:02 PM UTC 24 |
| Finished | Sep 01 12:54:04 PM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=122560415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.122560415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.2265407491 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 1725077347 ps |
| CPU time | 16 seconds |
| Started | Sep 01 12:54:02 PM UTC 24 |
| Finished | Sep 01 12:54:19 PM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265407491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.2265407491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.3452767388 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 3636089969 ps |
| CPU time | 27.44 seconds |
| Started | Sep 01 12:54:02 PM UTC 24 |
| Finished | Sep 01 12:54:31 PM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452767388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.3452767388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.1713998495 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 158134368 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 12:54:02 PM UTC 24 |
| Finished | Sep 01 12:54:04 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713998495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.1713998495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.3621585737 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 142192049 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:54:02 PM UTC 24 |
| Finished | Sep 01 12:54:04 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621585737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.3621585737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.2779879920 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 190736044 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:54:02 PM UTC 24 |
| Finished | Sep 01 12:54:04 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779879920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_out_iso.2779879920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.1216404775 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 186497680 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:54:02 PM UTC 24 |
| Finished | Sep 01 12:54:05 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216404775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.1216404775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.212848573 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 224385041 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 12:54:02 PM UTC 24 |
| Finished | Sep 01 12:54:05 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=212848573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_out_trans_nak.212848573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.3297876053 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 147662509 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:54:02 PM UTC 24 |
| Finished | Sep 01 12:54:04 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3297876053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.3297876053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.1153264038 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 234284740 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:54:07 PM UTC 24 |
| Finished | Sep 01 12:54:10 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153264038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.1153264038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.497039396 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 142011167 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:54:07 PM UTC 24 |
| Finished | Sep 01 12:54:10 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=497039396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.497039396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.182700642 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 68322928 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:10 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=182700642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_phy_pins_sense.182700642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.2841127021 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 7005017065 ps |
| CPU time | 17.84 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:27 PM UTC 24 |
| Peak memory | 227516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841127021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.2841127021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.3373813801 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 213003177 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:10 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373813801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_pkt_received.3373813801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.3515301304 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 228597440 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:10 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515301304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.3515301304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.3391546104 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 221241741 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:10 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391546104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.3391546104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.1885376472 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 177675389 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:10 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885376472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.1885376472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.587282022 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 20186753598 ps |
| CPU time | 44.71 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:54 PM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=587282022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_resume_link_active.587282022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.1652107338 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 139968151 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:10 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1652107338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_rx_crc_err.1652107338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.1175414722 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 372122498 ps |
| CPU time | 2.42 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:11 PM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175414722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.1175414722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.1929049701 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 158085198 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:10 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1929049701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.1929049701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.4037879803 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 153162143 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:11 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037879803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.4037879803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.1796897330 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 245800061 ps |
| CPU time | 1.82 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:11 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796897330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.1796897330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.1141360269 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 3195998525 ps |
| CPU time | 77.38 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:55:27 PM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1141360269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.1141360269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.152345583 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 163847897 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:54:08 PM UTC 24 |
| Finished | Sep 01 12:54:11 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=152345583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.152345583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.4098076893 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 192422928 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:54:11 PM UTC 24 |
| Finished | Sep 01 12:54:13 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098076893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.4098076893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.1953879468 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 930701287 ps |
| CPU time | 3.49 seconds |
| Started | Sep 01 12:54:11 PM UTC 24 |
| Finished | Sep 01 12:54:15 PM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953879468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.1953879468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.2727072079 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 2631986602 ps |
| CPU time | 66.07 seconds |
| Started | Sep 01 12:54:11 PM UTC 24 |
| Finished | Sep 01 12:55:19 PM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2727072079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.2727072079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.249682951 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 4280650058 ps |
| CPU time | 26.2 seconds |
| Started | Sep 01 12:53:53 PM UTC 24 |
| Finished | Sep 01 12:54:20 PM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=249682951 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.249682951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.133910701 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 540723110 ps |
| CPU time | 2.81 seconds |
| Started | Sep 01 12:54:11 PM UTC 24 |
| Finished | Sep 01 12:54:15 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=133910701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_tx _rx_disruption.133910701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.2671609747 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 151603475 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 214860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671609747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.2671609747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.2737500012 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 486246896 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2737500012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_ tx_rx_disruption.2737500012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.1158043742 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 274929906 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158043742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.1158043742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.1803232613 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 541424436 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1803232613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.1803232613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.80136358 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 203808806 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=80136358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.80136358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.1800476602 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 648087851 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1800476602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_ tx_rx_disruption.1800476602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.1208800492 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 612195299 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1208800492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.1208800492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.2206659621 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 376823149 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 01:23:35 PM UTC 24 |
| Finished | Sep 01 01:23:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206659621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.2206659621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.4228775685 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 598887003 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4228775685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.4228775685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.1963833539 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 588789833 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963833539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.1963833539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.381870202 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 589005497 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=381870202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_t x_rx_disruption.381870202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.4215118437 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 185353612 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4215118437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.4215118437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.587839568 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 481020146 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=587839568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_t x_rx_disruption.587839568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.129701880 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 371221471 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=129701880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.129701880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.1998729637 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 494639754 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1998729637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_ tx_rx_disruption.1998729637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.874309364 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 309087309 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=874309364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.874309364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.1291391591 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 558338532 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1291391591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.1291391591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.3393501194 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 370670532 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393501194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.3393501194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.2215513404 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 665211944 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2215513404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.2215513404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.2217636828 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 54351570 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:54:33 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217636828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.2217636828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.3256618231 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 9850105236 ps |
| CPU time | 16.35 seconds |
| Started | Sep 01 12:54:11 PM UTC 24 |
| Finished | Sep 01 12:54:29 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256618231 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.3256618231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.789279991 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 21290831518 ps |
| CPU time | 26.5 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:44 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=789279991 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.789279991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.3980770133 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 25955922854 ps |
| CPU time | 46.89 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:55:04 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980770133 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.3980770133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.2889589974 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 215242583 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889589974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.2889589974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.3678253374 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 151594281 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678253374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.3678253374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.781423260 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 267292895 ps |
| CPU time | 1.82 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=781423260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_data_toggle_clear.781423260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.815853600 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 1125953731 ps |
| CPU time | 4.48 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:22 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=815853600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.815853600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.2029755812 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 50802043559 ps |
| CPU time | 90.47 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:55:48 PM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2029755812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.2029755812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.94183716 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 440547185 ps |
| CPU time | 8.64 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:26 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=94183716 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.94183716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.3096636539 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 594505184 ps |
| CPU time | 2.81 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:20 PM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3096636539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_disable_endpoint.3096636539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.973729198 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 147660331 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973729198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_disconnected.973729198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_enable.3465081598 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 47107362 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465081598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.3465081598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.2465214914 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 966303515 ps |
| CPU time | 3.97 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:21 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465214914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.2465214914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.2591465219 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 262679063 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591465219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.2591465219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.944393428 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 278757311 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=944393428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_fifo_levels.944393428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.2893872603 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 181109617 ps |
| CPU time | 2.05 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:20 PM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893872603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_fifo_rst.2893872603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.1261958989 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 216340677 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:23 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261958989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.1261958989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.1649173311 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 151285888 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:23 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649173311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_stall.1649173311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.3890724260 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 248384730 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890724260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.3890724260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.1569422092 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 3982648709 ps |
| CPU time | 28.82 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:51 PM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569422092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.1569422092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.1558999523 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 6904112866 ps |
| CPU time | 47.19 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:55:10 PM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558999523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.1558999523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.695250515 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 211080165 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=695250515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_in_err.695250515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.3380332626 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 23352164209 ps |
| CPU time | 45.1 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380332626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_resume.3380332626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.1549408384 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 10649986826 ps |
| CPU time | 17.94 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:40 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1549408384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_link_suspend.1549408384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.4016553431 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 3158154041 ps |
| CPU time | 28.86 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:51 PM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016553431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.4016553431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.3999286862 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 3302412272 ps |
| CPU time | 23.64 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:46 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3999286862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.3999286862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.239521989 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 254513033 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:24 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=239521989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.239521989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.918628532 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 205113275 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:24 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=918628532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.918628532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.4186140923 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 2192723043 ps |
| CPU time | 20.5 seconds |
| Started | Sep 01 12:54:21 PM UTC 24 |
| Finished | Sep 01 12:54:43 PM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186140923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.4186140923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.3369374081 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 3271027224 ps |
| CPU time | 31.72 seconds |
| Started | Sep 01 12:54:22 PM UTC 24 |
| Finished | Sep 01 12:54:55 PM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369374081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.3369374081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.846529861 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 151008452 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:54:22 PM UTC 24 |
| Finished | Sep 01 12:54:24 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=846529861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.846529861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.3438156099 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 143910960 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:54:22 PM UTC 24 |
| Finished | Sep 01 12:54:24 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3438156099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.3438156099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.2000593615 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 251549902 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:54:22 PM UTC 24 |
| Finished | Sep 01 12:54:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000593615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.2000593615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.2751358877 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 188431791 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:54:22 PM UTC 24 |
| Finished | Sep 01 12:54:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751358877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.2751358877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.3261101406 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 154770757 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:54:25 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3261101406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.3261101406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.1068215957 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 173834723 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:54:25 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 214708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1068215957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_out_trans_nak.1068215957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.2037222566 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 167445183 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 12:54:25 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 214684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037222566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.2037222566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.635992607 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 261773069 ps |
| CPU time | 1.85 seconds |
| Started | Sep 01 12:54:25 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=635992607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.635992607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.3334331299 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 138274801 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:54:25 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3334331299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.3334331299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.2112459435 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 41702059 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:54:25 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2112459435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2112459435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.1040504002 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 17149409424 ps |
| CPU time | 44.52 seconds |
| Started | Sep 01 12:54:26 PM UTC 24 |
| Finished | Sep 01 12:55:11 PM UTC 24 |
| Peak memory | 231648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040504002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.1040504002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.643045084 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 174170057 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:54:26 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=643045084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_pkt_received.643045084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.687282431 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 242161214 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 12:54:26 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=687282431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_pkt_sent.687282431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.115010457 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 197207131 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:54:26 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=115010457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_random_length_in_transaction.115010457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.3323188312 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 187605634 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 12:54:26 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323188312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.3323188312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.3848309289 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 20165995858 ps |
| CPU time | 23.89 seconds |
| Started | Sep 01 12:54:26 PM UTC 24 |
| Finished | Sep 01 12:54:51 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848309289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 19.usbdev_resume_link_active.3848309289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.1811416396 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 139650167 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:54:26 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811416396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.1811416396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.4067688283 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 262968165 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:54:26 PM UTC 24 |
| Finished | Sep 01 12:54:29 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067688283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.4067688283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.2011794701 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 166029726 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:54:26 PM UTC 24 |
| Finished | Sep 01 12:54:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2011794701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_setup_stage.2011794701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.3924112965 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 241932960 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:54:30 PM UTC 24 |
| Finished | Sep 01 12:54:33 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924112965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.3924112965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.2471621712 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 200699057 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 12:54:30 PM UTC 24 |
| Finished | Sep 01 12:54:33 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2471621712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.2471621712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.533484819 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 2438088639 ps |
| CPU time | 23.27 seconds |
| Started | Sep 01 12:54:30 PM UTC 24 |
| Finished | Sep 01 12:54:55 PM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=533484819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.533484819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.4136575451 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 168398290 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 12:54:30 PM UTC 24 |
| Finished | Sep 01 12:54:33 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4136575451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.4136575451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.220620636 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 187727714 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:54:30 PM UTC 24 |
| Finished | Sep 01 12:54:33 PM UTC 24 |
| Peak memory | 214704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=220620636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_stall_trans.220620636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.972971356 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 1023984139 ps |
| CPU time | 4.28 seconds |
| Started | Sep 01 12:54:30 PM UTC 24 |
| Finished | Sep 01 12:54:36 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=972971356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_stream_len_max.972971356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.1025554448 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 2508174222 ps |
| CPU time | 62.74 seconds |
| Started | Sep 01 12:54:30 PM UTC 24 |
| Finished | Sep 01 12:55:35 PM UTC 24 |
| Peak memory | 227248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1025554448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.1025554448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.2746778821 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 451357889 ps |
| CPU time | 7.73 seconds |
| Started | Sep 01 12:54:16 PM UTC 24 |
| Finished | Sep 01 12:54:25 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746778821 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.2746778821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.2624314293 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 434062058 ps |
| CPU time | 2.51 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:54:34 PM UTC 24 |
| Peak memory | 216744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2624314293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.2624314293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.1065634816 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 516133436 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1065634816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.1065634816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.1058870948 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 491748812 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 214844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058870948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.1058870948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.496947878 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 415551841 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=496947878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_t x_rx_disruption.496947878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.474481125 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 453803863 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=474481125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.474481125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.1702821309 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 631015018 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1702821309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_ tx_rx_disruption.1702821309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.717822294 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 183905302 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=717822294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.717822294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.583387353 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 663376326 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=583387353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_t x_rx_disruption.583387353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.730743586 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 284425932 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=730743586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.730743586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.2301752530 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 513432432 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2301752530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_ tx_rx_disruption.2301752530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.1842712991 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 683060558 ps |
| CPU time | 1.78 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1842712991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.1842712991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.103330951 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 566810395 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=103330951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_t x_rx_disruption.103330951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.1118387550 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 549865149 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1118387550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.1118387550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.1414648807 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 529846965 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1414648807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.1414648807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.1758769717 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 540408612 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1758769717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_ tx_rx_disruption.1758769717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.3459751468 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 582807298 ps |
| CPU time | 1.88 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3459751468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.3459751468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.497456506 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 461516558 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=497456506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_t x_rx_disruption.497456506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.657148009 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 158456277 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:56 PM UTC 24 |
| Peak memory | 214564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=657148009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.657148009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.534106679 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 572228343 ps |
| CPU time | 1.91 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=534106679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_t x_rx_disruption.534106679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.891372138 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 44045114 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:46:26 PM UTC 24 |
| Finished | Sep 01 12:46:29 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=891372138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.891372138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.3575619669 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 9992508673 ps |
| CPU time | 23.23 seconds |
| Started | Sep 01 12:45:19 PM UTC 24 |
| Finished | Sep 01 12:45:43 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575619669 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.3575619669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.174270947 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 28669382442 ps |
| CPU time | 65.32 seconds |
| Started | Sep 01 12:45:20 PM UTC 24 |
| Finished | Sep 01 12:46:27 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=174270947 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.174270947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.1868124863 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 163866813 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:45:20 PM UTC 24 |
| Finished | Sep 01 12:45:22 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1868124863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.1868124863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.2846727833 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 153904051 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:45:21 PM UTC 24 |
| Finished | Sep 01 12:45:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846727833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.2846727833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.150086120 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 148872796 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:45:21 PM UTC 24 |
| Finished | Sep 01 12:45:24 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=150086120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_bitstuff_err.150086120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.696686406 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 442200000 ps |
| CPU time | 2.83 seconds |
| Started | Sep 01 12:45:24 PM UTC 24 |
| Finished | Sep 01 12:45:27 PM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=696686406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_data_toggle_clear.696686406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.3919266950 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 389383359 ps |
| CPU time | 2.18 seconds |
| Started | Sep 01 12:45:24 PM UTC 24 |
| Finished | Sep 01 12:45:27 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3919266950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.3919266950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.3127296531 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 52597958522 ps |
| CPU time | 139.79 seconds |
| Started | Sep 01 12:45:24 PM UTC 24 |
| Finished | Sep 01 12:47:46 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3127296531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.3127296531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.4137703922 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 1565260452 ps |
| CPU time | 16.24 seconds |
| Started | Sep 01 12:45:25 PM UTC 24 |
| Finished | Sep 01 12:45:42 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4137703922 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.4137703922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.2553246135 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 978796236 ps |
| CPU time | 4.37 seconds |
| Started | Sep 01 12:45:27 PM UTC 24 |
| Finished | Sep 01 12:45:33 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553246135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_disable_endpoint.2553246135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.3453196312 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 146029425 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:45:27 PM UTC 24 |
| Finished | Sep 01 12:45:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453196312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.3453196312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_enable.796230014 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 32517892 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:45:27 PM UTC 24 |
| Finished | Sep 01 12:45:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=796230014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_enable.796230014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.491511 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 902405487 ps |
| CPU time | 4.6 seconds |
| Started | Sep 01 12:45:28 PM UTC 24 |
| Finished | Sep 01 12:45:33 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=491511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_endpoint_access.491511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.2913897502 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 264916719 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 12:45:30 PM UTC 24 |
| Finished | Sep 01 12:45:33 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2913897502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_fifo_levels.2913897502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.1612913521 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 291274820 ps |
| CPU time | 3.94 seconds |
| Started | Sep 01 12:45:30 PM UTC 24 |
| Finished | Sep 01 12:45:35 PM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1612913521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.1612913521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.1796783523 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 106196768674 ps |
| CPU time | 271.17 seconds |
| Started | Sep 01 12:45:31 PM UTC 24 |
| Finished | Sep 01 12:50:07 PM UTC 24 |
| Peak memory | 220024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796783523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.1796783523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.1742099033 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 105177352998 ps |
| CPU time | 214.43 seconds |
| Started | Sep 01 12:45:32 PM UTC 24 |
| Finished | Sep 01 12:49:10 PM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1742099033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_hiclk_max.1742099033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.1464865825 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 82156180102 ps |
| CPU time | 183.44 seconds |
| Started | Sep 01 12:45:34 PM UTC 24 |
| Finished | Sep 01 12:48:40 PM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464865825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.1464865825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.280178396 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 83246254997 ps |
| CPU time | 174.74 seconds |
| Started | Sep 01 12:45:34 PM UTC 24 |
| Finished | Sep 01 12:48:31 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=280178396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_loclk_max.280178396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.1571630392 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 234396557 ps |
| CPU time | 2.03 seconds |
| Started | Sep 01 12:45:40 PM UTC 24 |
| Finished | Sep 01 12:45:43 PM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571630392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.1571630392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.3229906984 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 152305481 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:45:43 PM UTC 24 |
| Finished | Sep 01 12:45:46 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3229906984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.3229906984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.977120650 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 238564938 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 12:45:44 PM UTC 24 |
| Finished | Sep 01 12:45:47 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=977120650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_in_trans.977120650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.1776611468 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 4595927425 ps |
| CPU time | 51.17 seconds |
| Started | Sep 01 12:45:36 PM UTC 24 |
| Finished | Sep 01 12:46:29 PM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776611468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.1776611468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.1520983522 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 13035273894 ps |
| CPU time | 95.18 seconds |
| Started | Sep 01 12:45:44 PM UTC 24 |
| Finished | Sep 01 12:47:21 PM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520983522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.1520983522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.406379003 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 169521386 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:45:46 PM UTC 24 |
| Finished | Sep 01 12:45:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=406379003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_link_in_err.406379003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.232464252 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 32978039866 ps |
| CPU time | 70.29 seconds |
| Started | Sep 01 12:45:48 PM UTC 24 |
| Finished | Sep 01 12:47:00 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=232464252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_link_resume.232464252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.4151287998 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 5818690628 ps |
| CPU time | 12.5 seconds |
| Started | Sep 01 12:45:48 PM UTC 24 |
| Finished | Sep 01 12:46:02 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151287998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.4151287998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.776056363 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 3711853149 ps |
| CPU time | 106.5 seconds |
| Started | Sep 01 12:45:49 PM UTC 24 |
| Finished | Sep 01 12:47:38 PM UTC 24 |
| Peak memory | 227656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=776056363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.776056363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.1554964935 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 3888350606 ps |
| CPU time | 57.34 seconds |
| Started | Sep 01 12:45:49 PM UTC 24 |
| Finished | Sep 01 12:46:48 PM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1554964935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.1554964935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.2332297054 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 274494413 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 12:45:52 PM UTC 24 |
| Finished | Sep 01 12:45:54 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332297054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.2332297054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.3532653958 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 206580755 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:45:53 PM UTC 24 |
| Finished | Sep 01 12:45:55 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532653958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.3532653958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.3634348523 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 2571470268 ps |
| CPU time | 24.6 seconds |
| Started | Sep 01 12:45:54 PM UTC 24 |
| Finished | Sep 01 12:46:20 PM UTC 24 |
| Peak memory | 229744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3634348523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.3634348523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.2935116972 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 2612687699 ps |
| CPU time | 87.12 seconds |
| Started | Sep 01 12:45:54 PM UTC 24 |
| Finished | Sep 01 12:47:23 PM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935116972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.2935116972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.2683687557 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 2427376289 ps |
| CPU time | 24.81 seconds |
| Started | Sep 01 12:45:55 PM UTC 24 |
| Finished | Sep 01 12:46:21 PM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2683687557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.2683687557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.1459066010 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 146829395 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:45:57 PM UTC 24 |
| Finished | Sep 01 12:46:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459066010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.1459066010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.306180821 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 174733447 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:45:57 PM UTC 24 |
| Finished | Sep 01 12:46:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=306180821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.306180821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.2721240400 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 204459323 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:46:01 PM UTC 24 |
| Finished | Sep 01 12:46:04 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721240400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.2721240400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.2150367768 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 205777026 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 12:46:01 PM UTC 24 |
| Finished | Sep 01 12:46:04 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150367768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.2150367768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.69928475 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 154608850 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:46:03 PM UTC 24 |
| Finished | Sep 01 12:46:06 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=69928475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_stall.69928475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.2571173286 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 153065526 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:46:04 PM UTC 24 |
| Finished | Sep 01 12:46:07 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2571173286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_out_trans_nak.2571173286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.3124721688 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 182853046 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:46:05 PM UTC 24 |
| Finished | Sep 01 12:46:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3124721688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.3124721688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.3299694457 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 320596814 ps |
| CPU time | 1.99 seconds |
| Started | Sep 01 12:46:05 PM UTC 24 |
| Finished | Sep 01 12:46:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299694457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.3299694457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.3448906734 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 195588013 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 12:46:06 PM UTC 24 |
| Finished | Sep 01 12:46:10 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448906734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.3448906734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.4120259132 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 165336969 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:46:06 PM UTC 24 |
| Finished | Sep 01 12:46:09 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120259132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.4120259132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.3723416943 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 32827799 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:46:08 PM UTC 24 |
| Finished | Sep 01 12:46:10 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723416943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.3723416943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.3738255128 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 14753127643 ps |
| CPU time | 63.5 seconds |
| Started | Sep 01 12:46:10 PM UTC 24 |
| Finished | Sep 01 12:47:15 PM UTC 24 |
| Peak memory | 227684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738255128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.3738255128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.3254886206 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 176874394 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:46:10 PM UTC 24 |
| Finished | Sep 01 12:46:12 PM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254886206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.3254886206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.3961733184 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 264318462 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 12:46:10 PM UTC 24 |
| Finished | Sep 01 12:46:13 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961733184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.3961733184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.930684867 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 6735131092 ps |
| CPU time | 80.77 seconds |
| Started | Sep 01 12:46:11 PM UTC 24 |
| Finished | Sep 01 12:47:34 PM UTC 24 |
| Peak memory | 227676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=930684867 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.930684867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.3532225545 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 9335923304 ps |
| CPU time | 151.43 seconds |
| Started | Sep 01 12:46:11 PM UTC 24 |
| Finished | Sep 01 12:48:45 PM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532225545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.3532225545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.1599878523 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 10734232628 ps |
| CPU time | 214.11 seconds |
| Started | Sep 01 12:46:13 PM UTC 24 |
| Finished | Sep 01 12:49:51 PM UTC 24 |
| Peak memory | 227712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1599878523 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.1599878523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.391625752 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 207590260 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 12:46:10 PM UTC 24 |
| Finished | Sep 01 12:46:13 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=391625752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_random_length_in_transaction.391625752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.1789395748 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 177495400 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:46:11 PM UTC 24 |
| Finished | Sep 01 12:46:14 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1789395748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.1789395748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.2213585732 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 20223246236 ps |
| CPU time | 67.22 seconds |
| Started | Sep 01 12:46:13 PM UTC 24 |
| Finished | Sep 01 12:47:22 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213585732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.2213585732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.204304791 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 167500671 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:46:13 PM UTC 24 |
| Finished | Sep 01 12:46:16 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=204304791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_rx_crc_err.204304791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.4069549663 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 282102824 ps |
| CPU time | 1.91 seconds |
| Started | Sep 01 12:46:14 PM UTC 24 |
| Finished | Sep 01 12:46:17 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4069549663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_rx_full.4069549663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.2565044526 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 181227503 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:46:17 PM UTC 24 |
| Finished | Sep 01 12:46:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2565044526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.2565044526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.4232160836 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 244523947 ps |
| CPU time | 1.85 seconds |
| Started | Sep 01 12:46:25 PM UTC 24 |
| Finished | Sep 01 12:46:28 PM UTC 24 |
| Peak memory | 249172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232160836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.4232160836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.2453682589 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 361982777 ps |
| CPU time | 2.25 seconds |
| Started | Sep 01 12:46:18 PM UTC 24 |
| Finished | Sep 01 12:46:21 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2453682589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.2453682589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.2611924430 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 230825900 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 12:46:18 PM UTC 24 |
| Finished | Sep 01 12:46:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2611924430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.2611924430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.1097229260 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 165006206 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:46:19 PM UTC 24 |
| Finished | Sep 01 12:46:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1097229260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_setup_stage.1097229260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1646974675 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 165254563 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:46:20 PM UTC 24 |
| Finished | Sep 01 12:46:22 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646974675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.1646974675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.2880427939 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 239992401 ps |
| CPU time | 1.81 seconds |
| Started | Sep 01 12:46:21 PM UTC 24 |
| Finished | Sep 01 12:46:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880427939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.2880427939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.1508896887 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 2839852298 ps |
| CPU time | 35.66 seconds |
| Started | Sep 01 12:46:21 PM UTC 24 |
| Finished | Sep 01 12:46:58 PM UTC 24 |
| Peak memory | 229720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508896887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.1508896887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.3700202645 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 167230141 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:46:21 PM UTC 24 |
| Finished | Sep 01 12:46:24 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700202645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.3700202645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.2884713998 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 160262343 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:46:22 PM UTC 24 |
| Finished | Sep 01 12:46:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884713998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.2884713998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.3987761476 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 1018398492 ps |
| CPU time | 5.1 seconds |
| Started | Sep 01 12:46:23 PM UTC 24 |
| Finished | Sep 01 12:46:29 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987761476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.3987761476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.945858952 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 2554803627 ps |
| CPU time | 27.84 seconds |
| Started | Sep 01 12:46:23 PM UTC 24 |
| Finished | Sep 01 12:46:52 PM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=945858952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_streaming_out.945858952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.3152463105 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 15893131287 ps |
| CPU time | 134.27 seconds |
| Started | Sep 01 12:46:23 PM UTC 24 |
| Finished | Sep 01 12:48:40 PM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152463105 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.3152463105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.1839650848 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 2482807010 ps |
| CPU time | 26.59 seconds |
| Started | Sep 01 12:45:25 PM UTC 24 |
| Finished | Sep 01 12:45:53 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1839650848 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.1839650848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.2571751637 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 579739918 ps |
| CPU time | 2.74 seconds |
| Started | Sep 01 12:46:25 PM UTC 24 |
| Finished | Sep 01 12:46:29 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2571751637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.2571751637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.2355496543 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 44190761 ps |
| CPU time | 0.65 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:54:59 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355496543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.2355496543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.2562475254 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 6018110477 ps |
| CPU time | 8.76 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:54:41 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2562475254 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.2562475254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.1936327607 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 15696323202 ps |
| CPU time | 19.88 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:54:52 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1936327607 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.1936327607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.2376833986 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 28838808554 ps |
| CPU time | 39.33 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:55:12 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2376833986 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.2376833986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.179334858 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 156083774 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:54:34 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=179334858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_av_buffer.179334858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.597219688 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 165341979 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:54:34 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=597219688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_bitstuff_err.597219688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.1334080130 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 197487919 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:54:34 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334080130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.1334080130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.2788456141 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 269324218 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:54:34 PM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788456141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.2788456141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.3639964736 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 17799059617 ps |
| CPU time | 30.97 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:55:04 PM UTC 24 |
| Peak memory | 216432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3639964736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.3639964736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.1986311015 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 3913696391 ps |
| CPU time | 32.78 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:55:06 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986311015 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.1986311015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.2559265794 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 1031120521 ps |
| CPU time | 3.88 seconds |
| Started | Sep 01 12:54:35 PM UTC 24 |
| Finished | Sep 01 12:54:40 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559265794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_disable_endpoint.2559265794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.1464423367 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 146800399 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:54:35 PM UTC 24 |
| Finished | Sep 01 12:54:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464423367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_disconnected.1464423367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_enable.4294897354 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 38033765 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:54:35 PM UTC 24 |
| Finished | Sep 01 12:54:37 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294897354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.4294897354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.1288898716 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 956256119 ps |
| CPU time | 2.97 seconds |
| Started | Sep 01 12:54:35 PM UTC 24 |
| Finished | Sep 01 12:54:39 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288898716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.1288898716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.1419546693 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 492685835 ps |
| CPU time | 2.86 seconds |
| Started | Sep 01 12:54:35 PM UTC 24 |
| Finished | Sep 01 12:54:39 PM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1419546693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.1419546693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.1404916659 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 296650572 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 12:54:35 PM UTC 24 |
| Finished | Sep 01 12:54:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1404916659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_fifo_levels.1404916659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.3021004292 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 258199458 ps |
| CPU time | 3.11 seconds |
| Started | Sep 01 12:54:35 PM UTC 24 |
| Finished | Sep 01 12:54:40 PM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021004292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.3021004292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.455790587 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 167059190 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 12:54:36 PM UTC 24 |
| Finished | Sep 01 12:54:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=455790587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.455790587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.2801879431 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 163061357 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:54:36 PM UTC 24 |
| Finished | Sep 01 12:54:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2801879431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_stall.2801879431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.3905685889 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 193787397 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:54:36 PM UTC 24 |
| Finished | Sep 01 12:54:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3905685889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.3905685889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.4052456201 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 4387733786 ps |
| CPU time | 110.76 seconds |
| Started | Sep 01 12:54:35 PM UTC 24 |
| Finished | Sep 01 12:56:29 PM UTC 24 |
| Peak memory | 227700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052456201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.4052456201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.2347046937 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 5700769440 ps |
| CPU time | 35.34 seconds |
| Started | Sep 01 12:54:36 PM UTC 24 |
| Finished | Sep 01 12:55:13 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347046937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.2347046937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.60558830 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 185141789 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:54:36 PM UTC 24 |
| Finished | Sep 01 12:54:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=60558830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_link_in_err.60558830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.1065108098 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 13349329133 ps |
| CPU time | 22.33 seconds |
| Started | Sep 01 12:54:36 PM UTC 24 |
| Finished | Sep 01 12:55:00 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065108098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.1065108098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.720229331 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 10982034207 ps |
| CPU time | 16.37 seconds |
| Started | Sep 01 12:54:36 PM UTC 24 |
| Finished | Sep 01 12:54:54 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=720229331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_suspend.720229331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.2836697610 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 4252826732 ps |
| CPU time | 38.16 seconds |
| Started | Sep 01 12:54:36 PM UTC 24 |
| Finished | Sep 01 12:55:16 PM UTC 24 |
| Peak memory | 229788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836697610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.2836697610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.1365985149 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 3018608367 ps |
| CPU time | 22.45 seconds |
| Started | Sep 01 12:54:38 PM UTC 24 |
| Finished | Sep 01 12:55:02 PM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365985149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.1365985149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.3146966419 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 253332220 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 12:54:38 PM UTC 24 |
| Finished | Sep 01 12:54:41 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146966419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.3146966419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.4133811387 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 194019093 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:54:38 PM UTC 24 |
| Finished | Sep 01 12:54:41 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133811387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.4133811387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.1158554135 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 2468999382 ps |
| CPU time | 61.44 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:55:46 PM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158554135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.1158554135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.3869509062 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 2897204363 ps |
| CPU time | 72.94 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:55:58 PM UTC 24 |
| Peak memory | 227588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3869509062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.3869509062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.2029601004 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 225933094 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:54:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2029601004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.2029601004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.1509825775 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 144073598 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:54:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509825775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.1509825775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.3476848476 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 207209869 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:54:46 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476848476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.3476848476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.4175989683 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 233037989 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:54:47 PM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175989683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_out_iso.4175989683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.185594136 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 174547417 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:54:46 PM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=185594136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_out_stall.185594136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.2212809378 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 204294533 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:54:46 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212809378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_out_trans_nak.2212809378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.2374154500 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 168024925 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:54:47 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2374154500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.2374154500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.1579059067 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 188361467 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:54:47 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579059067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.1579059067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.3542699059 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 147913972 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:54:47 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542699059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.3542699059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.244522406 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 55591357 ps |
| CPU time | 1 seconds |
| Started | Sep 01 12:54:43 PM UTC 24 |
| Finished | Sep 01 12:54:46 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=244522406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_phy_pins_sense.244522406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.265797897 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 7491748011 ps |
| CPU time | 20.25 seconds |
| Started | Sep 01 12:54:50 PM UTC 24 |
| Finished | Sep 01 12:55:12 PM UTC 24 |
| Peak memory | 231564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=265797897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_pkt_buffer.265797897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.1557047907 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 185851251 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:54:50 PM UTC 24 |
| Finished | Sep 01 12:54:53 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557047907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_pkt_received.1557047907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.1046772633 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 181998731 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 12:54:50 PM UTC 24 |
| Finished | Sep 01 12:54:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046772633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.1046772633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.2329231145 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 250149986 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:54 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329231145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.2329231145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.931824746 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 165667864 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:53 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=931824746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.931824746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.3567059440 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 175344424 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567059440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_rx_crc_err.3567059440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.1497841000 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 257451569 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497841000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.1497841000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.390727124 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 178863130 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=390727124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_setup_stage.390727124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.2341735749 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 187711415 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:54 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341735749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.2341735749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.2466182905 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 241064317 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:54 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2466182905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.2466182905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.749174005 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 1615667128 ps |
| CPU time | 11.59 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:55:04 PM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=749174005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.749174005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.586311456 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 189187023 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:54 PM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=586311456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.586311456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.2814142542 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 157311115 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:54 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2814142542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_stall_trans.2814142542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.3160400130 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 1144422286 ps |
| CPU time | 3.28 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:56 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160400130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.3160400130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.235046986 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 3542927995 ps |
| CPU time | 87.98 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:56:21 PM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=235046986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_streaming_out.235046986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.1598233893 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 3866053084 ps |
| CPU time | 28.71 seconds |
| Started | Sep 01 12:54:31 PM UTC 24 |
| Finished | Sep 01 12:55:02 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598233893 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.1598233893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.3335407012 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 479108888 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 12:54:51 PM UTC 24 |
| Finished | Sep 01 12:54:54 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3335407012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.3335407012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.3433724767 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 527873403 ps |
| CPU time | 1.83 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3433724767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.3433724767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.375003556 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 487366470 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=375003556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_t x_rx_disruption.375003556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.934814879 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 525741777 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:24:54 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=934814879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_t x_rx_disruption.934814879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.1453044305 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 479570947 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1453044305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.1453044305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.1076632452 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 645650960 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1076632452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.1076632452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.1629014731 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 620211172 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 216736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1629014731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.1629014731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.3192085587 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 495144873 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3192085587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.3192085587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.1446248732 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 458470404 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1446248732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.1446248732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.2273932143 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 540456999 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2273932143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.2273932143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.341893574 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 624293491 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=341893574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_t x_rx_disruption.341893574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.120366221 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 54457769 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=120366221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.120366221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.3348757673 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 9456884139 ps |
| CPU time | 11.98 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:55:10 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348757673 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.3348757673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.3448515071 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 16136251118 ps |
| CPU time | 22.12 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:55:21 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448515071 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.3448515071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.1776478807 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 31251275301 ps |
| CPU time | 45.52 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:55:44 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776478807 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.1776478807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.205916071 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 176198252 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:54:59 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=205916071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_av_buffer.205916071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.1307572609 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 141750438 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:55:00 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1307572609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.1307572609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.148148535 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 272582346 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:54:59 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=148148535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_data_toggle_clear.148148535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.2296254821 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 376669516 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:55:00 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296254821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.2296254821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.711239361 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 23457935511 ps |
| CPU time | 37.65 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:55:37 PM UTC 24 |
| Peak memory | 217328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711239361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_device_address.711239361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.36905873 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 289182814 ps |
| CPU time | 4.19 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:55:03 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=36905873 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.36905873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.2201808088 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 811593219 ps |
| CPU time | 2.45 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:55:01 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2201808088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.2201808088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.3448545494 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 146876255 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:54:58 PM UTC 24 |
| Finished | Sep 01 12:55:00 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448545494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.3448545494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_enable.2966003506 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 92772954 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:54:58 PM UTC 24 |
| Finished | Sep 01 12:55:00 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966003506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_enable.2966003506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.2761121559 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 804248582 ps |
| CPU time | 2.13 seconds |
| Started | Sep 01 12:54:58 PM UTC 24 |
| Finished | Sep 01 12:55:01 PM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761121559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.2761121559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.578417727 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 656218803 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:54:58 PM UTC 24 |
| Finished | Sep 01 12:55:00 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=578417727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.578417727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.1364731088 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 204394363 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:54:58 PM UTC 24 |
| Finished | Sep 01 12:55:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1364731088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_fifo_levels.1364731088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.1315204875 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 199937715 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 12:54:58 PM UTC 24 |
| Finished | Sep 01 12:55:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315204875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_fifo_rst.1315204875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.3253198197 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 164341176 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:54:58 PM UTC 24 |
| Finished | Sep 01 12:55:01 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3253198197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.3253198197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.1066955381 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 144978041 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:54:58 PM UTC 24 |
| Finished | Sep 01 12:55:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066955381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_stall.1066955381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.2258465556 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 271644788 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:54:58 PM UTC 24 |
| Finished | Sep 01 12:55:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258465556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.2258465556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.1422564106 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 4096624789 ps |
| CPU time | 105.13 seconds |
| Started | Sep 01 12:54:58 PM UTC 24 |
| Finished | Sep 01 12:56:45 PM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422564106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.1422564106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.1997910541 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 10259706112 ps |
| CPU time | 66.93 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:56:13 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1997910541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.1997910541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.1832971208 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 213772604 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:07 PM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1832971208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_in_err.1832971208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.4005628801 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 10167271225 ps |
| CPU time | 16.4 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:23 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005628801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_resume.4005628801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.2411696135 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 10796923875 ps |
| CPU time | 16 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:22 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411696135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_link_suspend.2411696135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.122715537 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 3448829468 ps |
| CPU time | 32.38 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:39 PM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=122715537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.122715537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.4015677583 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 1709969258 ps |
| CPU time | 41 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:48 PM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015677583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.4015677583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.2988357059 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 237927101 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988357059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.2988357059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.2120373642 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 185510012 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2120373642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.2120373642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.383281213 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 2498292205 ps |
| CPU time | 60.79 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:56:08 PM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383281213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.383281213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.1798843406 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 4065122050 ps |
| CPU time | 99.81 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 227516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798843406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.1798843406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.1352672694 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 192498962 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1352672694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.1352672694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.4164531002 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 155326814 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164531002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.4164531002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.4067973053 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 219062066 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067973053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_nak_trans.4067973053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.74330533 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 154737406 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=74330533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_out_iso.74330533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.296640205 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 176404166 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=296640205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_out_stall.296640205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.2064587032 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 177444457 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064587032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.2064587032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.30250895 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 153696836 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=30250895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_pending_in_trans.30250895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.3429375542 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 258834265 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429375542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.3429375542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.3744177305 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 189517531 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744177305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.3744177305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.1815118082 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 34996134 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815118082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.1815118082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.3074268852 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 21477279078 ps |
| CPU time | 51.36 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:59 PM UTC 24 |
| Peak memory | 234128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3074268852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_pkt_buffer.3074268852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.1238834199 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 220665694 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238834199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.1238834199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.3954245752 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 190014040 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 12:55:05 PM UTC 24 |
| Finished | Sep 01 12:55:08 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3954245752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_pkt_sent.3954245752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.64588109 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 209362364 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=64588109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_random_length_in_transaction.64588109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.1967950557 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 164880031 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967950557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.1967950557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.1935545169 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 191323637 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1935545169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.1935545169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.590817445 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 249534826 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:20 PM UTC 24 |
| Peak memory | 214900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=590817445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_rx_full.590817445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.2575775941 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 157757085 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575775941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_setup_stage.2575775941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.3558084147 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 145781895 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558084147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.3558084147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.1522484483 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 235838086 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1522484483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.1522484483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.2523811946 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 2202201478 ps |
| CPU time | 53.41 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:56:13 PM UTC 24 |
| Peak memory | 234128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2523811946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.2523811946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.4291143637 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 173379979 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291143637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.4291143637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.3757596494 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 229931366 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757596494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.3757596494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.3062975780 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 243151096 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:21 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062975780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.3062975780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.924111820 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 2166065597 ps |
| CPU time | 15.2 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:35 PM UTC 24 |
| Peak memory | 227488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924111820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_streaming_out.924111820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.375177416 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 1355512737 ps |
| CPU time | 8.37 seconds |
| Started | Sep 01 12:54:57 PM UTC 24 |
| Finished | Sep 01 12:55:07 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=375177416 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.375177416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.1100145213 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 682903539 ps |
| CPU time | 2.55 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:22 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1100145213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_t x_rx_disruption.1100145213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.856515595 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 469399667 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=856515595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_t x_rx_disruption.856515595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.449430457 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 613485017 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=449430457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_t x_rx_disruption.449430457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.2158618039 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 583901397 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2158618039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.2158618039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.1671924981 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 523812705 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1671924981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.1671924981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.1265521680 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 450116086 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1265521680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_ tx_rx_disruption.1265521680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.1712107328 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 630440934 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1712107328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_ tx_rx_disruption.1712107328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.2804902499 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 539372981 ps |
| CPU time | 1.78 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2804902499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.2804902499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.3866620828 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 609988353 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3866620828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_ tx_rx_disruption.3866620828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.3547103343 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 560038910 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3547103343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.3547103343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.2613243662 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 590060505 ps |
| CPU time | 1.82 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2613243662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.2613243662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.1250133840 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 36499801 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1250133840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.1250133840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.3036272453 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 4788993981 ps |
| CPU time | 6.89 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:26 PM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036272453 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.3036272453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.2383518389 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 20385910439 ps |
| CPU time | 26.06 seconds |
| Started | Sep 01 12:55:18 PM UTC 24 |
| Finished | Sep 01 12:55:46 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2383518389 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.2383518389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.3149435106 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 23443410570 ps |
| CPU time | 29.46 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:55:49 PM UTC 24 |
| Peak memory | 227400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149435106 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.3149435106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.3313233595 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 169080914 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:55:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313233595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.3313233595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.2470056701 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 158001014 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:55:21 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470056701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_bitstuff_err.2470056701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.3314439007 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 433103381 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:55:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314439007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.3314439007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.1224676123 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 756068804 ps |
| CPU time | 2.46 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:55:22 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224676123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.1224676123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.2889086438 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 35385536294 ps |
| CPU time | 59.56 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:56:20 PM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889086438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_address.2889086438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.1887425812 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 9730639605 ps |
| CPU time | 54.15 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:56:15 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1887425812 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.1887425812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.3568857389 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 664803943 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:55:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3568857389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.3568857389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.2871225389 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 155105865 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:55:21 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871225389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.2871225389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_enable.3313709997 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 44483395 ps |
| CPU time | 0.69 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:55:21 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313709997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.3313709997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.3892543548 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 1005693869 ps |
| CPU time | 2.51 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:39 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892543548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.3892543548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.3541696478 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 285455614 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:37 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541696478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.3541696478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.3571704437 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 244621077 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:37 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571704437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_fifo_levels.3571704437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.4160098896 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 536171911 ps |
| CPU time | 3.02 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:39 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160098896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.4160098896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.2419396044 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 175024151 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:37 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419396044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.2419396044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.1954483814 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 157085716 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954483814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.1954483814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.1614017429 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 233666581 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:37 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1614017429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_trans.1614017429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.3636523410 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 2305742403 ps |
| CPU time | 55.42 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:56:32 PM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636523410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.3636523410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.556140444 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 12797378192 ps |
| CPU time | 80.71 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:56:58 PM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=556140444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.556140444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.675018256 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 187619425 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=675018256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_link_in_err.675018256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.3920133122 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 14120181984 ps |
| CPU time | 18.21 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:55 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920133122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.3920133122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.677851739 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 11191575325 ps |
| CPU time | 14.8 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=677851739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_suspend.677851739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.1187771399 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 2865402334 ps |
| CPU time | 72.77 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:56:50 PM UTC 24 |
| Peak memory | 227636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187771399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.1187771399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.717665618 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 3151517017 ps |
| CPU time | 77.36 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:56:55 PM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=717665618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.717665618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.940511509 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 242529314 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=940511509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.940511509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.2602480910 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 197899314 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2602480910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.2602480910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.4098522653 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 2784774453 ps |
| CPU time | 68.78 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:56:46 PM UTC 24 |
| Peak memory | 229740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098522653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.4098522653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.3834308925 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 2480841146 ps |
| CPU time | 21.61 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:59 PM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834308925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.3834308925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.3507543310 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 150047672 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 12:55:35 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507543310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.3507543310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.58614133 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 149886711 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=58614133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.58614133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.264935700 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 255157650 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:39 PM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=264935700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_nak_trans.264935700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.897094843 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 198938018 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=897094843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_out_iso.897094843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.2876476067 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 165158738 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876476067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_out_stall.2876476067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.1869111551 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 171688678 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869111551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.1869111551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.2191200343 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 163907345 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191200343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.2191200343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.2274238491 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 218942756 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:39 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2274238491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.2274238491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.1688783551 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 173344809 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688783551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.1688783551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.2808944050 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 45043528 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808944050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.2808944050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.1483708712 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 7355505866 ps |
| CPU time | 18.74 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:56 PM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1483708712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.1483708712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.3015527747 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 156231250 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015527747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_pkt_received.3015527747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.1078601136 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 212071214 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078601136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.1078601136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.3239416268 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 170274753 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239416268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.3239416268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.4215866028 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 220684037 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:38 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4215866028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.4215866028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.609524568 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 182370573 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:55:36 PM UTC 24 |
| Finished | Sep 01 12:55:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=609524568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_rx_crc_err.609524568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.3459643157 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 267883702 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3459643157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_rx_full.3459643157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.1770750528 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 144915220 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:51 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1770750528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.1770750528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.887585364 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 154402748 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=887585364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 22.usbdev_setup_trans_ignored.887585364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.207956906 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 208089684 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=207956906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.207956906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.753532703 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 2430026268 ps |
| CPU time | 20.61 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:56:12 PM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=753532703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.753532703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.2041923877 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 149871504 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041923877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.2041923877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.3084398735 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 156002297 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084398735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.3084398735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.2371066481 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 1299841182 ps |
| CPU time | 3.32 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:54 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2371066481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.2371066481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.887452866 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 2809988527 ps |
| CPU time | 25.36 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:56:17 PM UTC 24 |
| Peak memory | 227580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=887452866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_streaming_out.887452866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.3543217250 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 4241048489 ps |
| CPU time | 24.25 seconds |
| Started | Sep 01 12:55:19 PM UTC 24 |
| Finished | Sep 01 12:55:44 PM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543217250 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.3543217250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.1913986823 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 599372537 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:53 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1913986823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.1913986823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.4235825421 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 389640197 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4235825421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_ tx_rx_disruption.4235825421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.3022185021 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 471815331 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3022185021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.3022185021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.2555338940 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 583255333 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2555338940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.2555338940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.2077377260 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 605835309 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 214192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2077377260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_ tx_rx_disruption.2077377260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.2993630385 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 421483760 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2993630385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.2993630385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.1280540345 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 616464854 ps |
| CPU time | 1.9 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1280540345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.1280540345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.462161560 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 537915278 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=462161560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_t x_rx_disruption.462161560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.1840835527 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 624461627 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1840835527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_ tx_rx_disruption.1840835527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.3327993654 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 496188076 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3327993654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.3327993654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.1448098749 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 48614862 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:28 PM UTC 24 |
| Peak memory | 215292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448098749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.1448098749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.1532261369 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 5122649580 ps |
| CPU time | 8.41 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:56:00 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532261369 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.1532261369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.228272751 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 16134959788 ps |
| CPU time | 19.39 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:56:11 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=228272751 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.228272751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.1729060520 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 25430028813 ps |
| CPU time | 36.83 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:56:28 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729060520 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.1729060520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.1097597184 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 182925928 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1097597184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_av_buffer.1097597184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.4040790950 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 153729937 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040790950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_bitstuff_err.4040790950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.4029743438 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 270513183 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4029743438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 23.usbdev_data_toggle_clear.4029743438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.3977110419 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 735554437 ps |
| CPU time | 2.08 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:53 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977110419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.3977110419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.1734284656 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 44121228947 ps |
| CPU time | 79.56 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:57:12 PM UTC 24 |
| Peak memory | 217652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1734284656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.1734284656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.2034419174 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 168080344 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:53 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034419174 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.2034419174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.73145503 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 809711764 ps |
| CPU time | 2.31 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:54 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=73145503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disable_endpoint.73145503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.505248078 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 211324629 ps |
| CPU time | 1 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:53 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=505248078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_disconnected.505248078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_enable.1862971875 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 46152803 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:55:52 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1862971875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.1862971875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.3304066709 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 959463394 ps |
| CPU time | 3.06 seconds |
| Started | Sep 01 12:55:51 PM UTC 24 |
| Finished | Sep 01 12:55:55 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304066709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.3304066709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.2055481333 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 230124017 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:55:51 PM UTC 24 |
| Finished | Sep 01 12:55:53 PM UTC 24 |
| Peak memory | 214636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055481333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.2055481333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.3544389378 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 257325015 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:55:51 PM UTC 24 |
| Finished | Sep 01 12:55:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544389378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_fifo_levels.3544389378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.3556321696 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 380313277 ps |
| CPU time | 2.28 seconds |
| Started | Sep 01 12:55:51 PM UTC 24 |
| Finished | Sep 01 12:55:54 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556321696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.3556321696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.392719373 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 277826926 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:56:08 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=392719373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.392719373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.1913436433 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 182211146 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:56:08 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913436433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_stall.1913436433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.869888702 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 243131184 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:56:08 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=869888702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_in_trans.869888702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.3464584831 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 4588250609 ps |
| CPU time | 113.21 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:58:01 PM UTC 24 |
| Peak memory | 231208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464584831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.3464584831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.3329748226 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 7244585690 ps |
| CPU time | 39.29 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329748226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.3329748226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.3848865243 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 190328473 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:56:08 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3848865243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.3848865243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.136109969 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 14714599014 ps |
| CPU time | 19.75 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:56:27 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=136109969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_link_resume.136109969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.2918533227 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 9501913835 ps |
| CPU time | 12.94 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:56:21 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918533227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_link_suspend.2918533227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.2820002495 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 4502785569 ps |
| CPU time | 110.68 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:57:59 PM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820002495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.2820002495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.864060397 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 4126273280 ps |
| CPU time | 105.64 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=864060397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.864060397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.1931893897 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 310752206 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931893897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.1931893897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.1421801916 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 254132019 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:56:06 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421801916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.1421801916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.2780751039 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 2009261412 ps |
| CPU time | 48.63 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:57 PM UTC 24 |
| Peak memory | 229532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780751039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.2780751039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.635378852 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 2267418835 ps |
| CPU time | 19.45 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:27 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=635378852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.635378852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.2019149366 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 168726682 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019149366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.2019149366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.2883269541 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 149887095 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883269541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.2883269541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.601754951 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 183713834 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=601754951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_nak_trans.601754951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.1213684807 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 185958366 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213684807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.1213684807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.1139359875 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 139437528 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1139359875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.1139359875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.1098743447 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 163202627 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098743447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_out_trans_nak.1098743447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.3256854614 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 216671114 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256854614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.3256854614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.422635509 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 232512988 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=422635509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.422635509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.467138073 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 151240259 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=467138073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.467138073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.466304779 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 40254296 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=466304779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_phy_pins_sense.466304779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.1964971620 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 20792912433 ps |
| CPU time | 51.67 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:57:00 PM UTC 24 |
| Peak memory | 231768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1964971620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_pkt_buffer.1964971620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.443722322 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 164208500 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=443722322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_pkt_received.443722322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.4089501551 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 168304157 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089501551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.4089501551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.638725538 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 235542332 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=638725538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_random_length_in_transaction.638725538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.1130557671 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 152374109 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:10 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130557671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.1130557671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.3911848810 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 175291049 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:10 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911848810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.3911848810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.2905318390 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 151722852 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905318390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.2905318390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.2099764286 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 183079879 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:56:07 PM UTC 24 |
| Finished | Sep 01 12:56:09 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099764286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.2099764286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.2543672953 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 268913067 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2543672953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.2543672953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.3384890362 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 3680927941 ps |
| CPU time | 89.42 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:57:57 PM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3384890362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.3384890362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.416647016 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 179287863 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:27 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=416647016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.416647016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.2625930741 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 156669423 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:27 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625930741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.2625930741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.3233461306 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 1113625854 ps |
| CPU time | 2.61 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:30 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3233461306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.3233461306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.800669707 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 3185367935 ps |
| CPU time | 80.56 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:57:48 PM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=800669707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_streaming_out.800669707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.2931316711 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 1524873926 ps |
| CPU time | 11.67 seconds |
| Started | Sep 01 12:55:50 PM UTC 24 |
| Finished | Sep 01 12:56:03 PM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931316711 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.2931316711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.2480865404 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 472731185 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:28 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2480865404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_t x_rx_disruption.2480865404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.1924529179 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 627734922 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1924529179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_ tx_rx_disruption.1924529179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.3837723785 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 424188930 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3837723785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.3837723785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.1420474307 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 585068501 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1420474307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_ tx_rx_disruption.1420474307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.3729676494 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 567167632 ps |
| CPU time | 1.85 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:59 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3729676494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.3729676494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.709061946 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 469014306 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=709061946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_t x_rx_disruption.709061946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.1192133057 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 657886852 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1192133057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.1192133057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.1840682456 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 576783122 ps |
| CPU time | 1.77 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1840682456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_ tx_rx_disruption.1840682456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.3953023225 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 552767382 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 01:24:55 PM UTC 24 |
| Finished | Sep 01 01:24:58 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3953023225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.3953023225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.2246265396 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 463472497 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:26:15 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2246265396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.2246265396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.147044010 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 539097934 ps |
| CPU time | 1.94 seconds |
| Started | Sep 01 01:26:15 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=147044010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_t x_rx_disruption.147044010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.1113429204 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 91724322 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 12:56:46 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1113429204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.1113429204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.46646278 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 4942176384 ps |
| CPU time | 7.98 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:35 PM UTC 24 |
| Peak memory | 226188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=46646278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.46646278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.385457696 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 16357460411 ps |
| CPU time | 17.74 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:45 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=385457696 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.385457696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.1302457700 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 24940202045 ps |
| CPU time | 34.37 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:57:02 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302457700 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.1302457700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.1019980464 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 193960541 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1019980464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.1019980464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.3083949425 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 148742810 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083949425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.3083949425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.2925993775 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 283092803 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:29 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925993775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 24.usbdev_data_toggle_clear.2925993775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.4266000480 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 544369601 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:29 PM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4266000480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.4266000480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.3495601801 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 39289805418 ps |
| CPU time | 63.74 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:57:31 PM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495601801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.3495601801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.3860087811 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 1174085524 ps |
| CPU time | 8.19 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:35 PM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3860087811 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.3860087811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.18642517 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 745166433 ps |
| CPU time | 1.98 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:29 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=18642517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_disable_endpoint.18642517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.1679036698 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 137014650 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:28 PM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1679036698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.1679036698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_enable.403623020 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 36029193 ps |
| CPU time | 0.67 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:28 PM UTC 24 |
| Peak memory | 214940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=403623020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_enable.403623020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.2880676867 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 869429108 ps |
| CPU time | 2.87 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:30 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880676867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.2880676867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.641602269 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 634727021 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:29 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=641602269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.641602269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.1700552367 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 276939656 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700552367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_fifo_levels.1700552367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.269637473 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 288810100 ps |
| CPU time | 2.8 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:30 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269637473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_fifo_rst.269637473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.3400366266 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 167867733 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:29 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400366266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.3400366266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.3709730451 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 139559871 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:29 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709730451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_stall.3709730451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.2206680234 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 209763974 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:29 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206680234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.2206680234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.490684746 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 2543848240 ps |
| CPU time | 21.74 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:49 PM UTC 24 |
| Peak memory | 227764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=490684746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.490684746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.2436749029 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 4326667557 ps |
| CPU time | 45.69 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:57:14 PM UTC 24 |
| Peak memory | 217328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2436749029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.2436749029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.1037893396 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 230171662 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:56:29 PM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1037893396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_in_err.1037893396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.1817392401 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 28041540784 ps |
| CPU time | 52.64 seconds |
| Started | Sep 01 12:56:26 PM UTC 24 |
| Finished | Sep 01 12:57:21 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1817392401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_resume.1817392401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.53713112 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 9344347100 ps |
| CPU time | 11.37 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:57 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=53713112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_suspend.53713112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.2179448996 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 3156905010 ps |
| CPU time | 27.42 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:57:14 PM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179448996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.2179448996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.1852664056 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 2334721486 ps |
| CPU time | 54.93 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:57:41 PM UTC 24 |
| Peak memory | 227724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852664056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.1852664056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.2997310136 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 256033989 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997310136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.2997310136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.1475433566 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 193184879 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1475433566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.1475433566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.3030158144 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 2600769858 ps |
| CPU time | 61.82 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:57:48 PM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3030158144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.3030158144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.806281608 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 1718997550 ps |
| CPU time | 14.31 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:57:01 PM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=806281608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.806281608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.701747225 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 170296106 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=701747225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.701747225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.3106506601 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 167066351 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106506601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.3106506601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.580591970 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 184458621 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580591970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_out_iso.580591970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.1479735112 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 238430440 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479735112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.1479735112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.1003019188 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 208771032 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003019188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.1003019188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.667348133 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 158817012 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=667348133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pending_in_trans.667348133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.3608277190 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 190580900 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608277190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.3608277190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.545176804 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 147174881 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=545176804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.545176804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.889697506 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 35422686 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:47 PM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889697506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_phy_pins_sense.889697506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.3490150021 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 16561609015 ps |
| CPU time | 41.22 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:57:28 PM UTC 24 |
| Peak memory | 234132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3490150021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.3490150021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.2057474607 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 154101511 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 214820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057474607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_pkt_received.2057474607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.3945307867 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 236530132 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945307867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.3945307867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.1692122739 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 236959072 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692122739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.1692122739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.163481498 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 181827759 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=163481498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.163481498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.4192866664 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 170711144 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4192866664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.4192866664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.2448974197 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 350374597 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448974197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_rx_full.2448974197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.618429429 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 156321454 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=618429429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_setup_stage.618429429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.3950729294 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 213580487 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950729294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.3950729294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.2830670221 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 227441471 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:56:45 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2830670221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.2830670221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.2424858 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 2636307224 ps |
| CPU time | 23.18 seconds |
| Started | Sep 01 12:56:46 PM UTC 24 |
| Finished | Sep 01 12:57:11 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2424858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_t raffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.2424858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.3035909802 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 224467840 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:56:46 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3035909802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.3035909802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.2288709986 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 190850932 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 12:56:46 PM UTC 24 |
| Finished | Sep 01 12:56:48 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2288709986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.2288709986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.1571637276 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 651053275 ps |
| CPU time | 1.98 seconds |
| Started | Sep 01 12:56:46 PM UTC 24 |
| Finished | Sep 01 12:56:49 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571637276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.1571637276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.3449780752 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 2215856489 ps |
| CPU time | 54.57 seconds |
| Started | Sep 01 12:56:46 PM UTC 24 |
| Finished | Sep 01 12:57:42 PM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449780752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_streaming_out.3449780752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.3514082173 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 1559911997 ps |
| CPU time | 31.83 seconds |
| Started | Sep 01 12:56:25 PM UTC 24 |
| Finished | Sep 01 12:56:59 PM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514082173 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.3514082173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.2390450014 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 455406441 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:56:46 PM UTC 24 |
| Finished | Sep 01 12:56:49 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2390450014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.2390450014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.1743766456 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 538122614 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:26:15 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1743766456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.1743766456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.2530605898 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 505997424 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:26:15 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2530605898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_ tx_rx_disruption.2530605898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.3395912 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 486692343 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:26:15 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3395912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_tx_ rx_disruption.3395912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.4218562775 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 590318666 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:26:15 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4218562775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_ tx_rx_disruption.4218562775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.2989021295 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 631565751 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 01:26:15 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2989021295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.2989021295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.1127579045 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 665092979 ps |
| CPU time | 1.89 seconds |
| Started | Sep 01 01:26:15 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1127579045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_ tx_rx_disruption.1127579045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.3160492219 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 577549347 ps |
| CPU time | 1.92 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3160492219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.3160492219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.1664673668 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 564363772 ps |
| CPU time | 1.82 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1664673668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.1664673668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.753320625 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 536423304 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=753320625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_t x_rx_disruption.753320625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.2695378020 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 30859583 ps |
| CPU time | 0.62 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2695378020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.2695378020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.3520706301 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 11227334449 ps |
| CPU time | 12.77 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:19 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520706301 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.3520706301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.2178010874 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 14347938217 ps |
| CPU time | 16.94 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:24 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2178010874 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.2178010874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.1133902032 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 28721148702 ps |
| CPU time | 40.7 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:48 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1133902032 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.1133902032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.4001148130 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 219073077 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:08 PM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4001148130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.4001148130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.534235013 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 165305119 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=534235013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_bitstuff_err.534235013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.2539955033 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 502918947 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:08 PM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539955033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 25.usbdev_data_toggle_clear.2539955033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.3972626358 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 760832317 ps |
| CPU time | 2.54 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3972626358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.3972626358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.1974315169 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 37426366828 ps |
| CPU time | 54.97 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:58:02 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974315169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.1974315169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.2757844514 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 2933105816 ps |
| CPU time | 21.67 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:29 PM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2757844514 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.2757844514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.3347835787 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 1313996020 ps |
| CPU time | 2.68 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:10 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347835787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.3347835787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.3221421523 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 139389255 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:08 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3221421523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_disconnected.3221421523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_enable.3355074337 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 43302638 ps |
| CPU time | 0.61 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:08 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3355074337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_enable.3355074337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.1161550809 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 809669619 ps |
| CPU time | 2.46 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:10 PM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1161550809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.1161550809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.32246049 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 497210855 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=32246049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.32246049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.72826981 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 271383379 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:08 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=72826981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_fifo_levels.72826981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.3367463672 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 242664662 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367463672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_fifo_rst.3367463672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.1813843642 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 193761572 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:08 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1813843642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.1813843642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.586242524 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 175897385 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:08 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=586242524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_in_stall.586242524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.3621671955 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 221507821 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:08 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621671955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.3621671955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.1459671692 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 3525485897 ps |
| CPU time | 83.28 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:58:31 PM UTC 24 |
| Peak memory | 229760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459671692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.1459671692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.2583765295 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 6941192894 ps |
| CPU time | 69.61 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:58:18 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2583765295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.2583765295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.2778702384 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 189811097 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:08 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778702384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.2778702384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.3031862582 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 8449791815 ps |
| CPU time | 11.85 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:20 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3031862582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.3031862582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.1194917864 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 5703752808 ps |
| CPU time | 8.44 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:16 PM UTC 24 |
| Peak memory | 227500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194917864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.1194917864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.1444348082 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 3728196392 ps |
| CPU time | 24.02 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:32 PM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444348082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.1444348082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.1700566493 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 1882360990 ps |
| CPU time | 17.02 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:25 PM UTC 24 |
| Peak memory | 227232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700566493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.1700566493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.4171275270 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 294367621 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4171275270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.4171275270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.193999386 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 190843666 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=193999386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.193999386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.4147462753 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 1866436797 ps |
| CPU time | 43.37 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:52 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147462753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.4147462753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.425631956 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 157417160 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:57:07 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=425631956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.425631956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.1490096253 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 148986835 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 12:57:07 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490096253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.1490096253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.3996738596 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 200911770 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:57:07 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 217068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3996738596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.3996738596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.1766059293 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 180833167 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:57:07 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1766059293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_out_iso.1766059293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.156808522 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 167137093 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 12:57:07 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=156808522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_out_stall.156808522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.1796102409 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 182212297 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 12:57:07 PM UTC 24 |
| Finished | Sep 01 12:57:09 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796102409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.1796102409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.1607885690 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 144279042 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:29 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1607885690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_pending_in_trans.1607885690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.1494942910 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 236462615 ps |
| CPU time | 1 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:29 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494942910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.1494942910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.3368405492 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 136517741 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:29 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3368405492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.3368405492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.132792237 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 54963397 ps |
| CPU time | 0.71 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:29 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=132792237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_phy_pins_sense.132792237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.3667932196 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 10861563272 ps |
| CPU time | 26.31 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:55 PM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3667932196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_pkt_buffer.3667932196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.1371712867 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 244713457 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:29 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371712867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.1371712867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.798631025 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 167849043 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:29 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=798631025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_pkt_sent.798631025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.3644600696 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 208374287 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3644600696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.3644600696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.3132192854 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 190711241 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:29 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132192854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.3132192854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.2629209787 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 185361667 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2629209787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.2629209787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.2310210468 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 252328175 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:57:27 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 214936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310210468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.2310210468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.3971150769 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 153226721 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971150769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.3971150769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.512713645 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 154037541 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=512713645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 25.usbdev_setup_trans_ignored.512713645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.440267422 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 294113874 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=440267422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.440267422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.1410312800 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 2385955177 ps |
| CPU time | 16.19 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:45 PM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410312800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.1410312800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.3790006697 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 186787991 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3790006697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.3790006697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.1509894850 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 148114806 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509894850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.1509894850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.623347387 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 443409809 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=623347387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_stream_len_max.623347387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.3198178599 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 2451323736 ps |
| CPU time | 17.11 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:46 PM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198178599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_streaming_out.3198178599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.395171939 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 4318259384 ps |
| CPU time | 34.82 seconds |
| Started | Sep 01 12:57:06 PM UTC 24 |
| Finished | Sep 01 12:57:42 PM UTC 24 |
| Peak memory | 217508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=395171939 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.395171939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.522213482 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 454681183 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=522213482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_tx _rx_disruption.522213482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.2862453526 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 632850421 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2862453526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_ tx_rx_disruption.2862453526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.3475866124 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 441752719 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3475866124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.3475866124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.2265872107 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 551997130 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2265872107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_ tx_rx_disruption.2265872107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.793148817 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 496781790 ps |
| CPU time | 1.89 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=793148817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_t x_rx_disruption.793148817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.344986865 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 515682901 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=344986865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_t x_rx_disruption.344986865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.1840848299 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 532097301 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1840848299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.1840848299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.1297080681 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 642086197 ps |
| CPU time | 2.36 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1297080681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_ tx_rx_disruption.1297080681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.1974929622 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 463846914 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1974929622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_ tx_rx_disruption.1974929622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.165557839 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 596233400 ps |
| CPU time | 1.78 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=165557839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_t x_rx_disruption.165557839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.2080923108 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 528893922 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:18 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2080923108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_ tx_rx_disruption.2080923108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.3627538088 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 30838506 ps |
| CPU time | 0.64 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:19 PM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627538088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.3627538088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.3390127011 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 11549285443 ps |
| CPU time | 16.51 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:46 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390127011 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.3390127011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.1202872619 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 13731067663 ps |
| CPU time | 18.47 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:48 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1202872619 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.1202872619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.504413252 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 29790943993 ps |
| CPU time | 32.52 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:58:02 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=504413252 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.504413252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.3135988633 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 189308972 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:31 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135988633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.3135988633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.999148900 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 149464119 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=999148900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_bitstuff_err.999148900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.1359467889 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 321512771 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359467889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 26.usbdev_data_toggle_clear.1359467889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.160495718 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 308365137 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:31 PM UTC 24 |
| Peak memory | 216864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=160495718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.160495718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.2065384060 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 22932433975 ps |
| CPU time | 41.13 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:58:11 PM UTC 24 |
| Peak memory | 217136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065384060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.2065384060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.1550119560 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 1503736786 ps |
| CPU time | 8.97 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:38 PM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550119560 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.1550119560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.2858941792 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 735915496 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2858941792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.2858941792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.2346844333 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 140263510 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:31 PM UTC 24 |
| Peak memory | 214684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346844333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.2346844333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_enable.1674381354 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 31624160 ps |
| CPU time | 0.67 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:57:30 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674381354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.1674381354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.2334421584 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 841516872 ps |
| CPU time | 2.14 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 216292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2334421584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.2334421584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.1559100984 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 261830503 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:53 PM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559100984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_fifo_levels.1559100984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.2151323315 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 222150052 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151323315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.2151323315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.1185442201 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 276039474 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:53 PM UTC 24 |
| Peak memory | 227192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1185442201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.1185442201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.3579638317 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 141782348 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579638317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.3579638317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.1711864886 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 235075150 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711864886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.1711864886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.3949725942 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 3095447848 ps |
| CPU time | 26.49 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:58:19 PM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949725942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.3949725942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.2945539897 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 4823489432 ps |
| CPU time | 48.71 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:58:41 PM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2945539897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.2945539897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.1905061901 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 203084291 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905061901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.1905061901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.1211324209 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 9431717179 ps |
| CPU time | 12.79 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:58:05 PM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211324209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.1211324209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.2673384456 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 5103853525 ps |
| CPU time | 7.09 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:59 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673384456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_link_suspend.2673384456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.1010208909 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 4504392437 ps |
| CPU time | 28.3 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010208909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.1010208909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.2863001232 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 2290140837 ps |
| CPU time | 55.86 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2863001232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.2863001232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.889627045 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 286307593 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=889627045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.889627045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.3402834958 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 193659639 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:53 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3402834958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.3402834958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.1155766589 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 4128998233 ps |
| CPU time | 101.31 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:59:35 PM UTC 24 |
| Peak memory | 229168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155766589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.1155766589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.3186393265 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 177755886 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186393265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.3186393265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.3981092610 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 151182383 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981092610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.3981092610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.985564609 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 202595042 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 214776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=985564609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_nak_trans.985564609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.3926746000 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 168389154 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:53 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926746000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.3926746000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.1111528470 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 169953181 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1111528470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_out_stall.1111528470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.2367576199 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 157826970 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:57:51 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367576199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.2367576199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.477176989 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 188380031 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477176989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pending_in_trans.477176989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.3953823800 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 234950210 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3953823800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.3953823800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.1642182959 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 172487082 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1642182959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.1642182959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.1497158735 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 70098328 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497158735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.1497158735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.2534573981 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 12237756053 ps |
| CPU time | 29.68 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:58:23 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534573981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.2534573981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.3431834707 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 163506632 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431834707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.3431834707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.4047510137 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 238654396 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4047510137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.4047510137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.1304821334 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 257770649 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304821334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.1304821334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.2572354302 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 179690040 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572354302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.2572354302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.3490993365 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 173473942 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3490993365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.3490993365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.4075376461 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 282807328 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075376461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.4075376461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.1715790529 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 157759405 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715790529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.1715790529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.3960944113 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 173250066 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960944113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.3960944113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.947338671 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 207215620 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:57:52 PM UTC 24 |
| Finished | Sep 01 12:57:54 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=947338671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.947338671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.2872897966 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 2098324326 ps |
| CPU time | 48.06 seconds |
| Started | Sep 01 12:58:17 PM UTC 24 |
| Finished | Sep 01 12:59:07 PM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2872897966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.2872897966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.1723308018 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 198381667 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 12:58:17 PM UTC 24 |
| Finished | Sep 01 12:58:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723308018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.1723308018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.2269813139 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 175865623 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 12:58:17 PM UTC 24 |
| Finished | Sep 01 12:58:20 PM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269813139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.2269813139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.3042468296 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 835194883 ps |
| CPU time | 2.12 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042468296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.3042468296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.1914660527 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 2344712189 ps |
| CPU time | 18.96 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:38 PM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1914660527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.1914660527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.3061471408 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 4996713697 ps |
| CPU time | 30.4 seconds |
| Started | Sep 01 12:57:28 PM UTC 24 |
| Finished | Sep 01 12:58:00 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3061471408 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.3061471408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.3742081122 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 511600104 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3742081122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.3742081122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.1371895494 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 556157773 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1371895494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.1371895494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.2488072019 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 489836081 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2488072019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.2488072019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.2777721725 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 583978227 ps |
| CPU time | 1.85 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2777721725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.2777721725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.2222884704 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 535825309 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2222884704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_ tx_rx_disruption.2222884704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.129847987 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 639885063 ps |
| CPU time | 2.2 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=129847987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_t x_rx_disruption.129847987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.3237624701 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 559568820 ps |
| CPU time | 1.96 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3237624701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.3237624701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.1549833927 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 472728035 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1549833927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.1549833927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.3852424516 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 492573448 ps |
| CPU time | 1.82 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3852424516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.3852424516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.935619973 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 621844222 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=935619973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_t x_rx_disruption.935619973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.217441268 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 444145274 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=217441268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_t x_rx_disruption.217441268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.474975639 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 67115410 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=474975639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.474975639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.2854284519 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 9361712477 ps |
| CPU time | 12.53 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:32 PM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854284519 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.2854284519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.1292606227 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 15758453815 ps |
| CPU time | 20.23 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:39 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292606227 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.1292606227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.3226844968 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 30910500727 ps |
| CPU time | 37.07 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:56 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226844968 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.3226844968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.99811880 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 168588840 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:20 PM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=99811880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_av_buffer.99811880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.3912881056 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 192560806 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:20 PM UTC 24 |
| Peak memory | 214764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912881056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_bitstuff_err.3912881056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.3621892768 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 386232567 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621892768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.3621892768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.1315673619 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 1057429564 ps |
| CPU time | 2.7 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:22 PM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315673619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.1315673619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.258341807 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 15045061109 ps |
| CPU time | 21.71 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:41 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=258341807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_device_address.258341807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.3700180502 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 2190517729 ps |
| CPU time | 13.01 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:32 PM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700180502 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.3700180502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.2165933969 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 802513416 ps |
| CPU time | 1.81 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165933969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.2165933969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.4240947731 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 139448993 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:20 PM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4240947731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.4240947731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_enable.3753883560 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 35123670 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:20 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753883560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_enable.3753883560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.2474143167 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 1022963993 ps |
| CPU time | 2.56 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:22 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2474143167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.2474143167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.2353806409 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 830574459 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353806409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.2353806409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.1515031907 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 263662827 ps |
| CPU time | 2.45 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:22 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515031907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_fifo_rst.1515031907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.842167301 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 231366942 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=842167301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.842167301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.3598233627 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 139679900 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598233627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.3598233627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.1505119327 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 230145268 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505119327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.1505119327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.4107884923 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 2882006156 ps |
| CPU time | 20.22 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:40 PM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4107884923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.4107884923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.23866019 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 13022963484 ps |
| CPU time | 139.53 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 01:00:40 PM UTC 24 |
| Peak memory | 219760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=23866019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.23866019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.2928615065 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 265311832 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928615065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.2928615065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.3744462843 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 4172808176 ps |
| CPU time | 6.41 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:26 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744462843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_link_suspend.3744462843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.729918353 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 3079389667 ps |
| CPU time | 28.7 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 234272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=729918353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.729918353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.3304338258 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 2179222203 ps |
| CPU time | 52.03 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:59:12 PM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304338258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.3304338258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.1445881744 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 241873563 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445881744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.1445881744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.1473226264 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 210451215 ps |
| CPU time | 1.23 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1473226264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.1473226264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.1233083466 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 2830988715 ps |
| CPU time | 65.11 seconds |
| Started | Sep 01 12:58:19 PM UTC 24 |
| Finished | Sep 01 12:59:25 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1233083466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.1233083466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.1559700929 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 203230564 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:58:19 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559700929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.1559700929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.2415415280 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 222986931 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:58:19 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415415280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.2415415280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.4106878916 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 181254651 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:58:19 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106878916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.4106878916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.3637690357 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 178974170 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:58:19 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637690357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.3637690357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.1056911338 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 203573800 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:58:19 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056911338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.1056911338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.931782174 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 261906018 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:58:19 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=931782174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_out_trans_nak.931782174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.3662410868 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 158931780 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 12:58:19 PM UTC 24 |
| Finished | Sep 01 12:58:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3662410868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.3662410868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.3643041705 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 188577982 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 12:58:46 PM UTC 24 |
| Finished | Sep 01 12:58:48 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643041705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.3643041705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.3764085121 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 147348293 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 12:58:46 PM UTC 24 |
| Finished | Sep 01 12:58:48 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764085121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.3764085121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.3235324687 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 40714366 ps |
| CPU time | 0.61 seconds |
| Started | Sep 01 12:58:46 PM UTC 24 |
| Finished | Sep 01 12:58:48 PM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3235324687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.3235324687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.2286900271 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 17526667380 ps |
| CPU time | 42.38 seconds |
| Started | Sep 01 12:58:46 PM UTC 24 |
| Finished | Sep 01 12:59:30 PM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286900271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.2286900271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.3445442706 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 194062368 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 12:58:46 PM UTC 24 |
| Finished | Sep 01 12:58:48 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445442706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_pkt_received.3445442706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.2785413107 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 220374315 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785413107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_pkt_sent.2785413107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.3171296036 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 246207360 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171296036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_random_length_in_transaction.3171296036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.1368387170 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 165711099 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:48 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1368387170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.1368387170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.2585498011 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 137253546 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:48 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585498011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.2585498011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.4197541414 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 421888009 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197541414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.4197541414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.1301721916 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 149658504 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301721916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_setup_stage.1301721916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.2635629491 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 148943583 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635629491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.2635629491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.1806395889 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 252267914 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806395889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.1806395889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.2680804042 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 2302020111 ps |
| CPU time | 20.38 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:59:08 PM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680804042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.2680804042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.1728582222 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 150031306 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728582222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.1728582222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.1817731585 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 186185891 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1817731585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.1817731585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.3624219893 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 355649079 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:50 PM UTC 24 |
| Peak memory | 215436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3624219893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.3624219893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.3187416939 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 2259830528 ps |
| CPU time | 15.39 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:59:04 PM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187416939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.3187416939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.3614085311 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 2930283885 ps |
| CPU time | 21.1 seconds |
| Started | Sep 01 12:58:18 PM UTC 24 |
| Finished | Sep 01 12:58:41 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3614085311 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.3614085311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.3530708286 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 449369169 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:50 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3530708286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_t x_rx_disruption.3530708286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.1007743047 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 437006144 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1007743047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.1007743047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.3941291331 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 445517420 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3941291331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.3941291331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.2821851312 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 515365764 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2821851312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.2821851312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.1694690622 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 483979331 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1694690622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.1694690622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.1882918291 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 522610421 ps |
| CPU time | 1.77 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1882918291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_ tx_rx_disruption.1882918291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.3414089305 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 573081481 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3414089305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.3414089305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.1078441139 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 432766819 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1078441139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_ tx_rx_disruption.1078441139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.2884742662 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 522415390 ps |
| CPU time | 2.04 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2884742662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.2884742662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.3154549853 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 605839029 ps |
| CPU time | 1.92 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3154549853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_ tx_rx_disruption.3154549853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.309643670 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 583183535 ps |
| CPU time | 1.98 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=309643670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_t x_rx_disruption.309643670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.431853491 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 36652000 ps |
| CPU time | 0.62 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=431853491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.431853491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.3942938050 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 6597730458 ps |
| CPU time | 9.24 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:58 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3942938050 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.3942938050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.3975300921 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 19188080297 ps |
| CPU time | 20.48 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:59:09 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975300921 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.3975300921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.1882742995 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 28527832497 ps |
| CPU time | 35.97 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:59:25 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882742995 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.1882742995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.1666681834 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 192211050 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666681834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_av_buffer.1666681834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.2956580811 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 157987118 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2956580811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.2956580811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.2268363058 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 609469101 ps |
| CPU time | 1.86 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:50 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268363058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.2268363058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.3404761958 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 1021905756 ps |
| CPU time | 2.65 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:51 PM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404761958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.3404761958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.3451003500 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 45630005669 ps |
| CPU time | 71.94 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 01:00:01 PM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451003500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.3451003500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.2358019907 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 727390775 ps |
| CPU time | 12.73 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:59:01 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2358019907 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.2358019907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.530072273 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 620614862 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:50 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=530072273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_disable_endpoint.530072273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.3214155721 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 184627757 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3214155721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.3214155721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_enable.3216583721 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 98641063 ps |
| CPU time | 0.72 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:49 PM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216583721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.3216583721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.1132257183 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 955229261 ps |
| CPU time | 2.4 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:58:51 PM UTC 24 |
| Peak memory | 217132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132257183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.1132257183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.959849888 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 501186530 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:58:48 PM UTC 24 |
| Finished | Sep 01 12:58:50 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=959849888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.959849888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.3252960836 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 281984418 ps |
| CPU time | 1.87 seconds |
| Started | Sep 01 12:58:48 PM UTC 24 |
| Finished | Sep 01 12:58:51 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252960836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.3252960836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.1052709955 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 172537204 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:58:48 PM UTC 24 |
| Finished | Sep 01 12:58:50 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052709955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.1052709955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.3774119369 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 207947873 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 12:58:48 PM UTC 24 |
| Finished | Sep 01 12:58:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774119369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.3774119369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.2082483887 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 188345980 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 12:58:48 PM UTC 24 |
| Finished | Sep 01 12:58:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2082483887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.2082483887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.405177127 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 2385489790 ps |
| CPU time | 16 seconds |
| Started | Sep 01 12:58:48 PM UTC 24 |
| Finished | Sep 01 12:59:05 PM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=405177127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.405177127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.538689842 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 8137176766 ps |
| CPU time | 81.34 seconds |
| Started | Sep 01 12:58:48 PM UTC 24 |
| Finished | Sep 01 01:00:11 PM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=538689842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.538689842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.3543865330 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 153141644 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 12:58:48 PM UTC 24 |
| Finished | Sep 01 12:58:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543865330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.3543865330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.773161208 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 28637486567 ps |
| CPU time | 47.55 seconds |
| Started | Sep 01 12:59:18 PM UTC 24 |
| Finished | Sep 01 01:00:07 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=773161208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_link_resume.773161208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.1479856143 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 4873032397 ps |
| CPU time | 7.31 seconds |
| Started | Sep 01 12:59:18 PM UTC 24 |
| Finished | Sep 01 12:59:27 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479856143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.1479856143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.2335432185 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 3269259864 ps |
| CPU time | 78.38 seconds |
| Started | Sep 01 12:59:18 PM UTC 24 |
| Finished | Sep 01 01:00:39 PM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335432185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.2335432185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.3243693525 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 2510673842 ps |
| CPU time | 21.43 seconds |
| Started | Sep 01 12:59:18 PM UTC 24 |
| Finished | Sep 01 12:59:41 PM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243693525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.3243693525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.726350905 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 249799456 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:59:18 PM UTC 24 |
| Finished | Sep 01 12:59:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726350905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.726350905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.3598852177 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 205161412 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 12:59:18 PM UTC 24 |
| Finished | Sep 01 12:59:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598852177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.3598852177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.2049702043 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 2088986273 ps |
| CPU time | 13.99 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:34 PM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2049702043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.2049702043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.4215420540 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 151331654 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4215420540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.4215420540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.1764191351 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 143885074 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764191351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.1764191351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.2403892760 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 241639923 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403892760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.2403892760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.3083380691 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 202808260 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083380691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.3083380691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.1228768005 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 231209712 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1228768005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_out_stall.1228768005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.2500978851 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 170225760 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2500978851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_out_trans_nak.2500978851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.1750240677 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 157470776 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750240677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.1750240677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.2117851492 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 260975135 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117851492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.2117851492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.3491972475 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 147813033 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3491972475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.3491972475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.2779697319 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 100988395 ps |
| CPU time | 0.72 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 214884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779697319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.2779697319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.3595522975 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 22140479432 ps |
| CPU time | 54.58 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 01:00:15 PM UTC 24 |
| Peak memory | 227508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595522975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_pkt_buffer.3595522975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.856220418 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 207286460 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=856220418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_pkt_received.856220418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.166641592 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 153943951 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=166641592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_pkt_sent.166641592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.396513129 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 239857336 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=396513129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_random_length_in_transaction.396513129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.1980944120 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 157826961 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980944120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.1980944120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.2867405730 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 145388132 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867405730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_rx_crc_err.2867405730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.1019159692 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 245982010 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1019159692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_rx_full.1019159692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.2309182147 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 158235231 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 216560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309182147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_setup_stage.2309182147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.1182529710 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 153170494 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 216588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182529710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.1182529710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.1623148624 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 212139573 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623148624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.1623148624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.4270771466 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 4118742292 ps |
| CPU time | 26.59 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:47 PM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4270771466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.4270771466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.3857666330 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 156113714 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:21 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3857666330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.3857666330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.2361143553 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 180099123 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:22 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361143553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.2361143553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.2399747697 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 327731871 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399747697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.2399747697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.1407320659 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 2375086699 ps |
| CPU time | 56.16 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 01:00:17 PM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407320659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.1407320659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.2498956312 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 2203529405 ps |
| CPU time | 12.97 seconds |
| Started | Sep 01 12:58:47 PM UTC 24 |
| Finished | Sep 01 12:59:02 PM UTC 24 |
| Peak memory | 217200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2498956312 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.2498956312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.2147083504 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 505088823 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2147083504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.2147083504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.3095794471 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 621118825 ps |
| CPU time | 2 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3095794471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.3095794471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.2104619636 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 581425541 ps |
| CPU time | 1.85 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2104619636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_ tx_rx_disruption.2104619636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.905739916 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 483845760 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=905739916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_t x_rx_disruption.905739916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.2086705867 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 492975489 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2086705867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_ tx_rx_disruption.2086705867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.3513321432 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 517384716 ps |
| CPU time | 1.77 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3513321432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_ tx_rx_disruption.3513321432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.1068366138 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 404797470 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 01:26:16 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1068366138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_ tx_rx_disruption.1068366138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.3935239720 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 634580329 ps |
| CPU time | 1.81 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3935239720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_ tx_rx_disruption.3935239720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.2459488672 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 493057070 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 216520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2459488672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_ tx_rx_disruption.2459488672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.215997534 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 411837224 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 216276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=215997534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_t x_rx_disruption.215997534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.3368992740 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 473965617 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3368992740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.3368992740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.1279685770 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 37358162 ps |
| CPU time | 0.59 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279685770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.1279685770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.2122295626 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 4123437279 ps |
| CPU time | 5.83 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:27 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122295626 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.2122295626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.3308237100 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 19455528630 ps |
| CPU time | 21.99 seconds |
| Started | Sep 01 12:59:19 PM UTC 24 |
| Finished | Sep 01 12:59:43 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308237100 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.3308237100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.319743617 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 28570344456 ps |
| CPU time | 34.39 seconds |
| Started | Sep 01 12:59:20 PM UTC 24 |
| Finished | Sep 01 12:59:55 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=319743617 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.319743617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.2008339742 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 185722897 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 12:59:20 PM UTC 24 |
| Finished | Sep 01 12:59:22 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008339742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.2008339742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.1633213272 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 150106177 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 12:59:20 PM UTC 24 |
| Finished | Sep 01 12:59:22 PM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633213272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.1633213272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.994321908 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 333589242 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:59:20 PM UTC 24 |
| Finished | Sep 01 12:59:22 PM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=994321908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_data_toggle_clear.994321908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.230491839 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 897692780 ps |
| CPU time | 2.57 seconds |
| Started | Sep 01 12:59:20 PM UTC 24 |
| Finished | Sep 01 12:59:24 PM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=230491839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.230491839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.3305359695 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 43321783215 ps |
| CPU time | 66.5 seconds |
| Started | Sep 01 12:59:20 PM UTC 24 |
| Finished | Sep 01 01:00:28 PM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305359695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.3305359695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.1414722671 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 736193981 ps |
| CPU time | 4.57 seconds |
| Started | Sep 01 12:59:20 PM UTC 24 |
| Finished | Sep 01 12:59:26 PM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414722671 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.1414722671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.2805488203 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 907905218 ps |
| CPU time | 2.01 seconds |
| Started | Sep 01 12:59:20 PM UTC 24 |
| Finished | Sep 01 12:59:23 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805488203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.2805488203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.1199087477 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 173891783 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 12:59:20 PM UTC 24 |
| Finished | Sep 01 12:59:22 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199087477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.1199087477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_enable.1287803339 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 37191335 ps |
| CPU time | 0.64 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:48 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287803339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_enable.1287803339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.2708188891 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 801446937 ps |
| CPU time | 2.42 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2708188891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.2708188891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.3257915410 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 266462337 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3257915410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.3257915410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.962525784 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 178380963 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=962525784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_fifo_levels.962525784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.306151937 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 305771265 ps |
| CPU time | 1.89 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=306151937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_fifo_rst.306151937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.4200266221 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 232293712 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 227256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200266221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.4200266221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.2085065145 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 176684064 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 214868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085065145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.2085065145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.684551011 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 243560293 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 214428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=684551011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_in_trans.684551011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.712938652 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 2370304937 ps |
| CPU time | 15.59 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 01:00:03 PM UTC 24 |
| Peak memory | 234092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=712938652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.712938652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.3183500039 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 6859632698 ps |
| CPU time | 41.17 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 01:00:30 PM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183500039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.3183500039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.3633528001 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 249150985 ps |
| CPU time | 1 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633528001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.3633528001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.2260779204 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 6117785178 ps |
| CPU time | 10.1 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:58 PM UTC 24 |
| Peak memory | 227576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2260779204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.2260779204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.2079057464 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 5029345178 ps |
| CPU time | 6.89 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:55 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079057464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_link_suspend.2079057464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.4082085346 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 3508284766 ps |
| CPU time | 85.61 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 01:01:15 PM UTC 24 |
| Peak memory | 229752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082085346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.4082085346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.3245316763 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 2419332291 ps |
| CPU time | 56.95 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 01:00:46 PM UTC 24 |
| Peak memory | 234256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245316763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.3245316763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.883101781 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 262655021 ps |
| CPU time | 1 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=883101781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.883101781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.2442221053 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 202798550 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442221053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.2442221053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.425571165 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 2008528160 ps |
| CPU time | 17.89 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 01:00:06 PM UTC 24 |
| Peak memory | 227340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=425571165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.425571165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.1019266463 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 167884410 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1019266463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.1019266463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.432127180 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 149085466 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=432127180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.432127180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.1480607496 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 197299172 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1480607496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_nak_trans.1480607496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.853041069 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 157396411 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=853041069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_out_iso.853041069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.938745304 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 191368067 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=938745304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_out_stall.938745304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.4258006994 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 198320952 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258006994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.4258006994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.2120143536 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 152225793 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2120143536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.2120143536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.3081387806 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 215772392 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081387806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.3081387806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.2968351011 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 157450054 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968351011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.2968351011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.858262023 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 34344666 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 12:59:47 PM UTC 24 |
| Finished | Sep 01 12:59:49 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=858262023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_phy_pins_sense.858262023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.2253913904 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 14267648505 ps |
| CPU time | 35.25 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 01:00:24 PM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253913904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_pkt_buffer.2253913904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.1929401692 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 151471807 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1929401692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_pkt_received.1929401692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.3499431150 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 211278692 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499431150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.3499431150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.932516540 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 199041148 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 214796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932516540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_random_length_in_transaction.932516540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.3014433256 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 186008724 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014433256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.3014433256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.1750770854 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 197895236 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750770854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.1750770854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.1856845278 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 268872816 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856845278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.1856845278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.2252567750 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 146513648 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252567750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_setup_stage.2252567750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.1818848845 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 149922220 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 214748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818848845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.1818848845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.614359739 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 214842980 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=614359739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.614359739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.730382143 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 3588566685 ps |
| CPU time | 88.84 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 01:01:19 PM UTC 24 |
| Peak memory | 229180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=730382143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.730382143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.1667739036 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 160619869 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1667739036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.1667739036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.4240376671 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 172072616 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 12:59:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4240376671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_stall_trans.4240376671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.2621067216 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 367798851 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2621067216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.2621067216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.3105826250 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 2862072832 ps |
| CPU time | 67.89 seconds |
| Started | Sep 01 12:59:48 PM UTC 24 |
| Finished | Sep 01 01:00:58 PM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105826250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.3105826250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.1626819618 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 2512278184 ps |
| CPU time | 18.48 seconds |
| Started | Sep 01 12:59:20 PM UTC 24 |
| Finished | Sep 01 12:59:40 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626819618 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.1626819618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.3483358470 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 649494783 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3483358470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.3483358470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.4282174845 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 558688852 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4282174845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_ tx_rx_disruption.4282174845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.3607054046 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 540543523 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3607054046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.3607054046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.3196222770 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 602793891 ps |
| CPU time | 1.96 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3196222770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.3196222770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.3226118367 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 605710022 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3226118367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.3226118367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.324451546 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 483936376 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=324451546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_t x_rx_disruption.324451546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.410854977 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 496819689 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=410854977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_t x_rx_disruption.410854977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.2826498612 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 588744159 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2826498612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_ tx_rx_disruption.2826498612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.3992809275 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 422207226 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:19 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3992809275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.3992809275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.660297418 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 513587685 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=660297418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_t x_rx_disruption.660297418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.2236553840 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 493589824 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2236553840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_ tx_rx_disruption.2236553840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.508981289 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 42463076 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:47:24 PM UTC 24 |
| Finished | Sep 01 12:47:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=508981289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.508981289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.2131402078 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 9770713607 ps |
| CPU time | 28.92 seconds |
| Started | Sep 01 12:46:28 PM UTC 24 |
| Finished | Sep 01 12:46:59 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131402078 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.2131402078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.304152914 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 21077405383 ps |
| CPU time | 29.25 seconds |
| Started | Sep 01 12:46:28 PM UTC 24 |
| Finished | Sep 01 12:46:59 PM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=304152914 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.304152914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.2434528289 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 25664413511 ps |
| CPU time | 44.21 seconds |
| Started | Sep 01 12:46:30 PM UTC 24 |
| Finished | Sep 01 12:47:16 PM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434528289 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.2434528289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.747428509 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 164411002 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:46:30 PM UTC 24 |
| Finished | Sep 01 12:46:33 PM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=747428509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_buffer.747428509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.150818194 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 154453177 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:46:30 PM UTC 24 |
| Finished | Sep 01 12:46:33 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=150818194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_av_empty.150818194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.1388815590 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 158799350 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:46:30 PM UTC 24 |
| Finished | Sep 01 12:46:33 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1388815590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.1388815590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.3312914904 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 164172193 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:46:30 PM UTC 24 |
| Finished | Sep 01 12:46:33 PM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312914904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_bitstuff_err.3312914904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.1312842638 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 184726780 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 12:46:33 PM UTC 24 |
| Finished | Sep 01 12:46:36 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312842638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_data_toggle_clear.1312842638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.837933861 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 2268709422 ps |
| CPU time | 20.4 seconds |
| Started | Sep 01 12:46:34 PM UTC 24 |
| Finished | Sep 01 12:46:56 PM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=837933861 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.837933861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.1889273864 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 809573828 ps |
| CPU time | 4.08 seconds |
| Started | Sep 01 12:46:37 PM UTC 24 |
| Finished | Sep 01 12:46:42 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889273864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_disable_endpoint.1889273864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.2662068082 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 133805402 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:46:40 PM UTC 24 |
| Finished | Sep 01 12:46:42 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2662068082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.2662068082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_enable.1571712399 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 40691724 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 12:46:40 PM UTC 24 |
| Finished | Sep 01 12:46:42 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571712399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_enable.1571712399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.1584412795 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 896418929 ps |
| CPU time | 4.42 seconds |
| Started | Sep 01 12:46:43 PM UTC 24 |
| Finished | Sep 01 12:46:48 PM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584412795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.1584412795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.125288720 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 241834419 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 12:46:43 PM UTC 24 |
| Finished | Sep 01 12:46:46 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=125288720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.125288720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.3486402868 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 275464247 ps |
| CPU time | 1.92 seconds |
| Started | Sep 01 12:46:43 PM UTC 24 |
| Finished | Sep 01 12:46:46 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486402868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_fifo_levels.3486402868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.2271251971 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 260979131 ps |
| CPU time | 2.91 seconds |
| Started | Sep 01 12:46:44 PM UTC 24 |
| Finished | Sep 01 12:46:48 PM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2271251971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_fifo_rst.2271251971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.2999615765 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 89175034760 ps |
| CPU time | 195.56 seconds |
| Started | Sep 01 12:46:47 PM UTC 24 |
| Finished | Sep 01 12:50:06 PM UTC 24 |
| Peak memory | 217540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999615765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.2999615765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.3820359950 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 97268912472 ps |
| CPU time | 162.09 seconds |
| Started | Sep 01 12:46:48 PM UTC 24 |
| Finished | Sep 01 12:49:32 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3820359950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_hiclk_max.3820359950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.1057351282 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 82280165259 ps |
| CPU time | 159.42 seconds |
| Started | Sep 01 12:46:48 PM UTC 24 |
| Finished | Sep 01 12:49:30 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1057351282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.1057351282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.2752191384 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 85154208969 ps |
| CPU time | 188.36 seconds |
| Started | Sep 01 12:46:48 PM UTC 24 |
| Finished | Sep 01 12:49:59 PM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752191384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.2752191384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.1316615904 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 248995644 ps |
| CPU time | 1.89 seconds |
| Started | Sep 01 12:46:49 PM UTC 24 |
| Finished | Sep 01 12:46:52 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316615904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.1316615904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.492346889 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 143366843 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:46:49 PM UTC 24 |
| Finished | Sep 01 12:46:51 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=492346889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_in_stall.492346889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.889365808 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 222103148 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 12:46:52 PM UTC 24 |
| Finished | Sep 01 12:46:55 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889365808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_in_trans.889365808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.3717294592 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 3804614943 ps |
| CPU time | 50.19 seconds |
| Started | Sep 01 12:46:49 PM UTC 24 |
| Finished | Sep 01 12:47:41 PM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717294592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.3717294592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.2867074456 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 9101352959 ps |
| CPU time | 87.79 seconds |
| Started | Sep 01 12:46:52 PM UTC 24 |
| Finished | Sep 01 12:48:22 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867074456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.2867074456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1360042863 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 214338140 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 12:46:53 PM UTC 24 |
| Finished | Sep 01 12:46:56 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1360042863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.1360042863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.4090420277 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 28136180293 ps |
| CPU time | 55.4 seconds |
| Started | Sep 01 12:46:56 PM UTC 24 |
| Finished | Sep 01 12:47:52 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090420277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.4090420277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.2447088419 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 10875909062 ps |
| CPU time | 16.03 seconds |
| Started | Sep 01 12:46:56 PM UTC 24 |
| Finished | Sep 01 12:47:13 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447088419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.2447088419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.455001460 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 4339937169 ps |
| CPU time | 50.77 seconds |
| Started | Sep 01 12:46:57 PM UTC 24 |
| Finished | Sep 01 12:47:49 PM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=455001460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.455001460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.1974090505 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 2923761149 ps |
| CPU time | 40.43 seconds |
| Started | Sep 01 12:46:57 PM UTC 24 |
| Finished | Sep 01 12:47:39 PM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974090505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.1974090505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.2828071176 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 250718490 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 12:46:57 PM UTC 24 |
| Finished | Sep 01 12:47:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828071176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.2828071176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.3230212175 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 197179199 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:46:58 PM UTC 24 |
| Finished | Sep 01 12:47:01 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230212175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.3230212175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.3494912841 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 3275864402 ps |
| CPU time | 43.29 seconds |
| Started | Sep 01 12:46:58 PM UTC 24 |
| Finished | Sep 01 12:47:43 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494912841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.3494912841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.2458263252 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 2282452568 ps |
| CPU time | 68.91 seconds |
| Started | Sep 01 12:47:00 PM UTC 24 |
| Finished | Sep 01 12:48:10 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2458263252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.2458263252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.3621993646 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 3708266491 ps |
| CPU time | 116.25 seconds |
| Started | Sep 01 12:47:00 PM UTC 24 |
| Finished | Sep 01 12:48:58 PM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621993646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.3621993646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.2807848510 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 159562713 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:47:00 PM UTC 24 |
| Finished | Sep 01 12:47:02 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807848510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.2807848510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.3357281827 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 142987226 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:47:01 PM UTC 24 |
| Finished | Sep 01 12:47:03 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357281827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.3357281827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.2561755434 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 231008607 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 12:47:01 PM UTC 24 |
| Finished | Sep 01 12:47:04 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561755434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.2561755434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.754059845 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 146538100 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:47:02 PM UTC 24 |
| Finished | Sep 01 12:47:04 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754059845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_out_iso.754059845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.705807013 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 179878398 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:47:03 PM UTC 24 |
| Finished | Sep 01 12:47:06 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=705807013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_out_stall.705807013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.651502358 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 183860115 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:47:04 PM UTC 24 |
| Finished | Sep 01 12:47:07 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=651502358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_out_trans_nak.651502358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.4014182280 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 148916578 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:47:04 PM UTC 24 |
| Finished | Sep 01 12:47:07 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4014182280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_pending_in_trans.4014182280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.2319560731 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 249261935 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 12:47:05 PM UTC 24 |
| Finished | Sep 01 12:47:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319560731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.2319560731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.3181969353 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 282285133 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 12:47:07 PM UTC 24 |
| Finished | Sep 01 12:47:10 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181969353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.3181969353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.3643682870 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 152486772 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:47:07 PM UTC 24 |
| Finished | Sep 01 12:47:10 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643682870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.3643682870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.18901264 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 37578809 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:47:07 PM UTC 24 |
| Finished | Sep 01 12:47:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=18901264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_phy_pins_sense.18901264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.2211176907 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 12181245714 ps |
| CPU time | 33.37 seconds |
| Started | Sep 01 12:47:07 PM UTC 24 |
| Finished | Sep 01 12:47:42 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211176907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.2211176907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.231305891 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 158061097 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:47:07 PM UTC 24 |
| Finished | Sep 01 12:47:10 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231305891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_pkt_received.231305891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.1717300733 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 260948640 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 12:47:09 PM UTC 24 |
| Finished | Sep 01 12:47:11 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717300733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_pkt_sent.1717300733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.2335948312 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 5417894201 ps |
| CPU time | 60.86 seconds |
| Started | Sep 01 12:47:11 PM UTC 24 |
| Finished | Sep 01 12:48:13 PM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335948312 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.2335948312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.719411572 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 6269179893 ps |
| CPU time | 38.49 seconds |
| Started | Sep 01 12:47:11 PM UTC 24 |
| Finished | Sep 01 12:47:51 PM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=719411572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.719411572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.3935088407 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 5476111226 ps |
| CPU time | 59.86 seconds |
| Started | Sep 01 12:47:12 PM UTC 24 |
| Finished | Sep 01 12:48:13 PM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935088407 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.3935088407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.1923211567 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 262186143 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:47:11 PM UTC 24 |
| Finished | Sep 01 12:47:13 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923211567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.1923211567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.1080543339 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 152868152 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:47:11 PM UTC 24 |
| Finished | Sep 01 12:47:13 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080543339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.1080543339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.576530567 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 20157852475 ps |
| CPU time | 38.38 seconds |
| Started | Sep 01 12:47:13 PM UTC 24 |
| Finished | Sep 01 12:47:53 PM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=576530567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_resume_link_active.576530567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.3644526673 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 173416384 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:47:14 PM UTC 24 |
| Finished | Sep 01 12:47:17 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3644526673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.3644526673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.879750977 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 347835954 ps |
| CPU time | 2.13 seconds |
| Started | Sep 01 12:47:14 PM UTC 24 |
| Finished | Sep 01 12:47:17 PM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879750977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_rx_full.879750977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.529842411 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 186333594 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:47:14 PM UTC 24 |
| Finished | Sep 01 12:47:17 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=529842411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_rx_pid_err.529842411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.1379747500 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 804947624 ps |
| CPU time | 2.94 seconds |
| Started | Sep 01 12:47:24 PM UTC 24 |
| Finished | Sep 01 12:47:28 PM UTC 24 |
| Peak memory | 251468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379747500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.1379747500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.4194276181 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 373239512 ps |
| CPU time | 2.33 seconds |
| Started | Sep 01 12:47:17 PM UTC 24 |
| Finished | Sep 01 12:47:20 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194276181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.4194276181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.959079537 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 299350586 ps |
| CPU time | 1.82 seconds |
| Started | Sep 01 12:47:17 PM UTC 24 |
| Finished | Sep 01 12:47:20 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959079537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.959079537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.737858168 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 154565386 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:47:19 PM UTC 24 |
| Finished | Sep 01 12:47:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=737858168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_setup_stage.737858168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.828076106 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 147053891 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:47:19 PM UTC 24 |
| Finished | Sep 01 12:47:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=828076106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_setup_trans_ignored.828076106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.1656383147 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 206233700 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 12:47:19 PM UTC 24 |
| Finished | Sep 01 12:47:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656383147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.1656383147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.3890253788 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 1803571053 ps |
| CPU time | 18.72 seconds |
| Started | Sep 01 12:47:19 PM UTC 24 |
| Finished | Sep 01 12:47:39 PM UTC 24 |
| Peak memory | 229480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890253788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.3890253788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.3568567060 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 148963667 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:47:21 PM UTC 24 |
| Finished | Sep 01 12:47:23 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3568567060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.3568567060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.1333801649 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 164070299 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:47:21 PM UTC 24 |
| Finished | Sep 01 12:47:23 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1333801649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.1333801649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.407726381 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 200150824 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 12:47:23 PM UTC 24 |
| Finished | Sep 01 12:47:25 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=407726381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_stream_len_max.407726381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.1885345368 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 1898741735 ps |
| CPU time | 24.09 seconds |
| Started | Sep 01 12:47:21 PM UTC 24 |
| Finished | Sep 01 12:47:47 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885345368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_streaming_out.1885345368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.107195766 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 8036710665 ps |
| CPU time | 143.32 seconds |
| Started | Sep 01 12:47:23 PM UTC 24 |
| Finished | Sep 01 12:49:49 PM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=107195766 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_3 1/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.107195766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.204897565 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 276538759 ps |
| CPU time | 5.89 seconds |
| Started | Sep 01 12:46:36 PM UTC 24 |
| Finished | Sep 01 12:46:44 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=204897565 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.204897565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.4122567169 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 543375786 ps |
| CPU time | 3.01 seconds |
| Started | Sep 01 12:47:23 PM UTC 24 |
| Finished | Sep 01 12:47:27 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4122567169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.4122567169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.2685394505 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 79270637 ps |
| CPU time | 0.65 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685394505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.2685394505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.920777183 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 11166545371 ps |
| CPU time | 13 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:31 PM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=920777183 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.920777183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.1866370338 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 19157584061 ps |
| CPU time | 24.81 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:43 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866370338 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.1866370338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.1049012164 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 30699787414 ps |
| CPU time | 36.41 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:55 PM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1049012164 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.1049012164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.1889079593 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 188563390 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:19 PM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889079593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.1889079593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.3952633207 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 157676930 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952633207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_bitstuff_err.3952633207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.309548855 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 359229552 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=309548855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_data_toggle_clear.309548855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.3094024210 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 1189869730 ps |
| CPU time | 2.83 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094024210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.3094024210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.3671906285 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 16265225896 ps |
| CPU time | 24.41 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:43 PM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671906285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.3671906285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.4054409971 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 2963601124 ps |
| CPU time | 16.65 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:35 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054409971 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.4054409971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.809577703 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 923264991 ps |
| CPU time | 1.93 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809577703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_disable_endpoint.809577703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.177165014 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 166919912 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=177165014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_disconnected.177165014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_enable.3243771541 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 92738299 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243771541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.3243771541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.1014623833 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 934719804 ps |
| CPU time | 2.63 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1014623833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.1014623833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.4224414798 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 443229243 ps |
| CPU time | 1.82 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224414798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.4224414798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.2365905002 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 281851182 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365905002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_fifo_levels.2365905002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.793279112 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 284284880 ps |
| CPU time | 2.82 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:22 PM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=793279112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_fifo_rst.793279112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.3890074239 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 188653879 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 227264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890074239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.3890074239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.2035278232 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 143486350 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2035278232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.2035278232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.10513080 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 203725142 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=10513080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_in_trans.10513080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.1089592681 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 3006977301 ps |
| CPU time | 70.93 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:01:30 PM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089592681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.1089592681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.1938803235 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 12869540695 ps |
| CPU time | 78.8 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:01:39 PM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1938803235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.1938803235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.2179618435 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 226468466 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179618435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.2179618435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.2205627605 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 6420210443 ps |
| CPU time | 9.63 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:29 PM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205627605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.2205627605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.1514276110 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 11405477535 ps |
| CPU time | 14.98 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:34 PM UTC 24 |
| Peak memory | 216340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514276110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.1514276110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.1274252153 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 3535542664 ps |
| CPU time | 22.35 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:42 PM UTC 24 |
| Peak memory | 229384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274252153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.1274252153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.3084855263 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 2450012132 ps |
| CPU time | 21.68 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:41 PM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084855263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.3084855263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.875917614 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 247082989 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=875917614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.875917614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.1265297429 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 189592625 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 214852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265297429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.1265297429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.1674419097 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 2208576796 ps |
| CPU time | 53.35 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:01:13 PM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674419097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.1674419097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.113773818 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 153297432 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=113773818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.113773818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.3242131527 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 148357229 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3242131527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.3242131527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.391235392 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 247903154 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=391235392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_nak_trans.391235392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.1498385021 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 177316148 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498385021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_iso.1498385021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.2429227003 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 184720068 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2429227003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_out_stall.2429227003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.3867572854 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 164540827 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867572854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.3867572854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.4197516431 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 156995381 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197516431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.4197516431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.3853906637 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 234115920 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:21 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3853906637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.3853906637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.2528858102 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 146642230 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:00:18 PM UTC 24 |
| Finished | Sep 01 01:00:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528858102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.2528858102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.3892332102 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 42028940 ps |
| CPU time | 0.6 seconds |
| Started | Sep 01 01:00:46 PM UTC 24 |
| Finished | Sep 01 01:00:48 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892332102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.3892332102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.1997727885 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 10684408430 ps |
| CPU time | 28.19 seconds |
| Started | Sep 01 01:00:46 PM UTC 24 |
| Finished | Sep 01 01:01:16 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1997727885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.1997727885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.3341312616 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 180560665 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:00:46 PM UTC 24 |
| Finished | Sep 01 01:00:48 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3341312616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.3341312616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.605595827 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 316059538 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:00:46 PM UTC 24 |
| Finished | Sep 01 01:00:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=605595827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_pkt_sent.605595827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.2629870875 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 205641098 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:00:46 PM UTC 24 |
| Finished | Sep 01 01:00:48 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2629870875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.2629870875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.3016356153 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 155762361 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:00:46 PM UTC 24 |
| Finished | Sep 01 01:00:49 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3016356153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.3016356153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.297463867 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 203738801 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:48 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=297463867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_rx_crc_err.297463867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.3562980174 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 282256297 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562980174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.3562980174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.3673907865 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 149868286 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673907865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.3673907865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.3530110293 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 165372997 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530110293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.3530110293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.106291159 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 233612610 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=106291159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.106291159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.4259198823 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 2103320301 ps |
| CPU time | 14.03 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:01:02 PM UTC 24 |
| Peak memory | 234112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259198823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.4259198823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.3017353915 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 182328447 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:49 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017353915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.3017353915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.2463203309 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 165262906 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:49 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463203309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.2463203309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.4086030733 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 200994467 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:49 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086030733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.4086030733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.1151012932 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 2434771653 ps |
| CPU time | 20.32 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:01:09 PM UTC 24 |
| Peak memory | 227452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1151012932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.1151012932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.447632415 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 658755645 ps |
| CPU time | 9.64 seconds |
| Started | Sep 01 01:00:17 PM UTC 24 |
| Finished | Sep 01 01:00:28 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=447632415 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.447632415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.709077629 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 499060861 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=709077629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_tx _rx_disruption.709077629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.2233234505 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 546204967 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2233234505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.2233234505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.1746256364 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 491191218 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1746256364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.1746256364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.312973205 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 464904656 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=312973205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_t x_rx_disruption.312973205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.2170223687 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 636413972 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2170223687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.2170223687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.3813874684 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 539485164 ps |
| CPU time | 1.82 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3813874684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_ tx_rx_disruption.3813874684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.4057569625 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 548357583 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4057569625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.4057569625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.1621158539 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 640099624 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 01:26:17 PM UTC 24 |
| Finished | Sep 01 01:26:20 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1621158539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.1621158539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.2659721924 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 464531963 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2659721924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_ tx_rx_disruption.2659721924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.130403924 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 510812184 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:41 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=130403924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_t x_rx_disruption.130403924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.2093812721 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 580770253 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2093812721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.2093812721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.2955316280 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 40041036 ps |
| CPU time | 0.72 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955316280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.2955316280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.2045329033 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 5007137672 ps |
| CPU time | 8.2 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:57 PM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2045329033 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.2045329033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.3253752696 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 16387631549 ps |
| CPU time | 18.45 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:01:07 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3253752696 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.3253752696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.1551185803 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 26347543988 ps |
| CPU time | 32.8 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:01:22 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551185803 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.1551185803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.2009014708 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 152538617 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009014708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.2009014708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.2883712102 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 190142667 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883712102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_bitstuff_err.2883712102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.207536819 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 518659486 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:51 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=207536819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_data_toggle_clear.207536819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.3342698655 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 531675870 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:51 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3342698655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.3342698655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.211765144 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 49218869038 ps |
| CPU time | 77.52 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:02:07 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211765144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_device_address.211765144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.1157523314 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 152083332 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1157523314 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.1157523314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.3909434424 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 875002706 ps |
| CPU time | 2.1 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:51 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909434424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.3909434424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.2048879695 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 143684767 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048879695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_disconnected.2048879695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_enable.1318116040 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 35101035 ps |
| CPU time | 0.66 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318116040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.1318116040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.3423058495 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 952466260 ps |
| CPU time | 2.67 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:52 PM UTC 24 |
| Peak memory | 217076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423058495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.3423058495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.2403697319 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 314208287 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403697319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.2403697319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_levels.2253765780 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 168889492 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253765780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_fifo_levels.2253765780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.1265606623 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 226028151 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:00:51 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265606623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.1265606623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.2654840675 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 176558378 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:00:48 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654840675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.2654840675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.1497954813 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 135287556 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:00:48 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497954813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.1497954813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.3795225705 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 222240555 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:00:48 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795225705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.3795225705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.2071122414 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 4241873414 ps |
| CPU time | 26.54 seconds |
| Started | Sep 01 01:00:48 PM UTC 24 |
| Finished | Sep 01 01:01:16 PM UTC 24 |
| Peak memory | 234400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071122414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.2071122414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.3119319870 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 7334231398 ps |
| CPU time | 75 seconds |
| Started | Sep 01 01:00:48 PM UTC 24 |
| Finished | Sep 01 01:02:05 PM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119319870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.3119319870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.633781794 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 199341297 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:00:48 PM UTC 24 |
| Finished | Sep 01 01:00:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=633781794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_link_in_err.633781794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.2238350074 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 16046289619 ps |
| CPU time | 24.12 seconds |
| Started | Sep 01 01:01:21 PM UTC 24 |
| Finished | Sep 01 01:01:47 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238350074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.2238350074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.2910608395 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 3573373445 ps |
| CPU time | 5.34 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:28 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2910608395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.2910608395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.439174495 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 3069942519 ps |
| CPU time | 21.33 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:44 PM UTC 24 |
| Peak memory | 229568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=439174495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.439174495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.961877609 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 2857717191 ps |
| CPU time | 66.1 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:02:29 PM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=961877609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.961877609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.2771344420 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 238167008 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771344420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.2771344420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.181603420 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 197535388 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=181603420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.181603420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.306376328 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 2585638882 ps |
| CPU time | 17.47 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:41 PM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=306376328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.306376328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.2757399765 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 187203275 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2757399765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.2757399765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.3530138323 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 142757802 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530138323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.3530138323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.1846453901 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 182598759 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846453901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.1846453901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.3079325990 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 212922129 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3079325990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.3079325990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.1003152132 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 158069397 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003152132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.1003152132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.1586369056 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 209145267 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586369056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.1586369056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.557535575 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 156204555 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=557535575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_pending_in_trans.557535575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.2515475646 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 233257017 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515475646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.2515475646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.2419596552 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 143608197 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419596552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.2419596552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.1148395518 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 43173566 ps |
| CPU time | 0.62 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 214820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148395518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_pins_sense.1148395518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.2463041473 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 20825952777 ps |
| CPU time | 48.78 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:02:12 PM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463041473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.2463041473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.1229279450 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 184498121 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1229279450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.1229279450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.575959819 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 229727293 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=575959819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_pkt_sent.575959819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.1065626086 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 216414023 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065626086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.1065626086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.1697155502 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 146205654 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697155502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.1697155502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.3522772608 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 160616548 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3522772608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.3522772608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.1725970949 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 358232262 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:25 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1725970949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.1725970949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.723465609 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 148252974 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=723465609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_setup_stage.723465609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.3164617125 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 193825095 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:25 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164617125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.3164617125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.3261437506 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 222560497 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3261437506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.3261437506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.625393615 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 3905108243 ps |
| CPU time | 33.51 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:57 PM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=625393615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.625393615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.3071209618 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 231307559 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:25 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071209618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.3071209618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.2133348177 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 198588521 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133348177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.2133348177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.2615318253 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 1153033949 ps |
| CPU time | 2.92 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:27 PM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2615318253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.2615318253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.3152031373 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 2639808902 ps |
| CPU time | 63.4 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:02:28 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152031373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.3152031373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.4085244207 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 2583366188 ps |
| CPU time | 15.1 seconds |
| Started | Sep 01 01:00:47 PM UTC 24 |
| Finished | Sep 01 01:01:04 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085244207 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.4085244207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.727988115 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 622108632 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:25 PM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=727988115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_tx _rx_disruption.727988115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.47031654 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 431933750 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:41 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=47031654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_tx _rx_disruption.47031654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.994518378 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 473184312 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:41 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=994518378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_t x_rx_disruption.994518378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.2488275682 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 609278748 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2488275682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.2488275682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.3411186651 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 596583967 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3411186651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_ tx_rx_disruption.3411186651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.3449805766 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 539692711 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3449805766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_ tx_rx_disruption.3449805766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.1444576777 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 557908252 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1444576777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.1444576777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.2016214123 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 421125514 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2016214123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_ tx_rx_disruption.2016214123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.291439577 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 626196321 ps |
| CPU time | 1.87 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=291439577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_t x_rx_disruption.291439577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.3060868829 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 567368907 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 216876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3060868829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_ tx_rx_disruption.3060868829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.3861566137 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 692028409 ps |
| CPU time | 1.98 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3861566137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_ tx_rx_disruption.3861566137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.2814105583 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 32428787 ps |
| CPU time | 0.59 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2814105583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.2814105583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.3811263360 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 10675734649 ps |
| CPU time | 13.89 seconds |
| Started | Sep 01 01:01:22 PM UTC 24 |
| Finished | Sep 01 01:01:38 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811263360 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.3811263360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.560155541 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 20556914161 ps |
| CPU time | 25.56 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:50 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=560155541 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.560155541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.3959835769 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 30694628069 ps |
| CPU time | 39.35 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:02:03 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959835769 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.3959835769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.1009288982 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 188155659 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:25 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009288982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.1009288982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.2029569670 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 190440294 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:25 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2029569670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_bitstuff_err.2029569670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.2032246695 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 237155716 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:25 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2032246695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.2032246695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.486562668 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 1112001778 ps |
| CPU time | 2.88 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:27 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=486562668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.486562668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.1983256762 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 16508748423 ps |
| CPU time | 27.17 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:51 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983256762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.1983256762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.3131208955 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 1410533676 ps |
| CPU time | 27.45 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:52 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131208955 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.3131208955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.1919996390 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 487893694 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:26 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1919996390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.1919996390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.3245969362 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 217765997 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:25 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3245969362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.3245969362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_enable.840932829 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 35895716 ps |
| CPU time | 0.65 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:25 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=840932829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_enable.840932829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.3362453679 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 880192089 ps |
| CPU time | 2.12 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:26 PM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362453679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.3362453679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.4192534156 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 497568111 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:01:57 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4192534156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.4192534156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.2266832406 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 293705624 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 01:01:57 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266832406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_fifo_levels.2266832406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.1967212545 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 180942030 ps |
| CPU time | 2.05 seconds |
| Started | Sep 01 01:01:57 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967212545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_fifo_rst.1967212545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.3845200530 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 226902290 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845200530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.3845200530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.3505825459 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 146797979 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:01:59 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505825459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.3505825459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.835317744 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 214542083 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:01:59 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=835317744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_in_trans.835317744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.210899023 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 3587630536 ps |
| CPU time | 27.99 seconds |
| Started | Sep 01 01:01:57 PM UTC 24 |
| Finished | Sep 01 01:02:27 PM UTC 24 |
| Peak memory | 234304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=210899023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.210899023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.2849574109 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 5443737992 ps |
| CPU time | 31.11 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:30 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849574109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.2849574109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.2039149287 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 209736694 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039149287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.2039149287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.3823685233 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 25469309733 ps |
| CPU time | 35.53 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:34 PM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823685233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.3823685233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.510507934 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 10133954200 ps |
| CPU time | 14.02 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:13 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=510507934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_suspend.510507934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.2800201668 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 4747395868 ps |
| CPU time | 115.49 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:03:55 PM UTC 24 |
| Peak memory | 232164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2800201668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.2800201668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.3763979039 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 3014208613 ps |
| CPU time | 19.31 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:18 PM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763979039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.3763979039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.802418733 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 246734245 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=802418733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.802418733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.3588001740 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 200662845 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588001740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.3588001740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.1024409834 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 3506002374 ps |
| CPU time | 81.69 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:03:22 PM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024409834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.1024409834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.675481411 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 156642649 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=675481411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.675481411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.3823307090 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 151835946 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823307090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.3823307090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.3988370029 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 166857878 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988370029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.3988370029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.4167343524 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 220666710 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 214748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4167343524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_out_iso.4167343524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.4261603819 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 168634654 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261603819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_out_stall.4261603819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.3391936094 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 203131343 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391936094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.3391936094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.2094680733 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 151573990 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094680733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_pending_in_trans.2094680733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.1486479892 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 228321907 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486479892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.1486479892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.2976440303 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 154535551 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976440303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.2976440303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.202880061 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 27910033 ps |
| CPU time | 0.6 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=202880061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_phy_pins_sense.202880061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.2107460644 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 19144356774 ps |
| CPU time | 41.85 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:42 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107460644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.2107460644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.3336341594 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 156528442 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336341594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.3336341594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.1717722665 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 180974312 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717722665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.1717722665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.2770759697 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 228708572 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770759697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.2770759697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.1889103327 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 159450814 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889103327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.1889103327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.1150134651 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 179037801 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150134651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_rx_crc_err.1150134651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.909039042 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 288177577 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 214648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909039042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_rx_full.909039042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.3770509867 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 199543594 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770509867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_setup_stage.3770509867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.4213060714 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 188538155 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:01:58 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213060714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.4213060714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.2093475199 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 209547626 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093475199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.2093475199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.403134231 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 2746890507 ps |
| CPU time | 23.36 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:23 PM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=403134231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.403134231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.3290844879 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 160273611 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290844879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.3290844879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.3941245910 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 155181808 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941245910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.3941245910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.3003482931 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 573862598 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:02 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003482931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.3003482931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.3472602451 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 3023906260 ps |
| CPU time | 20.86 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:21 PM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472602451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_streaming_out.3472602451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.3367430953 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 1279876578 ps |
| CPU time | 23.58 seconds |
| Started | Sep 01 01:01:23 PM UTC 24 |
| Finished | Sep 01 01:01:48 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367430953 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.3367430953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.2907213012 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 570826969 ps |
| CPU time | 1.78 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:02 PM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2907213012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.2907213012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.4027496813 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 531132936 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4027496813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_ tx_rx_disruption.4027496813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.500128634 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 522712381 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=500128634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_t x_rx_disruption.500128634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.801765975 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 635181064 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=801765975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_t x_rx_disruption.801765975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.3787911642 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 513431224 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3787911642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.3787911642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.3987936588 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 508354100 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3987936588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_ tx_rx_disruption.3987936588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.1330483770 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 525828475 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1330483770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.1330483770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.2572851536 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 466892126 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2572851536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.2572851536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.1100451496 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 495943096 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:42 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1100451496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_ tx_rx_disruption.1100451496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.2863180566 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 524334102 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2863180566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.2863180566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.1902041416 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 482410611 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1902041416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.1902041416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.1224824695 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 60312148 ps |
| CPU time | 0.65 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:16 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224824695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.1224824695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.3329501163 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 5595219920 ps |
| CPU time | 6.95 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:07 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329501163 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.3329501163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.2695906788 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 16382091596 ps |
| CPU time | 18.2 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:18 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2695906788 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.2695906788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.2957573700 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 24458270910 ps |
| CPU time | 35.12 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:35 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957573700 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.2957573700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.3456537713 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 206649812 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:01:59 PM UTC 24 |
| Finished | Sep 01 01:02:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3456537713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.3456537713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.2739420853 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 155423876 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:36 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739420853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_bitstuff_err.2739420853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.1693205059 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 242846078 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:36 PM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693205059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.1693205059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.2554359339 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 1183647348 ps |
| CPU time | 3 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554359339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.2554359339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.2058430780 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 39831842484 ps |
| CPU time | 71.29 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:03:47 PM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058430780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.2058430780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.2930835599 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 302946954 ps |
| CPU time | 3.74 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:39 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2930835599 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.2930835599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.370221222 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 944764858 ps |
| CPU time | 2.2 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=370221222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_disable_endpoint.370221222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.1135420987 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 138139963 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:36 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135420987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_disconnected.1135420987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_enable.1596907750 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 114821222 ps |
| CPU time | 0.68 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:36 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1596907750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_enable.1596907750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.3402991767 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 1081717508 ps |
| CPU time | 2.88 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:39 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3402991767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.3402991767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_levels.1393799206 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 256738045 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:37 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393799206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_fifo_levels.1393799206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.2428746864 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 192929011 ps |
| CPU time | 2.48 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2428746864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.2428746864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.764059385 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 263763847 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:37 PM UTC 24 |
| Peak memory | 227336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=764059385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.764059385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.2542301613 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 188030729 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:37 PM UTC 24 |
| Peak memory | 214796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542301613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.2542301613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.436193754 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 281394952 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:02:37 PM UTC 24 |
| Peak memory | 214804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=436193754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_in_trans.436193754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.1326205736 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 4867991890 ps |
| CPU time | 30.73 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:03:07 PM UTC 24 |
| Peak memory | 234376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326205736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.1326205736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.1697451881 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 7311486835 ps |
| CPU time | 44.02 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:03:20 PM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697451881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.1697451881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.822820819 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 220717839 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:37 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=822820819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_link_in_err.822820819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.2828665890 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 29614301937 ps |
| CPU time | 44.55 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:03:21 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828665890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_resume.2828665890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.1831321402 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 10230369373 ps |
| CPU time | 15.51 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:52 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831321402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_link_suspend.1831321402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.3755610495 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 4476235184 ps |
| CPU time | 38.67 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:03:15 PM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3755610495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.3755610495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.3940477156 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 4008983624 ps |
| CPU time | 93.23 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:04:11 PM UTC 24 |
| Peak memory | 229772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940477156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.3940477156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.1481372586 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 251578527 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1481372586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.1481372586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.804424372 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 192735638 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:37 PM UTC 24 |
| Peak memory | 216040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804424372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.804424372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.2585837608 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 1558617241 ps |
| CPU time | 12.01 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:48 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585837608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.2585837608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.2847770772 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 169823524 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847770772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.2847770772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.876054561 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 153762243 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=876054561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.876054561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.793051946 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 200040820 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:37 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=793051946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_nak_trans.793051946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.3029533620 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 149956089 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:37 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029533620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.3029533620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.4156699483 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 176063621 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156699483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_out_stall.4156699483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.195956870 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 183330838 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=195956870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_out_trans_nak.195956870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.1550785787 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 140001535 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550785787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.1550785787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.3021150362 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 249226270 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021150362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.3021150362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.2032951486 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 182968028 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2032951486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.2032951486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.1785773340 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 35955587 ps |
| CPU time | 0.67 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785773340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.1785773340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.3789363933 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 20063714342 ps |
| CPU time | 46.85 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:03:24 PM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3789363933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.3789363933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.237984065 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 188730339 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 214884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=237984065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_pkt_received.237984065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.2221790444 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 231430031 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221790444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.2221790444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.718864909 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 224329054 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=718864909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_random_length_in_transaction.718864909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.4151757668 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 160485924 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151757668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.4151757668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.986671891 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 186043767 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=986671891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_rx_crc_err.986671891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.2367085939 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 350242394 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367085939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.2367085939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.1356448168 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 150106282 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356448168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.1356448168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.2462199924 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 181775374 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2462199924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.2462199924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.1078119667 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 258216612 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:02:35 PM UTC 24 |
| Finished | Sep 01 01:02:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078119667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.1078119667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.2679164205 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 2903591818 ps |
| CPU time | 72.35 seconds |
| Started | Sep 01 01:02:36 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 229616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2679164205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.2679164205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.3984064668 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 182669658 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:03:14 PM UTC 24 |
| Finished | Sep 01 01:03:16 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3984064668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.3984064668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.2146552685 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 169483962 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:16 PM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2146552685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.2146552685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.3582312109 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 1141920602 ps |
| CPU time | 2.71 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582312109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.3582312109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.1837351 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 1974387707 ps |
| CPU time | 13.19 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:29 PM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1837351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_streaming_out.1837351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.2880913527 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 7661743190 ps |
| CPU time | 44.11 seconds |
| Started | Sep 01 01:02:34 PM UTC 24 |
| Finished | Sep 01 01:03:20 PM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880913527 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.2880913527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.3879526818 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 447075981 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:17 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3879526818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_t x_rx_disruption.3879526818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.3775173418 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 477312023 ps |
| CPU time | 1.86 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3775173418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.3775173418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.614797817 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 458568433 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=614797817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_t x_rx_disruption.614797817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.560592518 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 595624506 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=560592518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_t x_rx_disruption.560592518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.3339382947 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 492903401 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3339382947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.3339382947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.2969116073 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 635311345 ps |
| CPU time | 2.24 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2969116073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.2969116073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.3241223280 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 487446894 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3241223280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.3241223280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.622312138 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 581649292 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=622312138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_t x_rx_disruption.622312138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.1376739806 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 571864793 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1376739806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.1376739806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.2771563274 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 430471322 ps |
| CPU time | 2.03 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2771563274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_ tx_rx_disruption.2771563274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.336267799 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 687376927 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:27:39 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=336267799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_t x_rx_disruption.336267799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.1795210333 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 82005110 ps |
| CPU time | 0.64 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1795210333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.1795210333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.1436787509 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 5985080788 ps |
| CPU time | 8.27 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:24 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436787509 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.1436787509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.1881301735 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 21155103795 ps |
| CPU time | 24.46 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:41 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881301735 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.1881301735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.2204357248 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 28627022867 ps |
| CPU time | 35.57 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:52 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204357248 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.2204357248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.472996383 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 155259676 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:17 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=472996383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_av_buffer.472996383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.26832815 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 156926056 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:17 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=26832815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_bitstuff_err.26832815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.3684314411 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 623408822 ps |
| CPU time | 2.15 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684314411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_data_toggle_clear.3684314411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.81777534 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 760186095 ps |
| CPU time | 2.49 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:19 PM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=81777534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.81777534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.139691433 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 39843707856 ps |
| CPU time | 68.67 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:04:25 PM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=139691433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_device_address.139691433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.4185678674 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 4953306711 ps |
| CPU time | 29.39 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:46 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4185678674 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.4185678674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.39765090 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 809394044 ps |
| CPU time | 2.34 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:19 PM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=39765090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_disable_endpoint.39765090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.1595744643 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 175401241 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:17 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1595744643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.1595744643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_enable.1375685386 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 28069136 ps |
| CPU time | 0.63 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:17 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375685386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_enable.1375685386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.901657295 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 1018028595 ps |
| CPU time | 2.41 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:19 PM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901657295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.901657295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.1020591568 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 578752809 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1020591568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.1020591568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.2204163047 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 155407567 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:17 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204163047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_fifo_levels.2204163047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.4001354196 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 455976485 ps |
| CPU time | 2.67 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:19 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4001354196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_fifo_rst.4001354196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.4285452355 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 210468696 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285452355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.4285452355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.1779368614 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 132769972 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779368614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.1779368614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.28252998 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 193860611 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=28252998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_in_trans.28252998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.1244133604 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 3478072717 ps |
| CPU time | 27.21 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:44 PM UTC 24 |
| Peak memory | 234308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244133604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.1244133604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.1738668300 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 10387224269 ps |
| CPU time | 66.01 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:04:23 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738668300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.1738668300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.2447828121 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 244147414 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447828121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.2447828121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.2603642782 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 11323959920 ps |
| CPU time | 15.56 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:32 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603642782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.2603642782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.3833488817 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 11330153471 ps |
| CPU time | 13.23 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:30 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833488817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_link_suspend.3833488817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.1138527979 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 3108194347 ps |
| CPU time | 27.06 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:44 PM UTC 24 |
| Peak memory | 229684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138527979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.1138527979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.430197258 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 1647067638 ps |
| CPU time | 37.3 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:54 PM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=430197258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.430197258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.1029182298 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 249160023 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1029182298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.1029182298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.805139711 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 187825732 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=805139711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.805139711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.2102476506 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 1847688740 ps |
| CPU time | 16.12 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:33 PM UTC 24 |
| Peak memory | 229540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102476506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.2102476506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.1971584368 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 244627166 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1971584368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.1971584368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.1453137596 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 143436599 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1453137596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.1453137596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.2630077720 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 193975617 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2630077720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_nak_trans.2630077720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.2980931049 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 189871503 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980931049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.2980931049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.3487134787 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 152466416 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487134787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.3487134787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.128785188 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 217035536 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=128785188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_out_trans_nak.128785188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.343501992 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 166001128 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 214688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=343501992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_pending_in_trans.343501992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.2139314108 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 246621747 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:19 PM UTC 24 |
| Peak memory | 214612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139314108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.2139314108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.1716142854 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 153824713 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716142854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.1716142854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.1219476201 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 55486392 ps |
| CPU time | 0.65 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1219476201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.1219476201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.656192488 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 10397835413 ps |
| CPU time | 24.95 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:42 PM UTC 24 |
| Peak memory | 234124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=656192488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_pkt_buffer.656192488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.2153453495 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 162046331 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2153453495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_pkt_received.2153453495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.1161115886 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 283682656 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1161115886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.1161115886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.281724560 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 184291833 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 01:03:16 PM UTC 24 |
| Finished | Sep 01 01:03:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=281724560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_random_length_in_transaction.281724560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.4219068976 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 165922098 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4219068976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.4219068976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.1315047540 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 161506592 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315047540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.1315047540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.1271069703 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 285809054 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271069703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.1271069703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.1210320097 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 157858031 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1210320097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_setup_stage.1210320097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.3702940812 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 190197173 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702940812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.3702940812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.3809533401 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 237990019 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3809533401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.3809533401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.1553155509 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 152486101 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553155509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.1553155509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.515675991 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 174949002 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=515675991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_stall_trans.515675991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.1261124782 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 1263601279 ps |
| CPU time | 3.54 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:53 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261124782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.1261124782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.1092091868 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 3338365303 ps |
| CPU time | 21.72 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:04:11 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092091868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.1092091868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.3441654459 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 2976102276 ps |
| CPU time | 16.83 seconds |
| Started | Sep 01 01:03:15 PM UTC 24 |
| Finished | Sep 01 01:03:33 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441654459 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.3441654459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.3866205983 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 582906588 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:51 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3866205983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_t x_rx_disruption.3866205983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.3548269731 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 508551819 ps |
| CPU time | 2.09 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3548269731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_ tx_rx_disruption.3548269731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.1365872461 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 560529542 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1365872461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_ tx_rx_disruption.1365872461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.648894032 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 520602968 ps |
| CPU time | 1.92 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=648894032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_t x_rx_disruption.648894032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.86308913 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 562843781 ps |
| CPU time | 1.89 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=86308913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_tx _rx_disruption.86308913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.3930265890 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 488868932 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3930265890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_ tx_rx_disruption.3930265890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.269814775 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 476549465 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=269814775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_t x_rx_disruption.269814775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.434321569 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 593634726 ps |
| CPU time | 2.07 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=434321569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_t x_rx_disruption.434321569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.451522831 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 527545513 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=451522831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_t x_rx_disruption.451522831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.2934979063 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 556601568 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2934979063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.2934979063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.316126436 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 497750227 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=316126436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_t x_rx_disruption.316126436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.2203151131 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 65056876 ps |
| CPU time | 0.64 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203151131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.2203151131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.2757214424 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 3659203435 ps |
| CPU time | 5.29 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:55 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2757214424 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.2757214424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.3823179177 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 19895606937 ps |
| CPU time | 22.59 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:04:12 PM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823179177 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.3823179177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.4289072084 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 26037708337 ps |
| CPU time | 33.07 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:04:23 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4289072084 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.4289072084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.1826685195 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 184272111 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:51 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1826685195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_av_buffer.1826685195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.3919586331 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 152453737 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:50 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3919586331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.3919586331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.3870555977 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 616791407 ps |
| CPU time | 2.11 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:52 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3870555977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.3870555977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.3818536194 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 376931341 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:03:51 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818536194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.3818536194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.602483500 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 34041285652 ps |
| CPU time | 56.09 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:04:46 PM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=602483500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_device_address.602483500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.1792054678 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 1922882898 ps |
| CPU time | 12.31 seconds |
| Started | Sep 01 01:03:48 PM UTC 24 |
| Finished | Sep 01 01:04:02 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792054678 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.1792054678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.1523674692 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 824652514 ps |
| CPU time | 2.2 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:52 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523674692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.1523674692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.272154022 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 143312906 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:51 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272154022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_disconnected.272154022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_enable.1352437941 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 32466370 ps |
| CPU time | 0.66 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:51 PM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1352437941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_enable.1352437941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.1413269124 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 880827766 ps |
| CPU time | 2.3 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:52 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1413269124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.1413269124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.260613414 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 328430976 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:51 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=260613414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.260613414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.4261113838 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 271179383 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:52 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261113838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_fifo_levels.4261113838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.3444191839 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 583971315 ps |
| CPU time | 2.95 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:53 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444191839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.3444191839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.833124336 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 212610081 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:51 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=833124336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.833124336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.2158937604 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 142892836 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:51 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2158937604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_stall.2158937604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.2801558959 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 214262227 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:52 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2801558959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_trans.2801558959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.2777970862 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 3747026826 ps |
| CPU time | 24.04 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:04:14 PM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777970862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.2777970862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.805509222 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 5820644935 ps |
| CPU time | 35.29 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:04:26 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=805509222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.805509222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.4012421901 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 193979789 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:51 PM UTC 24 |
| Peak memory | 214856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012421901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_in_err.4012421901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.4087880800 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 8133591957 ps |
| CPU time | 10.89 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:04:02 PM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4087880800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.4087880800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.1038383916 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 4852845753 ps |
| CPU time | 6.98 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:58 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038383916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.1038383916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.1168194814 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 4282771058 ps |
| CPU time | 36.9 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:04:28 PM UTC 24 |
| Peak memory | 234280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168194814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.1168194814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.3472450907 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 4207420993 ps |
| CPU time | 29.41 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:04:20 PM UTC 24 |
| Peak memory | 227644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472450907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.3472450907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.3434461940 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 270615848 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:52 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434461940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.3434461940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.3553352465 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 189455773 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3553352465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.3553352465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.1971012519 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 1860611654 ps |
| CPU time | 41.44 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:05:12 PM UTC 24 |
| Peak memory | 233768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1971012519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.1971012519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.1271606220 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 153770078 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271606220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.1271606220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.1047424474 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 179717403 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047424474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.1047424474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.2852558566 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 174481345 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 216468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852558566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_out_iso.2852558566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.115537330 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 166958900 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=115537330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_out_stall.115537330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.4212746818 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 174551950 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 216400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212746818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.4212746818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.1230254574 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 167423999 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 216052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230254574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_pending_in_trans.1230254574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.600321055 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 209715755 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=600321055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.600321055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.2566172675 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 194431962 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 216412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566172675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.2566172675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.2957894425 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 34871897 ps |
| CPU time | 0.6 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957894425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.2957894425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.2251017027 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 7267642848 ps |
| CPU time | 16.58 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:48 PM UTC 24 |
| Peak memory | 231832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2251017027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_pkt_buffer.2251017027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.1337358977 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 179231264 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337358977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.1337358977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.1240112570 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 263396649 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240112570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.1240112570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.2468582235 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 249361083 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468582235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.2468582235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.34336636 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 207983302 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=34336636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.34336636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.800502798 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 142672862 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=800502798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_rx_crc_err.800502798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.2894456898 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 434898203 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894456898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.2894456898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.4057478813 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 152557812 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057478813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.4057478813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.1254426500 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 165389310 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254426500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 35.usbdev_setup_trans_ignored.1254426500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.2793581086 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 222673612 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2793581086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.2793581086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.3304470306 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 2032165315 ps |
| CPU time | 16.28 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:48 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3304470306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.3304470306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.923066787 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 171050871 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=923066787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.923066787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.753599789 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 179817615 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=753599789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_stall_trans.753599789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.3318642459 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 196785382 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318642459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.3318642459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.1888088268 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 3400103729 ps |
| CPU time | 23.1 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:55 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888088268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_streaming_out.1888088268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.1462943780 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 429487799 ps |
| CPU time | 6.68 seconds |
| Started | Sep 01 01:03:49 PM UTC 24 |
| Finished | Sep 01 01:03:57 PM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1462943780 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.1462943780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.2782816531 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 515760441 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2782816531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_ tx_rx_disruption.2782816531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.896947533 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 583757708 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=896947533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_t x_rx_disruption.896947533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.2465691888 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 548580965 ps |
| CPU time | 2.17 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2465691888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.2465691888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.1819580484 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 574139640 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1819580484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.1819580484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.3459301726 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 618349777 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3459301726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.3459301726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.851766808 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 598016713 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=851766808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_t x_rx_disruption.851766808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.3223348245 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 632378566 ps |
| CPU time | 1.98 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3223348245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.3223348245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.1645006172 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 651253551 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1645006172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.1645006172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.2806226477 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 643982238 ps |
| CPU time | 2.2 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2806226477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_ tx_rx_disruption.2806226477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.205916553 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 539482338 ps |
| CPU time | 2.03 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=205916553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_t x_rx_disruption.205916553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.49300542 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 41910786 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=49300542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.49300542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.286726078 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 6324608761 ps |
| CPU time | 8.4 seconds |
| Started | Sep 01 01:04:30 PM UTC 24 |
| Finished | Sep 01 01:04:40 PM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=286726078 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.286726078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.1990087289 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 13504333316 ps |
| CPU time | 15.61 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:48 PM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1990087289 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.1990087289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.330088038 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 23748995026 ps |
| CPU time | 30.97 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:05:03 PM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=330088038 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.330088038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.264592049 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 181500518 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=264592049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_av_buffer.264592049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.1513226955 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 149925304 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513226955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_bitstuff_err.1513226955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.2233217152 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 258713821 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 214740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2233217152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.2233217152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.4003514023 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 396592340 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4003514023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.4003514023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.3124484469 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 25446819509 ps |
| CPU time | 38.73 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:05:11 PM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3124484469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.3124484469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.1666278641 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 3368545407 ps |
| CPU time | 24.74 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:57 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1666278641 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.1666278641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.2255155313 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 1035495830 ps |
| CPU time | 2.12 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:34 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2255155313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.2255155313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.764735544 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 146007914 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=764735544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_disconnected.764735544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_enable.694654688 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 37933387 ps |
| CPU time | 0.68 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=694654688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_enable.694654688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.2315456828 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 883603371 ps |
| CPU time | 2.24 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:35 PM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315456828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.2315456828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.3705313711 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 466620641 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:34 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705313711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.3705313711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.3672665447 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 150474818 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672665447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_fifo_levels.3672665447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.2025803142 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 379889673 ps |
| CPU time | 2.17 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:35 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025803142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.2025803142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.816617959 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 184100667 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816617959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.816617959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.589601649 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 147890195 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=589601649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_in_stall.589601649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.529330750 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 165654592 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:04:33 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=529330750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_in_trans.529330750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.4124742703 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 2572993351 ps |
| CPU time | 61.65 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:05:35 PM UTC 24 |
| Peak memory | 229760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124742703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.4124742703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.480534921 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 8256952433 ps |
| CPU time | 53.25 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:05:26 PM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=480534921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.480534921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.709531574 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 268491265 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709531574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_link_in_err.709531574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.3381582833 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 10510596428 ps |
| CPU time | 14.34 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:30 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381582833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_resume.3381582833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.4269303296 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 8535010280 ps |
| CPU time | 10.14 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:25 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269303296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.4269303296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.2054855194 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 3110677204 ps |
| CPU time | 72.41 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:06:28 PM UTC 24 |
| Peak memory | 235920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2054855194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.2054855194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.1200483243 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 2508905528 ps |
| CPU time | 20.3 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:36 PM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200483243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.1200483243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.3068618900 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 320339503 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068618900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.3068618900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.116680184 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 228360195 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=116680184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.116680184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.10933329 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 2181231357 ps |
| CPU time | 48.89 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:06:05 PM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=10933329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TE ST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.10933329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.3003957489 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 245384076 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003957489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.3003957489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.3333703671 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 158324011 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333703671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.3333703671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.3823109301 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 225428155 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823109301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.3823109301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.3084034016 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 162872278 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084034016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.3084034016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.2145048898 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 207986572 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145048898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_out_stall.2145048898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.156008449 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 212876708 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=156008449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_out_trans_nak.156008449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.711064518 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 150650123 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:05:14 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711064518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pending_in_trans.711064518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.3025267095 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 218978125 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025267095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.3025267095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.1479498576 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 152333101 ps |
| CPU time | 0.72 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479498576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.1479498576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.4060234411 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 46104966 ps |
| CPU time | 0.65 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:16 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060234411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.4060234411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.3146536200 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 11316802949 ps |
| CPU time | 26.84 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:43 PM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146536200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.3146536200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.421382500 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 173518972 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=421382500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_pkt_received.421382500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.1176654945 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 205996045 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176654945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.1176654945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.856248500 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 189441357 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=856248500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_random_length_in_transaction.856248500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.3484221738 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 191329959 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3484221738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.3484221738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.2739713860 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 167361520 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739713860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.2739713860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.2848024138 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 314604755 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848024138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_rx_full.2848024138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.361191205 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 185297959 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=361191205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_setup_stage.361191205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.2658364401 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 171258925 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2658364401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 36.usbdev_setup_trans_ignored.2658364401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.3562497147 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 222606720 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562497147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.3562497147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.2801171939 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 2483335027 ps |
| CPU time | 61.04 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:06:18 PM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2801171939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.2801171939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.335636593 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 197958404 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=335636593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.335636593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.3770917951 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 199479880 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770917951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.3770917951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.1845578493 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 484989569 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845578493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.1845578493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.3377859804 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 2032283386 ps |
| CPU time | 47.23 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:06:04 PM UTC 24 |
| Peak memory | 227384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377859804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_streaming_out.3377859804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.3463780942 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 1706942261 ps |
| CPU time | 32.61 seconds |
| Started | Sep 01 01:04:31 PM UTC 24 |
| Finished | Sep 01 01:05:05 PM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463780942 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.3463780942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.315304181 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 601021667 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=315304181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_tx _rx_disruption.315304181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.1279873511 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 547298725 ps |
| CPU time | 1.81 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1279873511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_ tx_rx_disruption.1279873511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.2385624278 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 647056367 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2385624278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.2385624278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.629255233 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 529896367 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=629255233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_t x_rx_disruption.629255233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.2875268147 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 557400743 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2875268147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_ tx_rx_disruption.2875268147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.2904694448 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 633558886 ps |
| CPU time | 2.12 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 216724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2904694448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_ tx_rx_disruption.2904694448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.1515327537 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 541067143 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1515327537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_ tx_rx_disruption.1515327537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.279683775 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 494048385 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=279683775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_t x_rx_disruption.279683775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.3947289445 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 434620146 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 216736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3947289445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.3947289445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.3644380754 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 436990276 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3644380754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.3644380754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.63963459 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 530583194 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=63963459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_tx _rx_disruption.63963459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.1431148278 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 103560510 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:02 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431148278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.1431148278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.4239222285 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 11219337129 ps |
| CPU time | 15.69 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:32 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239222285 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.4239222285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.1217530544 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 19163885795 ps |
| CPU time | 22.48 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:39 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217530544 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.1217530544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.1460088763 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 29633022042 ps |
| CPU time | 31.98 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:49 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1460088763 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.1460088763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.3512423561 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 185904114 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3512423561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.3512423561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.2392939790 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 187069496 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2392939790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.2392939790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.3734519966 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 262299998 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 214704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734519966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.3734519966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.3872490642 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 669969631 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872490642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.3872490642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.2321395954 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 38063951670 ps |
| CPU time | 51.07 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:06:08 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321395954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.2321395954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.3729912724 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 152574167 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729912724 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.3729912724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.782439337 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 508987640 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=782439337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disable_endpoint.782439337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.733498036 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 195936803 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=733498036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_disconnected.733498036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_enable.3654774528 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 58153205 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 01:05:16 PM UTC 24 |
| Finished | Sep 01 01:05:17 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3654774528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_enable.3654774528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.3060741944 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 799423192 ps |
| CPU time | 2.28 seconds |
| Started | Sep 01 01:05:16 PM UTC 24 |
| Finished | Sep 01 01:05:19 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3060741944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.3060741944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.2157924878 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 245584299 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:05:16 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157924878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_fifo_levels.2157924878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.45920048 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 413875333 ps |
| CPU time | 2.59 seconds |
| Started | Sep 01 01:05:16 PM UTC 24 |
| Finished | Sep 01 01:05:19 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=45920048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_fifo_rst.45920048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.3104785875 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 187549504 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:05:16 PM UTC 24 |
| Finished | Sep 01 01:05:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104785875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.3104785875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.3587665795 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 148339636 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:05:57 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587665795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.3587665795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.1114217809 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 270981673 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:05:57 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114217809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.1114217809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.1682143498 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 4642738988 ps |
| CPU time | 110.67 seconds |
| Started | Sep 01 01:05:16 PM UTC 24 |
| Finished | Sep 01 01:07:09 PM UTC 24 |
| Peak memory | 229748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682143498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.1682143498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.3799837043 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 10175269891 ps |
| CPU time | 103.69 seconds |
| Started | Sep 01 01:05:57 PM UTC 24 |
| Finished | Sep 01 01:07:43 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799837043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.3799837043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.954742980 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 250555624 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:05:57 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=954742980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_link_in_err.954742980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.4293794213 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 33923808382 ps |
| CPU time | 43.78 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4293794213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.4293794213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.3244828938 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 4233035728 ps |
| CPU time | 6.23 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:05 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3244828938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_link_suspend.3244828938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.849031374 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 3087149423 ps |
| CPU time | 19.93 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:19 PM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=849031374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.849031374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.1698467600 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 2705555472 ps |
| CPU time | 16.96 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:16 PM UTC 24 |
| Peak memory | 229428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698467600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.1698467600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.2635926128 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 259189711 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635926128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.2635926128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.3012136638 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 243585728 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012136638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.3012136638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.2476687367 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 1703144973 ps |
| CPU time | 10.99 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:10 PM UTC 24 |
| Peak memory | 227452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476687367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.2476687367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.2229979526 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 150972636 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2229979526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.2229979526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.2718748954 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 147148402 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718748954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.2718748954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.2162128686 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 184694839 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162128686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.2162128686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.3358121183 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 175433192 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3358121183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.3358121183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.305713996 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 159130559 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=305713996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_out_stall.305713996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.1871283069 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 197630709 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871283069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_out_trans_nak.1871283069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.1381346801 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 157633402 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1381346801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_pending_in_trans.1381346801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.2728861075 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 249705075 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728861075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.2728861075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.2469622638 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 144566595 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469622638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.2469622638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.3417053331 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 31140606 ps |
| CPU time | 0.65 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3417053331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.3417053331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.476823400 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 23686849376 ps |
| CPU time | 57.17 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:58 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476823400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_pkt_buffer.476823400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.483681759 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 179495723 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=483681759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_pkt_received.483681759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.1542314056 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 246137273 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542314056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.1542314056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.3555462794 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 229468541 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3555462794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_random_length_in_transaction.3555462794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.3540372024 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 194332928 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540372024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.3540372024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.1045035647 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 135582933 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1045035647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.1045035647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.3947987320 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 261636350 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947987320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.3947987320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.2437808586 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 146593406 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437808586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.2437808586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.2714305141 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 147011276 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714305141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 37.usbdev_setup_trans_ignored.2714305141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.2848072318 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 198694599 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848072318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.2848072318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.4075505692 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 2601733257 ps |
| CPU time | 21.86 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:22 PM UTC 24 |
| Peak memory | 234372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075505692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.4075505692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.555842873 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 155948451 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:01 PM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=555842873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.555842873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.3251573831 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 245223899 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:02 PM UTC 24 |
| Peak memory | 214188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251573831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.3251573831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.998847384 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 1199959821 ps |
| CPU time | 3.07 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:03 PM UTC 24 |
| Peak memory | 215504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=998847384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_stream_len_max.998847384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.4109466150 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 3089920460 ps |
| CPU time | 26.05 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:27 PM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109466150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_streaming_out.4109466150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.879905491 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 2228462947 ps |
| CPU time | 12.35 seconds |
| Started | Sep 01 01:05:15 PM UTC 24 |
| Finished | Sep 01 01:05:29 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=879905491 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.879905491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.3823817408 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 504043828 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:05:58 PM UTC 24 |
| Finished | Sep 01 01:06:02 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3823817408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_t x_rx_disruption.3823817408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.3043966150 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 643258206 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3043966150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.3043966150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.2348285608 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 597254227 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2348285608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_ tx_rx_disruption.2348285608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.1906677662 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 502028807 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:43 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1906677662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.1906677662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.2441060410 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 576912493 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2441060410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_ tx_rx_disruption.2441060410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.914114749 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 642243688 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 01:27:40 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=914114749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_t x_rx_disruption.914114749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.714919038 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 580364581 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 01:27:41 PM UTC 24 |
| Finished | Sep 01 01:27:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=714919038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_t x_rx_disruption.714919038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.436565523 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 514654763 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:29:04 PM UTC 24 |
| Finished | Sep 01 01:29:07 PM UTC 24 |
| Peak memory | 214636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=436565523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_t x_rx_disruption.436565523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.1263934038 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 512891622 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:29:04 PM UTC 24 |
| Finished | Sep 01 01:29:07 PM UTC 24 |
| Peak memory | 214764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1263934038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.1263934038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.3015303093 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 563929955 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 01:29:04 PM UTC 24 |
| Finished | Sep 01 01:29:07 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3015303093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_ tx_rx_disruption.3015303093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.3026219001 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 519457364 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:29:04 PM UTC 24 |
| Finished | Sep 01 01:29:07 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3026219001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_ tx_rx_disruption.3026219001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.2985386510 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 129601295 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2985386510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.2985386510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.4103287276 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 8866512168 ps |
| CPU time | 11.37 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:12 PM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103287276 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.4103287276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.739464486 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 14994747070 ps |
| CPU time | 18.29 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:19 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=739464486 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.739464486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.1769837236 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 28859620027 ps |
| CPU time | 32.17 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:33 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769837236 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.1769837236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.1103738348 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 199036127 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103738348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_av_buffer.1103738348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.2425188454 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 135331911 ps |
| CPU time | 0.72 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:02 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425188454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_bitstuff_err.2425188454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.4083592090 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 302800654 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083592090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.4083592090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.2138979956 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 286017665 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:02 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138979956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.2138979956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.1687756484 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 43536430756 ps |
| CPU time | 68.59 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:07:10 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687756484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.1687756484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.1444900399 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 1052353718 ps |
| CPU time | 7.91 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:09 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444900399 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.1444900399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.1049011158 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 435115751 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:02 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1049011158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.1049011158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.4020443429 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 165018642 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:02 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020443429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.4020443429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_enable.1243215789 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 61795648 ps |
| CPU time | 0.64 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:42 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243215789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.1243215789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.3858520663 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 887227344 ps |
| CPU time | 2.36 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858520663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.3858520663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.3523239197 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 464867117 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523239197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.3523239197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.1846402826 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 283247508 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846402826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_fifo_levels.1846402826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.1076379979 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 462237780 ps |
| CPU time | 2.77 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:45 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076379979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_fifo_rst.1076379979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.572747257 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 185049167 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=572747257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.572747257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.796823143 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 205174102 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=796823143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_in_stall.796823143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.1401469375 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 205853220 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401469375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.1401469375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.469112372 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 5101250713 ps |
| CPU time | 44.18 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:07:27 PM UTC 24 |
| Peak memory | 234228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=469112372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.469112372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.3211310145 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 13638033732 ps |
| CPU time | 136.92 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:09:00 PM UTC 24 |
| Peak memory | 219964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211310145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.3211310145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.553304707 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 167324666 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=553304707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_link_in_err.553304707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.3305612260 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 9739417175 ps |
| CPU time | 13.91 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:56 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305612260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.3305612260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.4134903531 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 5532985537 ps |
| CPU time | 7.98 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:50 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134903531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.4134903531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.1073647434 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 2604040671 ps |
| CPU time | 60.03 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:07:43 PM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073647434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.1073647434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.2980389469 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 2306155181 ps |
| CPU time | 14.2 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:57 PM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980389469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.2980389469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.3395618272 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 240332833 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395618272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.3395618272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.973788132 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 224220807 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973788132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.973788132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.2839960599 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 3696020123 ps |
| CPU time | 87.69 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:08:11 PM UTC 24 |
| Peak memory | 226612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839960599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.2839960599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.3258691331 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 149742785 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258691331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.3258691331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.163508271 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 141385617 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 215088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=163508271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.163508271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.1119053310 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 180804487 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119053310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.1119053310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.3478753532 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 234457041 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3478753532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.3478753532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.205152783 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 169475776 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:06:41 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=205152783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_out_trans_nak.205152783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.3919959731 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 155853615 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3919959731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.3919959731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.1647166914 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 183880124 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647166914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.1647166914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.3968453576 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 147031403 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968453576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.3968453576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.3267969083 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 35414875 ps |
| CPU time | 0.67 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:43 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267969083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.3267969083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.1024556450 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 20707914554 ps |
| CPU time | 48.01 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 234192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024556450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.1024556450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.2211246245 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 225552311 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211246245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.2211246245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.433816502 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 177135187 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=433816502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_pkt_sent.433816502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.262488033 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 180116423 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=262488033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_random_length_in_transaction.262488033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.520466441 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 156027841 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 214768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=520466441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.520466441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.4111819910 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 191965817 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111819910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_rx_crc_err.4111819910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.1009750478 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 276611595 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009750478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.1009750478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.882014648 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 153419354 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=882014648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_setup_stage.882014648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.3964103381 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 165020467 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3964103381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.3964103381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.3710238372 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 211571442 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710238372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.3710238372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.1669303712 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 3586433289 ps |
| CPU time | 86.74 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:08:11 PM UTC 24 |
| Peak memory | 234072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669303712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.1669303712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.3445626388 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 239726640 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 216484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445626388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.3445626388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.3457319818 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 169408184 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 216420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457319818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.3457319818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.2971013729 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 248785289 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971013729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.2971013729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.3162299013 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 1962222521 ps |
| CPU time | 16.43 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:07:00 PM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162299013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.3162299013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.3604847112 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 2205815975 ps |
| CPU time | 12.39 seconds |
| Started | Sep 01 01:05:59 PM UTC 24 |
| Finished | Sep 01 01:06:13 PM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604847112 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.3604847112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.20800309 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 502362386 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:45 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=20800309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_tx_ rx_disruption.20800309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.3158265427 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 600329795 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:29:04 PM UTC 24 |
| Finished | Sep 01 01:29:07 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3158265427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_ tx_rx_disruption.3158265427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.1199526824 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 597135560 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:29:04 PM UTC 24 |
| Finished | Sep 01 01:29:07 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1199526824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.1199526824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.2551935571 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 632722257 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2551935571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_ tx_rx_disruption.2551935571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.1976336865 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 478392964 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1976336865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.1976336865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.444041415 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 553040872 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=444041415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_t x_rx_disruption.444041415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.1199630555 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 593237329 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1199630555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.1199630555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.608835350 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 477074424 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:07 PM UTC 24 |
| Peak memory | 214556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=608835350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_t x_rx_disruption.608835350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.3048281852 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 589137079 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 214156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3048281852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.3048281852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.2984727073 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 584691968 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 216316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2984727073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.2984727073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.4005157545 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 45031585 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005157545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.4005157545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.164663035 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 11694589483 ps |
| CPU time | 13.17 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:57 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=164663035 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.164663035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.1681583969 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 13686513666 ps |
| CPU time | 15.11 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:59 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1681583969 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.1681583969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.3449842125 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 25533457516 ps |
| CPU time | 32.42 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:07:16 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449842125 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.3449842125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.208082874 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 170613949 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208082874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_av_buffer.208082874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.3767974882 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 155892609 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:44 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767974882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.3767974882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.3936785421 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 420128097 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:45 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936785421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.3936785421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.1464208774 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 818795214 ps |
| CPU time | 2.15 seconds |
| Started | Sep 01 01:06:42 PM UTC 24 |
| Finished | Sep 01 01:06:46 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464208774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.1464208774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.1956860622 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 44438964461 ps |
| CPU time | 73.31 seconds |
| Started | Sep 01 01:07:27 PM UTC 24 |
| Finished | Sep 01 01:08:43 PM UTC 24 |
| Peak memory | 217596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956860622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.1956860622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.3089800849 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 7669196813 ps |
| CPU time | 42.66 seconds |
| Started | Sep 01 01:07:27 PM UTC 24 |
| Finished | Sep 01 01:08:12 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089800849 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.3089800849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.3874847414 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 512771491 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:07:27 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874847414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_disable_endpoint.3874847414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.2543767411 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 137474298 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:07:27 PM UTC 24 |
| Finished | Sep 01 01:07:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2543767411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_disconnected.2543767411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_enable.3256359958 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 98264569 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:30 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256359958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.3256359958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.207795927 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 1049539338 ps |
| CPU time | 2.76 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=207795927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.207795927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.3876971015 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 586567514 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876971015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.3876971015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.634416966 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 286539039 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=634416966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_fifo_levels.634416966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.334291980 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 199796502 ps |
| CPU time | 2.25 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=334291980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_fifo_rst.334291980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.3218912583 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 170190714 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218912583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.3218912583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.465106573 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 176940522 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 214884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=465106573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_in_stall.465106573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.1591948872 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 185574313 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 214828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591948872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_trans.1591948872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.368962584 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 4611839175 ps |
| CPU time | 102.51 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:09:13 PM UTC 24 |
| Peak memory | 234332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=368962584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.368962584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.1538349183 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 5467399649 ps |
| CPU time | 29.98 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:08:00 PM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1538349183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.1538349183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.4086229104 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 221413278 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086229104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_in_err.4086229104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.3367481405 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 10272150634 ps |
| CPU time | 13.94 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:44 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367481405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.3367481405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.3676673887 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 3313333088 ps |
| CPU time | 4.97 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:35 PM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676673887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.3676673887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.3001326853 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 3166355358 ps |
| CPU time | 26.23 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:56 PM UTC 24 |
| Peak memory | 227636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001326853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.3001326853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.4157775782 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 3136906192 ps |
| CPU time | 20.44 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:51 PM UTC 24 |
| Peak memory | 227508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157775782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.4157775782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.646997856 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 292170500 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=646997856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.646997856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.4236687056 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 200947687 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236687056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.4236687056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.2268300334 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 3470011368 ps |
| CPU time | 24.54 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:54 PM UTC 24 |
| Peak memory | 227448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268300334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.2268300334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.2555308586 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 150062914 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555308586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.2555308586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.2691156019 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 141479205 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2691156019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.2691156019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.2313128766 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 179931138 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2313128766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_nak_trans.2313128766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.3442397725 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 217884824 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442397725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_out_iso.3442397725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.3378077695 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 193402068 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 216380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3378077695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_out_stall.3378077695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.4059610602 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 211234481 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059610602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_out_trans_nak.4059610602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.2915419312 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 162537791 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2915419312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.2915419312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.2272621197 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 235088088 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2272621197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.2272621197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.4002731907 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 146179736 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002731907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.4002731907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.58193685 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 44014601 ps |
| CPU time | 0.68 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 214716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=58193685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_phy_pins_sense.58193685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.59511075 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 16319005306 ps |
| CPU time | 35.77 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:08:06 PM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=59511075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_buffer.59511075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.3903850992 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 174232182 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903850992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.3903850992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.1332647923 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 173165251 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:31 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332647923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.1332647923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.4060124052 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 237545159 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060124052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.4060124052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.1366283387 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 196320523 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:07:28 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366283387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.1366283387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.2551319332 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 161649676 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551319332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.2551319332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.355941264 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 453858193 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=355941264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_rx_full.355941264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.1082221584 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 150670046 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1082221584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_setup_stage.1082221584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.116012470 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 142627657 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=116012470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 39.usbdev_setup_trans_ignored.116012470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.3954090096 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 254220084 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3954090096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.3954090096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.2145792976 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 3112415931 ps |
| CPU time | 24.21 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:55 PM UTC 24 |
| Peak memory | 227332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145792976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.2145792976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.616721095 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 220712655 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=616721095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.616721095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.2191799003 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 158518329 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191799003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_stall_trans.2191799003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.3081949721 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 541929052 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:32 PM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081949721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.3081949721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.1326242446 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 2648902582 ps |
| CPU time | 61.11 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:08:32 PM UTC 24 |
| Peak memory | 234300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326242446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_streaming_out.1326242446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.352881131 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 479522524 ps |
| CPU time | 7.14 seconds |
| Started | Sep 01 01:07:27 PM UTC 24 |
| Finished | Sep 01 01:07:36 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=352881131 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.352881131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.69117554 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 477444253 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:33 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=69117554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_tx_ rx_disruption.69117554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.3876405197 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 509403253 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3876405197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.3876405197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.1287842912 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 525154716 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1287842912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.1287842912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.554458345 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 635397167 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 216044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=554458345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_t x_rx_disruption.554458345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.410975364 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 558801776 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=410975364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_t x_rx_disruption.410975364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.2951276903 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 540918629 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2951276903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.2951276903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.2950844343 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 497154051 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2950844343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.2950844343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.1663110440 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 466808288 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1663110440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.1663110440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.4147770468 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 527205634 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4147770468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.4147770468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.3442069929 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 538389098 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3442069929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.3442069929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.3509911711 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 629933478 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 216660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3509911711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.3509911711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.1659426540 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 94414378 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 12:48:08 PM UTC 24 |
| Finished | Sep 01 12:48:10 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1659426540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.1659426540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.613898872 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 3927234595 ps |
| CPU time | 10.55 seconds |
| Started | Sep 01 12:47:24 PM UTC 24 |
| Finished | Sep 01 12:47:36 PM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=613898872 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.613898872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.3566290785 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 18584398229 ps |
| CPU time | 36.79 seconds |
| Started | Sep 01 12:47:24 PM UTC 24 |
| Finished | Sep 01 12:48:02 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566290785 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.3566290785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.2257112425 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 30935867767 ps |
| CPU time | 52.53 seconds |
| Started | Sep 01 12:47:26 PM UTC 24 |
| Finished | Sep 01 12:48:20 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257112425 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.2257112425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.4134990264 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 196903224 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:47:26 PM UTC 24 |
| Finished | Sep 01 12:47:28 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134990264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.4134990264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.1881162665 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 186333508 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:47:26 PM UTC 24 |
| Finished | Sep 01 12:47:28 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881162665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.1881162665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.3744401549 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 144154689 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:47:26 PM UTC 24 |
| Finished | Sep 01 12:47:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744401549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.3744401549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.3982998609 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 143076221 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:47:27 PM UTC 24 |
| Finished | Sep 01 12:47:29 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3982998609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.3982998609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.741326407 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 175373965 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:47:28 PM UTC 24 |
| Finished | Sep 01 12:47:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=741326407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_data_toggle_clear.741326407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.1531402705 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 669234198 ps |
| CPU time | 3.51 seconds |
| Started | Sep 01 12:47:29 PM UTC 24 |
| Finished | Sep 01 12:47:34 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531402705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.1531402705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.2329567757 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 22068100293 ps |
| CPU time | 63.61 seconds |
| Started | Sep 01 12:47:29 PM UTC 24 |
| Finished | Sep 01 12:48:35 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329567757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.2329567757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.2557697340 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 5607983448 ps |
| CPU time | 58.13 seconds |
| Started | Sep 01 12:47:29 PM UTC 24 |
| Finished | Sep 01 12:48:29 PM UTC 24 |
| Peak memory | 217396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2557697340 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.2557697340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.685566155 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 871186901 ps |
| CPU time | 3.85 seconds |
| Started | Sep 01 12:47:31 PM UTC 24 |
| Finished | Sep 01 12:47:35 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=685566155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_disable_endpoint.685566155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.1241147496 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 156317415 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:47:32 PM UTC 24 |
| Finished | Sep 01 12:47:34 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241147496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_disconnected.1241147496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_enable.1950182064 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 39602785 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 12:47:32 PM UTC 24 |
| Finished | Sep 01 12:47:34 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950182064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.1950182064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.4293030992 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 783068512 ps |
| CPU time | 3.9 seconds |
| Started | Sep 01 12:47:35 PM UTC 24 |
| Finished | Sep 01 12:47:40 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4293030992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.4293030992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.484419412 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 367430794 ps |
| CPU time | 1.93 seconds |
| Started | Sep 01 12:47:35 PM UTC 24 |
| Finished | Sep 01 12:47:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=484419412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.484419412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.3400103805 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 246359689 ps |
| CPU time | 1.77 seconds |
| Started | Sep 01 12:47:35 PM UTC 24 |
| Finished | Sep 01 12:47:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400103805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_fifo_levels.3400103805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.2033336562 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 220843748 ps |
| CPU time | 2.05 seconds |
| Started | Sep 01 12:47:35 PM UTC 24 |
| Finished | Sep 01 12:47:39 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2033336562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.2033336562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.2224925589 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 117197816182 ps |
| CPU time | 250.96 seconds |
| Started | Sep 01 12:47:37 PM UTC 24 |
| Finished | Sep 01 12:51:51 PM UTC 24 |
| Peak memory | 220004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224925589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.2224925589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.97117847 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 113087946480 ps |
| CPU time | 209.29 seconds |
| Started | Sep 01 12:47:37 PM UTC 24 |
| Finished | Sep 01 12:51:09 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=97117847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm lin e+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_n ame 4.usbdev_freq_hiclk_max.97117847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.2450388196 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 102127589078 ps |
| CPU time | 202.36 seconds |
| Started | Sep 01 12:47:41 PM UTC 24 |
| Finished | Sep 01 12:51:06 PM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450388196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.2450388196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.1801100086 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 108222276491 ps |
| CPU time | 246.25 seconds |
| Started | Sep 01 12:47:41 PM UTC 24 |
| Finished | Sep 01 12:51:51 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1801100086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_loclk_max.1801100086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.1630792282 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 94149842345 ps |
| CPU time | 218.04 seconds |
| Started | Sep 01 12:47:41 PM UTC 24 |
| Finished | Sep 01 12:51:22 PM UTC 24 |
| Peak memory | 217400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1630792282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.1630792282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.4001613047 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 166548576 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:47:41 PM UTC 24 |
| Finished | Sep 01 12:47:44 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4001613047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.4001613047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.1600909131 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 137430435 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:47:41 PM UTC 24 |
| Finished | Sep 01 12:47:44 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600909131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_stall.1600909131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.3859668310 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 195727642 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:47:41 PM UTC 24 |
| Finished | Sep 01 12:47:44 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859668310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.3859668310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.1467870119 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 3639902479 ps |
| CPU time | 38.44 seconds |
| Started | Sep 01 12:47:41 PM UTC 24 |
| Finished | Sep 01 12:48:21 PM UTC 24 |
| Peak memory | 227736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467870119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.1467870119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.1994675094 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 10636042072 ps |
| CPU time | 66.82 seconds |
| Started | Sep 01 12:47:41 PM UTC 24 |
| Finished | Sep 01 12:48:50 PM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1994675094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.1994675094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.185212874 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 204359373 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:47:44 PM UTC 24 |
| Finished | Sep 01 12:47:46 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=185212874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_link_in_err.185212874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.1489421578 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 29736839937 ps |
| CPU time | 52.84 seconds |
| Started | Sep 01 12:47:44 PM UTC 24 |
| Finished | Sep 01 12:48:39 PM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489421578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.1489421578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.852039817 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 9743860707 ps |
| CPU time | 19.15 seconds |
| Started | Sep 01 12:47:44 PM UTC 24 |
| Finished | Sep 01 12:48:05 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=852039817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_suspend.852039817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.4222828185 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 4091691015 ps |
| CPU time | 27.89 seconds |
| Started | Sep 01 12:47:44 PM UTC 24 |
| Finished | Sep 01 12:48:14 PM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4222828185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.4222828185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.4015275351 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 1689874157 ps |
| CPU time | 23.71 seconds |
| Started | Sep 01 12:47:47 PM UTC 24 |
| Finished | Sep 01 12:48:12 PM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015275351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.4015275351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.232650224 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 308484866 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 12:47:47 PM UTC 24 |
| Finished | Sep 01 12:47:50 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=232650224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.232650224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.1532986017 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 193450549 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:47:47 PM UTC 24 |
| Finished | Sep 01 12:47:50 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532986017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.1532986017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.1239539787 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 3433132137 ps |
| CPU time | 113.11 seconds |
| Started | Sep 01 12:47:47 PM UTC 24 |
| Finished | Sep 01 12:49:43 PM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239539787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.1239539787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.1871948472 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 2760112622 ps |
| CPU time | 25.92 seconds |
| Started | Sep 01 12:47:47 PM UTC 24 |
| Finished | Sep 01 12:48:15 PM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871948472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.1871948472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.3229218727 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 2573536522 ps |
| CPU time | 76.08 seconds |
| Started | Sep 01 12:47:47 PM UTC 24 |
| Finished | Sep 01 12:49:05 PM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3229218727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.3229218727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.1362786133 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 173423314 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:47:50 PM UTC 24 |
| Finished | Sep 01 12:47:53 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1362786133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.1362786133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.46262881 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 149664280 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:47:50 PM UTC 24 |
| Finished | Sep 01 12:47:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=46262881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.46262881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.3938358498 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 220543379 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:47:50 PM UTC 24 |
| Finished | Sep 01 12:47:52 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3938358498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_nak_trans.3938358498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.476152779 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 184684695 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:47:50 PM UTC 24 |
| Finished | Sep 01 12:47:53 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476152779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_out_iso.476152779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.2475834526 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 159754882 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 12:47:53 PM UTC 24 |
| Finished | Sep 01 12:47:55 PM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475834526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_out_stall.2475834526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.2008736337 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 213817718 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:47:53 PM UTC 24 |
| Finished | Sep 01 12:47:56 PM UTC 24 |
| Peak memory | 214812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008736337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_out_trans_nak.2008736337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.1607559808 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 150166980 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:47:53 PM UTC 24 |
| Finished | Sep 01 12:47:56 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1607559808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.1607559808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.708052865 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 251836064 ps |
| CPU time | 1.96 seconds |
| Started | Sep 01 12:47:53 PM UTC 24 |
| Finished | Sep 01 12:47:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=708052865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.708052865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.4109463289 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 205316750 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:47:53 PM UTC 24 |
| Finished | Sep 01 12:47:56 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109463289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.4109463289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.1788988179 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 210698820 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:47:54 PM UTC 24 |
| Finished | Sep 01 12:47:58 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788988179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.1788988179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.2191286397 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 40351589 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 12:47:55 PM UTC 24 |
| Finished | Sep 01 12:47:58 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191286397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.2191286397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.4163262565 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 12846484163 ps |
| CPU time | 48.44 seconds |
| Started | Sep 01 12:47:55 PM UTC 24 |
| Finished | Sep 01 12:48:46 PM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163262565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.4163262565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.2394839236 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 203115380 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:47:55 PM UTC 24 |
| Finished | Sep 01 12:47:59 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394839236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_pkt_received.2394839236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.900673282 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 217373271 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 12:47:56 PM UTC 24 |
| Finished | Sep 01 12:47:58 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=900673282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_pkt_sent.900673282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.4269650842 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 6051695465 ps |
| CPU time | 30.31 seconds |
| Started | Sep 01 12:47:57 PM UTC 24 |
| Finished | Sep 01 12:48:29 PM UTC 24 |
| Peak memory | 234268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269650842 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.4269650842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.3178934903 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 17505577965 ps |
| CPU time | 388.54 seconds |
| Started | Sep 01 12:47:59 PM UTC 24 |
| Finished | Sep 01 12:54:33 PM UTC 24 |
| Peak memory | 230324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3178934903 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.3178934903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.1069502723 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 205900049 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:47:57 PM UTC 24 |
| Finished | Sep 01 12:47:59 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1069502723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_random_length_in_transaction.1069502723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.2727362574 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 190403027 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:47:57 PM UTC 24 |
| Finished | Sep 01 12:48:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2727362574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.2727362574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.1344950953 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 20228096780 ps |
| CPU time | 37.3 seconds |
| Started | Sep 01 12:47:59 PM UTC 24 |
| Finished | Sep 01 12:48:38 PM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344950953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 4.usbdev_resume_link_active.1344950953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.4240243668 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 144938866 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:47:59 PM UTC 24 |
| Finished | Sep 01 12:48:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4240243668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_crc_err.4240243668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.1272424104 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 255592778 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 12:47:59 PM UTC 24 |
| Finished | Sep 01 12:48:02 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1272424104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.1272424104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.1687722748 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 207048330 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:48:00 PM UTC 24 |
| Finished | Sep 01 12:48:03 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687722748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.1687722748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.3606185522 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 1014078127 ps |
| CPU time | 3.04 seconds |
| Started | Sep 01 12:48:08 PM UTC 24 |
| Finished | Sep 01 12:48:12 PM UTC 24 |
| Peak memory | 251540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3606185522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.3606185522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.1267157278 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 518288344 ps |
| CPU time | 2.68 seconds |
| Started | Sep 01 12:48:00 PM UTC 24 |
| Finished | Sep 01 12:48:04 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267157278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.1267157278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.1164218345 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 166177626 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:48:01 PM UTC 24 |
| Finished | Sep 01 12:48:03 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164218345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.1164218345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.716144173 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 154493549 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:48:01 PM UTC 24 |
| Finished | Sep 01 12:48:03 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=716144173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_setup_stage.716144173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.3540555642 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 157500394 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:48:03 PM UTC 24 |
| Finished | Sep 01 12:48:05 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540555642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.3540555642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.3991928114 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 241320586 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 12:48:03 PM UTC 24 |
| Finished | Sep 01 12:48:06 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3991928114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.3991928114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.4009075927 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 1563137940 ps |
| CPU time | 57.07 seconds |
| Started | Sep 01 12:48:04 PM UTC 24 |
| Finished | Sep 01 12:49:03 PM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4009075927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.4009075927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.1349204466 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 174657124 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 12:48:04 PM UTC 24 |
| Finished | Sep 01 12:48:06 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1349204466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.1349204466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.3900130987 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 184781594 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:48:04 PM UTC 24 |
| Finished | Sep 01 12:48:07 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3900130987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.3900130987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.1674592342 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 574038192 ps |
| CPU time | 2.91 seconds |
| Started | Sep 01 12:48:05 PM UTC 24 |
| Finished | Sep 01 12:48:09 PM UTC 24 |
| Peak memory | 217136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674592342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.1674592342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.1853630395 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 2857623141 ps |
| CPU time | 36.73 seconds |
| Started | Sep 01 12:48:04 PM UTC 24 |
| Finished | Sep 01 12:48:42 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853630395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_streaming_out.1853630395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.2288483534 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 3459637673 ps |
| CPU time | 86.5 seconds |
| Started | Sep 01 12:48:06 PM UTC 24 |
| Finished | Sep 01 12:49:35 PM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2288483534 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.2288483534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.1825957737 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 558615367 ps |
| CPU time | 15.17 seconds |
| Started | Sep 01 12:47:29 PM UTC 24 |
| Finished | Sep 01 12:47:46 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1825957737 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.1825957737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.2086071784 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 547524386 ps |
| CPU time | 2.73 seconds |
| Started | Sep 01 12:48:06 PM UTC 24 |
| Finished | Sep 01 12:48:10 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2086071784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx _rx_disruption.2086071784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.2963160020 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 78328079 ps |
| CPU time | 0.6 seconds |
| Started | Sep 01 01:08:58 PM UTC 24 |
| Finished | Sep 01 01:09:00 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963160020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.2963160020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.1924980583 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 4208101050 ps |
| CPU time | 6.31 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:37 PM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924980583 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.1924980583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.1712716038 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 16225493590 ps |
| CPU time | 19.67 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:51 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1712716038 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.1712716038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.2848565649 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 25017926580 ps |
| CPU time | 28.13 seconds |
| Started | Sep 01 01:07:29 PM UTC 24 |
| Finished | Sep 01 01:07:59 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848565649 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.2848565649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.1024949771 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 150467692 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:08:11 PM UTC 24 |
| Finished | Sep 01 01:08:13 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024949771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.1024949771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.1132166179 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 167841561 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:08:11 PM UTC 24 |
| Finished | Sep 01 01:08:13 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132166179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.1132166179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.4000779056 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 419122780 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 01:08:11 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000779056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.4000779056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.2761312883 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 805639983 ps |
| CPU time | 2.05 seconds |
| Started | Sep 01 01:08:11 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761312883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.2761312883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.2803928270 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 39514900112 ps |
| CPU time | 62.62 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:09:16 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2803928270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.2803928270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.3173205241 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 9710591784 ps |
| CPU time | 52.1 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:09:05 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3173205241 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.3173205241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.2889576576 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 457302875 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889576576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_disable_endpoint.2889576576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.4188481111 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 161959225 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188481111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.4188481111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_enable.1390571368 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 63160130 ps |
| CPU time | 0.7 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390571368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.1390571368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.2267478483 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 837253578 ps |
| CPU time | 2.19 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2267478483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.2267478483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.486790022 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 152106734 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=486790022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.486790022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.2613990455 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 154506133 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613990455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.2613990455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.3409793508 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 182358004 ps |
| CPU time | 2.35 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409793508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.3409793508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.622591448 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 230091552 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=622591448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.622591448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.3559723932 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 146180322 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559723932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_stall.3559723932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.1926578891 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 211126955 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926578891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.1926578891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.2657927459 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 4342371756 ps |
| CPU time | 35.24 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:48 PM UTC 24 |
| Peak memory | 227636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657927459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.2657927459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.480603899 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 4753978619 ps |
| CPU time | 29.05 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:42 PM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=480603899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.480603899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.1104627047 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 189037572 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1104627047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_in_err.1104627047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.11815177 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 7342192021 ps |
| CPU time | 10.27 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:24 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=11815177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_link_resume.11815177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.1999501450 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 10449061949 ps |
| CPU time | 13.52 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:27 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999501450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.1999501450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.2526148075 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 3828749952 ps |
| CPU time | 85.94 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:09:40 PM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2526148075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.2526148075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.2349102850 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 2560456392 ps |
| CPU time | 21.09 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:35 PM UTC 24 |
| Peak memory | 227620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349102850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.2349102850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.424440140 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 239667052 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=424440140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.424440140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.3597887300 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 202833232 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597887300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.3597887300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.1977219999 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 2823840350 ps |
| CPU time | 65.33 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:09:19 PM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977219999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.1977219999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.2552413597 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 181018680 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2552413597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.2552413597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.1715336506 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 165980274 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715336506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.1715336506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.4076069043 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 221971282 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4076069043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.4076069043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.824482874 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 171435133 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=824482874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_out_iso.824482874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.3012742567 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 186003796 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012742567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_out_stall.3012742567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.1630357050 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 178243358 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1630357050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_out_trans_nak.1630357050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.1632170793 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 180045388 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632170793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.1632170793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.3639076387 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 188765368 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3639076387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.3639076387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.854893675 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 140242588 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=854893675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.854893675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.8817113 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 82720616 ps |
| CPU time | 0.66 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:14 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=8817113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_phy_pins_sense.8817113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.1486450107 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 19294232424 ps |
| CPU time | 45.79 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:09:00 PM UTC 24 |
| Peak memory | 231280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486450107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_pkt_buffer.1486450107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.3793147106 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 141174162 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793147106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_pkt_received.3793147106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.3589190873 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 190438313 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 214900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589190873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.3589190873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.2590382749 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 236860878 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590382749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_random_length_in_transaction.2590382749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.2073844776 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 152591712 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2073844776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.2073844776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.54806068 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 144701088 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=54806068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_rx_crc_err.54806068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.2925567440 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 346656495 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925567440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.2925567440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.1370473265 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 157282694 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1370473265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_setup_stage.1370473265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.1566538472 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 152394833 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566538472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 40.usbdev_setup_trans_ignored.1566538472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.813572890 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 203868696 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=813572890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.813572890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.2978320771 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 3694301805 ps |
| CPU time | 90.2 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:09:45 PM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978320771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.2978320771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.1470725875 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 161929428 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470725875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.1470725875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.839492071 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 187774319 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:08:13 PM UTC 24 |
| Finished | Sep 01 01:08:15 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=839492071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_stall_trans.839492071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.53192112 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 1382878180 ps |
| CPU time | 3.04 seconds |
| Started | Sep 01 01:08:58 PM UTC 24 |
| Finished | Sep 01 01:09:03 PM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=53192112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_stream_len_max.53192112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.14356198 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 1461603542 ps |
| CPU time | 11.4 seconds |
| Started | Sep 01 01:08:58 PM UTC 24 |
| Finished | Sep 01 01:09:11 PM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=14356198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_streaming_out.14356198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.1926971993 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 3604486620 ps |
| CPU time | 19.9 seconds |
| Started | Sep 01 01:08:12 PM UTC 24 |
| Finished | Sep 01 01:08:33 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926971993 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.1926971993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.1285405899 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 533958813 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:08:58 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1285405899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.1285405899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.74363613 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 601504476 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 216472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=74363613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_tx _rx_disruption.74363613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.2457166921 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 478029580 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2457166921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_ tx_rx_disruption.2457166921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.3490200278 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 442190874 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 214952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3490200278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.3490200278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.951901443 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 485850047 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=951901443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_t x_rx_disruption.951901443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.3321877432 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 685214660 ps |
| CPU time | 1.85 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3321877432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_ tx_rx_disruption.3321877432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.1405166612 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 581329354 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1405166612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.1405166612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.1021675182 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 551676262 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1021675182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.1021675182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.1192329617 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 523068643 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1192329617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.1192329617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.455810421 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 553078776 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=455810421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_t x_rx_disruption.455810421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.701242048 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 537830055 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=701242048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_t x_rx_disruption.701242048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.1606629232 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 49284394 ps |
| CPU time | 0.61 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:46 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1606629232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.1606629232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.1705605355 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 4719807186 ps |
| CPU time | 7.46 seconds |
| Started | Sep 01 01:08:58 PM UTC 24 |
| Finished | Sep 01 01:09:07 PM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705605355 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.1705605355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.1299849112 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 21287147287 ps |
| CPU time | 23.1 seconds |
| Started | Sep 01 01:08:58 PM UTC 24 |
| Finished | Sep 01 01:09:23 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1299849112 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.1299849112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.3840889838 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 23865578228 ps |
| CPU time | 28.25 seconds |
| Started | Sep 01 01:08:58 PM UTC 24 |
| Finished | Sep 01 01:09:28 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840889838 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.3840889838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.1846089465 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 169971089 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:08:58 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846089465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_av_buffer.1846089465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.1698024597 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 159142259 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:08:58 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698024597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.1698024597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.1543065290 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 240233217 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:08:58 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543065290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.1543065290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.3063081818 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 1150258743 ps |
| CPU time | 2.71 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:03 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063081818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.3063081818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.3048942902 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 50003426669 ps |
| CPU time | 70.75 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:10:11 PM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3048942902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.3048942902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.4008252191 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 729330403 ps |
| CPU time | 12.67 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:13 PM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008252191 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.4008252191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.2105348536 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 687153786 ps |
| CPU time | 2.02 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2105348536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.2105348536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.1458761795 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 152438954 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458761795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.1458761795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_enable.2997350323 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 33689165 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997350323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_enable.2997350323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.3316799617 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 837379561 ps |
| CPU time | 2.22 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316799617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.3316799617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.4015647882 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 230959201 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015647882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_fifo_levels.4015647882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.3689225615 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 289084362 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689225615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.3689225615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.1470676260 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 223242959 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470676260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.1470676260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.199535538 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 203325997 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=199535538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_in_stall.199535538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.3019390072 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 228782879 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3019390072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.3019390072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.1235216079 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 5100395033 ps |
| CPU time | 125.39 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:11:07 PM UTC 24 |
| Peak memory | 231040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1235216079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.1235216079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.3184352415 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 5456353890 ps |
| CPU time | 30.31 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:31 PM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184352415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.3184352415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.2840566813 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 178567377 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:01 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840566813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.2840566813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.2115439966 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 28682344115 ps |
| CPU time | 38.73 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:40 PM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2115439966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.2115439966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.221912708 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 10106037183 ps |
| CPU time | 11.94 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:13 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=221912708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_suspend.221912708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.3052659440 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 4742501033 ps |
| CPU time | 108.76 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:10:50 PM UTC 24 |
| Peak memory | 227564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052659440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.3052659440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.1791294310 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 2509371869 ps |
| CPU time | 58.19 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:59 PM UTC 24 |
| Peak memory | 227512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1791294310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.1791294310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.1803731611 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 234761023 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803731611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.1803731611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.4010536249 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 210872914 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010536249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.4010536249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.1792556395 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 3103085770 ps |
| CPU time | 74.77 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:10:16 PM UTC 24 |
| Peak memory | 229552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792556395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.1792556395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.549179518 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 158369287 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=549179518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.549179518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.3572832273 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 147318748 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572832273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.3572832273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.2684027559 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 192328157 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684027559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.2684027559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.3207077848 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 140323194 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3207077848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_out_iso.3207077848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.2433397604 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 189466319 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433397604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_out_stall.2433397604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.2966415539 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 161517789 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 214760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966415539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_out_trans_nak.2966415539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.2693746349 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 148795037 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2693746349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.2693746349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.78884757 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 253429062 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=78884757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.78884757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.1124710596 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 230172330 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124710596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.1124710596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.4075010349 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 40118929 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075010349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.4075010349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.3526056683 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 22353318701 ps |
| CPU time | 45.61 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3526056683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_pkt_buffer.3526056683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.3349788041 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 161699781 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349788041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.3349788041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.2842214658 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 216874095 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2842214658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.2842214658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.3140309594 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 242153744 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3140309594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.3140309594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.4235031388 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 168214563 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4235031388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.4235031388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.3593252354 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 243660281 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593252354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_rx_crc_err.3593252354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.1036329789 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 250130818 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036329789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.1036329789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.3309496883 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 154788671 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3309496883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_setup_stage.3309496883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.2152061909 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 186435953 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:09:00 PM UTC 24 |
| Finished | Sep 01 01:09:02 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152061909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.2152061909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.3019131331 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 214255892 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:46 PM UTC 24 |
| Peak memory | 214860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3019131331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.3019131331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.1598329773 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 3304347079 ps |
| CPU time | 28.22 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:10:13 PM UTC 24 |
| Peak memory | 229560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598329773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.1598329773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.2148246974 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 170990159 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:46 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148246974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.2148246974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.4162043900 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 150494705 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:46 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162043900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_stall_trans.4162043900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.2127087621 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 615408354 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2127087621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.2127087621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.3163751866 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 2934346920 ps |
| CPU time | 18.71 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:10:04 PM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163751866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_streaming_out.3163751866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.696533798 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 1373165658 ps |
| CPU time | 28.32 seconds |
| Started | Sep 01 01:08:59 PM UTC 24 |
| Finished | Sep 01 01:09:29 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=696533798 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.696533798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.597462379 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 520291036 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=597462379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_tx _rx_disruption.597462379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.3900556312 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 477668860 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3900556312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.3900556312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.1989421470 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 571096298 ps |
| CPU time | 1.81 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1989421470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_ tx_rx_disruption.1989421470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.3335578337 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 562831763 ps |
| CPU time | 1.92 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3335578337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_ tx_rx_disruption.3335578337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.3775104588 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 465350450 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3775104588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.3775104588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.74789901 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 532535683 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=74789901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_tx _rx_disruption.74789901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.3845489146 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 639859335 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:29:05 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3845489146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_ tx_rx_disruption.3845489146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.4098420179 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 425903763 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4098420179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.4098420179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.2266458576 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 622370470 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2266458576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.2266458576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.337327654 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 592950304 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=337327654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_t x_rx_disruption.337327654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.4264434625 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 481898336 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4264434625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.4264434625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.1455909784 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 34630966 ps |
| CPU time | 0.58 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455909784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.1455909784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.3061143397 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 3725276385 ps |
| CPU time | 5.41 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:50 PM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3061143397 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.3061143397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.1924419483 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 14413466363 ps |
| CPU time | 17.31 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:10:02 PM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924419483 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.1924419483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.533319940 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 24991736114 ps |
| CPU time | 27.29 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:10:13 PM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=533319940 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.533319940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.2616885513 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 172802825 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:46 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2616885513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.2616885513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.1080570426 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 189718983 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:46 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080570426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_bitstuff_err.1080570426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.1677927797 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 435149502 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677927797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 42.usbdev_data_toggle_clear.1677927797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.519379664 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 352268244 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=519379664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.519379664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.3062080678 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 36709382072 ps |
| CPU time | 56.64 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:10:42 PM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062080678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.3062080678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.732927380 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 1399049565 ps |
| CPU time | 25.58 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:10:11 PM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=732927380 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.732927380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.3051926332 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 510248243 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051926332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.3051926332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.3104015112 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 138682190 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:46 PM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104015112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_disconnected.3104015112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_enable.2696550730 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 44009548 ps |
| CPU time | 0.65 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:46 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2696550730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_enable.2696550730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.1776233948 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 940897531 ps |
| CPU time | 2.26 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:48 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776233948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.1776233948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.3683287759 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 701188908 ps |
| CPU time | 1.81 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:48 PM UTC 24 |
| Peak memory | 216300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683287759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.3683287759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.2867883153 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 571606591 ps |
| CPU time | 3.27 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:49 PM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867883153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.2867883153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.53481593 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 226586995 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 227360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=53481593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.53481593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.1320158608 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 154109294 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320158608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.1320158608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.1018855389 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 218675540 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018855389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.1018855389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.293045845 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 3449092693 ps |
| CPU time | 26.56 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:10:13 PM UTC 24 |
| Peak memory | 229228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=293045845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.293045845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.2793764768 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 12920653686 ps |
| CPU time | 69.93 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:10:56 PM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2793764768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.2793764768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.1522861971 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 164050739 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1522861971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.1522861971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.2911970978 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 12262069978 ps |
| CPU time | 16.82 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:10:03 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911970978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.2911970978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.1289297174 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 5012254577 ps |
| CPU time | 8.03 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:54 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1289297174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_link_suspend.1289297174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.203606732 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 3017039013 ps |
| CPU time | 18.68 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:10:05 PM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=203606732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.203606732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.2450117173 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 3020894381 ps |
| CPU time | 24.61 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:10:11 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450117173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.2450117173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.3395779589 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 269863159 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395779589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.3395779589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.798624516 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 200883478 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=798624516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.798624516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.1619682098 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 3662550392 ps |
| CPU time | 23.64 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:10:10 PM UTC 24 |
| Peak memory | 229732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619682098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.1619682098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.1683516416 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 166387940 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683516416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.1683516416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.125212682 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 157701694 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=125212682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.125212682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.152851495 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 208522929 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=152851495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_nak_trans.152851495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.55393047 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 213794346 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 214620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=55393047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_out_iso.55393047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.2670656708 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 184740003 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670656708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_out_stall.2670656708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.141282775 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 158126532 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 214716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=141282775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_out_trans_nak.141282775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.2081462831 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 173888154 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081462831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_pending_in_trans.2081462831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.374463535 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 279599788 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=374463535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.374463535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.257380160 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 161254711 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=257380160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.257380160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.4178532260 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 38780009 ps |
| CPU time | 0.62 seconds |
| Started | Sep 01 01:09:45 PM UTC 24 |
| Finished | Sep 01 01:09:47 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178532260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.4178532260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.1308988293 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 15539128252 ps |
| CPU time | 38.04 seconds |
| Started | Sep 01 01:10:35 PM UTC 24 |
| Finished | Sep 01 01:11:15 PM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308988293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_pkt_buffer.1308988293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.2452904931 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 143882821 ps |
| CPU time | 0.72 seconds |
| Started | Sep 01 01:10:35 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452904931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.2452904931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.439986978 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 186031501 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:10:35 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=439986978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_pkt_sent.439986978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.879137278 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 252030729 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879137278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_random_length_in_transaction.879137278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.203799508 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 158494921 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=203799508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.203799508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.2338557593 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 165267645 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2338557593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.2338557593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.607353647 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 288077121 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=607353647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_rx_full.607353647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.3434660789 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 164844764 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434660789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.3434660789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.1107355335 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 169851972 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107355335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.1107355335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.3246609237 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 214904806 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246609237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.3246609237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.2902035624 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 2931330862 ps |
| CPU time | 19.12 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:57 PM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902035624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.2902035624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.1774423601 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 170688744 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774423601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.1774423601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.2758223447 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 179307900 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758223447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stall_trans.2758223447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.1686927 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 1009632356 ps |
| CPU time | 2.48 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:40 PM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stream_len_max.1686927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.845124090 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 2840907176 ps |
| CPU time | 22.29 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:11:00 PM UTC 24 |
| Peak memory | 227692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=845124090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_streaming_out.845124090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.4279265784 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 1016236697 ps |
| CPU time | 18.52 seconds |
| Started | Sep 01 01:09:44 PM UTC 24 |
| Finished | Sep 01 01:10:04 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279265784 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.4279265784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.747740219 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 467282597 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=747740219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_tx _rx_disruption.747740219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.811506285 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 550016412 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=811506285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_t x_rx_disruption.811506285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.336301038 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 570242067 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=336301038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_t x_rx_disruption.336301038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.398943352 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 488680825 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=398943352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_t x_rx_disruption.398943352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.1127664466 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 558938876 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1127664466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.1127664466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.2353165359 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 592067998 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2353165359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.2353165359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.3881044603 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 595366680 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:10 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3881044603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.3881044603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.2955309907 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 572062891 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2955309907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_ tx_rx_disruption.2955309907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.3809887915 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 577693385 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:10 PM UTC 24 |
| Peak memory | 216152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3809887915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.3809887915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.808414936 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 609725330 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:10 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=808414936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_t x_rx_disruption.808414936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.976313553 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 467135586 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=976313553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_t x_rx_disruption.976313553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.1479934543 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 42788382 ps |
| CPU time | 0.57 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479934543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.1479934543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.322490801 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 6557988658 ps |
| CPU time | 8.78 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:46 PM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=322490801 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.322490801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.2658750046 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 16011759049 ps |
| CPU time | 18.98 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:57 PM UTC 24 |
| Peak memory | 226648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2658750046 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.2658750046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.678046508 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 26370341720 ps |
| CPU time | 29.49 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:11:07 PM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=678046508 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.678046508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.4067949450 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 156807425 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067949450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.4067949450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.3185898097 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 153110240 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185898097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_bitstuff_err.3185898097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.3334515950 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 614149440 ps |
| CPU time | 1.98 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:40 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3334515950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.3334515950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.121039684 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 1183857788 ps |
| CPU time | 2.95 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:41 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=121039684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.121039684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.3926896178 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 13826601687 ps |
| CPU time | 21.47 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:59 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926896178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.3926896178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.3975414524 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 3384878257 ps |
| CPU time | 24.69 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:11:03 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975414524 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.3975414524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.3549977454 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 572010036 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549977454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.3549977454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.381993889 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 135256259 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=381993889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_disconnected.381993889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_enable.2372942842 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 47797278 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:38 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372942842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_enable.2372942842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.3024724018 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 1000805255 ps |
| CPU time | 2.38 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:40 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024724018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.3024724018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.1601555998 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 533404217 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:40 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601555998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.1601555998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.2480195918 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 362448422 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480195918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_fifo_rst.2480195918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.672113065 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 229330391 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=672113065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.672113065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.799193195 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 145560458 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799193195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_in_stall.799193195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.902903007 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 177791638 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=902903007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_in_trans.902903007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.75785177 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 4201532388 ps |
| CPU time | 34.44 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:11:12 PM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75785177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.75785177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.1085448748 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 9892887150 ps |
| CPU time | 106.92 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 220028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1085448748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.1085448748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.4152999431 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 182616715 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152999431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.4152999431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.925186912 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 34001524899 ps |
| CPU time | 42.97 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:11:21 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=925186912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_link_resume.925186912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.2121274282 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 11142746835 ps |
| CPU time | 13.62 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:52 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121274282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_link_suspend.2121274282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.2790542557 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 3833719803 ps |
| CPU time | 86.58 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:12:05 PM UTC 24 |
| Peak memory | 229812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790542557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.2790542557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.726511160 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 2564315719 ps |
| CPU time | 21.29 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:11:00 PM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726511160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.726511160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.4118441007 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 238539913 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4118441007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.4118441007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.2467950764 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 200547648 ps |
| CPU time | 1.23 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467950764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.2467950764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.3447905445 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 1730106267 ps |
| CPU time | 38.25 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:11:17 PM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447905445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.3447905445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.3293013714 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 199956612 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293013714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.3293013714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.3998451645 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 147052275 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998451645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.3998451645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.3633063340 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 172621819 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633063340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.3633063340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.800023031 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 173328083 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:40 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=800023031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_out_iso.800023031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.2433817038 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 177130228 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433817038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_out_stall.2433817038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.1530992738 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 170205959 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530992738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.1530992738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.914441391 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 145088763 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:39 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=914441391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pending_in_trans.914441391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.2544647649 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 279236234 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:40 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2544647649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.2544647649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.3094176703 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 186751639 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 01:10:37 PM UTC 24 |
| Finished | Sep 01 01:10:40 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094176703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.3094176703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.173649726 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 36706785 ps |
| CPU time | 0.6 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173649726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_phy_pins_sense.173649726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.3121998537 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 10015642805 ps |
| CPU time | 23.34 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:52 PM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3121998537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.3121998537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.3511401448 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 221282522 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 214720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511401448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.3511401448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.2865246324 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 212627704 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865246324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_pkt_sent.2865246324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.4261021795 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 266827242 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261021795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_random_length_in_transaction.4261021795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.1217838126 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 186912140 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217838126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.1217838126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.1482064413 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 210125902 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482064413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.1482064413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.1423802036 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 392638044 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1423802036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_rx_full.1423802036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.2665406653 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 160918042 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2665406653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_setup_stage.2665406653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.1833631864 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 160917408 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1833631864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 43.usbdev_setup_trans_ignored.1833631864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.437130562 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 248280269 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=437130562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.437130562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.4040709091 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 2963094835 ps |
| CPU time | 71.63 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:12:41 PM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040709091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.4040709091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.3007978123 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 184193617 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007978123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.3007978123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.866464079 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 184347285 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866464079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_stall_trans.866464079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.707611746 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 894414786 ps |
| CPU time | 2.24 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:31 PM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=707611746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_stream_len_max.707611746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.2689779829 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 3032331717 ps |
| CPU time | 69.75 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:12:39 PM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689779829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.2689779829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.1591149291 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 5701087316 ps |
| CPU time | 30.12 seconds |
| Started | Sep 01 01:10:36 PM UTC 24 |
| Finished | Sep 01 01:11:08 PM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591149291 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.1591149291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.314945392 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 623587431 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=314945392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_tx _rx_disruption.314945392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.1651071950 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 490679724 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1651071950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.1651071950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.1228165132 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 533617983 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:10 PM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1228165132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_ tx_rx_disruption.1228165132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.481348613 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 518314884 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=481348613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_t x_rx_disruption.481348613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.357227859 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 557411587 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:10 PM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=357227859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_t x_rx_disruption.357227859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.2007038230 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 506193699 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2007038230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_ tx_rx_disruption.2007038230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.3091722571 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 458211120 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3091722571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.3091722571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.1456307027 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 615552727 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1456307027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_ tx_rx_disruption.1456307027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.4269575567 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 618401999 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4269575567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.4269575567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.1892830941 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 502737540 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1892830941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_ tx_rx_disruption.1892830941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.4264130772 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 597579520 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:10 PM UTC 24 |
| Peak memory | 216000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4264130772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.4264130772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.1413363765 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 75447822 ps |
| CPU time | 0.64 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1413363765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.1413363765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.3181712048 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 5375926945 ps |
| CPU time | 6.36 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:35 PM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181712048 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.3181712048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.3981780591 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 15356679904 ps |
| CPU time | 17.36 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:11:46 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981780591 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.3981780591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.3637173613 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 28896923700 ps |
| CPU time | 32.05 seconds |
| Started | Sep 01 01:11:27 PM UTC 24 |
| Finished | Sep 01 01:12:01 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637173613 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.3637173613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.2366688985 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 153105161 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366688985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.2366688985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.809631037 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 148817014 ps |
| CPU time | 0.72 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:29 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809631037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_bitstuff_err.809631037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.2927424592 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 148347108 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2927424592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 44.usbdev_data_toggle_clear.2927424592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.768600548 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 757624160 ps |
| CPU time | 1.95 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:31 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=768600548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.768600548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.476706734 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 40544745190 ps |
| CPU time | 62.54 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:12:32 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476706734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_device_address.476706734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.1283417339 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 2474659390 ps |
| CPU time | 19.21 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:48 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283417339 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.1283417339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.2515236087 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 1114791336 ps |
| CPU time | 2.38 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:31 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515236087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.2515236087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.277015815 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 149704392 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=277015815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_disconnected.277015815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_enable.2309075505 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 31661537 ps |
| CPU time | 0.62 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309075505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_enable.2309075505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.763105349 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 874974907 ps |
| CPU time | 2.43 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:32 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=763105349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.763105349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.4187236533 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 779632979 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:31 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4187236533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.4187236533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.3736310400 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 295921830 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736310400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_fifo_levels.3736310400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.3619160283 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 175092226 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:31 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619160283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_fifo_rst.3619160283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.551732263 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 208477187 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=551732263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.551732263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.2177821460 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 166200733 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2177821460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_stall.2177821460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.2036847011 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 257636048 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2036847011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.2036847011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.872817495 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 4633548626 ps |
| CPU time | 110.13 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 234332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=872817495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.872817495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.4084654277 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 4997372178 ps |
| CPU time | 28.38 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:58 PM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084654277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.4084654277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.3242215649 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 200253107 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3242215649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.3242215649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.2719248938 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 9965931047 ps |
| CPU time | 15.53 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:45 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719248938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.2719248938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.288583054 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 11197789757 ps |
| CPU time | 12.17 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:42 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=288583054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_suspend.288583054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.3517331338 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 3342676438 ps |
| CPU time | 19.41 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:49 PM UTC 24 |
| Peak memory | 229664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517331338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.3517331338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.3636034245 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 2934797441 ps |
| CPU time | 66.85 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:12:37 PM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636034245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.3636034245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.1304677698 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 242186277 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304677698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.1304677698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.3734399643 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 208634811 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734399643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.3734399643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.2418885907 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 2431825067 ps |
| CPU time | 15.07 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:45 PM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2418885907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.2418885907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.547969468 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 183568822 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:31 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=547969468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.547969468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.695716539 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 152977417 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=695716539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.695716539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.1375844396 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 199780019 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375844396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_nak_trans.1375844396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.1738003 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 158205804 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_out_iso.1738003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.406093466 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 209279755 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=406093466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_out_stall.406093466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.1435509605 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 157102284 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435509605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.1435509605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.3615529244 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 155369851 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3615529244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.3615529244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.567848955 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 232664358 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=567848955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.567848955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.2885370525 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 148454330 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:24 PM UTC 24 |
| Peak memory | 215196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885370525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.2885370525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.977337614 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 42440809 ps |
| CPU time | 0.6 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:24 PM UTC 24 |
| Peak memory | 215168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=977337614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_phy_pins_sense.977337614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.741219301 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 21348991214 ps |
| CPU time | 50.99 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:13:15 PM UTC 24 |
| Peak memory | 227188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=741219301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_pkt_buffer.741219301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.4095618825 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 187172360 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095618825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.4095618825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.2389611404 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 252739782 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2389611404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.2389611404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.560756826 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 190002600 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=560756826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_random_length_in_transaction.560756826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.1404496564 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 198883424 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1404496564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.1404496564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.4009373754 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 161533449 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4009373754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.4009373754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.4139923801 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 262926419 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139923801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.4139923801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.1501300308 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 146538909 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501300308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.1501300308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.197462593 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 169178264 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197462593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 44.usbdev_setup_trans_ignored.197462593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.2359419625 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 214112361 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359419625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.2359419625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.2268464923 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 2946310207 ps |
| CPU time | 19.53 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:44 PM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268464923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.2268464923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.2819800452 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 175556084 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819800452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.2819800452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.3980084164 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 188027831 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980084164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.3980084164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.2280217271 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 351118049 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2280217271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.2280217271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.2484657602 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 2303222624 ps |
| CPU time | 54.77 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484657602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.2484657602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.952356077 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 854293991 ps |
| CPU time | 4.38 seconds |
| Started | Sep 01 01:11:28 PM UTC 24 |
| Finished | Sep 01 01:11:33 PM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=952356077 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.952356077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.2483105813 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 624477525 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2483105813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.2483105813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.2813803621 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 608657257 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2813803621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.2813803621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.3860753878 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 526809911 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:10 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3860753878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.3860753878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.3565275896 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 490806626 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:10 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3565275896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_ tx_rx_disruption.3565275896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.2895244327 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 548991502 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:09 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2895244327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_ tx_rx_disruption.2895244327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.2317373376 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 629874547 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 01:29:06 PM UTC 24 |
| Finished | Sep 01 01:29:10 PM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2317373376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_ tx_rx_disruption.2317373376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.2017759818 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 504069152 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:30:32 PM UTC 24 |
| Finished | Sep 01 01:30:35 PM UTC 24 |
| Peak memory | 214580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2017759818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_ tx_rx_disruption.2017759818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.2034678729 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 633450504 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:30:32 PM UTC 24 |
| Finished | Sep 01 01:30:35 PM UTC 24 |
| Peak memory | 214568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2034678729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.2034678729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.2729685502 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 503051384 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:30:32 PM UTC 24 |
| Finished | Sep 01 01:30:35 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2729685502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.2729685502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.433851735 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 535877832 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:30:33 PM UTC 24 |
| Finished | Sep 01 01:30:35 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=433851735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_t x_rx_disruption.433851735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.3162973896 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 567934842 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 01:30:33 PM UTC 24 |
| Finished | Sep 01 01:30:35 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3162973896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.3162973896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.2542657002 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 48549147 ps |
| CPU time | 0.6 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542657002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.2542657002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.580492950 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 9650154492 ps |
| CPU time | 11.59 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:36 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=580492950 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.580492950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.1950186252 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 14893167581 ps |
| CPU time | 16.29 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:41 PM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950186252 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.1950186252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.3599111742 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 25609302830 ps |
| CPU time | 28.28 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:53 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3599111742 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.3599111742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.1090782204 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 183864977 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090782204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.1090782204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.4204733962 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 146718710 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:25 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204733962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.4204733962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.2628012670 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 462452818 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628012670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.2628012670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.875111697 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 532205103 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=875111697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.875111697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.72565945 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 50159324362 ps |
| CPU time | 67.78 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:13:33 PM UTC 24 |
| Peak memory | 217548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=72565945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_device_address.72565945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.1899701430 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 1511702110 ps |
| CPU time | 10.66 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:35 PM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1899701430 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.1899701430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.1249730746 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 676124408 ps |
| CPU time | 1.78 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:27 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249730746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.1249730746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.455356241 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 189119077 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=455356241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_disconnected.455356241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_enable.716258699 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 40886862 ps |
| CPU time | 0.72 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=716258699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_enable.716258699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.2607559391 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 974692748 ps |
| CPU time | 2.58 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:28 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607559391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.2607559391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.3588802260 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 582689203 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588802260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.3588802260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.4015793715 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 305993243 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015793715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_fifo_levels.4015793715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.1105823811 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 187582082 ps |
| CPU time | 1.91 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:27 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105823811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.1105823811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.2062632852 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 209020127 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2062632852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.2062632852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.393240994 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 154333738 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=393240994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_in_stall.393240994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.3744480909 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 180935604 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744480909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.3744480909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.3952832177 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 3045051889 ps |
| CPU time | 23.45 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:49 PM UTC 24 |
| Peak memory | 229688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952832177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.3952832177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.3267894345 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 7854100230 ps |
| CPU time | 41.68 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:13:07 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267894345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.3267894345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.1929558651 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 249633980 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1929558651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_in_err.1929558651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.963140638 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 24095823860 ps |
| CPU time | 30.92 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:56 PM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=963140638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_link_resume.963140638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.3508640794 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 5757146240 ps |
| CPU time | 8.45 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:34 PM UTC 24 |
| Peak memory | 227240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508640794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.3508640794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.1889485036 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 2558062789 ps |
| CPU time | 22.65 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:48 PM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889485036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.1889485036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.3495574578 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 3801746991 ps |
| CPU time | 25.44 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:51 PM UTC 24 |
| Peak memory | 227568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495574578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.3495574578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.4061656449 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 240258009 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061656449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.4061656449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.1465857639 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 189714159 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1465857639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.1465857639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.3154043600 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 2776828679 ps |
| CPU time | 23.98 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:49 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154043600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.3154043600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.1291770809 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 153641243 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1291770809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.1291770809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.1204031726 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 157505218 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204031726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.1204031726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.1083548838 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 209040166 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 214908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1083548838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_nak_trans.1083548838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.2799035718 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 193857044 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:27 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2799035718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.2799035718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.4067803188 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 175940377 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067803188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_out_stall.4067803188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.3447538740 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 169238541 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447538740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.3447538740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.1332319774 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 151563212 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:26 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332319774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.1332319774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.469013843 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 229306024 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 01:12:24 PM UTC 24 |
| Finished | Sep 01 01:12:27 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=469013843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.469013843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.892802514 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 144953105 ps |
| CPU time | 0.68 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=892802514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.892802514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.2042563558 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 46246572 ps |
| CPU time | 0.59 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2042563558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.2042563558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.3856479004 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 15565754286 ps |
| CPU time | 34.55 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:52 PM UTC 24 |
| Peak memory | 227712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856479004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_pkt_buffer.3856479004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.2220138969 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 155201991 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220138969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.2220138969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.3971816280 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 214317612 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971816280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.3971816280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.981453029 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 234146990 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=981453029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_random_length_in_transaction.981453029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.4110423726 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 185270896 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4110423726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.4110423726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.2339729378 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 202985438 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 216016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2339729378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.2339729378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.3548652888 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 256314290 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548652888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.3548652888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.150277678 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 161232895 ps |
| CPU time | 0.72 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=150277678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_setup_stage.150277678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.148299591 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 147112950 ps |
| CPU time | 0.72 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=148299591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 45.usbdev_setup_trans_ignored.148299591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.945234317 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 206735327 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=945234317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.945234317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.1087675750 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 3065525406 ps |
| CPU time | 70.61 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:14:29 PM UTC 24 |
| Peak memory | 227696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1087675750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.1087675750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.2942250534 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 188415630 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942250534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.2942250534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.1658158432 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 150734479 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:13:16 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1658158432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_stall_trans.1658158432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.158951720 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 368933763 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158951720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_stream_len_max.158951720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.3873854095 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 2194231948 ps |
| CPU time | 17.89 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:36 PM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873854095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.3873854095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.881939331 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 4795006976 ps |
| CPU time | 33.51 seconds |
| Started | Sep 01 01:12:23 PM UTC 24 |
| Finished | Sep 01 01:12:59 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=881939331 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.881939331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.835836957 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 580566640 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=835836957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_tx _rx_disruption.835836957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.1296475181 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 517662630 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:30:33 PM UTC 24 |
| Finished | Sep 01 01:30:35 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1296475181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_ tx_rx_disruption.1296475181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.3896766897 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 575209269 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:36 PM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3896766897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.3896766897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.2083099179 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 559507869 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2083099179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.2083099179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.2147557503 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 509838284 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:36 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2147557503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.2147557503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.172734310 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 542517256 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:36 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=172734310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_t x_rx_disruption.172734310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.3617864131 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 606657467 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3617864131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.3617864131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.2699600933 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 544324289 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:36 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2699600933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_ tx_rx_disruption.2699600933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.2027910904 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 582430498 ps |
| CPU time | 1.82 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2027910904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.2027910904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.3997987421 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 468061643 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3997987421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_ tx_rx_disruption.3997987421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.1567914604 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 606920366 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1567914604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_ tx_rx_disruption.1567914604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.4056342281 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 46421493 ps |
| CPU time | 0.57 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4056342281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.4056342281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.4288628100 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 10345451083 ps |
| CPU time | 14.5 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:33 PM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288628100 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.4288628100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.456697547 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 13565341817 ps |
| CPU time | 15.17 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:34 PM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=456697547 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.456697547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.672838048 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 30872696674 ps |
| CPU time | 34.07 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:53 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=672838048 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.672838048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.3865184033 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 158861038 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865184033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.3865184033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.1606329719 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 143784262 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1606329719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.1606329719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.978469314 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 310254157 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=978469314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_data_toggle_clear.978469314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.4040318732 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 623061479 ps |
| CPU time | 1.9 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040318732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.4040318732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.2589023018 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 14171933037 ps |
| CPU time | 24.32 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:43 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589023018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.2589023018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.1983945210 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 1622077398 ps |
| CPU time | 30.15 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:49 PM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983945210 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.1983945210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.3155824439 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 755543805 ps |
| CPU time | 1.97 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:21 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3155824439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.3155824439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.2789509817 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 147543730 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789509817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.2789509817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_enable.234350678 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 77727302 ps |
| CPU time | 0.66 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 216172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=234350678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_enable.234350678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.2323587198 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 872903031 ps |
| CPU time | 2.25 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:21 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2323587198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.2323587198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.609974062 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 525326717 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:21 PM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=609974062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.609974062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.35696018 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 154874106 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=35696018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_fifo_levels.35696018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.1151794665 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 292213037 ps |
| CPU time | 2.03 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:21 PM UTC 24 |
| Peak memory | 217076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1151794665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.1151794665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.2373134107 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 221752304 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373134107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.2373134107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.207172675 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 170382178 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=207172675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_in_stall.207172675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.1038621128 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 212176562 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038621128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.1038621128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.1682958365 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 4825972226 ps |
| CPU time | 40.83 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:14:00 PM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682958365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.1682958365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.2816297226 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 13886631408 ps |
| CPU time | 78.81 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:14:38 PM UTC 24 |
| Peak memory | 217076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816297226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.2816297226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.4098878529 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 216286621 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098878529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.4098878529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.281909508 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 32921035647 ps |
| CPU time | 45.49 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:14:05 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=281909508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_link_resume.281909508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.699860338 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 8914367447 ps |
| CPU time | 11.32 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:30 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699860338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_suspend.699860338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.1941633303 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 3143298328 ps |
| CPU time | 20.14 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:39 PM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941633303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.1941633303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.3701820153 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 2386400647 ps |
| CPU time | 15.22 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:34 PM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701820153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.3701820153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.3657114988 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 237730669 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657114988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.3657114988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.3896794037 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 186616233 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3896794037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.3896794037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.3984244577 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 3238162912 ps |
| CPU time | 72.88 seconds |
| Started | Sep 01 01:13:18 PM UTC 24 |
| Finished | Sep 01 01:14:33 PM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3984244577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.3984244577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.1437831507 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 170019932 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:13:18 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437831507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.1437831507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.3167240598 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 208858300 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 01:13:18 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3167240598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.3167240598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.2701082462 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 208650546 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:13:18 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701082462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.2701082462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.1344057127 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 204712081 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:13:18 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344057127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_iso.1344057127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.2271168976 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 163599307 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:13:18 PM UTC 24 |
| Finished | Sep 01 01:13:20 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2271168976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.2271168976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.2859444293 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 203697104 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 214364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859444293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.2859444293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.1066611457 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 196748677 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 214432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066611457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_pending_in_trans.1066611457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.905012453 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 276558881 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=905012453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.905012453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.2475567373 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 164186902 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475567373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.2475567373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.3286993253 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 53572176 ps |
| CPU time | 0.64 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3286993253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.3286993253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.1108669477 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 20391791232 ps |
| CPU time | 45.05 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:15:04 PM UTC 24 |
| Peak memory | 231804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1108669477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.1108669477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.1185642620 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 183898300 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1185642620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.1185642620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.1146065623 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 188664221 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146065623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.1146065623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.2836099590 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 180911154 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836099590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.2836099590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.2607337528 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 155008777 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607337528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.2607337528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.388459415 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 149109040 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=388459415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_rx_crc_err.388459415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.282620565 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 345672280 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=282620565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_rx_full.282620565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.3314876656 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 160342410 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314876656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.3314876656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.235786155 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 250965675 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=235786155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 46.usbdev_setup_trans_ignored.235786155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.78398898 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 271950029 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=78398898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 46.usbdev_smoke.78398898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.1950029463 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 2263491036 ps |
| CPU time | 50.67 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:15:10 PM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950029463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.1950029463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.3148287125 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 179405563 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148287125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.3148287125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.4019902241 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 201309676 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:14:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4019902241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.4019902241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.1800617872 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 1140734903 ps |
| CPU time | 2.52 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800617872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.1800617872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.3458720151 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 2492924122 ps |
| CPU time | 56.38 seconds |
| Started | Sep 01 01:14:17 PM UTC 24 |
| Finished | Sep 01 01:15:15 PM UTC 24 |
| Peak memory | 226832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3458720151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.3458720151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.464702183 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 6618371007 ps |
| CPU time | 49.25 seconds |
| Started | Sep 01 01:13:17 PM UTC 24 |
| Finished | Sep 01 01:14:08 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=464702183 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.464702183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.2347590463 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 416025476 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2347590463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_t x_rx_disruption.2347590463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.1319218170 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 483994564 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1319218170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.1319218170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.160725218 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 526878550 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=160725218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_t x_rx_disruption.160725218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.4220993319 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 609329180 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4220993319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_ tx_rx_disruption.4220993319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.1162472013 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 520071612 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1162472013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.1162472013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.688130646 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 470780068 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=688130646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_t x_rx_disruption.688130646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.209957346 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 474040168 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=209957346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_t x_rx_disruption.209957346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.3869515182 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 623222591 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3869515182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_ tx_rx_disruption.3869515182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.4244850609 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 575239233 ps |
| CPU time | 1.77 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4244850609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_ tx_rx_disruption.4244850609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.3212223054 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 453534290 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3212223054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_ tx_rx_disruption.3212223054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.4271648932 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 608678792 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4271648932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.4271648932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.1818428792 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 40283945 ps |
| CPU time | 0.58 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 214680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818428792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.1818428792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.3393454557 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 3886067123 ps |
| CPU time | 5.55 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:25 PM UTC 24 |
| Peak memory | 227456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393454557 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.3393454557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.266647836 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 15442766820 ps |
| CPU time | 16.92 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:36 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=266647836 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.266647836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.2857557391 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 25823333180 ps |
| CPU time | 28.79 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:48 PM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2857557391 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.2857557391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.1845896222 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 153743447 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 214672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845896222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.1845896222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.1657555940 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 155318625 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657555940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_bitstuff_err.1657555940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.2474283039 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 417677257 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2474283039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 47.usbdev_data_toggle_clear.2474283039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.851842192 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 662531025 ps |
| CPU time | 1.77 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=851842192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.851842192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.4123555750 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 38392582419 ps |
| CPU time | 56.62 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:15:16 PM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123555750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.4123555750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.3861333600 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 623289587 ps |
| CPU time | 4.35 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:24 PM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861333600 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.3861333600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.2028558916 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 729157611 ps |
| CPU time | 1.88 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028558916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.2028558916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.3318884101 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 135133009 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318884101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.3318884101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_enable.132265224 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 34654459 ps |
| CPU time | 0.61 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=132265224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_enable.132265224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.3556339227 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 898649044 ps |
| CPU time | 2.28 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:22 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556339227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.3556339227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.3851281215 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 259814708 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851281215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.3851281215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.2681970137 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 279709042 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 214052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2681970137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_fifo_levels.2681970137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.2438398706 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 474525207 ps |
| CPU time | 2.43 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:22 PM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2438398706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.2438398706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.2545489910 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 245297100 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2545489910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.2545489910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.3859370291 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 150242550 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859370291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.3859370291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.3244822857 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 268931180 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3244822857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_trans.3244822857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.1721356075 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 3938471301 ps |
| CPU time | 30.71 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:50 PM UTC 24 |
| Peak memory | 234204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1721356075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.1721356075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.1191742102 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 12708319234 ps |
| CPU time | 77.75 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:15:38 PM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1191742102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.1191742102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.2881226130 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 184375901 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881226130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.2881226130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.3335395464 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 28445829201 ps |
| CPU time | 38.97 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:59 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3335395464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_resume.3335395464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.3065368705 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 4793387931 ps |
| CPU time | 6.15 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:26 PM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3065368705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_link_suspend.3065368705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.3832142398 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 4403509957 ps |
| CPU time | 102.21 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:16:03 PM UTC 24 |
| Peak memory | 229636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832142398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.3832142398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.3838833073 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 2347966562 ps |
| CPU time | 55.01 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:15:15 PM UTC 24 |
| Peak memory | 227656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3838833073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.3838833073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.3337528570 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 236558772 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337528570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.3337528570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.449072349 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 226579380 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=449072349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.449072349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.2952038612 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 3073340827 ps |
| CPU time | 20.12 seconds |
| Started | Sep 01 01:14:19 PM UTC 24 |
| Finished | Sep 01 01:14:40 PM UTC 24 |
| Peak memory | 227424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952038612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.2952038612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.165780873 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 161769282 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:14:19 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=165780873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.165780873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.2936743088 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 178571136 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:14:19 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936743088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.2936743088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.276142633 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 201039000 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:14:19 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=276142633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_nak_trans.276142633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.2464815373 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 173721673 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:14:19 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464815373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_out_iso.2464815373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.1290774212 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 165433827 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:14:19 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290774212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_out_stall.1290774212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.3331485658 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 140838210 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 01:14:19 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331485658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.3331485658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.2207404875 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 178064561 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:14:19 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207404875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.2207404875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.4004935430 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 239849857 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:14:19 PM UTC 24 |
| Finished | Sep 01 01:14:21 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004935430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.4004935430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.3156529071 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 151468387 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156529071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.3156529071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.2499917521 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 53114961 ps |
| CPU time | 0.63 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2499917521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.2499917521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.3527457418 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 15228980091 ps |
| CPU time | 36.28 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:53 PM UTC 24 |
| Peak memory | 231560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527457418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_pkt_buffer.3527457418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.1012173473 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 192785585 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012173473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.1012173473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.3555574565 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 256263325 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3555574565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.3555574565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.952562891 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 255470223 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=952562891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_random_length_in_transaction.952562891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.4053532974 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 162179410 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053532974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.4053532974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.3388685895 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 201758563 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3388685895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_rx_crc_err.3388685895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.1808979234 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 249449460 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808979234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.1808979234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.1145514247 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 181553700 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1145514247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_setup_stage.1145514247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.3322012110 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 161669419 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 214900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3322012110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 47.usbdev_setup_trans_ignored.3322012110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.511923356 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 210807242 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=511923356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.511923356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.3243339930 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 2925962862 ps |
| CPU time | 22.47 seconds |
| Started | Sep 01 01:15:15 PM UTC 24 |
| Finished | Sep 01 01:15:39 PM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243339930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.3243339930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.2307342130 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 180815633 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2307342130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.2307342130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.2192415393 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 168104692 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:17 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192415393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.2192415393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.1539146069 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 314863803 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539146069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.1539146069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.2002425381 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 2897508877 ps |
| CPU time | 69.57 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:16:27 PM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002425381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.2002425381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.3011523665 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 615596805 ps |
| CPU time | 4.22 seconds |
| Started | Sep 01 01:14:18 PM UTC 24 |
| Finished | Sep 01 01:14:24 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011523665 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.3011523665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.1530522663 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 572155957 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1530522663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_t x_rx_disruption.1530522663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.1589759438 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 514037311 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 214372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1589759438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_ tx_rx_disruption.1589759438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.2232278827 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 496262709 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2232278827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_ tx_rx_disruption.2232278827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.1815280007 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 610407038 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 213564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1815280007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_ tx_rx_disruption.1815280007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.2595708719 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 498689799 ps |
| CPU time | 1.88 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2595708719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.2595708719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.3033996191 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 633127286 ps |
| CPU time | 1.77 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3033996191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_ tx_rx_disruption.3033996191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.841538080 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 514243063 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=841538080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_t x_rx_disruption.841538080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.2410892284 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 511796994 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 214928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2410892284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_ tx_rx_disruption.2410892284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.2824667452 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 440385867 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 214700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2824667452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_ tx_rx_disruption.2824667452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.1767681340 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 562286049 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 214784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1767681340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.1767681340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.1660369295 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 602924599 ps |
| CPU time | 1.92 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1660369295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_ tx_rx_disruption.1660369295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.2522060058 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 33130659 ps |
| CPU time | 0.58 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522060058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.2522060058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.1899016484 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 5183038253 ps |
| CPU time | 6.36 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:23 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1899016484 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.1899016484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.1718436399 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 15432156416 ps |
| CPU time | 17.61 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:35 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1718436399 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.1718436399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3243944878 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 29113116296 ps |
| CPU time | 33.99 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:51 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243944878 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.3243944878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.2700161334 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 169737396 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700161334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.2700161334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.508328426 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 142662849 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=508328426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_bitstuff_err.508328426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.1985736698 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 593055623 ps |
| CPU time | 1.85 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985736698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 48.usbdev_data_toggle_clear.1985736698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.83261450 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 525301851 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=83261450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.83261450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.1692960178 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 34520819754 ps |
| CPU time | 60.4 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692960178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.1692960178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3890412996 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 1556459473 ps |
| CPU time | 11.53 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:29 PM UTC 24 |
| Peak memory | 216260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890412996 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.3890412996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.3963970121 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 1168085260 ps |
| CPU time | 2.06 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963970121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_disable_endpoint.3963970121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.996105914 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 145510902 ps |
| CPU time | 0.71 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=996105914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_disconnected.996105914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_enable.657797136 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 73618012 ps |
| CPU time | 0.67 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=657797136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_enable.657797136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.2053599885 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 993749427 ps |
| CPU time | 2.35 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:20 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2053599885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.2053599885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.192269249 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 290342435 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=192269249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_fifo_levels.192269249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.972169888 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 460035318 ps |
| CPU time | 2.07 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:20 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=972169888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_fifo_rst.972169888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.3925208140 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 227345187 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3925208140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.3925208140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.3719129461 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 145393509 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719129461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.3719129461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.896075234 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 173285081 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=896075234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_in_trans.896075234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.2652646063 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 3323194248 ps |
| CPU time | 78.04 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:16:36 PM UTC 24 |
| Peak memory | 229760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652646063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.2652646063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.3054997028 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 5560677716 ps |
| CPU time | 29.36 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:47 PM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3054997028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.3054997028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.3192674896 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 316422328 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3192674896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_in_err.3192674896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.205668999 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 33720959402 ps |
| CPU time | 51.9 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:16:10 PM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=205668999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_link_resume.205668999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.2732949936 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 10131904848 ps |
| CPU time | 11.83 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:30 PM UTC 24 |
| Peak memory | 217204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732949936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.2732949936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.1352021891 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 3028541699 ps |
| CPU time | 71.41 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:16:30 PM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1352021891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.1352021891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.4045106820 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 2925713249 ps |
| CPU time | 18.75 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:37 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4045106820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.4045106820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.2551923172 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 243259773 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:15:17 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551923172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.2551923172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.949613393 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 236232971 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:15:17 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=949613393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.949613393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.1053464726 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 3949307601 ps |
| CPU time | 85.58 seconds |
| Started | Sep 01 01:15:17 PM UTC 24 |
| Finished | Sep 01 01:16:44 PM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053464726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.1053464726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.804904343 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 170715939 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:15:17 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=804904343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.804904343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.550962945 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 145371821 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:15:17 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=550962945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.550962945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.945041593 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 284513055 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 01:15:17 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=945041593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_nak_trans.945041593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.3506657760 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 179159485 ps |
| CPU time | 0.9 seconds |
| Started | Sep 01 01:15:17 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506657760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.3506657760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.2136856778 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 187427558 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:15:17 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136856778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.2136856778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.3606659103 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 161434517 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:15:17 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3606659103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.3606659103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.3031947461 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 140349342 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:15:17 PM UTC 24 |
| Finished | Sep 01 01:15:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3031947461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.3031947461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.2736415505 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 290107200 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:16:15 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2736415505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.2736415505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.2217821049 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 138358347 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:17 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217821049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.2217821049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.3372953776 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 33619456 ps |
| CPU time | 0.61 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:17 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372953776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.3372953776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.1333160323 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 15732968517 ps |
| CPU time | 35.19 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:52 PM UTC 24 |
| Peak memory | 231268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1333160323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.1333160323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.2539850748 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 176093659 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2539850748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_pkt_received.2539850748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.1143927214 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 230946084 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143927214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_pkt_sent.1143927214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.903425019 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 244740414 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=903425019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_random_length_in_transaction.903425019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.2606979517 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 192231401 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2606979517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.2606979517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.415703836 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 198048432 ps |
| CPU time | 0.82 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 214780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415703836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_rx_crc_err.415703836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.2441438370 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 282991776 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441438370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.2441438370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.3418609935 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 161067106 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3418609935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_setup_stage.3418609935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.1768663981 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 155309008 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768663981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.1768663981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.4152755070 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 252544121 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152755070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.4152755070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.3857099447 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 1542415269 ps |
| CPU time | 34.17 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:51 PM UTC 24 |
| Peak memory | 233940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3857099447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.3857099447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.3051998791 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 204235761 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051998791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.3051998791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.892670186 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 216690674 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=892670186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_stall_trans.892670186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.3824717873 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 1144102810 ps |
| CPU time | 2.67 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:20 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824717873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.3824717873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.13910779 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 3542290922 ps |
| CPU time | 29.17 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:47 PM UTC 24 |
| Peak memory | 229664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=13910779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_streaming_out.13910779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.56267250 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 144413264 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:15:16 PM UTC 24 |
| Finished | Sep 01 01:15:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56267250 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.56267250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.2111918452 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 654611821 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2111918452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.2111918452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.3112844923 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 517076481 ps |
| CPU time | 1.87 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3112844923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_ tx_rx_disruption.3112844923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.1416089855 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 507964056 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1416089855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.1416089855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.1351700279 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 601790209 ps |
| CPU time | 2.14 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1351700279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.1351700279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.3942669354 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 532388354 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3942669354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.3942669354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.3217337037 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 599662173 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3217337037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.3217337037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.3588449225 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 515600172 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3588449225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.3588449225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.2966873885 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 620143227 ps |
| CPU time | 2.08 seconds |
| Started | Sep 01 01:30:34 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2966873885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_ tx_rx_disruption.2966873885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.3207612883 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 606159710 ps |
| CPU time | 2.01 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3207612883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_ tx_rx_disruption.3207612883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.2706355606 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 512919960 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:37 PM UTC 24 |
| Peak memory | 214820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2706355606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.2706355606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.1549359876 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 443564843 ps |
| CPU time | 1.9 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1549359876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_ tx_rx_disruption.1549359876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.2636475993 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 36109897 ps |
| CPU time | 0.58 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2636475993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.2636475993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.2524675738 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 5496377676 ps |
| CPU time | 7.4 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:25 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524675738 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.2524675738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.1468420857 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 14116340790 ps |
| CPU time | 16.19 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:34 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1468420857 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.1468420857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.492910338 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 24250901563 ps |
| CPU time | 26.5 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:44 PM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=492910338 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.492910338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.912464113 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 201307251 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=912464113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_av_buffer.912464113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.1843020293 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 160056755 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:18 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843020293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_bitstuff_err.1843020293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.3933550379 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 382213364 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933550379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 49.usbdev_data_toggle_clear.3933550379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.2337583543 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 556275279 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2337583543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.2337583543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.291388132 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 24254624072 ps |
| CPU time | 40.97 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:59 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=291388132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_device_address.291388132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.4057739104 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 1405456538 ps |
| CPU time | 8.36 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:26 PM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057739104 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.4057739104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.1649393398 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 597297792 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649393398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.1649393398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.1974406796 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 134802737 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974406796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.1974406796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_enable.1797568346 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 36574911 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797568346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.1797568346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.1828147433 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 892345055 ps |
| CPU time | 2.35 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:20 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828147433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.1828147433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.1123442065 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 328527307 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123442065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_fifo_levels.1123442065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.3831653759 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 323949228 ps |
| CPU time | 1.91 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:20 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831653759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.3831653759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.2020598606 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 184289673 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020598606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.2020598606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.2100532943 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 138269727 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100532943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.2100532943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.1765192268 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 244103417 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1765192268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.1765192268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.1557121403 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 4627629587 ps |
| CPU time | 27.95 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:46 PM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557121403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.1557121403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.1574125578 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 5609133702 ps |
| CPU time | 53.11 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:17:12 PM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574125578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.1574125578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.2446827727 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 151169266 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446827727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.2446827727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.1152862135 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 24256367542 ps |
| CPU time | 36.36 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:55 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152862135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_resume.1152862135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.2654118708 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 11436989935 ps |
| CPU time | 14.24 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:32 PM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654118708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.2654118708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.4086808571 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 4210675906 ps |
| CPU time | 101.61 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:18:01 PM UTC 24 |
| Peak memory | 229740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086808571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.4086808571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.2655846867 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 2067726666 ps |
| CPU time | 47.07 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:17:06 PM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655846867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.2655846867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.1584899810 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 231013322 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584899810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.1584899810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.2165783565 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 253239376 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165783565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.2165783565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.1717294528 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 4364899786 ps |
| CPU time | 38.08 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:57 PM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717294528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.1717294528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.1222235645 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 154782907 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222235645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.1222235645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.636396753 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 156362056 ps |
| CPU time | 0.79 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=636396753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.636396753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.3038227880 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 305729295 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3038227880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_nak_trans.3038227880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.1786764068 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 189778853 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:20 PM UTC 24 |
| Peak memory | 214896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786764068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.1786764068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.3799780681 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 167268622 ps |
| CPU time | 0.91 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799780681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_out_stall.3799780681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.3846925047 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 224583638 ps |
| CPU time | 0.93 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846925047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.3846925047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.2433559239 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 162590379 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:16:17 PM UTC 24 |
| Finished | Sep 01 01:16:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433559239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.2433559239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.3773358885 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 213287451 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773358885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.3773358885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.1740111180 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 146346084 ps |
| CPU time | 0.71 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1740111180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.1740111180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.2815788905 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 49560649 ps |
| CPU time | 0.59 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815788905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.2815788905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.4186712936 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 22077068432 ps |
| CPU time | 49.26 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:18:09 PM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186712936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.4186712936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.2524268163 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 176083969 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524268163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.2524268163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.2931911329 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 164795678 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931911329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.2931911329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.352074251 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 221033689 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:20 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=352074251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_random_length_in_transaction.352074251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.695388616 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 184192745 ps |
| CPU time | 0.77 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:20 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=695388616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.695388616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.370683812 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 153995987 ps |
| CPU time | 0.73 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:20 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=370683812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_rx_crc_err.370683812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.2918119871 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 396980661 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 216296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918119871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.2918119871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.1004717285 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 166068763 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004717285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.1004717285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.1218655706 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 175632585 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218655706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.1218655706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.3787451316 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 209553467 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 214844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787451316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.3787451316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.1682910837 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 2168454191 ps |
| CPU time | 46.47 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:18:07 PM UTC 24 |
| Peak memory | 227376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682910837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.1682910837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.2305854032 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 203926226 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305854032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.2305854032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.2844076683 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 156904155 ps |
| CPU time | 0.78 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844076683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.2844076683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.2968999290 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 824090612 ps |
| CPU time | 2.07 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968999290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.2968999290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.3268592065 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 2987184304 ps |
| CPU time | 19.64 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:40 PM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3268592065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.3268592065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.2356834154 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 7693235728 ps |
| CPU time | 40.62 seconds |
| Started | Sep 01 01:16:16 PM UTC 24 |
| Finished | Sep 01 01:16:59 PM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356834154 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.2356834154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.1269308784 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 553065812 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:17:18 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1269308784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_t x_rx_disruption.1269308784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.4015890603 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 473250643 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4015890603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.4015890603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.1849732974 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 632274636 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1849732974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.1849732974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.1671228435 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 594794313 ps |
| CPU time | 1.57 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1671228435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.1671228435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.3211871746 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 579181602 ps |
| CPU time | 1.97 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:39 PM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3211871746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.3211871746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.3447845254 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 570294374 ps |
| CPU time | 1.83 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3447845254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.3447845254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.1220193605 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 622857972 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1220193605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.1220193605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.1877620772 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 604271556 ps |
| CPU time | 1.88 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:39 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1877620772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_ tx_rx_disruption.1877620772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.2738219980 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 560964640 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2738219980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.2738219980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.3662600469 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 666173262 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:39 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3662600469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.3662600469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.1459692908 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 491123391 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:30:35 PM UTC 24 |
| Finished | Sep 01 01:30:38 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1459692908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.1459692908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.579276364 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 37679793 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 12:48:44 PM UTC 24 |
| Finished | Sep 01 12:48:46 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579276364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.579276364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.516718793 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 5396945708 ps |
| CPU time | 10.31 seconds |
| Started | Sep 01 12:48:10 PM UTC 24 |
| Finished | Sep 01 12:48:22 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=516718793 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.516718793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.1927182872 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 19609640288 ps |
| CPU time | 40.87 seconds |
| Started | Sep 01 12:48:11 PM UTC 24 |
| Finished | Sep 01 12:48:54 PM UTC 24 |
| Peak memory | 217132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927182872 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.1927182872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.4127051800 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 29232498867 ps |
| CPU time | 39.44 seconds |
| Started | Sep 01 12:48:11 PM UTC 24 |
| Finished | Sep 01 12:48:52 PM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4127051800 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.4127051800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.4239607006 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 186413271 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:48:11 PM UTC 24 |
| Finished | Sep 01 12:48:14 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239607006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_av_buffer.4239607006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.3592999551 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 142999500 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:48:11 PM UTC 24 |
| Finished | Sep 01 12:48:14 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592999551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_bitstuff_err.3592999551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.1164633351 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 155963526 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:48:12 PM UTC 24 |
| Finished | Sep 01 12:48:15 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164633351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.1164633351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.2931468055 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 779415286 ps |
| CPU time | 3.48 seconds |
| Started | Sep 01 12:48:14 PM UTC 24 |
| Finished | Sep 01 12:48:18 PM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931468055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.2931468055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.2283473966 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 45430383814 ps |
| CPU time | 93.55 seconds |
| Started | Sep 01 12:48:15 PM UTC 24 |
| Finished | Sep 01 12:49:51 PM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283473966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.2283473966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.3266224137 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 144555044 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 12:48:15 PM UTC 24 |
| Finished | Sep 01 12:48:17 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3266224137 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.3266224137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.2516150325 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 542556302 ps |
| CPU time | 2.32 seconds |
| Started | Sep 01 12:48:15 PM UTC 24 |
| Finished | Sep 01 12:48:19 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2516150325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.2516150325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.4186428370 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 189287014 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:48:15 PM UTC 24 |
| Finished | Sep 01 12:48:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186428370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.4186428370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_enable.804756370 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 34484298 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 12:48:16 PM UTC 24 |
| Finished | Sep 01 12:48:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804756370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_enable.804756370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.662446596 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 871912201 ps |
| CPU time | 3.37 seconds |
| Started | Sep 01 12:48:16 PM UTC 24 |
| Finished | Sep 01 12:48:21 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=662446596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.662446596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.1865809525 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 175031210 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:48:16 PM UTC 24 |
| Finished | Sep 01 12:48:19 PM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1865809525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.1865809525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.4146517808 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 175485145 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 12:48:19 PM UTC 24 |
| Finished | Sep 01 12:48:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146517808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_fifo_levels.4146517808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.1438329994 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 277468441 ps |
| CPU time | 3.27 seconds |
| Started | Sep 01 12:48:19 PM UTC 24 |
| Finished | Sep 01 12:48:23 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1438329994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_fifo_rst.1438329994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.828853158 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 227056100 ps |
| CPU time | 1.88 seconds |
| Started | Sep 01 12:48:20 PM UTC 24 |
| Finished | Sep 01 12:48:23 PM UTC 24 |
| Peak memory | 227352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=828853158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.828853158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.828393650 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 166111186 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:48:20 PM UTC 24 |
| Finished | Sep 01 12:48:22 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=828393650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_in_stall.828393650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.699705147 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 199740170 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:48:20 PM UTC 24 |
| Finished | Sep 01 12:48:22 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699705147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_in_trans.699705147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.3786300829 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 3307004480 ps |
| CPU time | 91.87 seconds |
| Started | Sep 01 12:48:19 PM UTC 24 |
| Finished | Sep 01 12:49:53 PM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3786300829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.3786300829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.3045064733 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 13101760313 ps |
| CPU time | 156.9 seconds |
| Started | Sep 01 12:48:20 PM UTC 24 |
| Finished | Sep 01 12:51:00 PM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045064733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.3045064733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.2966575496 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 239040855 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:48:21 PM UTC 24 |
| Finished | Sep 01 12:48:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966575496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.2966575496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.666416611 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 8980772488 ps |
| CPU time | 21 seconds |
| Started | Sep 01 12:48:23 PM UTC 24 |
| Finished | Sep 01 12:48:45 PM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=666416611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_link_resume.666416611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.2264839299 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 10955395722 ps |
| CPU time | 26.87 seconds |
| Started | Sep 01 12:48:23 PM UTC 24 |
| Finished | Sep 01 12:48:51 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264839299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.2264839299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.343690940 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 4108706782 ps |
| CPU time | 35.25 seconds |
| Started | Sep 01 12:48:23 PM UTC 24 |
| Finished | Sep 01 12:48:59 PM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=343690940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.343690940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.2671366487 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 2279002100 ps |
| CPU time | 79.97 seconds |
| Started | Sep 01 12:48:23 PM UTC 24 |
| Finished | Sep 01 12:49:45 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671366487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.2671366487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.277000800 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 246704488 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 12:48:23 PM UTC 24 |
| Finished | Sep 01 12:48:25 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=277000800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.277000800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.1692761846 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 197158809 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 12:48:24 PM UTC 24 |
| Finished | Sep 01 12:48:27 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692761846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.1692761846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.692316517 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 1990365095 ps |
| CPU time | 15.23 seconds |
| Started | Sep 01 12:48:24 PM UTC 24 |
| Finished | Sep 01 12:48:40 PM UTC 24 |
| Peak memory | 233972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=692316517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.692316517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.3954100214 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 2679275467 ps |
| CPU time | 26.6 seconds |
| Started | Sep 01 12:48:24 PM UTC 24 |
| Finished | Sep 01 12:48:52 PM UTC 24 |
| Peak memory | 227568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3954100214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.3954100214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.1541747914 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 2599492507 ps |
| CPU time | 22.96 seconds |
| Started | Sep 01 12:48:24 PM UTC 24 |
| Finished | Sep 01 12:48:49 PM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541747914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.1541747914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.3463363488 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 148912428 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:48:24 PM UTC 24 |
| Finished | Sep 01 12:48:26 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463363488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.3463363488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.2843056657 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 149053682 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:48:26 PM UTC 24 |
| Finished | Sep 01 12:48:29 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843056657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.2843056657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.3499265318 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 205465353 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 12:48:27 PM UTC 24 |
| Finished | Sep 01 12:48:30 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499265318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_nak_trans.3499265318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.1176491694 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 147137316 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:48:27 PM UTC 24 |
| Finished | Sep 01 12:48:30 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176491694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.1176491694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.357892330 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 188550056 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 12:48:30 PM UTC 24 |
| Finished | Sep 01 12:48:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=357892330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_out_stall.357892330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.454975778 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 194835415 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:48:30 PM UTC 24 |
| Finished | Sep 01 12:48:32 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=454975778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_out_trans_nak.454975778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.3500303280 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 157886132 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:48:30 PM UTC 24 |
| Finished | Sep 01 12:48:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500303280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.3500303280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.767118064 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 244460049 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 12:48:31 PM UTC 24 |
| Finished | Sep 01 12:48:33 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=767118064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.767118064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.894957381 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 157163087 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:48:31 PM UTC 24 |
| Finished | Sep 01 12:48:34 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=894957381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.894957381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.142036835 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 67326182 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:48:33 PM UTC 24 |
| Finished | Sep 01 12:48:35 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=142036835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_phy_pins_sense.142036835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.4151526755 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 22823628313 ps |
| CPU time | 64.87 seconds |
| Started | Sep 01 12:48:33 PM UTC 24 |
| Finished | Sep 01 12:49:40 PM UTC 24 |
| Peak memory | 227648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151526755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_pkt_buffer.4151526755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.2450460479 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 169622800 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:48:35 PM UTC 24 |
| Finished | Sep 01 12:48:37 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450460479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.2450460479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.3568604733 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 194126014 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:48:35 PM UTC 24 |
| Finished | Sep 01 12:48:37 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3568604733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_pkt_sent.3568604733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.2221560334 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 6231557527 ps |
| CPU time | 25.86 seconds |
| Started | Sep 01 12:48:36 PM UTC 24 |
| Finished | Sep 01 12:49:03 PM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221560334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.2221560334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.1011528965 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 6170248890 ps |
| CPU time | 45.57 seconds |
| Started | Sep 01 12:48:36 PM UTC 24 |
| Finished | Sep 01 12:49:23 PM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011528965 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.1011528965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.740855196 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 223403143 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:48:35 PM UTC 24 |
| Finished | Sep 01 12:48:37 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=740855196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_random_length_in_transaction.740855196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.698030047 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 154538551 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:48:35 PM UTC 24 |
| Finished | Sep 01 12:48:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698030047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.698030047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.1891370898 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 20198444130 ps |
| CPU time | 30.75 seconds |
| Started | Sep 01 12:48:37 PM UTC 24 |
| Finished | Sep 01 12:49:10 PM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1891370898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.1891370898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.3988949100 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 189755544 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:48:38 PM UTC 24 |
| Finished | Sep 01 12:48:40 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988949100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.3988949100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.4272847863 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 358816688 ps |
| CPU time | 2.02 seconds |
| Started | Sep 01 12:48:39 PM UTC 24 |
| Finished | Sep 01 12:48:42 PM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272847863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.4272847863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.4138390174 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 190534436 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:48:39 PM UTC 24 |
| Finished | Sep 01 12:48:42 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138390174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.4138390174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.2435544364 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 152705564 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:48:39 PM UTC 24 |
| Finished | Sep 01 12:48:41 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435544364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 5.usbdev_setup_trans_ignored.2435544364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.2080343694 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 209333653 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 12:48:40 PM UTC 24 |
| Finished | Sep 01 12:48:43 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080343694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.2080343694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.1001057572 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 1805075919 ps |
| CPU time | 23.34 seconds |
| Started | Sep 01 12:48:42 PM UTC 24 |
| Finished | Sep 01 12:49:06 PM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1001057572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.1001057572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.173051817 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 167403295 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:48:42 PM UTC 24 |
| Finished | Sep 01 12:48:44 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173051817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.173051817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.4284303783 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 177146726 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:48:42 PM UTC 24 |
| Finished | Sep 01 12:48:44 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284303783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.4284303783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.276822886 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 430541907 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 12:48:43 PM UTC 24 |
| Finished | Sep 01 12:48:46 PM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=276822886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_stream_len_max.276822886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.1188204705 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 2091219032 ps |
| CPU time | 22.47 seconds |
| Started | Sep 01 12:48:42 PM UTC 24 |
| Finished | Sep 01 12:49:06 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188204705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.1188204705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.979690972 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 6517631078 ps |
| CPU time | 41.9 seconds |
| Started | Sep 01 12:48:43 PM UTC 24 |
| Finished | Sep 01 12:49:27 PM UTC 24 |
| Peak memory | 227228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=979690972 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_3 1/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.979690972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.886426790 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 181248634 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:48:15 PM UTC 24 |
| Finished | Sep 01 12:48:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=886426790 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.886426790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.185402056 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 561953535 ps |
| CPU time | 2.7 seconds |
| Started | Sep 01 12:48:43 PM UTC 24 |
| Finished | Sep 01 12:48:47 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=185402056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx_ rx_disruption.185402056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.2937206056 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 260081120 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937206056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 50.usbdev_fifo_levels.2937206056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.57302392 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 613188505 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=57302392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_tx_ rx_disruption.57302392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.552004102 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 207542738 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=552004102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.552004102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.294151959 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 273778911 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=294151959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 51.usbdev_fifo_levels.294151959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.2710976274 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 523680694 ps |
| CPU time | 1.65 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2710976274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.2710976274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.2079522607 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 579920218 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079522607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.2079522607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.3550874274 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 277457082 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 214372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3550874274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.3550874274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.3115863865 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 605951020 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3115863865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.3115863865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.475177895 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 582155244 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=475177895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.475177895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.694967843 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 149107394 ps |
| CPU time | 0.74 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:21 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=694967843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 53.usbdev_fifo_levels.694967843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.2265474343 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 543313654 ps |
| CPU time | 1.59 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2265474343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.2265474343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.4269522048 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 600778143 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269522048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.4269522048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.217670635 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 263123018 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=217670635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 54.usbdev_fifo_levels.217670635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.2726418378 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 433299801 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2726418378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.2726418378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.4086721623 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 274995664 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086721623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 55.usbdev_fifo_levels.4086721623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.1356201268 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 538386405 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1356201268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_t x_rx_disruption.1356201268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.3585883028 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 356313849 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3585883028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.3585883028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.1926607497 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 284918551 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926607497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 56.usbdev_fifo_levels.1926607497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.776862547 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 570678572 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=776862547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_tx _rx_disruption.776862547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.3915675578 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 436439944 ps |
| CPU time | 1.22 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915675578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.3915675578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.2116978726 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 472798436 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2116978726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.2116978726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.3760347395 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 687473671 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:23 PM UTC 24 |
| Peak memory | 214312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760347395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.3760347395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.4253497682 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 271644178 ps |
| CPU time | 1.05 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253497682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 58.usbdev_fifo_levels.4253497682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.3484902338 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 543264717 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3484902338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_t x_rx_disruption.3484902338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.1367139209 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 190653708 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367139209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.1367139209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.3661409441 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 247835695 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661409441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 59.usbdev_fifo_levels.3661409441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.2728811770 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 601723786 ps |
| CPU time | 1.55 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:23 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2728811770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.2728811770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.1561644027 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 56425307 ps |
| CPU time | 0.95 seconds |
| Started | Sep 01 12:49:17 PM UTC 24 |
| Finished | Sep 01 12:49:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561644027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.1561644027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.2130061447 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 6457518999 ps |
| CPU time | 11.06 seconds |
| Started | Sep 01 12:48:46 PM UTC 24 |
| Finished | Sep 01 12:48:58 PM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2130061447 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.2130061447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.1818235051 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 14788549346 ps |
| CPU time | 32.6 seconds |
| Started | Sep 01 12:48:46 PM UTC 24 |
| Finished | Sep 01 12:49:20 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818235051 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.1818235051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.4249087611 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 24621008775 ps |
| CPU time | 49.61 seconds |
| Started | Sep 01 12:48:46 PM UTC 24 |
| Finished | Sep 01 12:49:37 PM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249087611 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.4249087611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.2744352450 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 207579336 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:48:46 PM UTC 24 |
| Finished | Sep 01 12:48:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744352450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.2744352450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.2074697583 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 138002811 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:48:46 PM UTC 24 |
| Finished | Sep 01 12:48:49 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2074697583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.2074697583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.3499114145 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 159588683 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:48:48 PM UTC 24 |
| Finished | Sep 01 12:48:50 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499114145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_data_toggle_clear.3499114145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.3778357779 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 945825660 ps |
| CPU time | 3.49 seconds |
| Started | Sep 01 12:48:48 PM UTC 24 |
| Finished | Sep 01 12:48:52 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778357779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.3778357779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.1706443491 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 35282347041 ps |
| CPU time | 82.46 seconds |
| Started | Sep 01 12:48:48 PM UTC 24 |
| Finished | Sep 01 12:50:12 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1706443491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.1706443491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.1628136759 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 1185662694 ps |
| CPU time | 22.77 seconds |
| Started | Sep 01 12:48:48 PM UTC 24 |
| Finished | Sep 01 12:49:12 PM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628136759 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.1628136759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.246018757 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 981920705 ps |
| CPU time | 3.13 seconds |
| Started | Sep 01 12:48:49 PM UTC 24 |
| Finished | Sep 01 12:48:53 PM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=246018757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disable_endpoint.246018757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.3641716716 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 206286752 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:48:49 PM UTC 24 |
| Finished | Sep 01 12:48:52 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641716716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.3641716716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_enable.2443700784 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 40443830 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 12:48:49 PM UTC 24 |
| Finished | Sep 01 12:48:51 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2443700784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.2443700784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.1083479230 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 769229228 ps |
| CPU time | 3.66 seconds |
| Started | Sep 01 12:48:51 PM UTC 24 |
| Finished | Sep 01 12:48:55 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1083479230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.1083479230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.3793072759 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 366154068 ps |
| CPU time | 2.06 seconds |
| Started | Sep 01 12:48:51 PM UTC 24 |
| Finished | Sep 01 12:48:54 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793072759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.3793072759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.142700416 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 305275445 ps |
| CPU time | 3.43 seconds |
| Started | Sep 01 12:48:52 PM UTC 24 |
| Finished | Sep 01 12:48:56 PM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=142700416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_fifo_rst.142700416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.795563338 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 225375346 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 12:48:53 PM UTC 24 |
| Finished | Sep 01 12:48:56 PM UTC 24 |
| Peak memory | 227352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=795563338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.795563338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.2868365416 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 143042634 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:48:53 PM UTC 24 |
| Finished | Sep 01 12:48:56 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868365416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.2868365416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.3591870389 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 165435166 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:48:53 PM UTC 24 |
| Finished | Sep 01 12:48:56 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591870389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_trans.3591870389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.741238673 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 3112985303 ps |
| CPU time | 83.25 seconds |
| Started | Sep 01 12:48:53 PM UTC 24 |
| Finished | Sep 01 12:50:18 PM UTC 24 |
| Peak memory | 234220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=741238673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.741238673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.987681141 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 8403020736 ps |
| CPU time | 103.81 seconds |
| Started | Sep 01 12:48:55 PM UTC 24 |
| Finished | Sep 01 12:50:41 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=987681141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.987681141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.2938993953 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 216671318 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 12:48:55 PM UTC 24 |
| Finished | Sep 01 12:48:57 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938993953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_in_err.2938993953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.2773145987 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 25305399765 ps |
| CPU time | 45.37 seconds |
| Started | Sep 01 12:48:55 PM UTC 24 |
| Finished | Sep 01 12:49:42 PM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773145987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.2773145987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.3063560615 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 5325154008 ps |
| CPU time | 13.49 seconds |
| Started | Sep 01 12:48:56 PM UTC 24 |
| Finished | Sep 01 12:49:11 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063560615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.3063560615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.1514476619 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 2096281763 ps |
| CPU time | 13.59 seconds |
| Started | Sep 01 12:48:56 PM UTC 24 |
| Finished | Sep 01 12:49:11 PM UTC 24 |
| Peak memory | 227352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514476619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.1514476619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.4037855770 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 2648613389 ps |
| CPU time | 78.45 seconds |
| Started | Sep 01 12:48:56 PM UTC 24 |
| Finished | Sep 01 12:50:16 PM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037855770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.4037855770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.3702887066 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 293753011 ps |
| CPU time | 1.88 seconds |
| Started | Sep 01 12:48:57 PM UTC 24 |
| Finished | Sep 01 12:49:00 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702887066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.3702887066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.3306145266 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 194404423 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:48:57 PM UTC 24 |
| Finished | Sep 01 12:49:00 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306145266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.3306145266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.234349053 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 2741356946 ps |
| CPU time | 85.24 seconds |
| Started | Sep 01 12:48:57 PM UTC 24 |
| Finished | Sep 01 12:50:25 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=234349053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.234349053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.3439511822 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 1942701105 ps |
| CPU time | 22.99 seconds |
| Started | Sep 01 12:48:59 PM UTC 24 |
| Finished | Sep 01 12:49:23 PM UTC 24 |
| Peak memory | 229460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439511822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.3439511822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.4233366618 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 3654014976 ps |
| CPU time | 37.55 seconds |
| Started | Sep 01 12:48:59 PM UTC 24 |
| Finished | Sep 01 12:49:38 PM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233366618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.4233366618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.18379690 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 201132746 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:49:00 PM UTC 24 |
| Finished | Sep 01 12:49:02 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=18379690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.18379690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.1338842955 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 168594863 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:49:00 PM UTC 24 |
| Finished | Sep 01 12:49:02 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1338842955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.1338842955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.3847236957 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 219608095 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:49:01 PM UTC 24 |
| Finished | Sep 01 12:49:04 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847236957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.3847236957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.2093063770 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 140596649 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:49:03 PM UTC 24 |
| Finished | Sep 01 12:49:06 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093063770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.2093063770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.2077610161 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 183320588 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:49:03 PM UTC 24 |
| Finished | Sep 01 12:49:06 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2077610161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.2077610161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.1612086976 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 211146580 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 12:49:03 PM UTC 24 |
| Finished | Sep 01 12:49:06 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1612086976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_pending_in_trans.1612086976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.53168174 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 226493679 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 12:49:05 PM UTC 24 |
| Finished | Sep 01 12:49:08 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=53168174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.53168174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.2226312927 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 183193775 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:49:05 PM UTC 24 |
| Finished | Sep 01 12:49:08 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2226312927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.2226312927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.1499441555 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 96198391 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:49:05 PM UTC 24 |
| Finished | Sep 01 12:49:07 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1499441555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.1499441555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.4010103016 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 21775709874 ps |
| CPU time | 65.02 seconds |
| Started | Sep 01 12:49:05 PM UTC 24 |
| Finished | Sep 01 12:50:12 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4010103016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.4010103016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.3791061582 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 183914422 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 12:49:07 PM UTC 24 |
| Finished | Sep 01 12:49:10 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3791061582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_pkt_received.3791061582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.2469199425 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 179301394 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:49:07 PM UTC 24 |
| Finished | Sep 01 12:49:10 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469199425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_pkt_sent.2469199425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.3798051504 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 13692660291 ps |
| CPU time | 112.12 seconds |
| Started | Sep 01 12:49:07 PM UTC 24 |
| Finished | Sep 01 12:51:02 PM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798051504 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.3798051504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.559283922 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 6454403725 ps |
| CPU time | 31.61 seconds |
| Started | Sep 01 12:49:09 PM UTC 24 |
| Finished | Sep 01 12:49:42 PM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=559283922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.559283922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.1845744376 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 6328336113 ps |
| CPU time | 33.14 seconds |
| Started | Sep 01 12:49:09 PM UTC 24 |
| Finished | Sep 01 12:49:44 PM UTC 24 |
| Peak memory | 234164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845744376 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.1845744376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.2751653090 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 236311683 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:49:07 PM UTC 24 |
| Finished | Sep 01 12:49:10 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751653090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_random_length_in_transaction.2751653090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.4005771080 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 242897968 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 12:49:07 PM UTC 24 |
| Finished | Sep 01 12:49:10 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005771080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.4005771080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.1056971768 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 20147562321 ps |
| CPU time | 26.56 seconds |
| Started | Sep 01 12:49:09 PM UTC 24 |
| Finished | Sep 01 12:49:37 PM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056971768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.1056971768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.2838566932 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 150155041 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:49:09 PM UTC 24 |
| Finished | Sep 01 12:49:11 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838566932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_rx_crc_err.2838566932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.1356908542 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 387456528 ps |
| CPU time | 2.06 seconds |
| Started | Sep 01 12:49:09 PM UTC 24 |
| Finished | Sep 01 12:49:12 PM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356908542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.1356908542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.315562772 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 172731767 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:49:11 PM UTC 24 |
| Finished | Sep 01 12:49:14 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=315562772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_setup_stage.315562772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.3478569393 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 171240690 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:49:11 PM UTC 24 |
| Finished | Sep 01 12:49:14 PM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3478569393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.3478569393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.2589611931 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 228892405 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 12:49:11 PM UTC 24 |
| Finished | Sep 01 12:49:15 PM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589611931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.2589611931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.1027366539 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 2397671867 ps |
| CPU time | 73.03 seconds |
| Started | Sep 01 12:49:11 PM UTC 24 |
| Finished | Sep 01 12:50:27 PM UTC 24 |
| Peak memory | 229792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027366539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.1027366539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.889422325 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 166611919 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:49:11 PM UTC 24 |
| Finished | Sep 01 12:49:14 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889422325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.889422325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.1358963700 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 197749003 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:49:11 PM UTC 24 |
| Finished | Sep 01 12:49:15 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358963700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_stall_trans.1358963700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.210966649 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 644844391 ps |
| CPU time | 3.6 seconds |
| Started | Sep 01 12:49:15 PM UTC 24 |
| Finished | Sep 01 12:49:20 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=210966649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_stream_len_max.210966649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.1600331057 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 2911435061 ps |
| CPU time | 100.44 seconds |
| Started | Sep 01 12:49:14 PM UTC 24 |
| Finished | Sep 01 12:50:57 PM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600331057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.1600331057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.1405265310 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 3179058582 ps |
| CPU time | 26.97 seconds |
| Started | Sep 01 12:48:48 PM UTC 24 |
| Finished | Sep 01 12:49:16 PM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405265310 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.1405265310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.1838970611 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 565840958 ps |
| CPU time | 3.01 seconds |
| Started | Sep 01 12:49:15 PM UTC 24 |
| Finished | Sep 01 12:49:20 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1838970611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.1838970611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.3677658391 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 546594691 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677658391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.3677658391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2796452119 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 241455632 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 214748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2796452119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.2796452119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.3539397654 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 601179854 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:17:19 PM UTC 24 |
| Finished | Sep 01 01:17:23 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3539397654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.3539397654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.2432695655 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 430636308 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:17:20 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432695655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.2432695655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.1749287260 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 262702717 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:17:20 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749287260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 61.usbdev_fifo_levels.1749287260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.2050371405 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 617989156 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:17:20 PM UTC 24 |
| Finished | Sep 01 01:17:23 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2050371405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_t x_rx_disruption.2050371405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.527497619 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 265817469 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:17:20 PM UTC 24 |
| Finished | Sep 01 01:17:22 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=527497619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.527497619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.2000460546 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 325231213 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 214640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000460546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 62.usbdev_fifo_levels.2000460546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.3732202625 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 636229545 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 214600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3732202625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_t x_rx_disruption.3732202625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.2542773660 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 388804050 ps |
| CPU time | 1.13 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542773660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.2542773660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.322661858 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 191547604 ps |
| CPU time | 0.85 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:30 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=322661858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 63.usbdev_fifo_levels.322661858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.2529475075 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 591647461 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2529475075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.2529475075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.752987684 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 167428675 ps |
| CPU time | 0.83 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:30 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=752987684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.752987684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.2454880682 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 162660758 ps |
| CPU time | 0.75 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:30 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2454880682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 64.usbdev_fifo_levels.2454880682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.4247799063 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 656483936 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4247799063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_t x_rx_disruption.4247799063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.2871590545 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 215125683 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871590545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.2871590545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.1715047208 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 260662530 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715047208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.1715047208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.1077438514 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 465044025 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1077438514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_t x_rx_disruption.1077438514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.2002184862 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 236298869 ps |
| CPU time | 0.96 seconds |
| Started | Sep 01 01:18:28 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002184862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.2002184862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.1200186625 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 284231651 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200186625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 66.usbdev_fifo_levels.1200186625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.1010252743 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 637338586 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1010252743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.1010252743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.660426324 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 421047878 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=660426324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.660426324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.767678323 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 253086929 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767678323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 67.usbdev_fifo_levels.767678323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.638336510 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 599719543 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=638336510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_tx _rx_disruption.638336510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.2398002467 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 168096439 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398002467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.2398002467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.2653094148 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 250595023 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653094148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 68.usbdev_fifo_levels.2653094148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.2072402205 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 443256480 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2072402205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_t x_rx_disruption.2072402205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.3039182460 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 507969305 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039182460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.3039182460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.3404630698 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 290930252 ps |
| CPU time | 1 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404630698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 69.usbdev_fifo_levels.3404630698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.2681783883 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 476706130 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2681783883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.2681783883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.2474759344 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 79369221 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 12:49:54 PM UTC 24 |
| Finished | Sep 01 12:49:56 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2474759344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.2474759344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.2622931901 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 11864447269 ps |
| CPU time | 22.69 seconds |
| Started | Sep 01 12:49:17 PM UTC 24 |
| Finished | Sep 01 12:49:42 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622931901 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.2622931901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.195346174 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 19127745766 ps |
| CPU time | 33.35 seconds |
| Started | Sep 01 12:49:17 PM UTC 24 |
| Finished | Sep 01 12:49:52 PM UTC 24 |
| Peak memory | 216584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=195346174 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.195346174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.2566923976 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 24783024947 ps |
| CPU time | 37.81 seconds |
| Started | Sep 01 12:49:17 PM UTC 24 |
| Finished | Sep 01 12:49:57 PM UTC 24 |
| Peak memory | 226920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566923976 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.2566923976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.2426359506 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 148281296 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:49:20 PM UTC 24 |
| Finished | Sep 01 12:49:22 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426359506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.2426359506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.981496058 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 153271347 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:49:20 PM UTC 24 |
| Finished | Sep 01 12:49:22 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=981496058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_bitstuff_err.981496058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.3876820018 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 496661075 ps |
| CPU time | 2.89 seconds |
| Started | Sep 01 12:49:23 PM UTC 24 |
| Finished | Sep 01 12:49:27 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876820018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_data_toggle_clear.3876820018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.3853165490 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 17659618690 ps |
| CPU time | 37.68 seconds |
| Started | Sep 01 12:49:23 PM UTC 24 |
| Finished | Sep 01 12:50:02 PM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3853165490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.3853165490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.1054828710 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 8391793214 ps |
| CPU time | 68.89 seconds |
| Started | Sep 01 12:49:23 PM UTC 24 |
| Finished | Sep 01 12:50:34 PM UTC 24 |
| Peak memory | 217500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054828710 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.1054828710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.3594026317 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 556051435 ps |
| CPU time | 2.97 seconds |
| Started | Sep 01 12:49:23 PM UTC 24 |
| Finished | Sep 01 12:49:28 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3594026317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.3594026317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.3596730324 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 138761836 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:49:23 PM UTC 24 |
| Finished | Sep 01 12:49:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596730324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.3596730324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_enable.246080264 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 37814978 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 12:49:26 PM UTC 24 |
| Finished | Sep 01 12:49:28 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=246080264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_enable.246080264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.1749653193 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 597456491 ps |
| CPU time | 3.31 seconds |
| Started | Sep 01 12:49:26 PM UTC 24 |
| Finished | Sep 01 12:49:30 PM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749653193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.1749653193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.4283102753 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 389444833 ps |
| CPU time | 2.07 seconds |
| Started | Sep 01 12:49:29 PM UTC 24 |
| Finished | Sep 01 12:49:32 PM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283102753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.4283102753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.1704331683 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 268427216 ps |
| CPU time | 1.79 seconds |
| Started | Sep 01 12:49:29 PM UTC 24 |
| Finished | Sep 01 12:49:32 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704331683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_fifo_levels.1704331683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.903437243 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 316713047 ps |
| CPU time | 2.71 seconds |
| Started | Sep 01 12:49:29 PM UTC 24 |
| Finished | Sep 01 12:49:33 PM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=903437243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_fifo_rst.903437243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.4132177411 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 168427701 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:49:32 PM UTC 24 |
| Finished | Sep 01 12:49:34 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4132177411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.4132177411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.2085699917 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 140250847 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 12:49:32 PM UTC 24 |
| Finished | Sep 01 12:49:34 PM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085699917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.2085699917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.1885641889 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 229986343 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:49:32 PM UTC 24 |
| Finished | Sep 01 12:49:35 PM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885641889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_trans.1885641889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.2182329324 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 2890234375 ps |
| CPU time | 34.59 seconds |
| Started | Sep 01 12:49:29 PM UTC 24 |
| Finished | Sep 01 12:50:05 PM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182329324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.2182329324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.640238207 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 5386134443 ps |
| CPU time | 35.37 seconds |
| Started | Sep 01 12:49:32 PM UTC 24 |
| Finished | Sep 01 12:50:09 PM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=640238207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.640238207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.1222936735 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 234290568 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 12:49:35 PM UTC 24 |
| Finished | Sep 01 12:49:38 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222936735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.1222936735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.1596164854 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 25946702788 ps |
| CPU time | 61.58 seconds |
| Started | Sep 01 12:49:35 PM UTC 24 |
| Finished | Sep 01 12:50:39 PM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1596164854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.1596164854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.1319720866 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 4915509378 ps |
| CPU time | 10.48 seconds |
| Started | Sep 01 12:49:35 PM UTC 24 |
| Finished | Sep 01 12:49:47 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1319720866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_link_suspend.1319720866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.3982299682 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 4942341518 ps |
| CPU time | 38.19 seconds |
| Started | Sep 01 12:49:36 PM UTC 24 |
| Finished | Sep 01 12:50:15 PM UTC 24 |
| Peak memory | 234196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3982299682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.3982299682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.159903811 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 3824758453 ps |
| CPU time | 28.47 seconds |
| Started | Sep 01 12:49:36 PM UTC 24 |
| Finished | Sep 01 12:50:06 PM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=159903811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.159903811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.536602490 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 294227598 ps |
| CPU time | 1.83 seconds |
| Started | Sep 01 12:49:38 PM UTC 24 |
| Finished | Sep 01 12:49:41 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=536602490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.536602490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.3399829484 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 205023606 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:49:38 PM UTC 24 |
| Finished | Sep 01 12:49:41 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399829484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.3399829484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.3741772837 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 3084084032 ps |
| CPU time | 27.69 seconds |
| Started | Sep 01 12:49:38 PM UTC 24 |
| Finished | Sep 01 12:50:07 PM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741772837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.3741772837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.1131511830 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 3155673949 ps |
| CPU time | 93.11 seconds |
| Started | Sep 01 12:49:40 PM UTC 24 |
| Finished | Sep 01 12:51:15 PM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1131511830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.1131511830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.3242778558 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 2321361090 ps |
| CPU time | 70.01 seconds |
| Started | Sep 01 12:49:40 PM UTC 24 |
| Finished | Sep 01 12:50:52 PM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3242778558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.3242778558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.614151418 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 199012948 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:49:40 PM UTC 24 |
| Finished | Sep 01 12:49:42 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=614151418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.614151418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.2190153868 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 139393610 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 12:49:40 PM UTC 24 |
| Finished | Sep 01 12:49:42 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2190153868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.2190153868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.1282942904 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 206363763 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 12:49:44 PM UTC 24 |
| Finished | Sep 01 12:49:46 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282942904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_nak_trans.1282942904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.2425409016 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 238202766 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 12:49:44 PM UTC 24 |
| Finished | Sep 01 12:49:46 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425409016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.2425409016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.2249077424 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 213024223 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 12:49:44 PM UTC 24 |
| Finished | Sep 01 12:49:46 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249077424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.2249077424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.24969381 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 180631290 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:49:44 PM UTC 24 |
| Finished | Sep 01 12:49:46 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24969381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_out_trans_nak.24969381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.388047788 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 175971900 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:49:44 PM UTC 24 |
| Finished | Sep 01 12:49:46 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=388047788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pending_in_trans.388047788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.408123859 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 202868597 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 12:49:44 PM UTC 24 |
| Finished | Sep 01 12:49:46 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=408123859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.408123859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.3937162619 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 147535807 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:49:44 PM UTC 24 |
| Finished | Sep 01 12:49:46 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3937162619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.3937162619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.2438566568 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 42224297 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:49:44 PM UTC 24 |
| Finished | Sep 01 12:49:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2438566568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.2438566568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.1094953228 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 18813936458 ps |
| CPU time | 61.17 seconds |
| Started | Sep 01 12:49:44 PM UTC 24 |
| Finished | Sep 01 12:50:47 PM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094953228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.1094953228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.169121230 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 208688328 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 12:49:44 PM UTC 24 |
| Finished | Sep 01 12:49:46 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=169121230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_pkt_received.169121230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.3852066090 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 173164325 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:49:45 PM UTC 24 |
| Finished | Sep 01 12:49:48 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3852066090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.3852066090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.1550630640 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 5048398976 ps |
| CPU time | 46.19 seconds |
| Started | Sep 01 12:49:48 PM UTC 24 |
| Finished | Sep 01 12:50:36 PM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550630640 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.1550630640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.332033084 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 11739632903 ps |
| CPU time | 117.77 seconds |
| Started | Sep 01 12:49:48 PM UTC 24 |
| Finished | Sep 01 12:51:48 PM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=332033084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.332033084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.1491942804 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 7033031596 ps |
| CPU time | 117.12 seconds |
| Started | Sep 01 12:49:48 PM UTC 24 |
| Finished | Sep 01 12:51:47 PM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491942804 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.1491942804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.3720890555 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 257534699 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 12:49:45 PM UTC 24 |
| Finished | Sep 01 12:49:48 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3720890555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_random_length_in_transaction.3720890555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.968609722 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 172511264 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:49:46 PM UTC 24 |
| Finished | Sep 01 12:49:48 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=968609722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.968609722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.880040529 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 20167582941 ps |
| CPU time | 40.6 seconds |
| Started | Sep 01 12:49:48 PM UTC 24 |
| Finished | Sep 01 12:50:30 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=880040529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_resume_link_active.880040529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.31545050 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 203639855 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:49:48 PM UTC 24 |
| Finished | Sep 01 12:49:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=31545050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_rx_crc_err.31545050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.1208524596 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 250318341 ps |
| CPU time | 1.72 seconds |
| Started | Sep 01 12:49:48 PM UTC 24 |
| Finished | Sep 01 12:49:51 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1208524596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_rx_full.1208524596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.2197246642 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 165917577 ps |
| CPU time | 1.48 seconds |
| Started | Sep 01 12:49:48 PM UTC 24 |
| Finished | Sep 01 12:49:51 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2197246642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.2197246642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.3935585161 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 166370901 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:49:48 PM UTC 24 |
| Finished | Sep 01 12:49:51 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935585161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.3935585161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.3728626247 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 240120239 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 12:49:48 PM UTC 24 |
| Finished | Sep 01 12:49:51 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728626247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.3728626247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.3079878561 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 1815739402 ps |
| CPU time | 22.33 seconds |
| Started | Sep 01 12:49:50 PM UTC 24 |
| Finished | Sep 01 12:50:14 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3079878561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.3079878561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.2148605966 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 172077018 ps |
| CPU time | 1.16 seconds |
| Started | Sep 01 12:49:50 PM UTC 24 |
| Finished | Sep 01 12:49:52 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148605966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.2148605966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.3263863267 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 204884747 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:49:50 PM UTC 24 |
| Finished | Sep 01 12:49:53 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263863267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_stall_trans.3263863267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.3463938226 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 911050058 ps |
| CPU time | 3.27 seconds |
| Started | Sep 01 12:49:50 PM UTC 24 |
| Finished | Sep 01 12:49:55 PM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463938226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.3463938226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.1262446678 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 11111218843 ps |
| CPU time | 303.85 seconds |
| Started | Sep 01 12:49:54 PM UTC 24 |
| Finished | Sep 01 12:55:02 PM UTC 24 |
| Peak memory | 237044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262446678 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.1262446678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.1705685471 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 1444250265 ps |
| CPU time | 32.01 seconds |
| Started | Sep 01 12:49:23 PM UTC 24 |
| Finished | Sep 01 12:49:57 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705685471 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.1705685471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.1468020144 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 479645501 ps |
| CPU time | 2.58 seconds |
| Started | Sep 01 12:49:54 PM UTC 24 |
| Finished | Sep 01 12:49:57 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1468020144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx _rx_disruption.1468020144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.2487310386 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 513926886 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2487310386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.2487310386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.2222624006 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 252457944 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222624006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 70.usbdev_fifo_levels.2222624006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.3389409590 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 541057155 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3389409590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_t x_rx_disruption.3389409590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.176575922 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 334031847 ps |
| CPU time | 1.02 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=176575922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.176575922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.989793382 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 278435048 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:31 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=989793382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 71.usbdev_fifo_levels.989793382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.1189721174 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 498625180 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1189721174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_t x_rx_disruption.1189721174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.217314551 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 495924316 ps |
| CPU time | 1.56 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=217314551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.217314551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.2383284232 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 579020866 ps |
| CPU time | 1.74 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2383284232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_t x_rx_disruption.2383284232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.1224081707 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 330301321 ps |
| CPU time | 1.28 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224081707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.1224081707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.2326978874 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 260029048 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326978874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 73.usbdev_fifo_levels.2326978874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.4123742569 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 479881120 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4123742569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.4123742569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.411604168 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 313523745 ps |
| CPU time | 1.32 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 214712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=411604168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 74.usbdev_fifo_levels.411604168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.2224083070 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 428350496 ps |
| CPU time | 1.37 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2224083070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.2224083070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.436770502 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 735815823 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=436770502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.436770502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.2359150972 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 147541832 ps |
| CPU time | 1.06 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359150972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 75.usbdev_fifo_levels.2359150972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.2384389761 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 590882193 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2384389761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_t x_rx_disruption.2384389761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.2169124588 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 325918885 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 214624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2169124588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.2169124588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.3718129990 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 196740223 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 214900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718129990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 76.usbdev_fifo_levels.3718129990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.1663879248 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 607869083 ps |
| CPU time | 1.83 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1663879248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_t x_rx_disruption.1663879248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.1594457432 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 243866868 ps |
| CPU time | 1.2 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1594457432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.1594457432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.1472712966 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 275159172 ps |
| CPU time | 1.1 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1472712966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 77.usbdev_fifo_levels.1472712966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.300981367 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 468957550 ps |
| CPU time | 1.62 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=300981367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_tx _rx_disruption.300981367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.1920224247 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 164670572 ps |
| CPU time | 0.87 seconds |
| Started | Sep 01 01:18:29 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920224247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.1920224247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.684671936 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 260081869 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=684671936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 78.usbdev_fifo_levels.684671936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.2931290422 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 617697469 ps |
| CPU time | 1.67 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2931290422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_t x_rx_disruption.2931290422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.3906524566 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 306117947 ps |
| CPU time | 1.11 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906524566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.3906524566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.3115237474 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 242924961 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3115237474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 79.usbdev_fifo_levels.3115237474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.85563693 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 473164050 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=85563693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_tx_ rx_disruption.85563693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.2071707017 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 120536586 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 12:50:22 PM UTC 24 |
| Finished | Sep 01 12:50:24 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071707017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.2071707017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.732430876 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 6594787351 ps |
| CPU time | 16.92 seconds |
| Started | Sep 01 12:49:54 PM UTC 24 |
| Finished | Sep 01 12:50:12 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=732430876 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.732430876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.1022593952 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 13833651862 ps |
| CPU time | 18.85 seconds |
| Started | Sep 01 12:49:54 PM UTC 24 |
| Finished | Sep 01 12:50:14 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022593952 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.1022593952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.1573956963 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 31249441244 ps |
| CPU time | 50.76 seconds |
| Started | Sep 01 12:49:54 PM UTC 24 |
| Finished | Sep 01 12:50:46 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573956963 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.1573956963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.3189546305 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 178012762 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:49:54 PM UTC 24 |
| Finished | Sep 01 12:49:57 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189546305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.3189546305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.1421077015 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 150716688 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:49:54 PM UTC 24 |
| Finished | Sep 01 12:49:57 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421077015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.1421077015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.3249221098 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 465993156 ps |
| CPU time | 2.78 seconds |
| Started | Sep 01 12:49:56 PM UTC 24 |
| Finished | Sep 01 12:50:00 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249221098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.3249221098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.3956350058 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 1221250296 ps |
| CPU time | 4.76 seconds |
| Started | Sep 01 12:49:56 PM UTC 24 |
| Finished | Sep 01 12:50:02 PM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3956350058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.3956350058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.1885040101 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 29358158662 ps |
| CPU time | 56.74 seconds |
| Started | Sep 01 12:49:56 PM UTC 24 |
| Finished | Sep 01 12:50:54 PM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885040101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.1885040101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.2164236526 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 1993407682 ps |
| CPU time | 20.9 seconds |
| Started | Sep 01 12:49:56 PM UTC 24 |
| Finished | Sep 01 12:50:18 PM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164236526 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.2164236526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.1405258088 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 903848202 ps |
| CPU time | 4.18 seconds |
| Started | Sep 01 12:49:58 PM UTC 24 |
| Finished | Sep 01 12:50:03 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405258088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.1405258088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.2221707253 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 167428097 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 12:49:58 PM UTC 24 |
| Finished | Sep 01 12:50:00 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2221707253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_disconnected.2221707253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_enable.1004459843 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 35137027 ps |
| CPU time | 1.08 seconds |
| Started | Sep 01 12:49:58 PM UTC 24 |
| Finished | Sep 01 12:50:00 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004459843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.1004459843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.652592092 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 685244257 ps |
| CPU time | 3.87 seconds |
| Started | Sep 01 12:49:58 PM UTC 24 |
| Finished | Sep 01 12:50:03 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=652592092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.652592092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.4287420620 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 239945710 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:49:58 PM UTC 24 |
| Finished | Sep 01 12:50:01 PM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287420620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.4287420620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.2265318812 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 262822098 ps |
| CPU time | 2.59 seconds |
| Started | Sep 01 12:50:00 PM UTC 24 |
| Finished | Sep 01 12:50:04 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265318812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_fifo_rst.2265318812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.2088236486 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 203504242 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 12:50:02 PM UTC 24 |
| Finished | Sep 01 12:50:05 PM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2088236486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.2088236486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.3281200413 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 141759324 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:50:02 PM UTC 24 |
| Finished | Sep 01 12:50:04 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3281200413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.3281200413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.3272395015 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 233345099 ps |
| CPU time | 1.8 seconds |
| Started | Sep 01 12:50:02 PM UTC 24 |
| Finished | Sep 01 12:50:05 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272395015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_trans.3272395015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.1837700178 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 4871315780 ps |
| CPU time | 128.92 seconds |
| Started | Sep 01 12:50:00 PM UTC 24 |
| Finished | Sep 01 12:52:11 PM UTC 24 |
| Peak memory | 234192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1837700178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.1837700178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.1918264405 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 11733833299 ps |
| CPU time | 95.46 seconds |
| Started | Sep 01 12:50:02 PM UTC 24 |
| Finished | Sep 01 12:51:40 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1918264405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.1918264405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.3955918287 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 222327768 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:50:02 PM UTC 24 |
| Finished | Sep 01 12:50:05 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955918287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_in_err.3955918287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.3826325576 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 32531298137 ps |
| CPU time | 48.61 seconds |
| Started | Sep 01 12:50:04 PM UTC 24 |
| Finished | Sep 01 12:50:54 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826325576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.3826325576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.973467313 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 3985892284 ps |
| CPU time | 9.46 seconds |
| Started | Sep 01 12:50:04 PM UTC 24 |
| Finished | Sep 01 12:50:15 PM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973467313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_suspend.973467313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.1092122004 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 3271810522 ps |
| CPU time | 42.84 seconds |
| Started | Sep 01 12:50:04 PM UTC 24 |
| Finished | Sep 01 12:50:48 PM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092122004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.1092122004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.1163095193 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 2542534668 ps |
| CPU time | 25.22 seconds |
| Started | Sep 01 12:50:04 PM UTC 24 |
| Finished | Sep 01 12:50:31 PM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1163095193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.1163095193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.3536198508 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 243628987 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 12:50:06 PM UTC 24 |
| Finished | Sep 01 12:50:08 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3536198508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.3536198508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.3885672597 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 215147728 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:50:06 PM UTC 24 |
| Finished | Sep 01 12:50:08 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3885672597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.3885672597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.3579376343 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 2288207215 ps |
| CPU time | 29.81 seconds |
| Started | Sep 01 12:50:06 PM UTC 24 |
| Finished | Sep 01 12:50:37 PM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579376343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.3579376343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.2259895454 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 2918174665 ps |
| CPU time | 33.14 seconds |
| Started | Sep 01 12:50:06 PM UTC 24 |
| Finished | Sep 01 12:50:41 PM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259895454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.2259895454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.3849753349 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 2007967935 ps |
| CPU time | 19.46 seconds |
| Started | Sep 01 12:50:06 PM UTC 24 |
| Finished | Sep 01 12:50:27 PM UTC 24 |
| Peak memory | 227496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849753349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.3849753349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.3711818575 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 165250440 ps |
| CPU time | 1.44 seconds |
| Started | Sep 01 12:50:09 PM UTC 24 |
| Finished | Sep 01 12:50:11 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3711818575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.3711818575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.1322087296 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 148518573 ps |
| CPU time | 1.19 seconds |
| Started | Sep 01 12:50:09 PM UTC 24 |
| Finished | Sep 01 12:50:11 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1322087296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.1322087296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.1396962961 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 262180153 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:50:09 PM UTC 24 |
| Finished | Sep 01 12:50:11 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396962961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_nak_trans.1396962961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.3483658931 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 147968640 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 12:50:09 PM UTC 24 |
| Finished | Sep 01 12:50:11 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483658931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.3483658931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.3734976175 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 189915874 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:50:11 PM UTC 24 |
| Finished | Sep 01 12:50:14 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734976175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_out_stall.3734976175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.1404656344 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 198191926 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:50:11 PM UTC 24 |
| Finished | Sep 01 12:50:14 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1404656344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.1404656344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.3824609346 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 156218167 ps |
| CPU time | 1.4 seconds |
| Started | Sep 01 12:50:11 PM UTC 24 |
| Finished | Sep 01 12:50:14 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824609346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.3824609346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.3293175741 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 225287395 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:50:11 PM UTC 24 |
| Finished | Sep 01 12:50:14 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293175741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.3293175741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.4189123123 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 152362394 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:50:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189123123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.4189123123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.2807138400 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 34092034 ps |
| CPU time | 0.88 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:50:18 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807138400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.2807138400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.3774725780 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 17385234094 ps |
| CPU time | 48.87 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:51:06 PM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774725780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_pkt_buffer.3774725780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.3853741109 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 159839420 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:50:18 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3853741109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_pkt_received.3853741109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.998951067 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 200655233 ps |
| CPU time | 1.6 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:50:19 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=998951067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_pkt_sent.998951067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.2364309774 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 2478640295 ps |
| CPU time | 57.05 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:51:15 PM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2364309774 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.2364309774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.2300811758 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 10663278440 ps |
| CPU time | 215.22 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:53:55 PM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300811758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.2300811758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.4262352366 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 6998824600 ps |
| CPU time | 34.39 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:50:52 PM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262352366 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.4262352366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.2618738998 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 246608259 ps |
| CPU time | 1.73 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:50:19 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2618738998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.2618738998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.1896568857 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 212731142 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:50:19 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896568857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.1896568857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.2996394933 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 20172593627 ps |
| CPU time | 28.89 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:50:46 PM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996394933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.2996394933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.2766364767 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 153683625 ps |
| CPU time | 1.21 seconds |
| Started | Sep 01 12:50:16 PM UTC 24 |
| Finished | Sep 01 12:50:19 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766364767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.2766364767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.3265655278 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 296116029 ps |
| CPU time | 1.92 seconds |
| Started | Sep 01 12:50:18 PM UTC 24 |
| Finished | Sep 01 12:50:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265655278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_rx_full.3265655278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.1082851955 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 155854560 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:50:18 PM UTC 24 |
| Finished | Sep 01 12:50:20 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1082851955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.1082851955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.2471549929 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 150339023 ps |
| CPU time | 1.27 seconds |
| Started | Sep 01 12:50:18 PM UTC 24 |
| Finished | Sep 01 12:50:20 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2471549929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.2471549929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.1941136369 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 246392643 ps |
| CPU time | 1.71 seconds |
| Started | Sep 01 12:50:18 PM UTC 24 |
| Finished | Sep 01 12:50:21 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941136369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.1941136369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.2175104569 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 1768289430 ps |
| CPU time | 17.34 seconds |
| Started | Sep 01 12:50:18 PM UTC 24 |
| Finished | Sep 01 12:50:37 PM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175104569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.2175104569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.2018519973 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 161325775 ps |
| CPU time | 1.23 seconds |
| Started | Sep 01 12:50:18 PM UTC 24 |
| Finished | Sep 01 12:50:20 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2018519973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.2018519973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.2559025340 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 154098272 ps |
| CPU time | 1.33 seconds |
| Started | Sep 01 12:50:22 PM UTC 24 |
| Finished | Sep 01 12:50:24 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559025340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.2559025340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.4104519027 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 313247944 ps |
| CPU time | 1.51 seconds |
| Started | Sep 01 12:50:22 PM UTC 24 |
| Finished | Sep 01 12:50:24 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104519027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.4104519027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.799023159 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 2353341728 ps |
| CPU time | 69.03 seconds |
| Started | Sep 01 12:50:22 PM UTC 24 |
| Finished | Sep 01 12:51:32 PM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799023159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_streaming_out.799023159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.3259946967 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 12828692525 ps |
| CPU time | 104.67 seconds |
| Started | Sep 01 12:50:22 PM UTC 24 |
| Finished | Sep 01 12:52:09 PM UTC 24 |
| Peak memory | 229684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259946967 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.3259946967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.462475140 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 1537448838 ps |
| CPU time | 14.75 seconds |
| Started | Sep 01 12:49:56 PM UTC 24 |
| Finished | Sep 01 12:50:12 PM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=462475140 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.462475140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.4209172911 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 528231535 ps |
| CPU time | 2.05 seconds |
| Started | Sep 01 12:50:22 PM UTC 24 |
| Finished | Sep 01 12:50:25 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4209172911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.4209172911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.2428631848 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 165659880 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2428631848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.2428631848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.890812977 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 173658685 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=890812977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 80.usbdev_fifo_levels.890812977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.2283295327 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 655082633 ps |
| CPU time | 1.81 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 214408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2283295327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_t x_rx_disruption.2283295327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.2770505032 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 413528391 ps |
| CPU time | 1.18 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770505032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.2770505032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.3908824165 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 277668435 ps |
| CPU time | 1.12 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908824165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 81.usbdev_fifo_levels.3908824165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/81.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.642198087 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 536584547 ps |
| CPU time | 1.43 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=642198087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_tx _rx_disruption.642198087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.3948362530 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 290726242 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948362530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.3948362530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.1502840626 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 312213822 ps |
| CPU time | 1.25 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 214808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1502840626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 82.usbdev_fifo_levels.1502840626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/82.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.3562820368 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 569552421 ps |
| CPU time | 1.66 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3562820368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.3562820368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.238292835 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 260589702 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=238292835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.238292835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.2684507960 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 242196362 ps |
| CPU time | 0.94 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684507960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 83.usbdev_fifo_levels.2684507960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.767283007 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 578073016 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:33 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=767283007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_tx _rx_disruption.767283007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.765093882 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 179236516 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:18:30 PM UTC 24 |
| Finished | Sep 01 01:18:32 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=765093882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.765093882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.2382642285 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 268752680 ps |
| CPU time | 1.01 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 214784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382642285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 84.usbdev_fifo_levels.2382642285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.111109140 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 547266426 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 214712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=111109140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_tx _rx_disruption.111109140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.2833760830 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 167084987 ps |
| CPU time | 0.81 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833760830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.2833760830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.2360749499 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 300541293 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360749499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 85.usbdev_fifo_levels.2360749499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.1913825883 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 576805063 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1913825883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.1913825883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.3011004327 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 382761741 ps |
| CPU time | 1.14 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011004327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.3011004327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.2561278954 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 179027372 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561278954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 86.usbdev_fifo_levels.2561278954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.1944643525 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 490485838 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1944643525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_t x_rx_disruption.1944643525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.2279989739 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 297230236 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279989739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.2279989739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.1186157562 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 171516285 ps |
| CPU time | 0.84 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186157562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 87.usbdev_fifo_levels.1186157562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.3313051701 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 589003603 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3313051701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.3313051701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.980872158 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 529942316 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=980872158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.980872158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.3042417667 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 167285551 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042417667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 88.usbdev_fifo_levels.3042417667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.2092549245 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 605308330 ps |
| CPU time | 1.64 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2092549245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_t x_rx_disruption.2092549245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2446054044 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 243026329 ps |
| CPU time | 0.92 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446054044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.2446054044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.1449815139 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 271022949 ps |
| CPU time | 1.04 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449815139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 89.usbdev_fifo_levels.1449815139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.3043922467 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 552323517 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3043922467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_t x_rx_disruption.3043922467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.2685043824 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 107281438 ps |
| CPU time | 1.17 seconds |
| Started | Sep 01 12:50:51 PM UTC 24 |
| Finished | Sep 01 12:50:53 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685043824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.2685043824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.1105171583 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 4416801896 ps |
| CPU time | 14.98 seconds |
| Started | Sep 01 12:50:22 PM UTC 24 |
| Finished | Sep 01 12:50:38 PM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105171583 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.1105171583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.2185412902 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 20872739013 ps |
| CPU time | 30.23 seconds |
| Started | Sep 01 12:50:22 PM UTC 24 |
| Finished | Sep 01 12:50:54 PM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185412902 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.2185412902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.2571124752 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 29057999672 ps |
| CPU time | 50.02 seconds |
| Started | Sep 01 12:50:22 PM UTC 24 |
| Finished | Sep 01 12:51:14 PM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2571124752 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.2571124752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.1560038539 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 204260011 ps |
| CPU time | 1.49 seconds |
| Started | Sep 01 12:50:22 PM UTC 24 |
| Finished | Sep 01 12:50:25 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1560038539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.1560038539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.1792576284 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 149314531 ps |
| CPU time | 1.41 seconds |
| Started | Sep 01 12:50:24 PM UTC 24 |
| Finished | Sep 01 12:50:26 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792576284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.1792576284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.1754521061 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 376632746 ps |
| CPU time | 2.26 seconds |
| Started | Sep 01 12:50:24 PM UTC 24 |
| Finished | Sep 01 12:50:27 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1754521061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.1754521061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.1422846978 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 1167576409 ps |
| CPU time | 4.99 seconds |
| Started | Sep 01 12:50:26 PM UTC 24 |
| Finished | Sep 01 12:50:32 PM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422846978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.1422846978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.3071150823 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 18437615244 ps |
| CPU time | 33.83 seconds |
| Started | Sep 01 12:50:26 PM UTC 24 |
| Finished | Sep 01 12:51:01 PM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071150823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.3071150823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.1080039744 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 826488627 ps |
| CPU time | 6.22 seconds |
| Started | Sep 01 12:50:26 PM UTC 24 |
| Finished | Sep 01 12:50:33 PM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080039744 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.1080039744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.1769231935 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 897008682 ps |
| CPU time | 2.71 seconds |
| Started | Sep 01 12:50:26 PM UTC 24 |
| Finished | Sep 01 12:50:30 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769231935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.1769231935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.4043794104 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 165622417 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:50:26 PM UTC 24 |
| Finished | Sep 01 12:50:28 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043794104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_disconnected.4043794104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_enable.2021316131 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 69063988 ps |
| CPU time | 1.03 seconds |
| Started | Sep 01 12:50:26 PM UTC 24 |
| Finished | Sep 01 12:50:28 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021316131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_enable.2021316131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.3895339734 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 1019701325 ps |
| CPU time | 4.04 seconds |
| Started | Sep 01 12:50:28 PM UTC 24 |
| Finished | Sep 01 12:50:33 PM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3895339734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.3895339734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.445318743 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 163133556 ps |
| CPU time | 1.26 seconds |
| Started | Sep 01 12:50:28 PM UTC 24 |
| Finished | Sep 01 12:50:30 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=445318743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.445318743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.2906726349 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 329781347 ps |
| CPU time | 1.93 seconds |
| Started | Sep 01 12:50:28 PM UTC 24 |
| Finished | Sep 01 12:50:31 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2906726349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_fifo_levels.2906726349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.2836729674 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 385373457 ps |
| CPU time | 3.82 seconds |
| Started | Sep 01 12:50:28 PM UTC 24 |
| Finished | Sep 01 12:50:33 PM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2836729674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_fifo_rst.2836729674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.2853734605 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 182631830 ps |
| CPU time | 1.42 seconds |
| Started | Sep 01 12:50:30 PM UTC 24 |
| Finished | Sep 01 12:50:32 PM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853734605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.2853734605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.1803474098 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 163399046 ps |
| CPU time | 1.34 seconds |
| Started | Sep 01 12:50:30 PM UTC 24 |
| Finished | Sep 01 12:50:32 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803474098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_stall.1803474098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.1290810275 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 226417275 ps |
| CPU time | 1.69 seconds |
| Started | Sep 01 12:50:30 PM UTC 24 |
| Finished | Sep 01 12:50:32 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290810275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_trans.1290810275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.781531105 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 3138538391 ps |
| CPU time | 92.83 seconds |
| Started | Sep 01 12:50:28 PM UTC 24 |
| Finished | Sep 01 12:52:03 PM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=781531105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.781531105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.1171988144 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 10199065702 ps |
| CPU time | 120.86 seconds |
| Started | Sep 01 12:50:32 PM UTC 24 |
| Finished | Sep 01 12:52:35 PM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171988144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.1171988144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.1064609237 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 185846672 ps |
| CPU time | 1.54 seconds |
| Started | Sep 01 12:50:32 PM UTC 24 |
| Finished | Sep 01 12:50:34 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064609237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_in_err.1064609237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.1845434345 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 30376136329 ps |
| CPU time | 65.03 seconds |
| Started | Sep 01 12:50:32 PM UTC 24 |
| Finished | Sep 01 12:51:38 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845434345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.1845434345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.2209213140 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 3549266441 ps |
| CPU time | 9.85 seconds |
| Started | Sep 01 12:50:32 PM UTC 24 |
| Finished | Sep 01 12:50:43 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209213140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.2209213140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.2020779175 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 2702382844 ps |
| CPU time | 73 seconds |
| Started | Sep 01 12:50:32 PM UTC 24 |
| Finished | Sep 01 12:51:47 PM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020779175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.2020779175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.3097082480 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 1503355344 ps |
| CPU time | 16.65 seconds |
| Started | Sep 01 12:50:34 PM UTC 24 |
| Finished | Sep 01 12:50:52 PM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097082480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.3097082480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.3570129151 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 291829950 ps |
| CPU time | 1.98 seconds |
| Started | Sep 01 12:50:34 PM UTC 24 |
| Finished | Sep 01 12:50:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570129151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.3570129151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.2774807293 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 189952822 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 12:50:35 PM UTC 24 |
| Finished | Sep 01 12:50:37 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774807293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.2774807293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.3397969443 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 2831216319 ps |
| CPU time | 21.74 seconds |
| Started | Sep 01 12:50:35 PM UTC 24 |
| Finished | Sep 01 12:50:58 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397969443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.3397969443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.1994323555 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 2273495217 ps |
| CPU time | 66.17 seconds |
| Started | Sep 01 12:50:35 PM UTC 24 |
| Finished | Sep 01 12:51:43 PM UTC 24 |
| Peak memory | 227564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1994323555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.1994323555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.4095833660 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 2834228109 ps |
| CPU time | 30.64 seconds |
| Started | Sep 01 12:50:35 PM UTC 24 |
| Finished | Sep 01 12:51:07 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095833660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.4095833660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.3220671330 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 152379409 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 12:50:35 PM UTC 24 |
| Finished | Sep 01 12:50:37 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3220671330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.3220671330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.135074954 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 147459771 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:50:37 PM UTC 24 |
| Finished | Sep 01 12:50:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135074954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.135074954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.447041317 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 208495390 ps |
| CPU time | 1.58 seconds |
| Started | Sep 01 12:50:37 PM UTC 24 |
| Finished | Sep 01 12:50:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=447041317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_nak_trans.447041317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.2425611269 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 164079761 ps |
| CPU time | 1.3 seconds |
| Started | Sep 01 12:50:37 PM UTC 24 |
| Finished | Sep 01 12:50:39 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425611269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_out_iso.2425611269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.3439183950 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 155433348 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:50:37 PM UTC 24 |
| Finished | Sep 01 12:50:39 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439183950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.3439183950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.749825028 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 163960824 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:50:44 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=749825028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_out_trans_nak.749825028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.3704994452 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 194956525 ps |
| CPU time | 1.29 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:50:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704994452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.3704994452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.2591021300 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 267302427 ps |
| CPU time | 1.84 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:50:45 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591021300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.2591021300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.1940193401 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 146438243 ps |
| CPU time | 1.31 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:50:44 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940193401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.1940193401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.3481413419 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 52010355 ps |
| CPU time | 1.07 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:50:44 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481413419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.3481413419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.1796229705 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 17565448299 ps |
| CPU time | 57.84 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:51:42 PM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796229705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.1796229705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.1667415791 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 153021781 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:50:44 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1667415791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.1667415791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.1866809256 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 224527383 ps |
| CPU time | 1.7 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:50:45 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866809256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_pkt_sent.1866809256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.3006731474 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 12219547424 ps |
| CPU time | 103.54 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:52:28 PM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3006731474 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.3006731474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.3325213573 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 6354149583 ps |
| CPU time | 33.67 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:51:22 PM UTC 24 |
| Peak memory | 234336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325213573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.3325213573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.2152799269 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 5750050603 ps |
| CPU time | 21.32 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:51:09 PM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152799269 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.2152799269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.3851668765 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 205966900 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:50:45 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851668765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_random_length_in_transaction.3851668765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.669370072 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 180453180 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:50:42 PM UTC 24 |
| Finished | Sep 01 12:50:45 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669370072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.669370072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.1844727862 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 20152746004 ps |
| CPU time | 28.95 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:51:17 PM UTC 24 |
| Peak memory | 217076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1844727862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_resume_link_active.1844727862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.3162992616 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 153588492 ps |
| CPU time | 0.97 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:50:49 PM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162992616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_rx_crc_err.3162992616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.3765178676 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 388918095 ps |
| CPU time | 1.63 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:50:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3765178676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.3765178676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.1222085097 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 151630610 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:50:50 PM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1222085097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.1222085097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.2193244887 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 169387538 ps |
| CPU time | 1.36 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:50:50 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2193244887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 9.usbdev_setup_trans_ignored.2193244887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.3149633472 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 250448016 ps |
| CPU time | 1.68 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:50:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149633472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.3149633472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.2737089772 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 2529631263 ps |
| CPU time | 70.31 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:52:00 PM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2737089772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.2737089772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.2537659394 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 165498150 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:50:50 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537659394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.2537659394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.114278871 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 194665521 ps |
| CPU time | 1.45 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:50:50 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=114278871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_stall_trans.114278871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.3514483422 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 559810484 ps |
| CPU time | 3.03 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:50:52 PM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514483422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.3514483422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.304239254 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 3105708327 ps |
| CPU time | 41.47 seconds |
| Started | Sep 01 12:50:47 PM UTC 24 |
| Finished | Sep 01 12:51:30 PM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=304239254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_streaming_out.304239254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.467883032 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 154309287 ps |
| CPU time | 1.46 seconds |
| Started | Sep 01 12:50:26 PM UTC 24 |
| Finished | Sep 01 12:50:29 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=467883032 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.467883032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.3820685975 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 509124276 ps |
| CPU time | 2.72 seconds |
| Started | Sep 01 12:50:51 PM UTC 24 |
| Finished | Sep 01 12:50:55 PM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3820685975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.3820685975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.3451607028 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 263677433 ps |
| CPU time | 0.99 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451607028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.3451607028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.1520055389 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 196779627 ps |
| CPU time | 0.86 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520055389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 90.usbdev_fifo_levels.1520055389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/90.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3325997465 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 610943297 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3325997465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.3325997465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.2562910665 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 480722871 ps |
| CPU time | 1.38 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2562910665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.2562910665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.3470713336 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 251142657 ps |
| CPU time | 0.98 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470713336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 91.usbdev_fifo_levels.3470713336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/91.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.3512742878 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 480827378 ps |
| CPU time | 1.47 seconds |
| Started | Sep 01 01:19:42 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3512742878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_t x_rx_disruption.3512742878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.3221741361 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 638309353 ps |
| CPU time | 1.35 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3221741361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.3221741361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.1737357467 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 149855131 ps |
| CPU time | 0.76 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:44 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1737357467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 92.usbdev_fifo_levels.1737357467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/92.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.3489393601 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 620999677 ps |
| CPU time | 1.85 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3489393601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.3489393601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.1400145544 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 634486242 ps |
| CPU time | 1.77 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1400145544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.1400145544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.3121441034 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 181759283 ps |
| CPU time | 0.8 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3121441034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 93.usbdev_fifo_levels.3121441034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/93.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1094359377 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 532444892 ps |
| CPU time | 1.91 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1094359377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.1094359377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.3247854773 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 427210369 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247854773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.3247854773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.3541610870 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 275344321 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541610870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 94.usbdev_fifo_levels.3541610870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/94.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.1191491060 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 476731602 ps |
| CPU time | 1.76 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1191491060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_t x_rx_disruption.1191491060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.4011083396 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 602894508 ps |
| CPU time | 1.61 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011083396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.4011083396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.2056887551 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 271737006 ps |
| CPU time | 1.24 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056887551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 95.usbdev_fifo_levels.2056887551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1862451286 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 645737526 ps |
| CPU time | 1.92 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1862451286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.1862451286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.1006214298 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 440561537 ps |
| CPU time | 1.52 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1006214298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.1006214298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.1339704470 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 251365186 ps |
| CPU time | 1.15 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1339704470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 96.usbdev_fifo_levels.1339704470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.217316876 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 514348493 ps |
| CPU time | 1.53 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=217316876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_tx _rx_disruption.217316876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.2327054043 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 173987367 ps |
| CPU time | 0.89 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327054043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 97.usbdev_fifo_levels.2327054043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.614904145 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 506988015 ps |
| CPU time | 1.75 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=614904145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_tx _rx_disruption.614904145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.1223476865 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 412336700 ps |
| CPU time | 1.39 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223476865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.1223476865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.545624971 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 270171816 ps |
| CPU time | 1.5 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 216988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=545624971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 98.usbdev_fifo_levels.545624971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.1320352724 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 512138793 ps |
| CPU time | 1.86 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1320352724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.1320352724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.873681940 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 308471349 ps |
| CPU time | 1.23 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=873681940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.873681940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.2449457687 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 334547330 ps |
| CPU time | 1.09 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:45 PM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449457687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 99.usbdev_fifo_levels.2449457687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.1538106582 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 620372199 ps |
| CPU time | 1.83 seconds |
| Started | Sep 01 01:19:43 PM UTC 24 |
| Finished | Sep 01 01:19:46 PM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1538106582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_t x_rx_disruption.1538106582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_31/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
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